--- /dev/null
+http://www.uwsg.indiana.edu/hypermail/linux/kernel/0802.1/3541.html
+
+Here is a rewrite of spitz.h, which includes comments documenting
+function of particular GPIO pins.
+
+spitz_h_rewrite.patch provides:
+- no changes in compiled code
+- partial spitz.h rewrite:
+ * organized by function
+ * describes complete GPIO pinout
+ * comments added
+ * removed defines cloning pxa-regs.h
+- prefer generic pxa-regs.h GPIO if available
+- use GPIO names instead of numbers
+
+Thanks to Trisoft for providing needed information.
+
+Index: linux-2.6.24/arch/arm/mach-pxa/spitz_pm.c
+===================================================================
+--- linux-2.6.24.orig/arch/arm/mach-pxa/spitz_pm.c 2008-01-24 22:58:37.000000000 +0000
++++ linux-2.6.24/arch/arm/mach-pxa/spitz_pm.c 2008-02-13 13:49:22.000000000 +0000
+@@ -110,9 +110,9 @@
+ pxa_gpio_mode(GPIO18_RDY|GPIO_OUT | GPIO_DFLT_HIGH);
+
+ PRER = GPIO_bit(SPITZ_GPIO_KEY_INT);
+- PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET);
+- PWER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET) | PWER_RTC;
+- PKWR = GPIO_bit(SPITZ_GPIO_SYNC) | GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET);
++ PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(GPIO1_RST);
++ PWER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(GPIO1_RST) | PWER_RTC;
++ PKWR = GPIO_bit(SPITZ_GPIO_SYNC) | GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(GPIO1_RST);
+ PKSR = 0xffffffff; // clear
+
+ /* nRESET_OUT Disable */
+@@ -128,7 +128,7 @@
+ static void spitz_postsuspend(void)
+ {
+ pxa_gpio_mode(GPIO18_RDY_MD);
+- pxa_gpio_mode(10 | GPIO_IN);
++ pxa_gpio_mode(SPITZ_GPIO_NC_10 | GPIO_IN);
+ }
+
+ static int spitz_should_wakeup(unsigned int resume_on_alarm)
+Index: linux-2.6.24/drivers/video/pxafb.c
+===================================================================
+--- linux-2.6.24.orig/drivers/video/pxafb.c 2008-02-13 13:49:04.000000000 +0000
++++ linux-2.6.24/drivers/video/pxafb.c 2008-02-13 13:49:57.000000000 +0000
+@@ -920,7 +920,7 @@
+ return;
+ }
+
+- for (gpio = 58; ldd_bits > 0; gpio++, ldd_bits--) {
++ for (gpio = GPIO58_LDD_0; ldd_bits > 0; gpio++, ldd_bits--) {
+ pxa_gpio_mode(gpio | GPIO_ALT_FN_2_OUT);
+ }
+ pxa_gpio_mode(GPIO74_LCD_FCLK_MD);
+Index: linux-2.6.24/include/asm-arm/arch-pxa/akita.h
+===================================================================
+--- linux-2.6.24.orig/include/asm-arm/arch-pxa/akita.h 2008-01-24 22:58:37.000000000 +0000
++++ linux-2.6.24/include/asm-arm/arch-pxa/akita.h 2008-02-13 13:49:22.000000000 +0000
+@@ -12,11 +12,11 @@
+ /* Akita IO Expander GPIOs */
+
+ #define AKITA_IOEXP_RESERVED_7 (1 << 7)
+-#define AKITA_IOEXP_IR_ON (1 << 6)
+-#define AKITA_IOEXP_AKIN_PULLUP (1 << 5)
+-#define AKITA_IOEXP_BACKLIGHT_CONT (1 << 4)
+-#define AKITA_IOEXP_BACKLIGHT_ON (1 << 3)
+-#define AKITA_IOEXP_MIC_BIAS (1 << 2)
++#define AKITA_IOEXP_IR_ON (1 << 6) /* IrDA On */
++#define AKITA_IOEXP_AKIN_PULLUP (1 << 5) /* Pull-Up for Remote */
++#define AKITA_IOEXP_BACKLIGHT_CONT (1 << 4) /* Backlight Control */
++#define AKITA_IOEXP_BACKLIGHT_ON (1 << 3) /* Backlight On */
++#define AKITA_IOEXP_MIC_BIAS (1 << 2) /* Mic Bias On */
+ #define AKITA_IOEXP_RESERVED_1 (1 << 1)
+ #define AKITA_IOEXP_RESERVED_0 (1 << 0)
+
+Index: linux-2.6.24/include/asm-arm/arch-pxa/pxa-regs.h
+===================================================================
+--- linux-2.6.24.orig/include/asm-arm/arch-pxa/pxa-regs.h 2008-02-13 13:49:07.000000000 +0000
++++ linux-2.6.24/include/asm-arm/arch-pxa/pxa-regs.h 2008-02-13 13:49:22.000000000 +0000
+@@ -1334,6 +1334,7 @@
+ #define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */
+ #define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */
+ #define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
++#define GPIO104_pSKTSEL 104 /* PCMCIA Socket Select (PXA27x) */
+ #define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */
+ #define GPIO110_MMCDAT2 110 /* MMC DAT2 (PXA27x) */
+ #define GPIO110_MMCCS0 110 /* MMC Chip Select 0 (PXA27x) */
+Index: linux-2.6.24/include/asm-arm/arch-pxa/spitz.h
+===================================================================
+--- linux-2.6.24.orig/include/asm-arm/arch-pxa/spitz.h 2008-02-13 13:49:01.000000000 +0000
++++ linux-2.6.24/include/asm-arm/arch-pxa/spitz.h 2008-02-13 13:49:22.000000000 +0000
+@@ -1,8 +1,9 @@
+ /*
+- * Hardware specific definitions for SL-Cx000 series of PDAs
++ * Hardware specific definitions for SL-Cxx00 series of PDAs
+ *
+ * Copyright (c) 2005 Alexander Wykes
+ * Copyright (c) 2005 Richard Purdie
++ * Copyright (c) 2008 Stanislav Brabec
+ *
+ * Based on Sharp's 2.4 kernel patches
+ *
+@@ -13,140 +14,257 @@
+ */
+ #ifndef __ASM_ARCH_SPITZ_H
+ #define __ASM_ARCH_SPITZ_H 1
+-#endif
+
+-#include <linux/fb.h>
++#include <asm-arm/arch-pxa/irqs.h>
++#include <linux/platform_device.h>
+
+ /* Spitz/Akita GPIOs */
+
+-#define SPITZ_GPIO_KEY_INT (0) /* Key Interrupt */
+-#define SPITZ_GPIO_RESET (1)
+-#define SPITZ_GPIO_nSD_DETECT (9)
+-#define SPITZ_GPIO_TP_INT (11) /* Touch Panel interrupt */
+-#define SPITZ_GPIO_AK_INT (13) /* Remote Control */
+-#define SPITZ_GPIO_ADS7846_CS (14)
+-#define SPITZ_GPIO_SYNC (16)
+-#define SPITZ_GPIO_MAX1111_CS (20)
+-#define SPITZ_GPIO_FATAL_BAT (21)
+-#define SPITZ_GPIO_HSYNC (22)
+-#define SPITZ_GPIO_nSD_CLK (32)
+-#define SPITZ_GPIO_USB_DEVICE (35)
+-#define SPITZ_GPIO_USB_HOST (37)
+-#define SPITZ_GPIO_USB_CONNECT (41)
+-#define SPITZ_GPIO_LCDCON_CS (53)
+-#define SPITZ_GPIO_nPCE (54)
+-#define SPITZ_GPIO_nSD_WP (81)
+-#define SPITZ_GPIO_ON_RESET (89)
+-#define SPITZ_GPIO_BAT_COVER (90)
+-#define SPITZ_GPIO_CF_CD (94)
+-#define SPITZ_GPIO_ON_KEY (95)
+-#define SPITZ_GPIO_SWA (97)
+-#define SPITZ_GPIO_SWB (96)
+-#define SPITZ_GPIO_CHRG_FULL (101)
+-#define SPITZ_GPIO_CO (101)
+-#define SPITZ_GPIO_CF_IRQ (105)
+-#define SPITZ_GPIO_AC_IN (115)
+-#define SPITZ_GPIO_HP_IN (116)
++/* This list refers to all GPIO pins either in defines or in comments.
++ *
++ * GPIO pins not listed:
++ * GPIO2 SYS_EN: System Power Enable
++ * GPIO5-GPIO8 PWR_CAP0-PWR_CAP3: sleep DC-DC converter power capacitors
++ * GPIO40 not connected
++ */
+
+-/* Spitz Only GPIOs */
+
+-#define SPITZ_GPIO_CF2_IRQ (106) /* CF slot1 Ready */
+-#define SPITZ_GPIO_CF2_CD (93)
++/* Spitz/Akita System GPIO */
++
++#define SPITZ_GPIO_KEY_INT (0) /* Key Interrupt */
++#define SPITZ_GPIO_SYNC (16) /* IOPORT Wake Up (input) */
++#define SPITZ_GPIO_NAND_CS (79) /* NAND Flash Chip Select */
++#define SPITZ_GPIO_NC_10 (10) /* Not Connected (but used in kernel) */
++/* This GPIO pin is connected:
++ * GPIO1_RST
++ */
+
+
++/* Compact Flash Interface */
++
++/* Spitz/Akita Compact Flash Interface */
++#define SPITZ_GPIO_CF_CD (94) /* CF IRQ */
++#define SPITZ_GPIO_CF_IRQ (105) /* CF Ready */
++/* These GPIO pins are connected:
++ * GPIO48_nPOE
++ * GPIO49_nPWE
++ * GPIO50_nPIOR
++ * GPIO51_nPIOW
++ * GPIO54_nPCE_2
++ * GPIO55_nPREG
++ * GPIO56_nPWAIT
++ * GPIO57_nIOIS16
++ * GPIO80_nCS_4
++ * GPIO85_nPCE_1
++ * GPIO104_pSKTSEL
++ */
++
++/* Spitz only Compact Flash Interface */
++#define SPITZ_GPIO_CF2_CD (93) /* CF slot1 IRQ */
++#define SPITZ_GPIO_CF2_IRQ (106) /* CF slot1 Ready */
++/* This GPIO pin is connected:
++ * GPIO78_nCS_2
++ */
++
++
++/* Spitz/Akita Battery, Power and Service Connector */
++
++#define SPITZ_GPIO_FATAL_BAT (21) /* Fatal Battery */
++#define SPITZ_GPIO_BAT_COVER (90) /* Battery Cover switch */
++#define SPITZ_GPIO_BAT_COVER2 (15) /* Battery Cover switch, parallel pin */
++#define SPITZ_GPIO_CHRG_FULL (101) /* Battery Full */
++#define SPITZ_GPIO_AC_IN (115) /* External Power Supply is active */
++#define SPITZ_GPIO_ON_RESET (89) /* Software Reset */
++#define SPITZ_GPIO_SERVICE0 (83) /* Service Connector */
++#define SPITZ_GPIO_SERVICE1 (84) /* Service Connector */
++/* This GPIO pin is connected:
++ * GPIO18_RDY
++ */
++
++
++/* Spitz/Akita Display Controller */
++
++#define SPITZ_GPIO_HSYNC (22) /* Line Sync Feedback */
++/* These GPIO pins are connected:
++ * GPIO58_LDD_0-GPIO58_LDD_15
++ * GPIO74_LCD_FCLK
++ * GPIO75_LCD_LCLK
++ * GPIO76_LCD_PCLK
++ * GPIO77_LCD_ACBIAS
++ */
++
++
++/* Spitz/Akita SSP/SPI Bus and Devices */
++
++#define SPITZ_GPIO_SSP_CLK (19) /* SSP bus Clock */
++#define SPITZ_GPIO_SSP_RXD (86) /* SSP bus RxD */
++#define SPITZ_GPIO_SSP_TXD (87) /* SSP bus TxD */
++#define SPITZ_GPIO_TP_INT (11) /* Touch Panel IRQ */
++#define SPITZ_GPIO_ADS7846_CS (14) /* Touch Panel Controller Chip Select */
++#define SPITZ_GPIO_MAX1111_CS (20) /* Multi Channel ADC Chip Select */
++#define SPITZ_GPIO_LCDCON_CS (53) /* LCD Controller Chip Select */
++
++
++/* Spitz/Akita Supplementary USB OTG Pins */
++
++#define SPITZ_GPIO_USB_DEVICE (35) /* USB Client power is present */
++#define SPITZ_GPIO_USB_HOST (37) /* USB OTG 5V Host power supply control */
++#define SPITZ_GPIO_USB_CONNECT (41) /* USB Host Cable is connected */
++
++
++/* Spitz/Akita Audio */
++
++#define SPITZ_GPIO_HP_IN (116) /* CPU Headphone detect */
++#define SPITZ_GPIO_AK_INT (13) /* Remote Control detect */
++/* These GPIO AC97 pins are connected:
++ * GPIO28_BITCLK
++ * GPIO29_SDATA_IN
++ * GPIO30_SDATA_OUT
++ * GPIO31_SYNC
++ * GPIO113_AC97_RESET_N
++ */
++
++
++/* Spitz/Akita SD Slot */
++
++#define SPITZ_GPIO_nSD_DETECT (9) /* SD Card Presence */
++#define SPITZ_GPIO_nSD_WP (81) /* SD Write Protection */
++/* These GPIO pins are connected:
++ * GPIO32_MMCCLK
++ * GPIO92_MMCDAT0
++ * GPIO109_MMCDAT1
++ * GPIO110_MMCDAT2
++ * GPIO111_MMCDAT3
++ * GPIO112_MMCCMD
++ */
++
++/* Spitz/Akita I2C bus */
++#define SPITZ_GPIO_SCL (117) /* I2C SCL */
++#define SPITZ_GPIO_SDA (118) /* I2C SDA */
++#define SPITZ_GPIO_PWR_SCL (3) /* I2C SCL power */
++#define SPITZ_GPIO_PWR_SDA (4) /* I2C SDA power */
++
++/* audio codec pins */
++
++
++/* Spitz/Akita UART ports */
++
++/* Fully Featured UART - connected to IOPORT connector */
++#define SPITZ_GPIO_FFRXD (102) /* IOPORT has nRXD inverted levels */
++#define SPITZ_GPIO_FFTXD (99) /* IOPORT has nTXD inverted levels */
++#define SPITZ_GPIO_FFRTS (98)
++#define SPITZ_GPIO_FFCTS (100)
++#define SPITZ_GPIO_FFDTR (82)
++#define SPITZ_GPIO_FFDSR (33)
++
++/* These UART GPIO pins are connected to Bluetooth
++ * (only on Akita version with Bluetooth)
++ * GPIO42_BTRXD
++ * GPIO43_BTTXD
++ * GPIO44_BTCTS
++ * GPIO45_BTRTS
++ */
++
++/* These UART GPIO pins are connected to IrDA:
++ * GPIO46_STRXD
++ * GPIO47_STTXD
++ */
++
+ /* Spitz/Akita Keyboard Definitions */
+
+-#define SPITZ_KEY_STROBE_NUM (11)
+-#define SPITZ_KEY_SENSE_NUM (7)
+-#define SPITZ_GPIO_G0_STROBE_BIT 0x0f800000
+-#define SPITZ_GPIO_G1_STROBE_BIT 0x00100000
+-#define SPITZ_GPIO_G2_STROBE_BIT 0x01000000
+-#define SPITZ_GPIO_G3_STROBE_BIT 0x00041880
+-#define SPITZ_GPIO_G0_SENSE_BIT 0x00021000
+-#define SPITZ_GPIO_G1_SENSE_BIT 0x000000d4
+-#define SPITZ_GPIO_G2_SENSE_BIT 0x08000000
+-#define SPITZ_GPIO_G3_SENSE_BIT 0x00000000
+-
+-#define SPITZ_GPIO_KEY_STROBE0 88
+-#define SPITZ_GPIO_KEY_STROBE1 23
+-#define SPITZ_GPIO_KEY_STROBE2 24
+-#define SPITZ_GPIO_KEY_STROBE3 25
+-#define SPITZ_GPIO_KEY_STROBE4 26
+-#define SPITZ_GPIO_KEY_STROBE5 27
+-#define SPITZ_GPIO_KEY_STROBE6 52
+-#define SPITZ_GPIO_KEY_STROBE7 103
+-#define SPITZ_GPIO_KEY_STROBE8 107
+-#define SPITZ_GPIO_KEY_STROBE9 108
+-#define SPITZ_GPIO_KEY_STROBE10 114
+-
+-#define SPITZ_GPIO_KEY_SENSE0 12
+-#define SPITZ_GPIO_KEY_SENSE1 17
+-#define SPITZ_GPIO_KEY_SENSE2 91
+-#define SPITZ_GPIO_KEY_SENSE3 34
+-#define SPITZ_GPIO_KEY_SENSE4 36
+-#define SPITZ_GPIO_KEY_SENSE5 38
+-#define SPITZ_GPIO_KEY_SENSE6 39
++#define SPITZ_KEY_STROBE_NUM (11)
++#define SPITZ_KEY_SENSE_NUM (7)
++#define SPITZ_GPIO_G0_STROBE_BIT 0x0f800000
++#define SPITZ_GPIO_G1_STROBE_BIT 0x00100000
++#define SPITZ_GPIO_G2_STROBE_BIT 0x01000000
++#define SPITZ_GPIO_G3_STROBE_BIT 0x00041880
++#define SPITZ_GPIO_G0_SENSE_BIT 0x00021000
++#define SPITZ_GPIO_G1_SENSE_BIT 0x000000d4
++#define SPITZ_GPIO_G2_SENSE_BIT 0x08000000
++#define SPITZ_GPIO_G3_SENSE_BIT 0x00000000
++#define SPITZ_GPIO_KEY_STROBE0 (88)
++#define SPITZ_GPIO_KEY_STROBE1 (23)
++#define SPITZ_GPIO_KEY_STROBE2 (24)
++#define SPITZ_GPIO_KEY_STROBE3 (25)
++#define SPITZ_GPIO_KEY_STROBE4 (26)
++#define SPITZ_GPIO_KEY_STROBE5 (27)
++#define SPITZ_GPIO_KEY_STROBE6 (52)
++#define SPITZ_GPIO_KEY_STROBE7 (103)
++#define SPITZ_GPIO_KEY_STROBE8 (107)
++#define SPITZ_GPIO_KEY_STROBE9 (108)
++#define SPITZ_GPIO_KEY_STROBE10 (114)
++#define SPITZ_GPIO_KEY_SENSE0 (12)
++#define SPITZ_GPIO_KEY_SENSE1 (17)
++#define SPITZ_GPIO_KEY_SENSE2 (91)
++#define SPITZ_GPIO_KEY_SENSE3 (34)
++#define SPITZ_GPIO_KEY_SENSE4 (36)
++#define SPITZ_GPIO_KEY_SENSE5 (38)
++#define SPITZ_GPIO_KEY_SENSE6 (39)
++
++#define SPITZ_GPIO_SWA (97) /* Keyboard Interrupt A */
++#define SPITZ_GPIO_SWB (96) /* Keyboard Interrupt B */
++#define SPITZ_GPIO_ON_KEY (95) /* Power On Key */
+
+
+-/* Spitz Scoop Device (No. 1) GPIOs */
++/* Spitz/Akita Scoop Device (No. 1) GPIOs */
+ /* Suspend States in comments */
+-#define SPITZ_SCP_LED_GREEN SCOOP_GPCR_PA11 /* Keep */
+-#define SPITZ_SCP_JK_B SCOOP_GPCR_PA12 /* Keep */
+-#define SPITZ_SCP_CHRG_ON SCOOP_GPCR_PA13 /* Keep */
+-#define SPITZ_SCP_MUTE_L SCOOP_GPCR_PA14 /* Low */
+-#define SPITZ_SCP_MUTE_R SCOOP_GPCR_PA15 /* Low */
+-#define SPITZ_SCP_CF_POWER SCOOP_GPCR_PA16 /* Keep */
+-#define SPITZ_SCP_LED_ORANGE SCOOP_GPCR_PA17 /* Keep */
+-#define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */
+-#define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */
++#define SPITZ_SCP_LED_GREEN SCOOP_GPCR_PA11 /* Green LED, Keep */
++#define SPITZ_SCP_JK_B SCOOP_GPCR_PA12 /* Fast Charge On, Keep */
++#define SPITZ_SCP_CHRG_ON SCOOP_GPCR_PA13 /* Charge On, Keep */
++#define SPITZ_SCP_MUTE_L SCOOP_GPCR_PA14 /* Extra Mute Left, Low */
++#define SPITZ_SCP_MUTE_R SCOOP_GPCR_PA15 /* Extra Mute Right, Low */
++#define SPITZ_SCP_CF_POWER SCOOP_GPCR_PA16 /* CF+SD Power Circuit, Keep */
++#define SPITZ_SCP_LED_ORANGE SCOOP_GPCR_PA17 /* Orange LED, Keep */
++#define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Dummy Load, Low */
++#define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Battery Sensor On, Low */
+
+ #define SPITZ_SCP_IO_DIR (SPITZ_SCP_LED_GREEN | SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \
+- SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_LED_ORANGE | \
+- SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
++ SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_LED_ORANGE | \
++ SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
+ #define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R)
+ #define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
+ #define SPITZ_SCP_SUS_SET 0
+
+ /* Spitz Scoop Device (No. 2) GPIOs */
+-/* Suspend States in comments */
+-#define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */
+-#define SPITZ_SCP2_AKIN_PULLUP SCOOP_GPCR_PA12 /* Keep */
+-#define SPITZ_SCP2_RESERVED_1 SCOOP_GPCR_PA13 /* High */
+-#define SPITZ_SCP2_RESERVED_2 SCOOP_GPCR_PA14 /* Low */
+-#define SPITZ_SCP2_RESERVED_3 SCOOP_GPCR_PA15 /* Low */
+-#define SPITZ_SCP2_RESERVED_4 SCOOP_GPCR_PA16 /* Low */
+-#define SPITZ_SCP2_BACKLIGHT_CONT SCOOP_GPCR_PA17 /* Low */
+-#define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */
+-#define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */
++/* Suspend States in comments
++ * Spitz only, Akita uses corresponding AKITA_IOEXP_ */
++#define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* IrDA On, High */
++#define SPITZ_SCP2_AKIN_PULLUP SCOOP_GPCR_PA12 /* Pull-Up for Remote, Keep */
++#define SPITZ_SCP2_RESERVED_1 SCOOP_GPCR_PA13 /* High */
++#define SPITZ_SCP2_RESERVED_2 SCOOP_GPCR_PA14 /* Low */
++#define SPITZ_SCP2_RESERVED_3 SCOOP_GPCR_PA15 /* Low */
++#define SPITZ_SCP2_RESERVED_4 SCOOP_GPCR_PA16 /* Low */
++#define SPITZ_SCP2_BACKLIGHT_CONT SCOOP_GPCR_PA17 /* Backlight Control, Low */
++#define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Backlight On, Low */
++#define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Mic Bias On, Low */
+
+ #define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \
+- SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
+- SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
++ SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
++ SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
+
+ #define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1)
+ #define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
+- SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
++ SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
+ #define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
+
+
+-/* Spitz IRQ Definitions */
++/* Spitz/Akita IRQ Definitions */
+
+-#define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT)
+-#define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN)
+-#define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT)
+-#define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN)
+-#define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT)
+-#define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC)
+-#define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY)
+-#define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA)
+-#define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB)
++#define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT)
++#define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN)
++#define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT)
++#define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN)
++#define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT)
++#define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC)
++#define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY)
++#define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA)
++#define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB)
+ #define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER)
+ #define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT)
+-#define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO)
+-#define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ)
+-#define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD)
+-#define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ)
+-#define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT)
++#define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ)
++#define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD)
++#define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ)
++#define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT)
+ #define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT)
+
+ /*
+@@ -156,3 +274,5 @@
+ extern struct platform_device spitzscoop2_device;
+ extern struct platform_device spitzssp_device;
+ extern struct sharpsl_charger_machinfo spitz_pm_machinfo;
++
++#endif
+Index: linux-2.6.24/sound/arm/pxa2xx-ac97.c
+===================================================================
+--- linux-2.6.24.orig/sound/arm/pxa2xx-ac97.c 2008-01-24 22:58:37.000000000 +0000
++++ linux-2.6.24/sound/arm/pxa2xx-ac97.c 2008-02-13 13:49:22.000000000 +0000
+@@ -133,10 +133,10 @@
+ #ifdef CONFIG_PXA27x
+ /* warm reset broken on Bulverde,
+ so manually keep AC97 reset high */
+- pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH);
++ pxa_gpio_mode(GPIO113_AC97_RESET_N | GPIO_OUT | GPIO_DFLT_HIGH);
+ udelay(10);
+ GCR |= GCR_WARM_RST;
+- pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
++ pxa_gpio_mode(GPIO113_AC97_RESET_N_MD);
+ udelay(500);
+ #else
+ GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
+@@ -335,7 +335,7 @@
+ pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
+ #ifdef CONFIG_PXA27x
+ /* Use GPIO 113 as AC97 Reset on Bulverde */
+- pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
++ pxa_gpio_mode(GPIO113_AC97_RESET_N_MD);
+ #endif
+ pxa_set_cken(CKEN_AC97, 1);
+
git.openpandora.org / openembedded.git / commitdiff