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drm/i915: fix relaxed tiling for gen <= 3 && !g33
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Sun, 14 Nov 2010 21:32:36 +0000 (22:32 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Mon, 15 Nov 2010 05:22:16 +0000 (05:22 +0000)
g33/pineview doesn't have any alignment constrains for unfenced tiled
buffers. But older chips have. Fix this.

Problem introduced in a00b10c360b35d6431a94cbf130a4e162870d661.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

No differences found
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