ppc: Drop DM_PCI from config files

Now that DM_PCI is always enabled we don't need to check it. Drop this
old code.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 32e1925..d3e5da0 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -370,23 +370,7 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 #if defined(CONFIG_PCI)
-
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT            1       /* Use common FSL init code */
-#define CONFIG_PCI_INDIRECT_BRIDGE     1
-#define CONFIG_SYS_PCIE1_NAME          "Slot"
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
-#else
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xa0000000
-#endif
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00100000      /*   1M */
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
-
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_TSEC_ENET)

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index f5209e1..b7e44d1 100644 (file)
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -150,34 +150,6 @@
 #define CONFIG_SYS_PCIE2_IO_PHYS       0xffc10000
 #endif
 
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
-#define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
-#define CONFIG_SYS_PCIE1_NAME          "mini PCIe Slot"
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE1_MEM_BUS       0x80000000
-#else
-#define CONFIG_SYS_PCIE1_MEM_BUS       0x80000000
-#endif
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-
-#if defined(CONFIG_TARGET_P1010RDB_PA)
-#define CONFIG_SYS_PCIE2_NAME          "PCIe Slot"
-#elif defined(CONFIG_TARGET_P1010RDB_PB)
-#define CONFIG_SYS_PCIE2_NAME          "mini PCIe Slot"
-#endif
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xc0000000
-#else
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xa0000000
-#endif
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif
 

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index b5b1594..4ef0613 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -417,23 +417,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 #ifdef CONFIG_PCI
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE3_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE       0x00010000      /* 64k */
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 1b4720d..1873044 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -487,23 +487,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_PCIE3_IO_PHYS       0xff8020000ull
 #endif
 
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x10000000 /* 256M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE      0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE3_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 57a0bf5..fb215bb 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -537,26 +537,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 #define CONFIG_SYS_PCIE4_IO_PHYS       0xff8030000ull
 #endif
 
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE      0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE3_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE4_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_SIZE      0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE4_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE4_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#endif
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index b8d1693..f61b40f 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -486,26 +486,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_PCIE4_IO_PHYS       0xff8030000ull
 
 #ifdef CONFIG_PCI
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x10000000 /* 256M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE      0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE3_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE4_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_SIZE      0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE4_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE4_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#endif
 #define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup */
 #endif
 

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index a04a49d..63cc5af 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -435,26 +435,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_PCIE4_IO_PHYS       0xff8030000ull
 
 #ifdef CONFIG_PCI
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x10000000 /* 256M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE      0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE3_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE4_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_SIZE      0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE4_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE4_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#endif
 #define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup */
 #endif
 

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index aa185be..57a39fa 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -196,27 +196,6 @@
 #define CONFIG_SYS_PCIE4_IO_PHYS       0xff8030000ull
 
 #ifdef CONFIG_PCI
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE3_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE4_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE4_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE4_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 924093e..c877f3c 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -430,27 +430,6 @@
 #define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 #ifdef CONFIG_PCI
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE3_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE4_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE4_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE4_IO_SIZE       0x00010000      /* 64k */
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index ba5b649..54c82b4 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -529,30 +529,6 @@
 #define CONFIG_SYS_PCIE1_IO_PHYS       0xffc00000
 #endif
 
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_PCIE2_NAME          "PCIe SLOT"
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xc0000000
-#else
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xa0000000
-#endif
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-
-#define CONFIG_SYS_PCIE1_NAME          "mini PCIe SLOT"
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE1_MEM_BUS       0x80000000
-#else
-#define CONFIG_SYS_PCIE1_MEM_BUS       0x80000000
-#endif
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup */
 #endif /* CONFIG_PCI */