ASoC: sglt5000: Fix SGTL5000_PLL_FRAC_DIV_MASK
authorFabio Estevam <fabio.estevam@freescale.com>
Thu, 4 Jul 2013 23:01:03 +0000 (20:01 -0300)
committerMark Brown <broonie@linaro.org>
Fri, 5 Jul 2013 09:45:49 +0000 (10:45 +0100)
SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of
register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range.

Reported-by: Oskar Schirmer <oskar@scara.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org

No differences found