MIPS: ingenic: Initial JZ4780 support
authorPaul Burton <paul.burton@imgtec.com>
Sun, 24 May 2015 15:11:46 +0000 (16:11 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Sun, 21 Jun 2015 19:53:26 +0000 (21:53 +0200)
Support the Ingenic JZ4780 SoC using the existing code under
arch/mips/jz4740 now that it has been generalised sufficiently.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Patchwork: https://patchwork.linux-mips.org/patch/10164/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/boot/dts/ingenic/jz4780.dtsi [new file with mode: 0644]
arch/mips/include/asm/cpu-type.h
arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
arch/mips/include/asm/mach-jz4740/irq.h
arch/mips/jz4740/Kconfig
arch/mips/jz4740/Makefile
arch/mips/jz4740/setup.c
arch/mips/jz4740/time.c

diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
new file mode 100644 (file)
index 0000000..65389f6
--- /dev/null
@@ -0,0 +1,111 @@
+#include <dt-bindings/clock/jz4780-cgu.h>
+
+/ {
+       #address-cells = <1>;
+       #size-cells = <1>;
+       compatible = "ingenic,jz4780";
+
+       cpuintc: interrupt-controller {
+               #address-cells = <0>;
+               #interrupt-cells = <1>;
+               interrupt-controller;
+               compatible = "mti,cpu-interrupt-controller";
+       };
+
+       intc: interrupt-controller@10001000 {
+               compatible = "ingenic,jz4780-intc";
+               reg = <0x10001000 0x50>;
+
+               interrupt-controller;
+               #interrupt-cells = <1>;
+
+               interrupt-parent = <&cpuintc>;
+               interrupts = <2>;
+       };
+
+       ext: ext {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+       };
+
+       rtc: rtc {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <32768>;
+       };
+
+       cgu: jz4780-cgu@10000000 {
+               compatible = "ingenic,jz4780-cgu";
+               reg = <0x10000000 0x100>;
+
+               clocks = <&ext>, <&rtc>;
+               clock-names = "ext", "rtc";
+
+               #clock-cells = <1>;
+       };
+
+       uart0: serial@10030000 {
+               compatible = "ingenic,jz4780-uart";
+               reg = <0x10030000 0x100>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <51>;
+
+               clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
+               clock-names = "baud", "module";
+
+               status = "disabled";
+       };
+
+       uart1: serial@10031000 {
+               compatible = "ingenic,jz4780-uart";
+               reg = <0x10031000 0x100>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <50>;
+
+               clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
+               clock-names = "baud", "module";
+
+               status = "disabled";
+       };
+
+       uart2: serial@10032000 {
+               compatible = "ingenic,jz4780-uart";
+               reg = <0x10032000 0x100>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <49>;
+
+               clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
+               clock-names = "baud", "module";
+
+               status = "disabled";
+       };
+
+       uart3: serial@10033000 {
+               compatible = "ingenic,jz4780-uart";
+               reg = <0x10033000 0x100>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <48>;
+
+               clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
+               clock-names = "baud", "module";
+
+               status = "disabled";
+       };
+
+       uart4: serial@10034000 {
+               compatible = "ingenic,jz4780-uart";
+               reg = <0x10034000 0x100>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <34>;
+
+               clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
+               clock-names = "baud", "module";
+
+               status = "disabled";
+       };
+};
index 33f3cab..d41e8e2 100644 (file)
@@ -32,12 +32,12 @@ static inline int __pure __get_cpu_type(const int cpu_type)
        case CPU_4KC:
        case CPU_ALCHEMY:
        case CPU_PR4450:
-       case CPU_JZRISC:
 #endif
 
 #if defined(CONFIG_SYS_HAS_CPU_MIPS32_R1) || \
     defined(CONFIG_SYS_HAS_CPU_MIPS32_R2)
        case CPU_4KEC:
+       case CPU_JZRISC:
 #endif
 
 #ifdef CONFIG_SYS_HAS_CPU_MIPS32_R2
Simple merge
Simple merge
Simple merge
Simple merge