EXTRA_CFLAGS += -DFBDEV_PRESENT
endif
+ifeq ($(TI_PLATFORM),ti335x)
+ifneq ($(SUPPORT_XORG),1)
+ifeq ($(PM_RUNTIME),1)
+EXTRA_CFLAGS += -DPM_RUNTIME_SUPPORT
+endif
+endif
+endif
ifeq ($(TI_PLATFORM),ti335x)
DRIFILES = services4/srvkm/env/linux/pvr_drm.c services4/3rdparty/dc_ti335x_linux/omaplfb_linux.c services4/3rdparty/dc_ti335x_linux/omaplfb_displayclass.c
EXTRA_CFLAGS += -I$(src)/services4/system/include
EXTRA_CFLAGS += -I$(src)/services4/system/$(TI_PLATFORM)
EXTRA_CFLAGS += -I$(src)/services4/srvkm/bridged/sgx
-
+EXTRA_CFLAGS += -I$(KERNELDIR)/arch/arm/mach-omap2
ifeq ($(SUPPORT_XORG),1)
EXTRA_CFLAGS += -I$(KERNELDIR)/include/drm
endif
endif
+ifeq ($(TI_PLATFORM),ti335x)
+ifneq ($(SUPPORT_XORG),1)
+ifeq ($(PM_RUNTIME),1)
+PM_RUNTIME_SUPPORT = 1
+endif
+endif
+endif
+
# Only enable active power management if passive power management is
# enabled, as indicated by LDM_PLATFORM being set to 1. On OMAP,
empty :=
space := $(empty) $(empty)
$(info Debug options)
-$(info $(space)D=modules dump module info)
-$(info $(space)D=freeze-config prevent config changes)
-$(info $(space)D=config-changes dump diffs when config changes)
-$(info Options may be combined: make D=freeze-config,config-changes)
+$(info $(space)D=modules dump module info)
+$(info $(space)D=config dump all config options + type and origin)
+$(info $(space)D=freeze-config prevent config changes)
+$(info $(space)D=config-changes dump diffs when config changes)
+$(info $(space)D=nobuild stop before running the main build)
+$(info Options can be combined: make D=freeze-config,config-changes)
$(error D=help given)
endif
$(SYS_CXXFLAGS)
ALL_HOST_CXXFLAGS := \
- $(COMMON_USER_FLAGS) $(COMMON_CFLAGS) -Wall
+ $(COMMON_USER_FLAGS) $(COMMON_CFLAGS)
# User C and C++
#
define target-executable-cxx-from-o
$(if $(V),,@echo " LD " $(call relative-to-top,$@))
$(CXX) \
- $(SYS_EXE_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
+ $(SYS_EXE_LDFLAGS_CXX) $(SYS_EXE_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
$(SYS_EXE_CRTBEGIN) $(sort $(MODULE_ALL_OBJECTS)) $(SYS_EXE_CRTEND) \
$(MODULE_LIBRARY_DIR_FLAGS) $(MODULE_LIBRARY_FLAGS) $(LIBGCC)
endef
define target-shared-library-cxx-from-o
$(if $(V),,@echo " LD " $(call relative-to-top,$@))
$(CXX) -shared -Wl,-Bsymbolic \
- $(SYS_LIB_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
+ $(SYS_LIB_LDFLAGS_CXX) $(SYS_LIB_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
$(SYS_LIB_CRTBEGIN) $(sort $(MODULE_ALL_OBJECTS)) $(SYS_LIB_CRTEND) \
$(MODULE_LIBRARY_DIR_FLAGS) $(MODULE_LIBRARY_FLAGS) $(LIBGCC)
endef
+define host-shared-library-from-o
+$(if $(V),,@echo " HOST_LD " $(call relative-to-top,$@))
+$(HOST_CC) -shared -Wl,-Bsymbolic \
+ $(MODULE_HOST_LDFLAGS) -o $@ \
+ $(sort $(MODULE_ALL_OBJECTS)) \
+ $(MODULE_LIBRARY_DIR_FLAGS) $(MODULE_LIBRARY_FLAGS)
+endef
+
+# If there were any C++ source files in a shared library, we use this recipe,
+# which runs the C++ compiler to link the final library
+define host-shared-library-cxx-from-o
+$(if $(V),,@echo " HOST_LD " $(call relative-to-top,$@))
+$(HOST_CXX) -shared -Wl,-Bsymbolic \
+ $(MODULE_HOST_LDFLAGS) -o $@ \
+ $(sort $(MODULE_ALL_OBJECTS)) \
+ $(MODULE_LIBRARY_DIR_FLAGS) $(MODULE_LIBRARY_FLAGS)
+endef
+
define target-copy-debug-information
$(OBJCOPY) --only-keep-debug $@ $(basename $@).dbg
endef
$(eval $(call TunableKernelConfigC,PVR_DRI_DRM_PLATFORM_DEV,))
-
-export EXTERNAL_3PDD_TARBALL
#
define KernelConfigMake
$$(shell echo "override $(1) := $(2)" >>$(CONFIG_KERNEL_MK).new)
+$(if $(filter config,$(D)),$(info KernelConfigMake $(1) := $(2) # $(if $($(1)),$(origin $(1)),default)))
endef
# Write out a GNU make option for both user & kernel
#
define KernelConfigC
$$(shell echo "#define $(1) $(2)" >>$(CONFIG_KERNEL_H).new)
+$(if $(filter config,$(D)),$(info KernelConfigC #define $(1) $(2) /* $(if $($(1)),$(origin $(1)),default) */),)
endef
# Write out an option for both user & kernel
CONFIG_KERNEL_MK := $(OUT)/config_kernel.mk
CONFIG_KERNEL_H := $(OUT)/config_kernel.h
+# Convert commas to spaces in $(D). This is so you can say "make
+# D=config-changes,freeze-config" and have $(filter config-changes,$(D))
+# still work.
+comma := ,
+empty :=
+space := $(empty) $(empty)
+override D := $(subst $(comma),$(space),$(D))
+
# Create the OUT directory and delete any previous intermediary files
#
$(shell mkdir -p $(OUT))
# require things like SGXCORE to be set
ifneq ($(INTERNAL_CLOBBER_ONLY),true)
+# These are defined by the core build system, but we might need them
+# earlier to feature-check the compilers
+#
+_CC := $(CROSS_COMPILE)$(if $(filter default,$(origin CC)),gcc,$(CC))
+HOST_CC ?= gcc
+
-include ../config/user-defs.mk
# FIXME: Backwards compatibility remaps.
override SUPPORT_ACTIVE_POWER_MANAGEMENT := 0
endif
-# We're bumping against USSE limits on older cores because the ukernel
-# is too large when building both SGX_DISABLE_VISTEST_SUPPORT=0 and
-# PVRSRV_USSE_EDM_STATUS_DEBUG=1.
-#
-# Automatically disable vistest support if debugging the ukernel to
-# prevent build failures.
-#
-ifneq ($(filter 520 530 531 535 540,$(SGXCORE)),)
-ifneq ($(SGX_DISABLE_VISTEST_SUPPORT),1)
-SGX_DISABLE_VISTEST_SUPPORT ?= not-overridden
-ifeq ($(SGX_DISABLE_VISTEST_SUPPORT),not-overridden)
-$(warning Setting SGX_DISABLE_VISTEST_SUPPORT=1 because PVRSRV_USSE_EDM_STATUS_DEBUG=1)
-SGX_DISABLE_VISTEST_SUPPORT := 1
-endif
-endif
+ifeq ($(SGX_FEATURE_36BIT_MMU),1)
+override IMG_ADDRSPACE_PHYSADDR_BITS := 64
+else
+override IMG_ADDRSPACE_PHYSADDR_BITS := 32
endif
ifeq ($(SGXCORE),535)
$$(error If you are trying to disable a component, use e.g. EXCLUDED_APIS="opengles1 opengl")
endif
endef
-$(foreach _o,SYS_CFLAGS SYS_CXXFLAGS SYS_EXE_LDFLAGS SYS_LIB_LDFLAGS SUPPORT_EWS SUPPORT_OPENGLES1 SUPPORT_OPENGLES2 SUPPORT_OPENVG SUPPORT_OPENCL SUPPORT_OPENGL SUPPORT_UNITTESTS SUPPORT_XORG,$(eval $(call sanity-check-support-option-origin,$(_o))))
+$(foreach _o,SYS_CFLAGS SYS_CXXFLAGS SYS_EXE_LDFLAGS SYS_LIB_LDFLAGS SYS_EXE_LDFLAGS_CXX SYS_LIB_LDFLAGS_CXX SUPPORT_EWS SUPPORT_OPENGLES1 SUPPORT_OPENGLES2 SUPPORT_OPENCL SUPPORT_RSCOMPUTE SUPPORT_OPENGL SUPPORT_UNITTESTS SUPPORT_XORG,$(eval $(call sanity-check-support-option-origin,$(_o))))
# Check for words in EXCLUDED_APIS that aren't understood by the
# common/apis/*.mk files. This should be kept in sync with all the tests on
# EXCLUDED_APIS in those files
-_excludable_apis := opencl opengl opengles1 opengles2 openvg ews unittests xorg xorg_unittests scripts
+_excludable_apis := rscompute opencl opengl opengles1 opengles2 openvg ews unittests xorg xorg_unittests scripts
_unrecognised := $(strip $(filter-out $(_excludable_apis),$(EXCLUDED_APIS)))
ifneq ($(_unrecognised),)
$(warning *** Unrecognised entries in EXCLUDED_APIS: $(_unrecognised))
COMPONENTS += null_pvr2d_remote
endif
COMPONENTS += pvrvncsrv
+COMPONENTS += pvrvncinput
endif
+$(if $(filter config,$(D)),$(info Build configuration:))
+
+################################# CONFIG ####################################
+
# If KERNELDIR is set, write it out to the config.mk, with
# KERNEL_COMPONENTS and KERNEL_ID
#
$(eval $(call TunableBothConfigMake,KERNEL_CROSS_COMPILE,))
endif
-# Check the KERNELDIR has a kernel built and also check that it is
-# not 64-bit, which we do not support.
+# Check the KERNELDIR has a kernel built.
VMLINUX := $(strip $(wildcard $(KERNELDIR)/vmlinux))
+LINUXCFG := $(strip $(wildcard $(KERNELDIR)/.config))
+
ifneq ($(VMLINUX),)
-VMLINUX_IS_64BIT := $(shell file $(VMLINUX) | grep -q 64-bit || echo false)
+ifneq ($(shell file $(KERNELDIR)/vmlinux | grep 64-bit >/dev/null && echo 1),$(shell $(_CC) -dM -E - </dev/null | grep __x86_64__ >/dev/null && echo 1))
+$(error Attempting to build 64-bit DDK against 32-bit kernel, or 32-bit DDK against 64-bit kernel. This is not allowed.)
+endif
+VMLINUX_IS_64BIT := $(shell file $(VMLINUX) | grep 64-bit >/dev/null || echo false)
+VMLINUX_HAS_PAE36 := $(shell cat $(LINUXCFG) | grep CONFIG_X86_PAE=y >/dev/null || echo false)
+VMLINUX_HAS_PAE40 := $(shell cat $(LINUXCFG) | grep CONFIG_ARM_LPAE=y >/dev/null || echo false)
+VMLINUX_HAS_DMA32 := $(shell cat $(LINUXCFG) | grep CONFIG_ZONE_DMA32=y >/dev/null || echo false)
+
+# $(error 64BIT=$(VMLINUX_IS_64BIT) PAE36=$(VMLINUX_HAS_PAE36) PAE40=$(VMLINUX_HAS_PAE40) DMA32=$(VMLINUX_HAS_DMA32) MMU36=$(SGX_FEATURE_36BIT_MMU))
+
ifneq ($(VMLINUX_IS_64BIT),false)
-$(warning $$(KERNELDIR)/vmlinux is 64-bit, which is not supported. Kbuild may fail.)
+$(warning $$(KERNELDIR)/vmlinux: Note: vmlinux is 64-bit, which is supported but currently experimental.)
endif
else
$(warning $$(KERNELDIR)/vmlinux does not exist. Kbuild may fail.)
endif
endif
+ifneq ($(VMLINUX_HAS_PAE40),false)
+ifeq ($(VMLINUX_HAS_DMA32),false)
+$(warning SGX MMUs are currently supported up to only 36 bits max. Your Kernel is built with 40-bit PAE but does not have CONFIG_ZONE_DMA32.)
+$(warning This means you must ensure the runtime system has <= 4GB of RAM, or there will be BIG problems...)
+endif
+endif
+
+ifneq ($(SGX_FEATURE_36BIT_MMU),1)
+ifneq ($(VMLINUX_IS_64BIT),false)
+# Kernel is 64-bit
+ifeq ($(VMLINUX_HAS_DMA32),false)
+$(warning SGX is configured with 32-bit MMU. Your Kernel is 64-bit but does not have CONFIG_ZONE_DMA32.)
+$(warning This means you must ensure the runtime system has <= 4GB of RAM, or there will be BIG problems...)
+endif
+else
+ # Kernel is 32-bit
+ifneq ($(VMLINUX_HAS_PAE36),false)
+ifeq ($(VMLINUX_HAS_DMA32),false)
+$(warning SGX is configured with 32-bit MMU. Your Kernel is 32-bit PAE, but does not have CONFIG_ZONE_DMA32. )
+$(warning This means you must ensure the runtime system has <= 4GB of RAM, or there will be BIG problems...)
+endif
+endif
+endif
+endif
+
# Ideally configured by platform Makefiles, as necessary
#
$(eval $(call TunableBothConfigC,NO_HARDWARE,))
$(eval $(call TunableBothConfigC,PDUMP_DEBUG_OUTFILES,))
$(eval $(call TunableBothConfigC,PVRSRV_USSE_EDM_STATUS_DEBUG,))
-$(eval $(call TunableBothConfigC,SGX_DISABLE_VISTEST_SUPPORT,))
$(eval $(call TunableBothConfigC,PVRSRV_RESET_ON_HWTIMEOUT,))
$(eval $(call TunableBothConfigC,SYS_USING_INTERRUPTS,1))
$(eval $(call TunableBothConfigC,SUPPORT_EXTERNAL_SYSTEM_CACHE,))
$(eval $(call TunableBothConfigC,SUPPORT_HWRECOVERY_TRACE_LIMIT,))
$(eval $(call TunableBothConfigC,SUPPORT_PVRSRV_GET_DC_SYSTEM_BUFFER,1))
$(eval $(call TunableBothConfigC,SUPPORT_NV12_FROM_2_HWADDRS,))
+$(eval $(call TunableBothConfigC,SGX_FEATURE_36BIT_MMU,))
+$(eval $(call TunableBothConfigC,IMG_ADDRSPACE_PHYSADDR_BITS,))
$(eval $(call TunableKernelConfigC,SUPPORT_LINUX_X86_WRITECOMBINE,1))
$(eval $(call TunableKernelConfigC,SUPPORT_LINUX_X86_PAT,1))
$(call cc-check,$(patsubst @%,%,$(HOST_CC)),$(OUT),$(1))
endef
+define host-cxx-option
+$(call cc-check,$(patsubst @%,%,$(HOST_CXX)),$(OUT),$(1))
+endef
+
define kernel-cc-option
$(call cc-check,$(KERNEL_CROSS_COMPILE)gcc,$(OUT),$(1))
endef
+++ /dev/null
-########################################################################### ###
-#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-#@License Dual MIT/GPLv2
-#
-# The contents of this file are subject to the MIT license as set out below.
-#
-# Permission is hereby granted, free of charge, to any person obtaining a copy
-# of this software and associated documentation files (the "Software"), to deal
-# in the Software without restriction, including without limitation the rights
-# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-# copies of the Software, and to permit persons to whom the Software is
-# furnished to do so, subject to the following conditions:
-#
-# The above copyright notice and this permission notice shall be included in
-# all copies or substantial portions of the Software.
-#
-# Alternatively, the contents of this file may be used under the terms of
-# the GNU General Public License Version 2 ("GPL") in which case the provisions
-# of GPL are applicable instead of those above.
-#
-# If you wish to allow use of your version of this file only under the terms of
-# GPL, and not to allow others to use your version of this file under the terms
-# of the MIT license, indicate your decision by deleting the provisions above
-# and replace them with the notice and other provisions required by GPL as set
-# out in the file called "GPL-COPYING" included in this distribution. If you do
-# not delete the provisions above, a recipient may use your version of this file
-# under the terms of either the MIT license or GPL.
-#
-# This License is also included in this distribution in the file called
-# "MIT-COPYING".
-#
-# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-### ###########################################################################
-
-ifneq ($(EXTERNAL_3PDD_TARBALL),)
-TAR_OPT_STRIP_COMPONENTS ?= --strip-components
-prepare_tree: $(OUT)/target/kbuild/external
-$(OUT)/target/kbuild/external: eurasiacon/external/$(EXTERNAL_3PDD_TARBALL)
- @echo "Extracting $<.."
- @mkdir -p $@
- @tar $(TAR_OPT_STRIP_COMPONENTS) 1 --touch -jxf $< -C $@
- @touch $(OUT)/target/kbuild/external
-endif
$(MODULE_INTERMEDIATES_DIR):
$(make-directory)
+# These are used for messages and variable names where we need to say "host"
+# or "target" according to the module build type.
Host_or_target := $(if $(MODULE_HOST_BUILD),Host,Target)
+host_or_target := $(if $(MODULE_HOST_BUILD),host,target)
+HOST_OR_TARGET := $(if $(MODULE_HOST_BUILD),HOST,TARGET)
# These define the rules for finding source files.
# - If a name begins with a slash, we strip $(TOP) off the front if it begins
+++ /dev/null
-########################################################################### ###
-#@Title Root makefile for OMAP4430 Linux. Builds everything else.
-#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-#@License Dual MIT/GPLv2
-#
-# The contents of this file are subject to the MIT license as set out below.
-#
-# Permission is hereby granted, free of charge, to any person obtaining a copy
-# of this software and associated documentation files (the "Software"), to deal
-# in the Software without restriction, including without limitation the rights
-# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-# copies of the Software, and to permit persons to whom the Software is
-# furnished to do so, subject to the following conditions:
-#
-# The above copyright notice and this permission notice shall be included in
-# all copies or substantial portions of the Software.
-#
-# Alternatively, the contents of this file may be used under the terms of
-# the GNU General Public License Version 2 ("GPL") in which case the provisions
-# of GPL are applicable instead of those above.
-#
-# If you wish to allow use of your version of this file only under the terms of
-# GPL, and not to allow others to use your version of this file under the terms
-# of the MIT license, indicate your decision by deleting the provisions above
-# and replace them with the notice and other provisions required by GPL as set
-# out in the file called "GPL-COPYING" included in this distribution. If you do
-# not delete the provisions above, a recipient may use your version of this file
-# under the terms of either the MIT license or GPL.
-#
-# This License is also included in this distribution in the file called
-# "MIT-COPYING".
-#
-# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-### ###########################################################################
-
-PVR_SYSTEM := omap4
-
-KERNEL_COMPONENTS := srvkm bufferclass_example
-
-include ../kernel_version.mk
-
-# Only enable active power management if passive power management is
-# enabled, as indicated by LDM_PLATFORM being set to 1. On OMAP,
-# the system can suspend in the case where active power management is
-# enabled in the SGX driver, but passive power management isn't. As
-# passive power management isn't enabled, the driver won't see the
-# system suspend/resume events, and so won't take appropriate action.
-LDM_PLATFORM ?= 1
-
-ifeq ($(LDM_PLATFORM),1)
-SUPPORT_LINUX_USING_WORKQUEUES := 1
-DISPLAY_CONTROLLER_COMPONENT += dc_omapfb3_linux
-DISPLAY_CONTROLLER := omaplfb
-else
-SUPPORT_LINUX_USING_SHARED_WORKQUEUES := 1
-OMAP_NON_FLIP_DISPLAY := 1
-DISPLAY_CONTROLLER_COMPONENT += linux_framebuffer
-DISPLAY_CONTROLLER := pvrlfb
-endif
-
-OPTIM := -Os
-
-SYS_CFLAGS := -march=armv7-a
-
-ifneq ($(CROSS_COMPILE),)
-SYS_CFLAGS += -mtls-dialect=arm
-endif
-
-SUPPORT_OMAP4430_NEON ?= 1
-
-ifeq ($(SUPPORT_OMAP4430_NEON),1)
-SYS_CFLAGS += -ftree-vectorize -mfpu=neon -mfloat-abi=softfp
-endif
-
-LIBGCC := $(shell $(CROSS_COMPILE)gcc -print-libgcc-file-name)
-
-SGXCORE := 540
-SGX_CORE_REV := 120
-
-SGX_DYNAMIC_TIMING_INFO := 1
-SYS_CUSTOM_POWERLOCK_WRAP := 1
-
-ifeq ($(OMAP_NON_FLIP_DISPLAY),1)
-OPK_DEFAULT := libpvrPVR2D_BLITWSEGL.so
-else
-OPK_DEFAULT := libpvrPVR2D_FLIPWSEGL.so
-endif
-
-ifeq ($(call kernel-version-at-least,2,6,35),true)
-# Work around flipping problems seen with the Taal LCDs on Blaze.
-# The work around is safe to use with other types of screen on Blaze
-# (e.g. HDMI) and on other platforms (e.g. Panda board).
-PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY := 1
-ifeq ($(LDM_PLATFORM),1)
-PVR_LDM_PLATFORM_PRE_REGISTERED := 1
-ifeq ($(call kernel-version-at-least,2,6,35,7),true)
-# Not all variants of the OMAP4 kernel have a DRM based framebuffer.
-# Note that a non-X.Org version of the driver does not have to be built
-# with DRM support if the kernel has a DRM based framebuffer.
-PVR_OMAPLFB_DRM_FB ?= 1
-ifeq ($(PVR_OMAPLFB_DRM_FB),1)
-PVR_LDM_PLATFORM_PRE_REGISTERED_DEV := "\"pvrsrvkm_pvr\""
-# There is already a "pvrsrvkm" driver (part of the DRM framebuffer code),
-# so use the pre-registered device name instead.
-PVR_LDM_DRIVER_REGISTRATION_NAME := "\"pvrsrvkm_pvr"\"
-# The DRM library will not load the Services module on behalf of the X Server,
-# as a DRM module has already been loaded (the DRM based framebuffer), so
-# load the Services module before starting the X Server.
-XORG_EXPLICIT_PVR_SERVICES_LOAD := 1
-else
-PVR_LDM_PLATFORM_PRE_REGISTERED_DEV := "\"pvrsrvkm\""
-endif
-endif
-endif
-endif
-
-include ../common/xorg_test.mk
-ifeq ($(want_xorg),1)
-
-SUPPORT_DRI_DRM := 1
-
-ifeq ($(call kernel-version-at-least,2,6,35),true)
-PVR_DRI_DRM_PLATFORM_DEV := 1
-PVR_DRI_DRM_STATIC_BUS_ID := 1
-ifeq ($(call kernel-version-at-least,2,6,35,7),true)
-ifeq ($(PVR_OMAPLFB_DRM_FB),1)
-SUPPORT_DRI_DRM_PLUGIN := 1
-endif
-ifeq ($(call kernel-version-at-least,2,6,36),true)
-PVR_DRI_DRM_DEV_BUS_ID := "\"platform:pvrsrvkm"\"
-else
-PVR_DRI_DRM_DEV_BUS_ID := "\"platform:pvrsrvkm:00"\"
-endif
-# A client DRI authorisation failure, whilst switched away from the X Server
-# VT, prevents all other attempts at DRI authorisation, even after
-# switching back to the X server VT, so don't perform a DRM drop master
-# call.
-PVR_XORG_DONT_DROP_MASTER_IN_LEAVE_VT := 1
-endif
-else
-PVR_DRI_DRM_NOT_PCI := 1
-endif
-
-XORG_TOOLCHAIN ?= tarballs-omap4-ubuntu-10.10-cross
-XORG_PVR_CONF := omap4
-XORG_PVR_VIDEO := omap4
-
-OPK_FALLBACK := libpvrPVR2D_DRIWSEGL.so
-
-ifneq ($(OMAP_NON_FLIP_DISPLAY),1)
-XORG_PVR_VIDEO ?= $(PVR_SYSTEM)
-PVR_DISPLAY_CONTROLLER_DRM_IOCTL := 1
-endif
-
-else # xorg isn't excluded
-
-OPK_FALLBACK := libpvrPVR2D_BLITWSEGL.so
-
-endif # xorg isn't excluded
-
-ifeq ($(SUPPORT_DRI_DRM),1)
-ifeq ($(PVR_DRI_DRM_NOT_PCI),1)
-KERNEL_COMPONENTS += linux_drm
-EXTRA_KBUILD_SOURCE := $(KERNELDIR)
-endif
-EXTRA_PVRSRVKM_COMPONENTS += $(DISPLAY_CONTROLLER_COMPONENT)
-else
-KERNEL_COMPONENTS += $(DISPLAY_CONTROLLER_COMPONENT)
-endif
-
-include ../config/core.mk
-include ../common/xorg.mk
-include ../common/dridrm.mk
-include ../common/opencl.mk
-include ../common/omap4.mk
-
-# We only need this for pvr_video's includes, which should
-# really be done differently, as DISPLAY_CONTROLLER_DIR is
-# now obsolete..
-#
-$(eval $(call UserConfigMake,DISPLAY_CONTROLLER_DIR,3rdparty/$(DISPLAY_CONTROLLER_COMPONENT)))
.PHONY: prepare_tree
--include eurasiacon/build/linux2/kbuild/external_tarball.mk
-
-# If there's no external tarball, there's nothing to do
-#
prepare_tree:
INTERNAL_INCLUDED_PREPARE_HEADERS :=
$(RM) -rf $(OUT)/host/intermediates/$* $(OUT)/target/intermediates/$* $(INTERNAL_TARGETS_FOR_$*)
include $(MAKE_TOP)/bits.mk
+
+# D=nobuild stops the build before any recipes are run. This line should
+# come at the end of this makefile.
+$(if $(filter nobuild,$(D)),$(error D=nobuild given),)
#define IMG_UNDEF (~0UL)
#endif
+/*
+ Do the right thing when using printf to output cpu addresses,
+ depending on architecture.
+ */
+#if defined (_WIN64)
+ #define UINTPTR_FMT "%016llX"
+#else
+ #if defined (__x86_64__)
+ #define UINTPTR_FMT "%016lX"
+ #else
+ #define UINTPTR_FMT "%08lX"
+ #endif
+#endif
+
+/*
+ Similarly for DEV_ and SYS_ PHYSADDRs, but this is dependent on 32/36-bit MMU
+ capability, in addition to host architecture.
+ */
+#if IMG_ADDRSPACE_PHYSADDR_BITS == 32
+ #if defined(IMG_UINT32_IS_ULONG)
+ #define CPUPADDR_FMT "%08lX"
+ #define DEVPADDR_FMT "%08lX"
+ #define SYSPADDR_FMT "%08lX"
+ #else
+ #define CPUPADDR_FMT "%08X"
+ #define DEVPADDR_FMT "%08X"
+ #define SYSPADDR_FMT "%08X"
+ #endif
+#else
+ #if defined(__x86_64__)
+ #define CPUPADDR_FMT "%016lX"
+ #define DEVPADDR_FMT "%016lX"
+ #define SYSPADDR_FMT "%016lX"
+ #else
+
+ #define CPUPADDR_FMT "%016llX"
+ #define DEVPADDR_FMT "%016llX"
+ #define SYSPADDR_FMT "%016llX"
+ #endif
+#endif
+
+/*
+ Define a printf format macro for the length property of the format-specifier
+ for size_t, that allows avoidance of C99 dependency on compilers that don't
+ support this, while still ensuring that whatever the size of size_t (eg 32,
+ 64 bit Linux builds, or Win32/64 builds), a size_t (or IMG_SIZE_T) can be
+ passed to printf-type functions without a cast.
+*/
+#if defined LINUX
+ /* Use C99 format specifier where possible */
+ #define SIZE_T_FMT_LEN "z"
+#elif defined _WIN64
+ #define SIZE_T_FMT_LEN "I"
+#else
+ #define SIZE_T_FMT_LEN "l" /* May need to be updated as required, for other OSs */
+#endif
+
+
+#if defined (__x86_64__)
+ #define IMG_UINT64_FMT "l"
+#else
+ #define IMG_UINT64_FMT "ll" /* May need to be updated as required, for other OSs */
+#endif
+
+
#endif /* #if !defined (__IMG_DEFS_H__) */
/*****************************************************************************
End of file (IMG_DEFS.H)
#endif
#if defined(USE_CODE)
-
-typedef unsigned __int64 IMG_UINT64, *IMG_PUINT64;
-typedef __int64 IMG_INT64, *IMG_PINT64;
-
+ typedef unsigned __int64 IMG_UINT64, *IMG_PUINT64;
+ typedef __int64 IMG_INT64, *IMG_PINT64;
+#elif defined(LINUX) && defined (__x86_64)
+ typedef unsigned long IMG_UINT64, *IMG_PUINT64;
+ typedef long IMG_INT64, *IMG_PINT64;
+#elif defined(LINUX) || defined(__METAG) || defined (__QNXNTO__)
+ typedef unsigned long long IMG_UINT64, *IMG_PUINT64;
+ typedef long long IMG_INT64, *IMG_PINT64;
#else
- #if defined(LINUX) || defined(__METAG) || defined (__QNXNTO__)
- typedef unsigned long long IMG_UINT64, *IMG_PUINT64;
- typedef long long IMG_INT64, *IMG_PINT64;
- #else
- #error("define an OS")
- #endif
+ #error("define an OS")
#endif
#if !(defined(LINUX) && defined (__KERNEL__))
#if defined(_WIN64)
typedef unsigned __int64 IMG_UINTPTR_T;
+ typedef signed __int64 IMG_INTPTR_T;
typedef signed __int64 IMG_PTRDIFF_T;
typedef IMG_UINT64 IMG_SIZE_T;
#else
- typedef unsigned int IMG_UINTPTR_T;
- typedef IMG_UINT32 IMG_SIZE_T;
+ #if defined (__x86_64__)
+ typedef IMG_UINT64 IMG_SIZE_T;
+ typedef unsigned long IMG_UINTPTR_T;
+ typedef signed long IMG_INTPTR_T;
+ #else
+ typedef IMG_UINT32 IMG_SIZE_T;
+ typedef unsigned long IMG_UINTPTR_T;
+ typedef signed long IMG_INTPTR_T;
+ #endif
#endif
typedef IMG_PVOID IMG_HANDLE;
#define IMG_NULL 0
/* services/stream ID */
-typedef IMG_UINT32 IMG_SID;
+typedef IMG_UINTPTR_T IMG_SID;
-typedef IMG_UINT32 IMG_EVENTSID;
+typedef IMG_UINTPTR_T IMG_EVENTSID;
/*
* Address types.
typedef struct _IMG_CPU_PHYADDR
{
/* variable sized type (32,64) */
- IMG_UINTPTR_T uiAddr;
+#if IMG_ADDRSPACE_PHYSADDR_BITS == 32
+ /* variable sized type (32,64) */
+ IMG_UINT32 uiAddr;
+#else
+ IMG_UINT64 uiAddr;
+#endif
} IMG_CPU_PHYADDR;
/* device physical address */
{
#if IMG_ADDRSPACE_PHYSADDR_BITS == 32
/* variable sized type (32,64) */
- IMG_UINTPTR_T uiAddr;
-#else
IMG_UINT32 uiAddr;
- IMG_UINT32 uiHighAddr;
+#else
+ IMG_UINT64 uiAddr;
#endif
} IMG_DEV_PHYADDR;
typedef struct _IMG_SYS_PHYADDR
{
/* variable sized type (32,64) */
- IMG_UINTPTR_T uiAddr;
+#if IMG_ADDRSPACE_PHYSADDR_BITS == 32
+ /* variable sized type (32,64) */
+ IMG_UINT32 uiAddr;
+#else
+ IMG_UINT64 uiAddr;
+#endif
} IMG_SYS_PHYADDR;
#include "img_defs.h"
#define PVR_MAX_DEBUG_MESSAGE_LEN (512)
/* These are privately used by pvr_debug, use the PVR_DBG_ defines instead */
-#define DBGPRIV_FATAL 0x01UL
-#define DBGPRIV_ERROR 0x02UL
-#define DBGPRIV_WARNING 0x04UL
-#define DBGPRIV_MESSAGE 0x08UL
-#define DBGPRIV_VERBOSE 0x10UL
-#define DBGPRIV_CALLTRACE 0x20UL
-#define DBGPRIV_ALLOC 0x40UL
-#define DBGPRIV_DBGDRV_MESSAGE 0x80UL
-
-#define DBGPRIV_DBGLEVEL_COUNT 8
+#define DBGPRIV_FATAL 0x001UL
+#define DBGPRIV_ERROR 0x002UL
+#define DBGPRIV_WARNING 0x004UL
+#define DBGPRIV_MESSAGE 0x008UL
+#define DBGPRIV_VERBOSE 0x010UL
+#define DBGPRIV_CALLTRACE 0x020UL
+#define DBGPRIV_ALLOC 0x040UL
+#define DBGPRIV_BUFFERED 0x080UL
+#define DBGPRIV_DBGDRV_MESSAGE 0x100UL
+
+#define DBGPRIV_DBGLEVEL_COUNT 9
#if !defined(PVRSRV_NEED_PVR_ASSERT) && defined(DEBUG)
#define PVRSRV_NEED_PVR_ASSERT
#define PVR_DBG_VERBOSE DBGPRIV_VERBOSE
#define PVR_DBG_CALLTRACE DBGPRIV_CALLTRACE
#define PVR_DBG_ALLOC DBGPRIV_ALLOC
+ #define PVR_DBG_BUFFERED DBGPRIV_BUFFERED
#define PVR_DBGDRIV_MESSAGE DBGPRIV_DBGDRV_MESSAGE
/* These levels are always on with PVRSRV_NEED_PVR_DPF */
- #define __PVR_DPF_0x01UL(x...) PVRSRVDebugPrintf(DBGPRIV_FATAL, x)
- #define __PVR_DPF_0x02UL(x...) PVRSRVDebugPrintf(DBGPRIV_ERROR, x)
+ #define __PVR_DPF_0x001UL(x...) PVRSRVDebugPrintf(DBGPRIV_FATAL, x)
+ #define __PVR_DPF_0x002UL(x...) PVRSRVDebugPrintf(DBGPRIV_ERROR, x)
+ #define __PVR_DPF_0x080UL(x...) PVRSRVDebugPrintf(DBGPRIV_BUFFERED, x)
/* Some are compiled out completely in release builds */
#if defined(DEBUG)
- #define __PVR_DPF_0x04UL(x...) PVRSRVDebugPrintf(DBGPRIV_WARNING, x)
- #define __PVR_DPF_0x08UL(x...) PVRSRVDebugPrintf(DBGPRIV_MESSAGE, x)
- #define __PVR_DPF_0x10UL(x...) PVRSRVDebugPrintf(DBGPRIV_VERBOSE, x)
- #define __PVR_DPF_0x20UL(x...) PVRSRVDebugPrintf(DBGPRIV_CALLTRACE, x)
- #define __PVR_DPF_0x40UL(x...) PVRSRVDebugPrintf(DBGPRIV_ALLOC, x)
- #define __PVR_DPF_0x80UL(x...) PVRSRVDebugPrintf(DBGPRIV_DBGDRV_MESSAGE, x)
+ #define __PVR_DPF_0x004UL(x...) PVRSRVDebugPrintf(DBGPRIV_WARNING, x)
+ #define __PVR_DPF_0x008UL(x...) PVRSRVDebugPrintf(DBGPRIV_MESSAGE, x)
+ #define __PVR_DPF_0x010UL(x...) PVRSRVDebugPrintf(DBGPRIV_VERBOSE, x)
+ #define __PVR_DPF_0x020UL(x...) PVRSRVDebugPrintf(DBGPRIV_CALLTRACE, x)
+ #define __PVR_DPF_0x040UL(x...) PVRSRVDebugPrintf(DBGPRIV_ALLOC, x)
+ #define __PVR_DPF_0x100UL(x...) PVRSRVDebugPrintf(DBGPRIV_DBGDRV_MESSAGE, x)
#else
- #define __PVR_DPF_0x04UL(x...)
- #define __PVR_DPF_0x08UL(x...)
- #define __PVR_DPF_0x10UL(x...)
- #define __PVR_DPF_0x20UL(x...)
- #define __PVR_DPF_0x40UL(x...)
- #define __PVR_DPF_0x80UL(x...)
+ #define __PVR_DPF_0x004UL(x...)
+ #define __PVR_DPF_0x008UL(x...)
+ #define __PVR_DPF_0x010UL(x...)
+ #define __PVR_DPF_0x020UL(x...)
+ #define __PVR_DPF_0x040UL(x...)
+ #define __PVR_DPF_0x100UL(x...)
#endif
/* Translate the different log levels to separate macros
#define PVR_DBG_VERBOSE DBGPRIV_VERBOSE,__FILE__, __LINE__
#define PVR_DBG_CALLTRACE DBGPRIV_CALLTRACE,__FILE__, __LINE__
#define PVR_DBG_ALLOC DBGPRIV_ALLOC,__FILE__, __LINE__
+ #define PVR_DBG_BUFFERED DBGPRIV_BUFFERED,__FILE__, __LINE__
#define PVR_DBGDRIV_MESSAGE DBGPRIV_DBGDRV_MESSAGE, "", 0
#define PVR_DPF(X) PVRSRVDebugPrintf X
const IMG_CHAR *pszFormat,
...) IMG_FORMAT_PRINTF(4, 5);
+IMG_IMPORT IMG_VOID IMG_CALLCONV PVRSRVDebugPrintfDumpCCB(void);
+
#else /* defined(PVRSRV_NEED_PVR_DPF) */
#define PVR_DPF(X)
#endif /* defined(PVRSRV_NEED_PVR_DPF) */
-
/* PVR_TRACE() handling */
#if defined(PVRSRV_NEED_PVR_TRACE)
#define PVR_STR2(X) PVR_STR(X)
#define PVRVERSION_MAJ 1
-#define PVRVERSION_MIN 9
-#define PVRVERSION_BRANCH 19
+#define PVRVERSION_MIN 10
#define PVRVERSION_FAMILY "sgxddk"
-#define PVRVERSION_BRANCHNAME "1.9"
-#define PVRVERSION_BUILD 2188537
+#define PVRVERSION_BRANCHNAME "1.10"
+#define PVRVERSION_BUILD 2359475
#define PVRVERSION_BSCONTROL "SGX_DDK_Linux_CustomerTI"
-#define PVRVERSION_STRING "SGX_DDK_Linux_CustomerTI sgxddk 19 1.9@" PVR_STR2(PVRVERSION_BUILD)
-#define PVRVERSION_STRING_SHORT "1.9@" PVR_STR2(PVRVERSION_BUILD)
+#define PVRVERSION_STRING "SGX_DDK_Linux_CustomerTI sgxddk 1.10@" PVR_STR2(PVRVERSION_BUILD)
+#define PVRVERSION_STRING_SHORT "1.10@" PVR_STR2(PVRVERSION_BUILD)
#define COPYRIGHT_TXT "Copyright (c) Imagination Technologies Ltd. All Rights Reserved."
-#define PVRVERSION_BUILD_HI 218
-#define PVRVERSION_BUILD_LO 8537
+#define PVRVERSION_BUILD_HI 235
+#define PVRVERSION_BUILD_LO 9475
#define PVRVERSION_STRING_NUMERIC PVR_STR2(PVRVERSION_MAJ) "." PVR_STR2(PVRVERSION_MIN) "." PVR_STR2(PVRVERSION_BUILD_HI) "." PVR_STR2(PVRVERSION_BUILD_LO)
#endif /* _PVRVERSION_H_ */
typedef struct _PVRSRV_DEV_DATA_
{
IMG_CONST PVRSRV_CONNECTION *psConnection; /*!< Services connection info */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie; /*!< Dev cookie */
-#else
IMG_HANDLE hDevCookie; /*!< Dev cookie */
-#endif
} PVRSRV_DEV_DATA;
/* ptr to associated client sync info - NULL if no sync */
struct _PVRSRV_CLIENT_SYNC_INFO_ *psClientSyncInfo;
-#if defined (SUPPORT_SID_INTERFACE)
- /* handle to client mapping data (OS specific) */
- IMG_SID hMappingInfo;
-
- /* handle to kernel mem info */
- IMG_SID hKernelMemInfo;
-
- /* resman handle for UM mapping clean-up */
- IMG_SID hResItem;
-#else
/* handle to client mapping data (OS specific) */
IMG_HANDLE hMappingInfo;
/* resman handle for UM mapping clean-up */
IMG_HANDLE hResItem;
-#endif
#if defined(SUPPORT_MEMINFO_IDS)
#if !defined(USE_CODE)
IMG_UINT32 dummy2;
#endif /* !defined(USE_CODE) */
#endif /* defined(SUPPORT_MEMINFO_IDS) */
+#if defined(SUPPORT_ION)
+ IMG_SIZE_T uiIonBufferSize;
+#endif /* defined(SUPPORT_ION) */
/*
ptr to next mem info
typedef struct _PVRSRV_HEAP_INFO_
{
IMG_UINT32 ui32HeapID;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap;
-#else
IMG_HANDLE hDevMemHeap;
-#endif
IMG_DEV_VIRTADDR sDevVAddrBase;
IMG_UINT32 ui32HeapByteSize;
IMG_UINT32 ui32Attribs;
/* globally unique name of the event object */
IMG_CHAR szName[EVENTOBJNAME_MAXLENGTH];
/* kernel specific handle for the event object */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hOSEventKM;
-#else
IMG_HANDLE hOSEventKM;
-#endif
} PVRSRV_EVENTOBJECT;
/*!< SOC Timer register */
IMG_VOID *pvSOCTimerRegisterKM;
IMG_VOID *pvSOCTimerRegisterUM;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSOCTimerRegisterOSMemHandle;
- IMG_SID hSOCTimerRegisterMappingInfo;
-#else
IMG_HANDLE hSOCTimerRegisterOSMemHandle;
IMG_HANDLE hSOCTimerRegisterMappingInfo;
-#endif
/*!< SOC Clock Gating registers */
IMG_VOID *pvSOCClockGateRegs;
/* global event object */
PVRSRV_EVENTOBJECT sGlobalEventObject;//FIXME: should be private to services
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_EVENTSID hOSGlobalEvent;
-#else
IMG_HANDLE hOSGlobalEvent;
-#endif
/* Note: add misc. items as required */
IMG_UINT32 aui32DDKVersion[4];
* directly in the srvclient PVRSRVGetMiscInfo code, and then convert it
* to a kernel meminfo if required. Try to not waste space.
*/
-#if !defined (SUPPORT_SID_INTERFACE)
union
{
/*!< Input client meminfo (UM side) */
/*!< Output kernel meminfo (Bridge+KM side) */
struct _PVRSRV_KERNEL_MEM_INFO_ *psKernelMemInfo;
} u;
-#endif
/*!< Offset in MemInfo to start cache op */
IMG_VOID *pvBaseVAddr;
* directly in the srvclient PVRSRVGetMiscInfo code, and then convert it
* to a kernel meminfo if required. Try to not waste space.
*/
-#if !defined(SUPPORT_SID_INTERFACE)
union
{
/*!< Input client meminfo (UM side) */
/*!< Output kernel meminfo (Bridge+KM side) */
struct _PVRSRV_KERNEL_MEM_INFO_ *psKernelMemInfo;
} u;
-#endif
/*!< Resulting refcount */
IMG_UINT32 ui32RefCount;
The fields are hidden in sPrivate in order to reinforce this. */
struct
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo;
-#else
IMG_HANDLE hKernelSyncInfo;
-#endif
IMG_UINT32 ui32ReadOpsPendingSnapshot;
IMG_UINT32 ui32WriteOpsPendingSnapshot;
IMG_UINT32 ui32ReadOps2PendingSnapshot;
IMG_IMPORT
PVRSRV_ERROR PVRSRVPollForValue ( const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hOSEvent,
-#else
IMG_HANDLE hOSEvent,
-#endif
volatile IMG_UINT32 *pui32LinMemAddr,
IMG_UINT32 ui32Value,
IMG_UINT32 ui32Mask,
/* memory APIs */
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDeviceMemContext(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phDevMemContext,
-#else
IMG_HANDLE *phDevMemContext,
-#endif
IMG_UINT32 *pui32SharedHeapCount,
PVRSRV_HEAP_INFO *psHeapInfo);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroyDeviceMemContext(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext
-#else
IMG_HANDLE hDevMemContext
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfo(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext,
-#else
IMG_HANDLE hDevMemContext,
-#endif
IMG_UINT32 *pui32SharedHeapCount,
PVRSRV_HEAP_INFO *psHeapInfo);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocDeviceMem2(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap,
-#else
IMG_HANDLE hDevMemHeap,
-#endif
IMG_UINT32 ui32Attribs,
IMG_SIZE_T ui32Size,
IMG_SIZE_T ui32Alignment,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocDeviceMem(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap,
-#else
IMG_HANDLE hDevMemHeap,
-#endif
IMG_UINT32 ui32Attribs,
IMG_SIZE_T ui32Size,
IMG_SIZE_T ui32Alignment,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVExportDeviceMem(IMG_CONST PVRSRV_DEV_DATA *psDevData,
PVRSRV_CLIENT_MEM_INFO *psMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phMemInfo
-#else
IMG_HANDLE *phMemInfo
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVReserveDeviceVirtualMem(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap,
-#else
IMG_HANDLE hDevMemHeap,
-#endif
IMG_DEV_VIRTADDR *psDevVAddr,
IMG_SIZE_T ui32Size,
IMG_SIZE_T ui32Alignment,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo,
- IMG_SID hDstDevMemHeap,
-#else
IMG_HANDLE hKernelMemInfo,
IMG_HANDLE hDstDevMemHeap,
-#endif
PVRSRV_CLIENT_MEM_INFO **ppsDstMemInfo);
IMG_IMPORT
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemory(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext,
-#else
IMG_HANDLE hDevMemContext,
-#endif
IMG_SIZE_T ui32ByteSize,
IMG_SIZE_T ui32PageOffset,
IMG_BOOL bPhysContig,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext,
- IMG_SID hDeviceClassBuffer,
-#else
IMG_HANDLE hDevMemContext,
IMG_HANDLE hDeviceClassBuffer,
-#endif
PVRSRV_CLIENT_MEM_INFO **ppsMemInfo);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVUnmapDeviceClassMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemory2(IMG_CONST PVRSRV_DEV_DATA *psDevData,
IMG_INT iFd,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDstDevMemHeap,
-#else
IMG_HANDLE hDstDevMemHeap,
-#endif
PVRSRV_CLIENT_MEM_INFO **ppsDstMemInfo);
#endif /* defined(LINUX) */
#if defined(SUPPORT_ION)
PVRSRV_ERROR PVRSRVMapIonHandle(const PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext,
-#else
- IMG_HANDLE hDevMemContext,
-#endif
- IMG_INT32 uiFD,
- IMG_UINT32 uiSize,
+ IMG_HANDLE hDevMemHeap,
+ IMG_UINT32 ui32NumFDs,
+ IMG_INT *paiBufferFDs,
+ IMG_UINT32 ui32ChunkCount,
+ IMG_SIZE_T *pauiOffset,
+ IMG_SIZE_T *pauiSize,
IMG_UINT32 ui32Attribs,
PVRSRV_CLIENT_MEM_INFO **ppsMemInfo);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocDeviceMemSparse(const PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap,
-#else
IMG_HANDLE hDevMemHeap,
-#endif
IMG_UINT32 ui32Attribs,
IMG_SIZE_T uAlignment,
IMG_UINT32 ui32ChunkSize,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDCSystemBuffer(IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phBuffer
-#else
IMG_HANDLE *phBuffer
-#endif
);
IMG_IMPORT
IMG_UINT32 ui32BufferCount,
IMG_UINT32 ui32OEMFlags,
IMG_UINT32 *pui32SwapChainID,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phSwapChain
-#else
IMG_HANDLE *phSwapChain
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroyDCSwapChain (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain
-#else
IMG_HANDLE hSwapChain
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCDstRect (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
-#else
IMG_HANDLE hSwapChain,
-#endif
IMG_RECT *psDstRect);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCSrcRect (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
-#else
IMG_HANDLE hSwapChain,
-#endif
IMG_RECT *psSrcRect);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCDstColourKey (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
-#else
IMG_HANDLE hSwapChain,
-#endif
IMG_UINT32 ui32CKColour);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCSrcColourKey (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
-#else
IMG_HANDLE hSwapChain,
-#endif
IMG_UINT32 ui32CKColour);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDCBuffers(IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
- IMG_SID *phBuffer
-#else
IMG_HANDLE hSwapChain,
IMG_HANDLE *phBuffer
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDCBuffers2(IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
- IMG_SID *phBuffer,
-#else
IMG_HANDLE hSwapChain,
IMG_HANDLE *phBuffer,
-#endif
IMG_SYS_PHYADDR *psPhyAddr);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSwapToDCBuffer (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hBuffer,
-#else
IMG_HANDLE hBuffer,
-#endif
IMG_UINT32 ui32ClipRectCount,
IMG_RECT *psClipRect,
IMG_UINT32 ui32SwapInterval,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hPrivateTag
-#else
IMG_HANDLE hPrivateTag
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSwapToDCBuffer2 (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hBuffer,
-#else
IMG_HANDLE hBuffer,
-#endif
IMG_UINT32 ui32SwapInterval,
PVRSRV_CLIENT_MEM_INFO **ppsMemInfos,
- IMG_UINT32 ui32NumMemInfos,
+ PVRSRV_CLIENT_SYNC_INFO **ppsSyncInfos,
+ IMG_UINT32 ui32NumMemSyncInfos,
IMG_PVOID pvPrivData,
- IMG_UINT32 ui32PrivDataLength);
+ IMG_UINT32 ui32PrivDataLength,
+ IMG_HANDLE *phFence);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSwapToDCSystem (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain
-#else
IMG_HANDLE hSwapChain
-#endif
);
/******************************************************************************
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetBCBuffer(IMG_HANDLE hDevice,
IMG_UINT32 ui32BufferIndex,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phBuffer
-#else
IMG_HANDLE *phBuffer
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPol(IMG_CONST PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo,
-#else
PVRSRV_CLIENT_MEM_INFO *psMemInfo,
-#endif
IMG_UINT32 ui32Offset,
IMG_UINT32 ui32Value,
IMG_UINT32 ui32Mask,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpSyncPol(IMG_CONST PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo,
-#else
PVRSRV_CLIENT_SYNC_INFO *psClientSyncInfo,
-#endif
IMG_BOOL bIsRead,
IMG_UINT32 ui32Value,
IMG_UINT32 ui32Mask);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpSyncPol2(IMG_CONST PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo,
-#else
PVRSRV_CLIENT_SYNC_INFO *psClientSyncInfo,
-#endif
IMG_BOOL bIsRead);
IMG_IMPORT
#if !defined(USE_CODE)
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPages(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo,
-#else
IMG_HANDLE hKernelMemInfo,
-#endif
IMG_DEV_PHYADDR *pPages,
IMG_UINT32 ui32NumPages,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_UINT32 ui32Height,
IMG_UINT32 ui32StrideInBytes,
IMG_DEV_VIRTADDR sDevBaseAddr,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext,
-#else
IMG_HANDLE hDevMemContext,
-#endif
IMG_UINT32 ui32Size,
PDUMP_PIXEL_FORMAT ePixelFormat,
PDUMP_MEM_FORMAT eMemFormat,
*****************************************************************************/
/* Exported APIs */
-IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVAllocUserModeMem (IMG_SIZE_T ui32Size);
-IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVCallocUserModeMem (IMG_SIZE_T ui32Size);
-IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVReallocUserModeMem (IMG_PVOID pvBase, IMG_SIZE_T uNewSize);
+IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVAllocUserModeMem (IMG_SIZE_T uiSize);
+IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVCallocUserModeMem (IMG_SIZE_T uiSize);
+IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVReallocUserModeMem (IMG_PVOID pvBase, IMG_SIZE_T uiNewSize);
IMG_IMPORT IMG_VOID IMG_CALLCONV PVRSRVFreeUserModeMem (IMG_PVOID pvMem);
-IMG_IMPORT IMG_VOID PVRSRVMemCopy(IMG_VOID *pvDst, const IMG_VOID *pvSrc, IMG_SIZE_T ui32Size);
-IMG_IMPORT IMG_VOID PVRSRVMemSet(IMG_VOID *pvDest, IMG_UINT8 ui8Value, IMG_SIZE_T ui32Size);
+IMG_IMPORT IMG_VOID PVRSRVMemCopy(IMG_VOID *pvDst, const IMG_VOID *pvSrc, IMG_SIZE_T uiSize);
+IMG_IMPORT IMG_VOID PVRSRVMemSet(IMG_VOID *pvDest, IMG_UINT8 ui8Value, IMG_SIZE_T uiSize);
struct _PVRSRV_MUTEX_OPAQUE_STRUCT_;
typedef struct _PVRSRV_MUTEX_OPAQUE_STRUCT_ *PVRSRV_MUTEX_HANDLE;
*****************************************************************************/
IMG_IMPORT PVRSRV_ERROR PVRSRVEventObjectWait(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_EVENTSID hOSEvent
-#else
IMG_HANDLE hOSEvent
-#endif
);
/*!
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateSyncInfoModObj(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phKernelSyncInfoModObj
-#else
IMG_HANDLE *phKernelSyncInfoModObj
-#endif
);
/*!
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroySyncInfoModObj(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj
-#else
IMG_HANDLE hKernelSyncInfoModObj
-#endif
);
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVModifyPendingSyncOps(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj,
-#else
IMG_HANDLE hKernelSyncInfoModObj,
-#endif
PVRSRV_CLIENT_SYNC_INFO *psSyncInfo,
IMG_UINT32 ui32ModifyFlags,
IMG_UINT32 *pui32ReadOpsPending,
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVModifyCompleteSyncOps(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj
-#else
IMG_HANDLE hKernelSyncInfoModObj
-#endif
);
/*!
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsTakeToken(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- const IMG_SID hKernelSyncInfo,
-#else
const PVRSRV_CLIENT_SYNC_INFO *psSyncInfo,
-#endif
PVRSRV_SYNC_TOKEN *psSyncToken);
/*!
******************************************************************************
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsFlushToToken(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- const IMG_SID hKernelSyncInfo,
-#else
const PVRSRV_CLIENT_SYNC_INFO *psSyncInfo,
-#endif
const PVRSRV_SYNC_TOKEN *psSyncToken,
IMG_BOOL bWait);
/*!
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsFlushToModObj(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj,
-#else
IMG_HANDLE hKernelSyncInfoModObj,
-#endif
IMG_BOOL bWait);
/*!
PVRSRV_PIXEL_FORMAT_RAW512 = 224,
PVRSRV_PIXEL_FORMAT_RAW1024 = 225,
+ /* Same as NV12 but with interleaved VU rather than interleaved UV */
+ PVRSRV_PIXEL_FORMAT_NV21 = 226,
+
PVRSRV_PIXEL_FORMAT_FORCE_I32 = 0x7fffffff
} PVRSRV_PIXEL_FORMAT;
IMG_DEV_VIRTADDR sReadOps2CompleteDevVAddr;
/* handle to client mapping data (OS specific) */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMappingInfo;
-
- /* handle to kernel sync info */
- IMG_SID hKernelSyncInfo;
-#else
IMG_HANDLE hMappingInfo;
/* handle to kernel sync info */
IMG_HANDLE hKernelSyncInfo;
-#endif
} PVRSRV_CLIENT_SYNC_INFO, *PPVRSRV_CLIENT_SYNC_INFO;
typedef PVRSRV_ERROR (*PFN_GET_BUFFER_ADDR)(IMG_HANDLE,
IMG_HANDLE,
IMG_SYS_PHYADDR**,
- IMG_SIZE_T*,
+ IMG_UINT32*,
IMG_VOID**,
IMG_HANDLE*,
IMG_BOOL*,
-#if defined (SUPPORT_SID_INTERFACE)
-#define PVR_SECURE_HANDLES_SET_OFFSET OPTIONS_BIT4
-#define OPTIONS_BIT4 (0x1U << 4)
-#else
#if defined(PVR_SECURE_HANDLES) || defined (INTERNAL_TEST)
#define PVR_SECURE_HANDLES_SET_OFFSET OPTIONS_BIT4
#define OPTIONS_BIT4 (0x1U << 4)
#else
#define OPTIONS_BIT4 0x0
#endif /* PVR_SECURE_HANDLES */
-#endif
#if defined(SGX_BYPASS_SYSTEM_CACHE) || defined (INTERNAL_TEST)
#define SGX_BYPASS_SYSTEM_CACHE_SET_OFFSET OPTIONS_BIT5
#if defined(SUPPORT_MEMORY_TILING)
#define SGX_VPB_TILED_HEAP_ID 14
#endif
-#if defined(SUPPORT_ION)
-#define SGX_ION_HEAP_ID 15
-#endif
-#define SGX_MAX_HEAP_ID 16
+#define SGX_MAX_HEAP_ID 15
/*
* Keep SGX_3DPARAMETERS_HEAP_ID as TQ full custom
#define SGX_MAX_SRC_SYNCS_TA 32
#define SGX_MAX_DST_SYNCS_TA 1
/* note: there is implicitly 1 3D Dst Sync */
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+/* note: only one dst sync is supported by the 2D paths */
+#define SGX_MAX_SRC_SYNCS_TQ 6
+#define SGX_MAX_DST_SYNCS_TQ 2
+#else /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
#define SGX_MAX_SRC_SYNCS_TQ 8
#define SGX_MAX_DST_SYNCS_TQ 1
+#endif /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
#endif
typedef enum _SGX_MISC_INFO_REQUEST_
{
SGX_MISC_INFO_REQUEST_CLOCKSPEED = 0,
+ SGX_MISC_INFO_REQUEST_CLOCKSPEED_SLCSIZE,
SGX_MISC_INFO_REQUEST_SGXREV,
SGX_MISC_INFO_REQUEST_DRIVER_SGXREV,
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
SGX_MISC_INFO_REQUEST_SPM,
SGX_MISC_INFO_REQUEST_ACTIVEPOWER,
SGX_MISC_INFO_REQUEST_LOCKUPS,
+#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
+ SGX_MISC_INFO_REQUEST_EDM_STATUS_BUFFER_INFO,
+#endif
SGX_MISC_INFO_REQUEST_FORCE_I16 = 0x7fff
} SGX_MISC_INFO_REQUEST;
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
IMG_UINT32 ui32DeviceMemValue; /*!< device mem value read from ukernel */
#endif
+} PVRSRV_SGX_MISCINFO_FEATURES;
+
+typedef struct _PVRSRV_SGX_MISCINFO_QUERY_CLOCKSPEED_SLCSIZE
+{
+ IMG_UINT32 ui32SGXClockSpeed;
+ IMG_UINT32 ui32SGXSLCSize;
+} PVRSRV_SGX_MISCINFO_QUERY_CLOCKSPEED_SLCSIZE;
+
#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
+/******************************************************************************
+ * Struct for getting access to the EDM Status Buffer
+ ******************************************************************************/
+typedef struct _PVRSRV_SGX_MISCINFO_EDM_STATUS_BUFFER_INFO
+{
IMG_DEV_VIRTADDR sDevVAEDMStatusBuffer; /*!< DevVAddr of the EDM status buffer */
IMG_PVOID pvEDMStatusBuffer; /*!< CPUVAddr of the EDM status buffer */
+} PVRSRV_SGX_MISCINFO_EDM_STATUS_BUFFER_INFO;
#endif
-} PVRSRV_SGX_MISCINFO_FEATURES;
/******************************************************************************
IMG_UINT32 reserved; /*!< Unused: ensures valid code in the case everything else is compiled out */
PVRSRV_SGX_MISCINFO_FEATURES sSGXFeatures;
IMG_UINT32 ui32SGXClockSpeed;
+ PVRSRV_SGX_MISCINFO_QUERY_CLOCKSPEED_SLCSIZE sQueryClockSpeedSLCSize;
PVRSRV_SGX_MISCINFO_ACTIVEPOWER sActivePower;
PVRSRV_SGX_MISCINFO_LOCKUPS sLockups;
PVRSRV_SGX_MISCINFO_SPM sSPM;
SGX_BREAKPOINT_INFO sSGXBreakpointInfo;
#endif
PVRSRV_SGX_MISCINFO_SET_HWPERF_STATUS sSetHWPerfStatus;
+
+#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
+ PVRSRV_SGX_MISCINFO_EDM_STATUS_BUFFER_INFO sEDMStatusBufferInfo;
+#endif
} uData;
} SGX_MISC_INFO;
} PVRSRV_SGX_PDUMP_CONTEXT;
-#if !defined (SUPPORT_SID_INTERFACE)
typedef struct _SGX_KICKTA_DUMP_ROFF_
{
IMG_HANDLE hKernelMemInfo; /*< Buffer handle */
IMG_UINT32 ui32Value; /*< Actual value to dump */
IMG_PCHAR pszName; /*< Name of buffer */
} SGX_KICKTA_DUMP_ROFF, *PSGX_KICKTA_DUMP_ROFF;
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
-typedef struct _SGX_KICKTA_DUMP_BUFFER_KM_
-#else
typedef struct _SGX_KICKTA_DUMP_BUFFER_
-#endif
{
IMG_UINT32 ui32SpaceUsed;
IMG_UINT32 ui32Start; /*< Byte offset of start to dump */
#if defined (__QNXNTO__)
IMG_UINT32 ui32NameLength; /*< Number of characters in buffer name */
#endif
-#if defined (SUPPORT_SID_INTERFACE)
-} SGX_KICKTA_DUMP_BUFFER_KM, *PSGX_KICKTA_DUMP_BUFFER_KM;
-#else
} SGX_KICKTA_DUMP_BUFFER, *PSGX_KICKTA_DUMP_BUFFER;
-#endif
-#if !defined (SUPPORT_SID_INTERFACE)
#ifdef PDUMP
/*
PDUMP version of above kick structure
IMG_UINT32 ui32ROffArraySize;
} SGX_KICKTA_PDUMP, *PSGX_KICKTA_PDUMP;
#endif /* PDUMP */
-#endif /* #if !defined (SUPPORT_SID_INTERFACE) */
#if defined(TRANSFER_QUEUE)
#if defined(SGX_FEATURE_2D_HARDWARE)
#ifndef __SGXSCRIPT_H__
#define __SGXSCRIPT_H__
+#include "sgxfeaturedefs.h"
#if defined (__cplusplus)
extern "C" {
#endif
#define SGX_MAX_INIT_COMMANDS 64
+#define SGX_MAX_PRINT_COMMANDS 96
#define SGX_MAX_DEINIT_COMMANDS 16
typedef enum _SGX_INIT_OPERATION
SGX_INIT_OP_ILLEGAL = 0,
SGX_INIT_OP_WRITE_HW_REG,
SGX_INIT_OP_READ_HW_REG,
+ SGX_INIT_OP_PRINT_HW_REG,
#if defined(PDUMP)
SGX_INIT_OP_PDUMP_HW_REG,
#endif
SGX_INIT_COMMAND asInitCommandsPart1[SGX_MAX_INIT_COMMANDS];
SGX_INIT_COMMAND asInitCommandsPart2[SGX_MAX_INIT_COMMANDS];
SGX_INIT_COMMAND asDeinitCommands[SGX_MAX_DEINIT_COMMANDS];
+#if defined(SGX_FEATURE_MP)
+ SGX_INIT_COMMAND asSGXREGDebugCommandsPart1[SGX_MAX_PRINT_COMMANDS];
+#endif
+ SGX_INIT_COMMAND *apsSGXREGDebugCommandsPart2[SGX_FEATURE_MP_CORE_COUNT_3D];
} SGX_INIT_SCRIPTS;
#if defined(__cplusplus)
#undef BCE_USE_SET_MEMORY
#endif
-#if defined(__i386__) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) && defined(SUPPORT_LINUX_X86_PAT) && defined(SUPPORT_LINUX_X86_WRITECOMBINE)
+#if (defined(__i386__) || defined(__x86_64__)) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) && defined(SUPPORT_LINUX_X86_PAT) && defined(SUPPORT_LINUX_X86_WRITECOMBINE)
#include <asm/cacheflush.h>
#define BCE_USE_SET_MEMORY
#endif
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
*/ /**************************************************************************/
#ifndef __3RDPARTY_DC_DRM_SHARED_H__
#define __3RDPARTY_DC_DRM_SHARED_H__
# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-#
### ###########################################################################
ccflags-y += \
-I$(TOP)/services4/3rdparty/dc_omapfb3_linux \
- -I$(KERNELDIR)/drivers/video/omap2 \
- -I$(KERNELDIR)/arch/arm/plat-omap/include
+ -Idrivers/video/omap2 \
+ -Iarch/arm/plat-omap/include
omaplfb-y += \
services4/3rdparty/dc_omapfb3_linux/omaplfb_displayclass.o \
# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-#
### ###########################################################################
modules := dc_omapfb3_linux
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
*/ /**************************************************************************/
#ifndef __OMAPLFB_H__
#define __OMAPLFB_H__
#define OMAPLFB_CONSOLE_UNLOCK() release_console_sem()
#endif
+#if defined(CONFIG_ION_OMAP)
+#include <linux/ion.h>
+#include <linux/omap_ion.h>
+#endif /* defined(CONFIG_ION_OMAP) */
+
#define unref__ __attribute__ ((unused))
typedef void * OMAPLFB_HANDLE;
OMAPLFB_ATOMIC_BOOL sLeaveVT;
#endif
+#if defined(CONFIG_ION_OMAP)
+ struct ion_client *psIONClient;
+#endif
+
} OMAPLFB_DEVINFO;
#define OMAPLFB_PAGE_SIZE 4096
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
*/ /**************************************************************************/
/**************************************************************************
#include "omaplfb.h"
#if defined(CONFIG_DSSCOMP)
-
-#if !defined(CONFIG_ION_OMAP)
+#if defined(CONFIG_ION_OMAP)
+extern struct ion_device *omap_ion_device;
+#else /* defined(CONFIG_ION_OMAP) */
#error CONFIG_DSSCOMP support requires CONFIG_ION_OMAP
-#endif
-
-#include <linux/ion.h>
-#include <linux/omap_ion.h>
-
-extern struct ion_client *gpsIONClient;
-
+#endif /* defined(CONFIG_ION_OMAP) */
+#if defined(CONFIG_DRM_OMAP_DMM_TILER)
+#include <../drivers/staging/omapdrm/omap_dmm_tiler.h>
+#include <../drivers/video/omap2/dsscomp/tiler-utils.h>
+#elif defined(CONFIG_TI_TILER)
#include <mach/tiler.h>
+#else /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
+#error CONFIG_DSSCOMP support requires either \
+ CONFIG_DRM_OMAP_DMM_TILER or CONFIG_TI_TILER
+#endif /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
#include <video/dsscomp.h>
#include <plat/dsscomp.h>
-
#endif /* defined(CONFIG_DSSCOMP) */
#define OMAPLFB_COMMAND_COUNT 1
#define OMAPLFB_VSYNC_SETTLE_COUNT 5
//#define OMAPLFB_MAX_NUM_DEVICES FB_MAX
-#define OMAPLFB_MAX_NUM_DEVICES 1
+#define OMAPLFB_MAX_NUM_DEVICES 1
#if (OMAPLFB_MAX_NUM_DEVICES > FB_MAX)
#error "OMAPLFB_MAX_NUM_DEVICES must not be greater than FB_MAX"
#endif
/* Top level 'hook ptr' */
static PFN_DC_GET_PVRJTABLE gpfnGetPVRJTable = NULL;
+#if !defined(CONFIG_DSSCOMP)
/* Round x up to a multiple of y */
static inline unsigned long RoundUpToMultiple(unsigned long x, unsigned long y)
{
return (gcd == 0) ? 0 : ((x / gcd) * y);
}
+#endif
unsigned OMAPLFBMaxFBDevIDPlusOne(void)
{
IMG_HANDLE *phSwapChain,
IMG_UINT32 *pui32SwapChainID)
{
- OMAPLFB_DEVINFO *psDevInfo;
OMAPLFB_SWAPCHAIN *psSwapChain;
- OMAPLFB_BUFFER *psBuffer;
- IMG_UINT32 i;
+ OMAPLFB_DEVINFO *psDevInfo;
PVRSRV_ERROR eError;
- IMG_UINT32 ui32BuffersToSkip;
+ IMG_UINT32 i;
UNREFERENCED_PARAMETER(ui32OEMFlags);
-
+ UNREFERENCED_PARAMETER(ui32Flags);
+
/* Check parameters */
if(!hDevice
|| !psDstSurfAttrib
eError = PVRSRV_ERROR_FLIP_CHAIN_EXISTS;
goto ExitUnLock;
}
-
- /* Check the buffer count */
- if(ui32BufferCount > psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers)
- {
- eError = PVRSRV_ERROR_TOOMANYBUFFERS;
- goto ExitUnLock;
- }
-
- if ((psDevInfo->sFBInfo.ulRoundedBufferSize * (unsigned long)ui32BufferCount) > psDevInfo->sFBInfo.ulFBSize)
- {
- eError = PVRSRV_ERROR_TOOMANYBUFFERS;
- goto ExitUnLock;
- }
-
- /*
- * We will allocate the swap chain buffers at the back of the frame
- * buffer area. This preserves the front portion, which may be being
- * used by other Linux Framebuffer based applications.
- */
- ui32BuffersToSkip = psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers - ui32BufferCount;
-
- /*
- * Verify the DST/SRC attributes,
- * SRC/DST must match the current display mode config
- */
- if(psDstSurfAttrib->pixelformat != psDevInfo->sDisplayFormat.pixelformat
- || psDstSurfAttrib->sDims.ui32ByteStride != psDevInfo->sDisplayDim.ui32ByteStride
- || psDstSurfAttrib->sDims.ui32Width != psDevInfo->sDisplayDim.ui32Width
- || psDstSurfAttrib->sDims.ui32Height != psDevInfo->sDisplayDim.ui32Height)
- {
- /* DST doesn't match the current mode */
- eError = PVRSRV_ERROR_INVALID_PARAMS;
- goto ExitUnLock;
- }
-
- if(psDstSurfAttrib->pixelformat != psSrcSurfAttrib->pixelformat
- || psDstSurfAttrib->sDims.ui32ByteStride != psSrcSurfAttrib->sDims.ui32ByteStride
- || psDstSurfAttrib->sDims.ui32Width != psSrcSurfAttrib->sDims.ui32Width
- || psDstSurfAttrib->sDims.ui32Height != psSrcSurfAttrib->sDims.ui32Height)
- {
- /* DST doesn't match the SRC */
- eError = PVRSRV_ERROR_INVALID_PARAMS;
- goto ExitUnLock;
- }
- /* check flags if implementation requires them */
- UNREFERENCED_PARAMETER(ui32Flags);
-
-#if defined(PVR_OMAPFB3_UPDATE_MODE)
- if (!OMAPLFBSetUpdateMode(psDevInfo, PVR_OMAPFB3_UPDATE_MODE))
- {
- printk(KERN_WARNING DRIVER_PREFIX ": %s: Device %u: Couldn't set frame buffer update mode %d\n", __FUNCTION__, psDevInfo->uiFBDevID, PVR_OMAPFB3_UPDATE_MODE);
- }
-#endif
/* create a swapchain structure */
psSwapChain = (OMAPLFB_SWAPCHAIN*)OMAPLFBAllocKernelMem(sizeof(OMAPLFB_SWAPCHAIN));
if(!psSwapChain)
goto ExitUnLock;
}
- psBuffer = (OMAPLFB_BUFFER*)OMAPLFBAllocKernelMem(sizeof(OMAPLFB_BUFFER) * ui32BufferCount);
- if(!psBuffer)
+ /* If services asks for a 0-length swap chain, it's probably Android.
+ *
+ * This will use only non-display memory posting via PVRSRVSwapToDCBuffers2(),
+ * and we can skip some useless sanity checking.
+ */
+ if(ui32BufferCount > 0)
{
- eError = PVRSRV_ERROR_OUT_OF_MEMORY;
- goto ErrorFreeSwapChain;
- }
+ IMG_UINT32 ui32BuffersToSkip;
- psSwapChain->ulBufferCount = (unsigned long)ui32BufferCount;
- psSwapChain->psBuffer = psBuffer;
- psSwapChain->bNotVSynced = OMAPLFB_TRUE;
- psSwapChain->uiFBDevID = psDevInfo->uiFBDevID;
+ /* Check the buffer count */
+ if(ui32BufferCount > psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers)
+ {
+ eError = PVRSRV_ERROR_TOOMANYBUFFERS;
+ goto ErrorFreeSwapChain;
+ }
+
+ if ((psDevInfo->sFBInfo.ulRoundedBufferSize * (unsigned long)ui32BufferCount) > psDevInfo->sFBInfo.ulFBSize)
+ {
+ eError = PVRSRV_ERROR_TOOMANYBUFFERS;
+ goto ErrorFreeSwapChain;
+ }
- /* Link the buffers */
- for(i=0; i<ui32BufferCount-1; i++)
- {
- psBuffer[i].psNext = &psBuffer[i+1];
- }
- /* and link last to first */
- psBuffer[i].psNext = &psBuffer[0];
+ /*
+ * We will allocate the swap chain buffers at the back of the frame
+ * buffer area. This preserves the front portion, which may be being
+ * used by other Linux Framebuffer based applications.
+ */
+ ui32BuffersToSkip = psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers - ui32BufferCount;
- /* Configure the swapchain buffers */
- for(i=0; i<ui32BufferCount; i++)
- {
- IMG_UINT32 ui32SwapBuffer = i + ui32BuffersToSkip;
- IMG_UINT32 ui32BufferOffset = ui32SwapBuffer * (IMG_UINT32)psDevInfo->sFBInfo.ulRoundedBufferSize;
+ /*
+ * Verify the DST/SRC attributes,
+ * SRC/DST must match the current display mode config
+ */
+ if(psDstSurfAttrib->pixelformat != psDevInfo->sDisplayFormat.pixelformat
+ || psDstSurfAttrib->sDims.ui32ByteStride != psDevInfo->sDisplayDim.ui32ByteStride
+ || psDstSurfAttrib->sDims.ui32Width != psDevInfo->sDisplayDim.ui32Width
+ || psDstSurfAttrib->sDims.ui32Height != psDevInfo->sDisplayDim.ui32Height)
+ {
+ /* DST doesn't match the current mode */
+ eError = PVRSRV_ERROR_INVALID_PARAMS;
+ goto ErrorFreeSwapChain;
+ }
-#if defined(CONFIG_DSSCOMP)
- if (psDevInfo->sFBInfo.bIs2D)
+ if(psDstSurfAttrib->pixelformat != psSrcSurfAttrib->pixelformat
+ || psDstSurfAttrib->sDims.ui32ByteStride != psSrcSurfAttrib->sDims.ui32ByteStride
+ || psDstSurfAttrib->sDims.ui32Width != psSrcSurfAttrib->sDims.ui32Width
+ || psDstSurfAttrib->sDims.ui32Height != psSrcSurfAttrib->sDims.ui32Height)
{
- ui32BufferOffset = 0;
+ /* DST doesn't match the SRC */
+ eError = PVRSRV_ERROR_INVALID_PARAMS;
+ goto ErrorFreeSwapChain;
}
+
+ psSwapChain->psBuffer = (OMAPLFB_BUFFER*)OMAPLFBAllocKernelMem(sizeof(OMAPLFB_BUFFER) * ui32BufferCount);
+ if(!psSwapChain->psBuffer)
+ {
+ eError = PVRSRV_ERROR_OUT_OF_MEMORY;
+ goto ErrorFreeSwapChain;
+ }
+
+ /* Link the buffers */
+ for(i = 0; i < ui32BufferCount - 1; i++)
+ {
+ psSwapChain->psBuffer[i].psNext = &psSwapChain->psBuffer[i + 1];
+ }
+
+ /* and link last to first */
+ psSwapChain->psBuffer[i].psNext = &psSwapChain->psBuffer[0];
+
+ /* Configure the swapchain buffers */
+ for(i = 0; i < ui32BufferCount; i++)
+ {
+ IMG_UINT32 ui32SwapBuffer = i + ui32BuffersToSkip;
+ IMG_UINT32 ui32BufferOffset = ui32SwapBuffer * (IMG_UINT32)psDevInfo->sFBInfo.ulRoundedBufferSize;
+
+#if defined(CONFIG_DSSCOMP)
+ if (psDevInfo->sFBInfo.bIs2D)
+ {
+ ui32BufferOffset = 0;
+ }
#endif /* defined(CONFIG_DSSCOMP) */
- psBuffer[i].psSyncData = ppsSyncData[i];
+ psSwapChain->psBuffer[i].psSyncData = ppsSyncData[i];
- psBuffer[i].sSysAddr.uiAddr = psDevInfo->sFBInfo.sSysAddr.uiAddr + ui32BufferOffset;
- psBuffer[i].sCPUVAddr = psDevInfo->sFBInfo.sCPUVAddr + ui32BufferOffset;
- psBuffer[i].ulYOffset = ui32BufferOffset / psDevInfo->sFBInfo.ulByteStride;
- psBuffer[i].psDevInfo = psDevInfo;
+ psSwapChain->psBuffer[i].sSysAddr.uiAddr = psDevInfo->sFBInfo.sSysAddr.uiAddr + ui32BufferOffset;
+ psSwapChain->psBuffer[i].sCPUVAddr = psDevInfo->sFBInfo.sCPUVAddr + ui32BufferOffset;
+ psSwapChain->psBuffer[i].ulYOffset = ui32BufferOffset / psDevInfo->sFBInfo.ulByteStride;
+ psSwapChain->psBuffer[i].psDevInfo = psDevInfo;
#if defined(CONFIG_DSSCOMP)
- if (psDevInfo->sFBInfo.bIs2D)
- {
- psBuffer[i].sSysAddr.uiAddr += ui32SwapBuffer *
- ALIGN((IMG_UINT32)psDevInfo->sFBInfo.ulWidth * psDevInfo->sFBInfo.uiBytesPerPixel, PAGE_SIZE);
- }
+ if (psDevInfo->sFBInfo.bIs2D)
+ {
+ psSwapChain->psBuffer[i].sSysAddr.uiAddr += ui32SwapBuffer *
+ ALIGN((IMG_UINT32)psDevInfo->sFBInfo.ulWidth * psDevInfo->sFBInfo.uiBytesPerPixel, PAGE_SIZE);
+ }
#endif /* defined(CONFIG_DSSCOMP) */
- OMAPLFBInitBufferForSwap(&psBuffer[i]);
+ OMAPLFBInitBufferForSwap(&psSwapChain->psBuffer[i]);
+ }
+ }
+ else
+ {
+ psSwapChain->psBuffer = NULL;
+ }
+
+#if defined(PVR_OMAPFB3_UPDATE_MODE)
+ if (!OMAPLFBSetUpdateMode(psDevInfo, PVR_OMAPFB3_UPDATE_MODE))
+ {
+ printk(KERN_WARNING DRIVER_PREFIX ": %s: Device %u: Couldn't set frame buffer update mode %d\n", __FUNCTION__, psDevInfo->uiFBDevID, PVR_OMAPFB3_UPDATE_MODE);
}
+#endif /* defined(PVR_OMAPFB3_UPDATE_MODE) */
+
+ psSwapChain->ulBufferCount = (unsigned long)ui32BufferCount;
+ psSwapChain->bNotVSynced = OMAPLFB_TRUE;
+ psSwapChain->uiFBDevID = psDevInfo->uiFBDevID;
if (OMAPLFBCreateSwapQueue(psSwapChain) != OMAPLFB_OK)
{
ErrorDestroySwapQueue:
OMAPLFBDestroySwapQueue(psSwapChain);
ErrorFreeBuffers:
- OMAPLFBFreeKernelMem(psBuffer);
+ if(psSwapChain->psBuffer)
+ {
+ OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
+ }
ErrorFreeSwapChain:
OMAPLFBFreeKernelMem(psSwapChain);
ExitUnLock:
}
/* Free resources */
- OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
+ if (psSwapChain->psBuffer)
+ {
+ OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
+ }
OMAPLFBFreeKernelMem(psSwapChain);
psDevInfo->psSwapChain = NULL;
#if defined(CONFIG_DSSCOMP)
if (is_tiler_addr(psBuffer->sSysAddr.uiAddr))
{
+ int res;
IMG_UINT32 w = psBuffer->psDevInfo->sDisplayDim.ui32Width;
IMG_UINT32 h = psBuffer->psDevInfo->sDisplayDim.ui32Height;
struct dsscomp_setup_dispc_data comp = {
};
struct tiler_pa_info *pas[1] = { NULL };
comp.ovls[0].ba = (u32) psBuffer->sSysAddr.uiAddr;
- dsscomp_gralloc_queue(&comp, pas, true,
+ res = dsscomp_gralloc_queue(&comp, pas, true,
(void *) psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete,
(void *) psBuffer->hCmdComplete);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: dsscomp_gralloc_queue failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res));
+ }
}
else
#endif /* defined(CONFIG_DSSCOMP) */
{
struct tiler_pa_info *apsTilerPAs[5];
IMG_UINT32 i, k;
+ struct
+ {
+ IMG_UINTPTR_T uiAddr;
+ IMG_UINTPTR_T uiUVAddr;
+ struct tiler_pa_info *psTilerInfo;
+ }
+ asMemInfo[5] = {};
+ int res;
if(ui32DssDataLength != sizeof(*psDssData))
{
return IMG_FALSE;
}
- for(i = k = 0; i < ui32NumMemInfos && k < ARRAY_SIZE(apsTilerPAs); i++, k++)
+ for(i = k = 0; i < ui32NumMemInfos && k < ARRAY_SIZE(asMemInfo); i++, k++)
{
struct tiler_pa_info *psTilerInfo;
IMG_CPU_VIRTADDR virtAddr;
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetByteSize(ppsMemInfos[i], &uByteSize);
ui32NumPages = (uByteSize + PAGE_SIZE - 1) >> PAGE_SHIFT;
- apsTilerPAs[k] = NULL;
-
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], 0, &phyAddr);
- /* NV12 buffers are already mapped to tiler */
- if(psDssData->ovls[k].cfg.color_mode == OMAP_DSS_COLOR_NV12)
- {
- psDssData->ovls[k].ba = (u32)phyAddr.uiAddr;
-
- psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], (uByteSize * 2) / 3, &phyAddr);
- psDssData->ovls[k].uv = (u32)phyAddr.uiAddr;
- continue;
- }
-
- /* Other kinds of buffer may also already be mapped to tiler */
+ /* TILER buffers do not need meminfos */
if(is_tiler_addr((u32)phyAddr.uiAddr))
{
- psDssData->ovls[k].ba = (u32)phyAddr.uiAddr;
+#ifdef CONFIG_DRM_OMAP_DMM_TILER
+ enum tiler_fmt fmt;
+#endif
+ asMemInfo[k].uiAddr = phyAddr.uiAddr;
+#ifdef CONFIG_DRM_OMAP_DMM_TILER
+ if(tiler_get_fmt((u32)phyAddr.uiAddr, &fmt) && fmt == TILFMT_8BIT)
+#else
+ if(tiler_fmt((u32)phyAddr.uiAddr) == TILFMT_8BIT)
+#endif
+ {
+ psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], (uByteSize * 2) / 3, &phyAddr);
+ asMemInfo[k].uiUVAddr = phyAddr.uiAddr;
+ }
continue;
}
+ /* normal gralloc layer */
psTilerInfo = kzalloc(sizeof(*psTilerInfo), GFP_KERNEL);
if(!psTilerInfo)
{
psTilerInfo->num_pg = ui32NumPages;
psTilerInfo->memtype = TILER_MEM_USING;
-
for(j = 0; j < ui32NumPages; j++)
{
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], j << PAGE_SHIFT, &phyAddr);
psTilerInfo->mem[j] = (u32)phyAddr.uiAddr;
}
- /* Need base address for in-page offset */
+ /* need base address for in-page offset */
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuVAddr(ppsMemInfos[i], &virtAddr);
- psDssData->ovls[k].ba = (u32)virtAddr;
- apsTilerPAs[k] = psTilerInfo;
+ asMemInfo[k].uiAddr = (IMG_UINTPTR_T) virtAddr;
+ asMemInfo[k].psTilerInfo = psTilerInfo;
}
- /* Set up cloned layer addresses (but don't duplicate tiler_pas) */
- for(i = k; i < psDssData->num_ovls && i < ARRAY_SIZE(apsTilerPAs); i++)
+ for(i = 0; i < psDssData->num_ovls; i++)
{
- unsigned int ix = psDssData->ovls[i].ba;
- if(ix >= ARRAY_SIZE(apsTilerPAs))
+ unsigned int ix;
+ apsTilerPAs[i] = NULL;
+
+ /* only supporting Post2, cloned and fbmem layers */
+ if (psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_LAYER_IX &&
+ psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_OVL_IX &&
+ psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_FB)
{
- WARN(1, "Invalid clone layer (%u); skipping all cloned layers", ix);
- psDssData->num_ovls = k;
- break;
+ psDssData->ovls[i].cfg.enabled = false;
+ }
+
+ if (psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_LAYER_IX)
+ {
+ continue;
}
- apsTilerPAs[i] = apsTilerPAs[ix];
- psDssData->ovls[i].ba = psDssData->ovls[ix].ba;
- psDssData->ovls[i].uv = psDssData->ovls[ix].uv;
+
+ /* Post2 layers */
+ ix = psDssData->ovls[i].ba;
+ if (ix >= k)
+ {
+ WARN(1, "Invalid Post2 layer (%u)", ix);
+ psDssData->ovls[i].cfg.enabled = false;
+ continue;
+ }
+
+ psDssData->ovls[i].addressing = OMAP_DSS_BUFADDR_DIRECT;
+ psDssData->ovls[i].ba = (u32) asMemInfo[ix].uiAddr;
+ psDssData->ovls[i].uv = (u32) asMemInfo[ix].uiUVAddr;
+ apsTilerPAs[i] = asMemInfo[ix].psTilerInfo;
}
- dsscomp_gralloc_queue(psDssData, apsTilerPAs, false,
+ res = dsscomp_gralloc_queue(psDssData, apsTilerPAs, false,
(void *)psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete,
(void *)hCmdCookie);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: dsscomp_gralloc_queue failed (%d)\n", __FUNCTION__, psDevInfo->uiFBDevID, res));
+ }
for(i = 0; i < k; i++)
{
struct module *psLINFBOwner;
OMAPLFB_FBINFO *psPVRFBInfo = &psDevInfo->sFBInfo;
OMAPLFB_ERROR eError = OMAPLFB_ERROR_GENERIC;
- unsigned long FBSize;
- unsigned long ulLCM;
unsigned uiFBDevID = psDevInfo->uiFBDevID;
OMAPLFB_CONSOLE_LOCK();
goto ErrorRelSem;
}
- FBSize = (psLINFBInfo->screen_size) != 0 ?
- psLINFBInfo->screen_size :
- psLINFBInfo->fix.smem_len;
-
- /*
- * Try and filter out invalid FB info structures (a problem
- * seen on some OMAP3 systems).
- */
- if (FBSize == 0 || psLINFBInfo->fix.line_length == 0)
- {
- eError = OMAPLFB_ERROR_INVALID_DEVICE;
- goto ErrorRelSem;
- }
-
psLINFBOwner = psLINFBInfo->fbops->owner;
if (!try_module_get(psLINFBOwner))
{
psDevInfo->psLINFBInfo = psLINFBInfo;
- ulLCM = LCM(psLINFBInfo->fix.line_length, OMAPLFB_PAGE_SIZE);
+ psPVRFBInfo->ulWidth = psLINFBInfo->var.xres;
+ psPVRFBInfo->ulHeight = psLINFBInfo->var.yres;
+
+ if (psPVRFBInfo->ulWidth == 0 || psPVRFBInfo->ulHeight == 0)
+ {
+ eError = OMAPLFB_ERROR_INVALID_DEVICE;
+ goto ErrorFBRel;
+ }
+
+#if !defined(CONFIG_DSSCOMP)
+ psPVRFBInfo->ulFBSize = (psLINFBInfo->screen_size) != 0 ?
+ psLINFBInfo->screen_size :
+ psLINFBInfo->fix.smem_len;
+
+ /*
+ * Try and filter out invalid FB info structures (a problem
+ * seen on some OMAP3 systems).
+ */
+ if (psPVRFBInfo->ulFBSize == 0 || psLINFBInfo->fix.line_length == 0)
+ {
+ eError = OMAPLFB_ERROR_INVALID_DEVICE;
+ goto ErrorFBRel;
+ }
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer physical address: 0x%lx\n",
- psDevInfo->uiFBDevID, psLINFBInfo->fix.smem_start));
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer virtual address: 0x%lx\n",
- psDevInfo->uiFBDevID, (unsigned long)psLINFBInfo->screen_base));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
": Device %u: Framebuffer size: %lu\n",
- psDevInfo->uiFBDevID, FBSize));
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulFBSize));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
": Device %u: Framebuffer virtual width: %u\n",
psDevInfo->uiFBDevID, psLINFBInfo->var.xres_virtual));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
": Device %u: Framebuffer virtual height: %u\n",
psDevInfo->uiFBDevID, psLINFBInfo->var.yres_virtual));
+#endif
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer width: %u\n",
- psDevInfo->uiFBDevID, psLINFBInfo->var.xres));
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer height: %u\n",
- psDevInfo->uiFBDevID, psLINFBInfo->var.yres));
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer stride: %u\n",
- psDevInfo->uiFBDevID, psLINFBInfo->fix.line_length));
+ ": Device %u: Framebuffer width: %lu\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulWidth));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: LCM of stride and page size: %lu\n",
- psDevInfo->uiFBDevID, ulLCM));
-
- /* Additional implementation specific information */
- OMAPLFBPrintInfo(psDevInfo);
+ ": Device %u: Framebuffer height: %lu\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulHeight));
#if defined(CONFIG_DSSCOMP)
{
- /* for some reason we need at least 3 buffers in the swap chain */
- int n = FBSize / RoundUpToMultiple(psLINFBInfo->fix.line_length * psLINFBInfo->var.yres, ulLCM);
+#if defined(SUPPORT_PVRSRV_GET_DC_SYSTEM_BUFFER)
+ /*
+ * Assume we need 3 swap buffers, and a separate system
+ * buffer.
+ */
+ int n = 4;
+#else
+ /*
+ * Assume we need just 3 swap buffers, and no separate
+ * system buffer.
+ */
+ int n = 3;
+#endif
int res;
int i, x, y, w;
ion_phys_addr_t phys;
{
/* TILER will align width to 128-bytes */
/* however, SGX must have full page width */
- .w = ALIGN(psLINFBInfo->var.xres, PAGE_SIZE / (psLINFBInfo->var.bits_per_pixel / 8)),
- .h = psLINFBInfo->var.yres,
+ .w = ALIGN(psPVRFBInfo->ulWidth, PAGE_SIZE / (psLINFBInfo->var.bits_per_pixel / 8)),
+ .h = psPVRFBInfo->ulHeight,
.fmt = psLINFBInfo->var.bits_per_pixel == 16 ? TILER_PIXEL_FMT_16BIT : TILER_PIXEL_FMT_32BIT,
.flags = 0,
};
" %s: Device %u: Requesting %d TILER 2D framebuffers\n",
__FUNCTION__, uiFBDevID, n);
- /* INTEGRATION_POINT: limit to MAX 3 FBs to save TILER container space */
- if (n != 3)
- n = 3;
-
sAllocData.w *= n;
psPVRFBInfo->uiBytesPerPixel = psLINFBInfo->var.bits_per_pixel >> 3;
psPVRFBInfo->bIs2D = OMAPLFB_TRUE;
- res = omap_ion_tiler_alloc(gpsIONClient, &sAllocData);
+ res = omap_ion_tiler_alloc(psDevInfo->psIONClient, &sAllocData);
psPVRFBInfo->psIONHandle = sAllocData.handle;
if (res < 0)
{
printk(KERN_ERR DRIVER_PREFIX
" %s: Device %u: Could not allocate 2D framebuffer(%d)\n",
__FUNCTION__, uiFBDevID, res);
- goto ErrorModPut;
+ goto ErrorFBRel;
}
- psLINFBInfo->fix.smem_start = ion_phys(gpsIONClient, sAllocData.handle, &phys, &size);
+ res = ion_phys(psDevInfo->psIONClient, sAllocData.handle, &phys, &size);
+ if (res < 0)
+ {
+ printk(KERN_ERR DRIVER_PREFIX
+ " %s: Device %u: Could not get 2D framebufferphysical address (%d)\n",
+ __FUNCTION__, uiFBDevID, res);
+ goto ErrorFBRel;
+ }
psPVRFBInfo->sSysAddr.uiAddr = phys;
psPVRFBInfo->sCPUVAddr = 0;
- psPVRFBInfo->ulWidth = psLINFBInfo->var.xres;
- psPVRFBInfo->ulHeight = psLINFBInfo->var.yres;
psPVRFBInfo->ulByteStride = PAGE_ALIGN(psPVRFBInfo->ulWidth * psPVRFBInfo->uiBytesPerPixel);
w = psPVRFBInfo->ulByteStride >> PAGE_SHIFT;
- /* this is an "effective" FB size to get correct number of buffers */
psPVRFBInfo->ulFBSize = sAllocData.h * n * psPVRFBInfo->ulByteStride;
psPVRFBInfo->psPageList = kzalloc(w * n * psPVRFBInfo->ulHeight * sizeof(*psPVRFBInfo->psPageList), GFP_KERNEL);
if (!psPVRFBInfo->psPageList)
{
printk(KERN_WARNING DRIVER_PREFIX ": %s: Device %u: Could not allocate page list\n", __FUNCTION__, psDevInfo->uiFBDevID);
- ion_free(gpsIONClient, sAllocData.handle);
- goto ErrorModPut;
+ ion_free(psDevInfo->psIONClient, sAllocData.handle);
+ goto ErrorFBRel;
}
tilview_create(&view, phys, psDevInfo->sFBInfo.ulWidth, psDevInfo->sFBInfo.ulHeight);
psPVRFBInfo->sSysAddr.uiAddr = psLINFBInfo->fix.smem_start;
psPVRFBInfo->sCPUVAddr = psLINFBInfo->screen_base;
- psPVRFBInfo->ulWidth = psLINFBInfo->var.xres;
- psPVRFBInfo->ulHeight = psLINFBInfo->var.yres;
psPVRFBInfo->ulByteStride = psLINFBInfo->fix.line_length;
- psPVRFBInfo->ulFBSize = FBSize;
#endif /* defined(CONFIG_DSSCOMP) */
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: Framebuffer physical address: 0x%x\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->sSysAddr.uiAddr));
+
+ if (psPVRFBInfo->sCPUVAddr != NULL)
+ {
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: Framebuffer virtual address: %p\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->sCPUVAddr));
+ }
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: Framebuffer stride: %lu\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulByteStride));
+
+ /* Additional implementation specific information */
+ OMAPLFBPrintInfo(psDevInfo);
+
psPVRFBInfo->ulBufferSize = psPVRFBInfo->ulHeight * psPVRFBInfo->ulByteStride;
- /* Round the buffer size up to a multiple of the number of pages
- * and the byte stride.
- * This is used internally, to ensure buffers start on page
- * boundaries, for the benefit of PVR Services.
- */
- psPVRFBInfo->ulRoundedBufferSize = RoundUpToMultiple(psPVRFBInfo->ulBufferSize, ulLCM);
+#if defined(CONFIG_DSSCOMP)
+ psPVRFBInfo->ulRoundedBufferSize = psPVRFBInfo->ulBufferSize;
+#else
+ {
+ unsigned long ulLCM;
+ ulLCM = LCM(psPVRFBInfo->ulByteStride, OMAPLFB_PAGE_SIZE);
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: LCM of stride and page size: %lu\n",
+ psDevInfo->uiFBDevID, ulLCM));
+ /* Round the buffer size up to a multiple of the number of pages
+ * and the byte stride.
+ * This is used internally, to ensure buffers start on page
+ * boundaries, for the benefit of PVR Services.
+ */
+ psPVRFBInfo->ulRoundedBufferSize = RoundUpToMultiple(psPVRFBInfo->ulBufferSize, ulLCM);
+ }
+#endif
if(psLINFBInfo->var.bits_per_pixel == 16)
{
if((psLINFBInfo->var.red.length == 5) &&
eError = OMAPLFB_OK;
goto ErrorRelSem;
+ErrorFBRel:
+ if (psLINFBInfo->fbops->fb_release != NULL)
+ {
+ (void) psLINFBInfo->fbops->fb_release(psLINFBInfo, 0);
+ }
ErrorModPut:
module_put(psLINFBOwner);
ErrorRelSem:
kfree(psPVRFBInfo->psPageList);
if (psPVRFBInfo->psIONHandle)
{
- ion_free(gpsIONClient, psPVRFBInfo->psIONHandle);
+ ion_free(psDevInfo->psIONClient, psPVRFBInfo->psIONHandle);
}
}
#endif /* defined(CONFIG_DSSCOMP) */
goto ErrorFreeDevInfo;
}
+#if defined(CONFIG_ION_OMAP)
+ psDevInfo->psIONClient =
+ ion_client_create(omap_ion_device,
+ 1 << ION_HEAP_TYPE_CARVEOUT |
+ 1 << OMAP_ION_HEAP_TYPE_TILER,
+ "dc_omapfb3_linux");
+ if (IS_ERR_OR_NULL(psDevInfo->psIONClient))
+ {
+ printk(KERN_ERR DRIVER_PREFIX
+ ": %s: Device %u: Failed to create ion client\n", __FUNCTION__, uiFBDevID);
+
+ goto ErrorFreeDevInfo;
+ }
+#endif /* defined(CONFIG_ION_OMAP) */
+
+#ifdef FBDEV_PRESENT
/* Save private fbdev information structure in the dev. info. */
if(OMAPLFBInitFBDev(psDevInfo) != OMAPLFB_OK)
{
* there is no Linux framebuffer device corresponding
* to the device ID.
*/
- goto ErrorFreeDevInfo;
+ goto ErrorIonClientDestroy;
}
psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers = (IMG_UINT32)(psDevInfo->sFBInfo.ulFBSize / psDevInfo->sFBInfo.ulRoundedBufferSize);
{
psDevInfo->sDisplayInfo.ui32MaxSwapChains = 1;
psDevInfo->sDisplayInfo.ui32MaxSwapInterval = 1;
+#if defined(CONFIG_DSSCOMP)
+ psDevInfo->sDisplayInfo.ui32MinSwapInterval = 1;
+#endif
}
psDevInfo->sDisplayInfo.ui32PhysicalWidthmm = psDevInfo->sFBInfo.ulPhysicalWidthmm;
psDevInfo->sSystemBuffer.psDevInfo = psDevInfo;
OMAPLFBInitBufferForSwap(&psDevInfo->sSystemBuffer);
+#else
+psDevInfo->sSystemBuffer.sCPUVAddr = 0x100;
+// psDevInfo->sSystemBuffer.ulBufferSize = 600*3200;
+
+ psDevInfo->sDisplayFormat.pixelformat = 20;
+ psDevInfo->sFBInfo.ulWidth = 800;
+ psDevInfo->sFBInfo.ulHeight = 600;
+ psDevInfo->sFBInfo.ulByteStride = 3200;
+ psDevInfo->sFBInfo.ulFBSize = 8388608;
+ psDevInfo->sFBInfo.ulBufferSize = 600*3200;
+#endif
+
+#if defined(CONFIG_DSSCOMP) && defined(SUPPORT_PVRSRV_GET_DC_SYSTEM_BUFFER)
+ OMAPLFBFlip(psDevInfo, &psDevInfo->sSystemBuffer);
+#endif
/*
Setup the DC Jtable so SRVKM can call into this driver
#if defined(SUPPORT_DRI_DRM)
OMAPLFBAtomicBoolInit(&psDevInfo->sLeaveVT, OMAPLFB_FALSE);
#endif
+
return psDevInfo;
ErrorUnregisterDevice:
(void)psDevInfo->sPVRJTable.pfnPVRSRVRemoveDCDevice(psDevInfo->uiPVRDevID);
ErrorDeInitFBDev:
OMAPLFBDeInitFBDev(psDevInfo);
+ErrorIonClientDestroy:
+#if defined(CONFIG_ION_OMAP)
+ ion_client_destroy(psDevInfo->psIONClient);
+#endif /* defined(CONFIG_ION_OMAP) */
ErrorFreeDevInfo:
OMAPLFBFreeKernelMem(psDevInfo);
ErrorExit:
{
PVRSRV_DC_DISP2SRV_KMJTABLE *psPVRJTable = &psDevInfo->sPVRJTable;
- OMAPLFBCreateSwapChainLockDeInit(psDevInfo);
-
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sBlanked);
- OMAPLFBAtomicIntDeInit(&psDevInfo->sBlankEvents);
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sFlushCommands);
-#if defined(CONFIG_HAS_EARLYSUSPEND)
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sEarlySuspendFlag);
-#endif
-#if defined(SUPPORT_DRI_DRM)
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sLeaveVT);
-#endif
- psPVRJTable = &psDevInfo->sPVRJTable;
-
if (psPVRJTable->pfnPVRSRVRemoveCmdProcList (psDevInfo->uiPVRDevID, OMAPLFB_COMMAND_COUNT) != PVRSRV_OK)
{
printk(KERN_ERR DRIVER_PREFIX
": %s: Device %u: PVR Device %u: Couldn't remove device from PVR Services\n", __FUNCTION__, psDevInfo->uiFBDevID, psDevInfo->uiPVRDevID);
return OMAPLFB_FALSE;
}
-
+
+#if defined(CONFIG_DSSCOMP)
+ /* Disable the overlay, as we will be freeing the display buffers */
+ psDevInfo->sSystemBuffer.sSysAddr.uiAddr = 0;
+ OMAPLFBFlip(psDevInfo, &psDevInfo->sSystemBuffer);
+#endif /* defined(CONFIG_DSSCOMP) */
+
+ OMAPLFBCreateSwapChainLockDeInit(psDevInfo);
+
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sBlanked);
+ OMAPLFBAtomicIntDeInit(&psDevInfo->sBlankEvents);
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sFlushCommands);
+#if defined(CONFIG_HAS_EARLYSUSPEND)
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sEarlySuspendFlag);
+#endif
+#if defined(SUPPORT_DRI_DRM)
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sLeaveVT);
+#endif
+
+#ifdef FBDEV_PRESENT
OMAPLFBDeInitFBDev(psDevInfo);
+#endif
+#if defined(CONFIG_ION_OMAP)
+ ion_client_destroy(psDevInfo->psIONClient);
+#endif
OMAPLFBSetDevInfoPtr(psDevInfo->uiFBDevID, NULL);
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
*/ /**************************************************************************/
/**************************************************************************
#include <linux/mutex.h>
#if defined(PVR_OMAPLFB_DRM_FB)
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0))
#include <plat/display.h>
+#else
+#include <video/omapdss.h>
+#endif
#include <linux/omap_gpu.h>
#else /* defined(PVR_OMAPLFB_DRM_FB) */
/* OmapZoom.org OMAP3 2.6.29 kernel tree - Needs mach/vrfb.h
#endif
#if defined(PVR_OMAPFB3_NEEDS_PLAT_VRFB_H)
+#ifdef FBDEV_PRESENT
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0))
#include <plat/vrfb.h>
+#else
+#include <video/omapvrfb.h>
+#endif
+#endif
+
#else
#if defined(PVR_OMAPFB3_NEEDS_MACH_VRFB_H)
#include <mach/vrfb.h>
#define PVR_DEBUG DEBUG
#undef DEBUG
#endif
+#ifdef FBDEV_PRESENT
#include <omapfb/omapfb.h>
+#endif
#if defined(DEBUG)
#undef DEBUG
#endif
#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#if defined(CONFIG_DSSCOMP)
+#if defined(CONFIG_DRM_OMAP_DMM_TILER)
+#include <../drivers/staging/omapdrm/omap_dmm_tiler.h>
+#include <../drivers/video/omap2/dsscomp/tiler-utils.h>
+#elif defined(CONFIG_TI_TILER)
#include <mach/tiler.h>
+#else /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
+#error CONFIG_DSSCOMP support requires either \
+ CONFIG_DRM_OMAP_DMM_TILER or CONFIG_TI_TILER
+#endif /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
#include <video/dsscomp.h>
#include <plat/dsscomp.h>
#endif /* defined(CONFIG_DSSCOMP) */
#if !defined(PVR_OMAPLFB_DRM_FB)
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))
#define OMAP_DSS_DRIVER(drv, dev) struct omap_dss_driver *drv = (dev) != NULL ? (dev)->driver : NULL
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0))
#define OMAP_DSS_MANAGER(man, dev) struct omap_overlay_manager *man = (dev) != NULL ? (dev)->manager : NULL
+#else
+#define OMAP_DSS_MANAGER(man, dev) struct omap_overlay_manager *man = (dev) != NULL ? (dev)->output->manager : NULL
+#endif
+
#define WAIT_FOR_VSYNC(man) ((man)->wait_for_vsync)
#else
#define OMAP_DSS_DRIVER(drv, dev) struct omap_dss_device *drv = (dev)
OMAPLFB_ERROR OMAPLFBCreateSwapQueue(OMAPLFB_SWAPCHAIN *psSwapChain)
{
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
+#if (LINUX_VERSION_CODE == KERNEL_VERSION(2,6,37))
+#define WQ_FREEZABLE WQ_FREEZEABLE
+#endif
/*
* Calling alloc_ordered_workqueue with the WQ_FREEZABLE and
* WQ_MEM_RECLAIM flags set, (currently) has the same effect as
* conditions, preventing the driver from holding on to
* resources longer than it needs to.
*/
-#if (LINUX_VERSION_CODE == KERNEL_VERSION(2,6,37))
- psSwapChain->psWorkQueue = alloc_ordered_workqueue(DEVNAME, WQ_FREEZEABLE | WQ_MEM_RECLAIM);
-#else
- psSwapChain->psWorkQueue = alloc_ordered_workqueue(DEVNAME, WQ_FREEZABLE | WQ_MEM_RECLAIM);
-#endif
-
+ psSwapChain->psWorkQueue = alloc_ordered_workqueue(DEVNAME, WQ_FREEZABLE | WQ_MEM_RECLAIM);
#else
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36))
psSwapChain->psWorkQueue = create_freezable_workqueue(DEVNAME);
{
struct fb_var_screeninfo sFBVar;
int res;
- unsigned long ulYResVirtual;
OMAPLFB_CONSOLE_LOCK();
sFBVar.xoffset = 0;
sFBVar.yoffset = psBuffer->ulYOffset;
- ulYResVirtual = psBuffer->ulYOffset + sFBVar.yres;
-
#if defined(CONFIG_DSSCOMP)
+ /*
+ * If flipping to a NULL buffer, blank the screen to prevent
+ * warnings/errors from the display subsystem.
+ */
+ if (psBuffer->sSysAddr.uiAddr == 0)
+ {
+ struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
+ OMAP_DSS_MANAGER(psDSSMan, psDSSDev);
+
+ if (psDSSMan != NULL && psDSSMan->blank != NULL)
+ {
+ res = psDSSMan->blank(psDSSMan, false);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: DSS manager blank call failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res));
+ }
+ }
+ }
+
{
/*
* If using DSSCOMP, we need to use dsscomp queuing for normal
.width = sFBVar.xres_virtual,
.height = sFBVar.yres_virtual,
.stride = sFBFix.line_length,
- .enabled = 1,
+ .enabled = (psBuffer->sSysAddr.uiAddr != 0),
.global_alpha = 255,
},
},
/* do not map buffer into TILER1D as it is contiguous */
struct tiler_pa_info *pas[] = { NULL };
- d.ovls[0].ba = sFBFix.smem_start;
+ d.ovls[0].ba = (u32) psBuffer->sSysAddr.uiAddr;
+
omapfb_mode_to_dss_mode(&sFBVar, &d.ovls[0].cfg.color_mode);
res = dsscomp_gralloc_queue(&d, pas, true, NULL, NULL);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: dsscomp_gralloc_queue failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res));
+ }
}
#else /* defined(CONFIG_DSSCOMP) */
- /*
- * PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY should be defined to work
- * around flipping problems seen with the Taal LCDs on Blaze.
- * The work around is safe to use with other types of screen on Blaze
- * (e.g. HDMI) and on other platforms (e.g. Panda board).
- */
+ {
+ unsigned long ulYResVirtual = psBuffer->ulYOffset + sFBVar.yres;
+
+ /*
+ * PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY should be defined to
+ * work around flipping problems seen with the Taal LCDs on
+ * Blaze.
+ * The work around is safe to use with other types of screen
+ * on Blaze (e.g. HDMI) and on other platforms (e.g. Panda
+ * board).
+ */
#if !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY)
- /*
- * Attempt to change the virtual screen resolution if it is too
- * small. Note that fb_set_var also pans the display.
- */
- if (sFBVar.xres_virtual != sFBVar.xres || sFBVar.yres_virtual < ulYResVirtual)
+ /*
+ * Attempt to change the virtual screen resolution if it is too
+ * small. Note that fb_set_var also pans the display.
+ */
+ if (sFBVar.xres_virtual != sFBVar.xres || sFBVar.yres_virtual < ulYResVirtual)
#endif /* !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY) */
- {
- sFBVar.xres_virtual = sFBVar.xres;
- sFBVar.yres_virtual = ulYResVirtual;
+ {
+ sFBVar.xres_virtual = sFBVar.xres;
+ sFBVar.yres_virtual = ulYResVirtual;
- sFBVar.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
+ sFBVar.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
- res = fb_set_var(psDevInfo->psLINFBInfo, &sFBVar);
- if (res != 0)
- {
- printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_set_var failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ res = fb_set_var(psDevInfo->psLINFBInfo, &sFBVar);
+ if (res != 0)
+ {
+ printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_set_var failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ }
}
- }
#if !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY)
- else
- {
- res = fb_pan_display(psDevInfo->psLINFBInfo, &sFBVar);
- if (res != 0)
+ else
{
- printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_pan_display failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ res = fb_pan_display(psDevInfo->psLINFBInfo, &sFBVar);
+ if (res != 0)
+ {
+ printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_pan_display failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ }
}
- }
#endif /* !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY) */
+ }
#endif /* defined(CONFIG_DSSCOMP) */
OMAPLFB_CONSOLE_UNLOCK();
}
+
+/* Newer kernels don't have any update mode capability */
+
+//#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0))
+//#define PVR_OMAPLFB_HAS_UPDATE_MODE
+//#endif
+
+//#if defined(PVR_OMAPLFB_HAS_UPDATE_MODE)
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
#if !defined(PVR_OMAPLFB_DRM_FB) || defined(DEBUG)
static OMAPLFB_BOOL OMAPLFBValidateDSSUpdateMode(enum omap_dss_update_mode eMode)
return -1;
}
-
#endif
#if defined(DEBUG)
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
return OMAPLFBUpdateModeToString(OMAPLFBFromDSSUpdateMode(eMode));
}
#endif
-void OMAPLFBPrintInfo(OMAPLFB_DEVINFO *psDevInfo)
-{
-#if defined(PVR_OMAPLFB_DRM_FB)
- struct drm_connector *psConnector;
- unsigned uConnectors;
- unsigned uConnector;
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: DRM framebuffer\n", psDevInfo->uiFBDevID));
-
- for (psConnector = NULL, uConnectors = 0;
- (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL;)
- {
- uConnectors++;
- }
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Number of screens (DRM connectors): %u\n", psDevInfo->uiFBDevID, uConnectors));
-
- if (uConnectors == 0)
- {
- return;
- }
-
- for (psConnector = NULL, uConnector = 0;
- (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL; uConnector++)
- {
- enum omap_dss_update_mode eMode = omap_connector_get_update_mode(psConnector);
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Screen %u: %s (%d)\n", psDevInfo->uiFBDevID, uConnector, OMAPLFBDSSUpdateModeToString(eMode), (int)eMode));
-
- }
-#else /* defined(PVR_OMAPLFB_DRM_FB) */
- OMAPLFB_UPDATE_MODE eMode = OMAPLFBGetUpdateMode(psDevInfo);
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: non-DRM framebuffer\n", psDevInfo->uiFBDevID));
-
-// DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: %s\n", psDevInfo->uiFBDevID, OMAPLFBUpdateModeToString(eMode)));
-#endif /* defined(PVR_OMAPLFB_DRM_FB) */
-}
-#endif /* defined(DEBUG) */
+#endif /* defined(DEBUG) */
/*
* Get display update mode.
*/
OMAPLFB_UPDATE_MODE OMAPLFBGetUpdateMode(OMAPLFB_DEVINFO *psDevInfo)
{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
#if defined(PVR_OMAPLFB_DRM_FB)
struct drm_connector *psConnector;
OMAPLFB_UPDATE_MODE eMode = OMAPLFB_UPDATE_MODE_UNDEFINED;
return eMode;
#else /* defined(PVR_OMAPLFB_DRM_FB) */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
OMAP_DSS_DRIVER(psDSSDrv, psDSSDev);
}
return OMAPLFBFromDSSUpdateMode(eMode);
-#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#else
- return OMAPLFB_UPDATE_MODE_AUTO;
+ return OMAPLFB_UPDATE_MODE_AUTO;
#endif
+#endif /* defined(PVR_OMAPLFB_DRM_FB) */
}
/* Set display update mode */
OMAPLFB_BOOL OMAPLFBSetUpdateMode(OMAPLFB_DEVINFO *psDevInfo, OMAPLFB_UPDATE_MODE eMode)
{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
#if defined(PVR_OMAPLFB_DRM_FB)
struct drm_connector *psConnector;
enum omap_dss_update_mode eDSSMode;
return OMAPLFB_TRUE;
#else /* defined(PVR_OMAPLFB_DRM_FB) */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
OMAP_DSS_DRIVER(psDSSDrv, psDSSDev);
enum omap_dss_update_mode eDSSMode;
}
return (res == 0);
-#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#else
return 1;
#endif
+#endif /* defined(PVR_OMAPLFB_DRM_FB) */
+
+}
+//#else /* defined(PVR_OMAPLFB_HAS_UPDATE_MODE) */
+
+//OMAPLFB_UPDATE_MODE OMAPLFBGetUpdateMode(OMAPLFB_DEVINFO *psDevInfo)
+//{
+// return OMAPLFB_UPDATE_MODE_UNDEFINED;
+//}
+
+//#endif /* defined(PVR_OMAPLFB_HAS_UPDATE_MODE) */
+
+#if defined(DEBUG)
+void OMAPLFBPrintInfo(OMAPLFB_DEVINFO *psDevInfo)
+{
+#if defined(PVR_OMAPLFB_DRM_FB)
+ struct drm_connector *psConnector;
+ unsigned uConnectors;
+ unsigned uConnector;
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: DRM framebuffer\n", psDevInfo->uiFBDevID));
+
+ for (psConnector = NULL, uConnectors = 0;
+ (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL;)
+ {
+ uConnectors++;
+ }
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Number of screens (DRM connectors): %u\n", psDevInfo->uiFBDevID, uConnectors));
+
+ if (uConnectors == 0)
+ {
+ return;
+ }
+
+ for (psConnector = NULL, uConnector = 0;
+ (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL; uConnector++)
+ {
+ enum omap_dss_update_mode eMode = omap_connector_get_update_mode(psConnector);
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Screen %u: %s (%d)\n", psDevInfo->uiFBDevID, uConnector, OMAPLFBDSSUpdateModeToString(eMode), (int)eMode));
+
+ }
+#else /* defined(PVR_OMAPLFB_DRM_FB) */
+//#if defined(PVR_OMAPLFB_HAS_UPDATE_MODE)
+ OMAPLFB_UPDATE_MODE eMode = OMAPLFBGetUpdateMode(psDevInfo);
+
+ //DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: %s\n", psDevInfo->uiFBDevID, OMAPLFBUpdateModeToString(eMode)));
+//#endif
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: non-DRM framebuffer\n", psDevInfo->uiFBDevID));
+
+#endif /* defined(PVR_OMAPLFB_DRM_FB) */
}
+#endif /* defined(DEBUG) */
/* Wait for VSync */
OMAPLFB_BOOL OMAPLFBWaitForVSync(OMAPLFB_DEVINFO *psDevInfo)
return OMAPLFB_TRUE;
#else /* defined(PVR_OMAPLFB_DRM_FB) */
+#if FBDEV_PRESENT
struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
OMAP_DSS_MANAGER(psDSSMan, psDSSDev);
return OMAPLFB_FALSE;
}
}
-
+#endif
return OMAPLFB_TRUE;
#endif /* defined(PVR_OMAPLFB_DRM_FB) */
}
*/
OMAPLFB_BOOL OMAPLFBManualSync(OMAPLFB_DEVINFO *psDevInfo)
{
-#if 0
#if defined(PVR_OMAPLFB_DRM_FB)
struct drm_connector *psConnector;
return OMAPLFB_TRUE;
#else /* defined(PVR_OMAPLFB_DRM_FB) */
+
+#if 0
struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
OMAP_DSS_DRIVER(psDSSDrv, psDSSDev);
return OMAPLFB_FALSE;
}
}
-
- return OMAPLFB_TRUE;
-#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#endif
return OMAPLFB_TRUE;
+#endif /* defined(PVR_OMAPLFB_DRM_FB) */
}
/*
/* Unblank the screen */
OMAPLFB_ERROR OMAPLFBUnblankDisplay(OMAPLFB_DEVINFO *psDevInfo)
{
+#ifdef FBDEV_PRESENT
int res;
OMAPLFB_CONSOLE_LOCK();
": %s: Device %u: fb_blank failed (%d)\n", __FUNCTION__, psDevInfo->uiFBDevID, res);
return (OMAPLFB_ERROR_GENERIC);
}
-
+#endif
return (OMAPLFB_OK);
}
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
*/ /**************************************************************************/
#ifndef __3RDPARTY_DC_DRM_SHARED_H__
#define __3RDPARTY_DC_DRM_SHARED_H__
# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-#
### ###########################################################################
ccflags-y += \
-I$(TOP)/services4/3rdparty/dc_omapfb3_linux \
- -I$(KERNELDIR)/drivers/video/omap2 \
- -I$(KERNELDIR)/arch/arm/plat-omap/include
+ -Idrivers/video/omap2 \
+ -Iarch/arm/plat-omap/include
omaplfb-y += \
services4/3rdparty/dc_omapfb3_linux/omaplfb_displayclass.o \
# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-#
### ###########################################################################
modules := dc_omapfb3_linux
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
*/ /**************************************************************************/
#ifndef __OMAPLFB_H__
#define __OMAPLFB_H__
#define OMAPLFB_CONSOLE_UNLOCK() release_console_sem()
#endif
+#if defined(CONFIG_ION_OMAP)
+#include <linux/ion.h>
+#include <linux/omap_ion.h>
+#endif /* defined(CONFIG_ION_OMAP) */
+
#define unref__ __attribute__ ((unused))
typedef void * OMAPLFB_HANDLE;
OMAPLFB_ATOMIC_BOOL sLeaveVT;
#endif
+#if defined(CONFIG_ION_OMAP)
+ struct ion_client *psIONClient;
+#endif
+
} OMAPLFB_DEVINFO;
#define OMAPLFB_PAGE_SIZE 4096
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
*/ /**************************************************************************/
/**************************************************************************
#include "omaplfb.h"
#if defined(CONFIG_DSSCOMP)
-
-#if !defined(CONFIG_ION_OMAP)
+#if defined(CONFIG_ION_OMAP)
+extern struct ion_device *omap_ion_device;
+#else /* defined(CONFIG_ION_OMAP) */
#error CONFIG_DSSCOMP support requires CONFIG_ION_OMAP
-#endif
-
-#include <linux/ion.h>
-#include <linux/omap_ion.h>
-
-extern struct ion_client *gpsIONClient;
-
+#endif /* defined(CONFIG_ION_OMAP) */
+#if defined(CONFIG_DRM_OMAP_DMM_TILER)
+#include <../drivers/staging/omapdrm/omap_dmm_tiler.h>
+#include <../drivers/video/omap2/dsscomp/tiler-utils.h>
+#elif defined(CONFIG_TI_TILER)
#include <mach/tiler.h>
+#else /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
+#error CONFIG_DSSCOMP support requires either \
+ CONFIG_DRM_OMAP_DMM_TILER or CONFIG_TI_TILER
+#endif /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
#include <video/dsscomp.h>
#include <plat/dsscomp.h>
-
#endif /* defined(CONFIG_DSSCOMP) */
#define OMAPLFB_COMMAND_COUNT 1
/* Top level 'hook ptr' */
static PFN_DC_GET_PVRJTABLE gpfnGetPVRJTable = NULL;
+#if !defined(CONFIG_DSSCOMP)
/* Round x up to a multiple of y */
static inline unsigned long RoundUpToMultiple(unsigned long x, unsigned long y)
{
return (gcd == 0) ? 0 : ((x / gcd) * y);
}
+#endif
unsigned OMAPLFBMaxFBDevIDPlusOne(void)
{
IMG_HANDLE *phSwapChain,
IMG_UINT32 *pui32SwapChainID)
{
- OMAPLFB_DEVINFO *psDevInfo;
OMAPLFB_SWAPCHAIN *psSwapChain;
- OMAPLFB_BUFFER *psBuffer;
- IMG_UINT32 i;
+ OMAPLFB_DEVINFO *psDevInfo;
PVRSRV_ERROR eError;
- IMG_UINT32 ui32BuffersToSkip;
+ IMG_UINT32 i;
UNREFERENCED_PARAMETER(ui32OEMFlags);
-
+ UNREFERENCED_PARAMETER(ui32Flags);
+
/* Check parameters */
if(!hDevice
|| !psDstSurfAttrib
eError = PVRSRV_ERROR_FLIP_CHAIN_EXISTS;
goto ExitUnLock;
}
-
- /* Check the buffer count */
- if(ui32BufferCount > psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers)
- {
- eError = PVRSRV_ERROR_TOOMANYBUFFERS;
- goto ExitUnLock;
- }
-
- if ((psDevInfo->sFBInfo.ulRoundedBufferSize * (unsigned long)ui32BufferCount) > psDevInfo->sFBInfo.ulFBSize)
- {
- eError = PVRSRV_ERROR_TOOMANYBUFFERS;
- goto ExitUnLock;
- }
-
- /*
- * We will allocate the swap chain buffers at the back of the frame
- * buffer area. This preserves the front portion, which may be being
- * used by other Linux Framebuffer based applications.
- */
- ui32BuffersToSkip = psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers - ui32BufferCount;
-
- /*
- * Verify the DST/SRC attributes,
- * SRC/DST must match the current display mode config
- */
- if(psDstSurfAttrib->pixelformat != psDevInfo->sDisplayFormat.pixelformat
- || psDstSurfAttrib->sDims.ui32ByteStride != psDevInfo->sDisplayDim.ui32ByteStride
- || psDstSurfAttrib->sDims.ui32Width != psDevInfo->sDisplayDim.ui32Width
- || psDstSurfAttrib->sDims.ui32Height != psDevInfo->sDisplayDim.ui32Height)
- {
- /* DST doesn't match the current mode */
- eError = PVRSRV_ERROR_INVALID_PARAMS;
- goto ExitUnLock;
- }
-
- if(psDstSurfAttrib->pixelformat != psSrcSurfAttrib->pixelformat
- || psDstSurfAttrib->sDims.ui32ByteStride != psSrcSurfAttrib->sDims.ui32ByteStride
- || psDstSurfAttrib->sDims.ui32Width != psSrcSurfAttrib->sDims.ui32Width
- || psDstSurfAttrib->sDims.ui32Height != psSrcSurfAttrib->sDims.ui32Height)
- {
- /* DST doesn't match the SRC */
- eError = PVRSRV_ERROR_INVALID_PARAMS;
- goto ExitUnLock;
- }
- /* check flags if implementation requires them */
- UNREFERENCED_PARAMETER(ui32Flags);
-
-#if defined(PVR_OMAPFB3_UPDATE_MODE)
- if (!OMAPLFBSetUpdateMode(psDevInfo, PVR_OMAPFB3_UPDATE_MODE))
- {
- printk(KERN_WARNING DRIVER_PREFIX ": %s: Device %u: Couldn't set frame buffer update mode %d\n", __FUNCTION__, psDevInfo->uiFBDevID, PVR_OMAPFB3_UPDATE_MODE);
- }
-#endif
/* create a swapchain structure */
psSwapChain = (OMAPLFB_SWAPCHAIN*)OMAPLFBAllocKernelMem(sizeof(OMAPLFB_SWAPCHAIN));
if(!psSwapChain)
goto ExitUnLock;
}
- psBuffer = (OMAPLFB_BUFFER*)OMAPLFBAllocKernelMem(sizeof(OMAPLFB_BUFFER) * ui32BufferCount);
- if(!psBuffer)
+ /* If services asks for a 0-length swap chain, it's probably Android.
+ *
+ * This will use only non-display memory posting via PVRSRVSwapToDCBuffers2(),
+ * and we can skip some useless sanity checking.
+ */
+ if(ui32BufferCount > 0)
{
- eError = PVRSRV_ERROR_OUT_OF_MEMORY;
- goto ErrorFreeSwapChain;
- }
+ IMG_UINT32 ui32BuffersToSkip;
- psSwapChain->ulBufferCount = (unsigned long)ui32BufferCount;
- psSwapChain->psBuffer = psBuffer;
- psSwapChain->bNotVSynced = OMAPLFB_TRUE;
- psSwapChain->uiFBDevID = psDevInfo->uiFBDevID;
+ /* Check the buffer count */
+ if(ui32BufferCount > psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers)
+ {
+ eError = PVRSRV_ERROR_TOOMANYBUFFERS;
+ goto ErrorFreeSwapChain;
+ }
+
+ if ((psDevInfo->sFBInfo.ulRoundedBufferSize * (unsigned long)ui32BufferCount) > psDevInfo->sFBInfo.ulFBSize)
+ {
+ eError = PVRSRV_ERROR_TOOMANYBUFFERS;
+ goto ErrorFreeSwapChain;
+ }
- /* Link the buffers */
- for(i=0; i<ui32BufferCount-1; i++)
- {
- psBuffer[i].psNext = &psBuffer[i+1];
- }
- /* and link last to first */
- psBuffer[i].psNext = &psBuffer[0];
+ /*
+ * We will allocate the swap chain buffers at the back of the frame
+ * buffer area. This preserves the front portion, which may be being
+ * used by other Linux Framebuffer based applications.
+ */
+ ui32BuffersToSkip = psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers - ui32BufferCount;
- /* Configure the swapchain buffers */
- for(i=0; i<ui32BufferCount; i++)
- {
- IMG_UINT32 ui32SwapBuffer = i + ui32BuffersToSkip;
- IMG_UINT32 ui32BufferOffset = ui32SwapBuffer * (IMG_UINT32)psDevInfo->sFBInfo.ulRoundedBufferSize;
+ /*
+ * Verify the DST/SRC attributes,
+ * SRC/DST must match the current display mode config
+ */
+ if(psDstSurfAttrib->pixelformat != psDevInfo->sDisplayFormat.pixelformat
+ || psDstSurfAttrib->sDims.ui32ByteStride != psDevInfo->sDisplayDim.ui32ByteStride
+ || psDstSurfAttrib->sDims.ui32Width != psDevInfo->sDisplayDim.ui32Width
+ || psDstSurfAttrib->sDims.ui32Height != psDevInfo->sDisplayDim.ui32Height)
+ {
+ /* DST doesn't match the current mode */
+ eError = PVRSRV_ERROR_INVALID_PARAMS;
+ goto ErrorFreeSwapChain;
+ }
-#if defined(CONFIG_DSSCOMP)
- if (psDevInfo->sFBInfo.bIs2D)
+ if(psDstSurfAttrib->pixelformat != psSrcSurfAttrib->pixelformat
+ || psDstSurfAttrib->sDims.ui32ByteStride != psSrcSurfAttrib->sDims.ui32ByteStride
+ || psDstSurfAttrib->sDims.ui32Width != psSrcSurfAttrib->sDims.ui32Width
+ || psDstSurfAttrib->sDims.ui32Height != psSrcSurfAttrib->sDims.ui32Height)
{
- ui32BufferOffset = 0;
+ /* DST doesn't match the SRC */
+ eError = PVRSRV_ERROR_INVALID_PARAMS;
+ goto ErrorFreeSwapChain;
}
+
+ psSwapChain->psBuffer = (OMAPLFB_BUFFER*)OMAPLFBAllocKernelMem(sizeof(OMAPLFB_BUFFER) * ui32BufferCount);
+ if(!psSwapChain->psBuffer)
+ {
+ eError = PVRSRV_ERROR_OUT_OF_MEMORY;
+ goto ErrorFreeSwapChain;
+ }
+
+ /* Link the buffers */
+ for(i = 0; i < ui32BufferCount - 1; i++)
+ {
+ psSwapChain->psBuffer[i].psNext = &psSwapChain->psBuffer[i + 1];
+ }
+
+ /* and link last to first */
+ psSwapChain->psBuffer[i].psNext = &psSwapChain->psBuffer[0];
+
+ /* Configure the swapchain buffers */
+ for(i = 0; i < ui32BufferCount; i++)
+ {
+ IMG_UINT32 ui32SwapBuffer = i + ui32BuffersToSkip;
+ IMG_UINT32 ui32BufferOffset = ui32SwapBuffer * (IMG_UINT32)psDevInfo->sFBInfo.ulRoundedBufferSize;
+
+#if defined(CONFIG_DSSCOMP)
+ if (psDevInfo->sFBInfo.bIs2D)
+ {
+ ui32BufferOffset = 0;
+ }
#endif /* defined(CONFIG_DSSCOMP) */
- psBuffer[i].psSyncData = ppsSyncData[i];
+ psSwapChain->psBuffer[i].psSyncData = ppsSyncData[i];
- psBuffer[i].sSysAddr.uiAddr = psDevInfo->sFBInfo.sSysAddr.uiAddr + ui32BufferOffset;
- psBuffer[i].sCPUVAddr = psDevInfo->sFBInfo.sCPUVAddr + ui32BufferOffset;
- psBuffer[i].ulYOffset = ui32BufferOffset / psDevInfo->sFBInfo.ulByteStride;
- psBuffer[i].psDevInfo = psDevInfo;
+ psSwapChain->psBuffer[i].sSysAddr.uiAddr = psDevInfo->sFBInfo.sSysAddr.uiAddr + ui32BufferOffset;
+ psSwapChain->psBuffer[i].sCPUVAddr = psDevInfo->sFBInfo.sCPUVAddr + ui32BufferOffset;
+ psSwapChain->psBuffer[i].ulYOffset = ui32BufferOffset / psDevInfo->sFBInfo.ulByteStride;
+ psSwapChain->psBuffer[i].psDevInfo = psDevInfo;
#if defined(CONFIG_DSSCOMP)
- if (psDevInfo->sFBInfo.bIs2D)
- {
- psBuffer[i].sSysAddr.uiAddr += ui32SwapBuffer *
- ALIGN((IMG_UINT32)psDevInfo->sFBInfo.ulWidth * psDevInfo->sFBInfo.uiBytesPerPixel, PAGE_SIZE);
- }
+ if (psDevInfo->sFBInfo.bIs2D)
+ {
+ psSwapChain->psBuffer[i].sSysAddr.uiAddr += ui32SwapBuffer *
+ ALIGN((IMG_UINT32)psDevInfo->sFBInfo.ulWidth * psDevInfo->sFBInfo.uiBytesPerPixel, PAGE_SIZE);
+ }
#endif /* defined(CONFIG_DSSCOMP) */
- OMAPLFBInitBufferForSwap(&psBuffer[i]);
+ OMAPLFBInitBufferForSwap(&psSwapChain->psBuffer[i]);
+ }
+ }
+ else
+ {
+ psSwapChain->psBuffer = NULL;
+ }
+
+#if defined(PVR_OMAPFB3_UPDATE_MODE)
+ if (!OMAPLFBSetUpdateMode(psDevInfo, PVR_OMAPFB3_UPDATE_MODE))
+ {
+ printk(KERN_WARNING DRIVER_PREFIX ": %s: Device %u: Couldn't set frame buffer update mode %d\n", __FUNCTION__, psDevInfo->uiFBDevID, PVR_OMAPFB3_UPDATE_MODE);
}
+#endif /* defined(PVR_OMAPFB3_UPDATE_MODE) */
+
+ psSwapChain->ulBufferCount = (unsigned long)ui32BufferCount;
+ psSwapChain->bNotVSynced = OMAPLFB_TRUE;
+ psSwapChain->uiFBDevID = psDevInfo->uiFBDevID;
if (OMAPLFBCreateSwapQueue(psSwapChain) != OMAPLFB_OK)
{
ErrorDestroySwapQueue:
OMAPLFBDestroySwapQueue(psSwapChain);
ErrorFreeBuffers:
- OMAPLFBFreeKernelMem(psBuffer);
+ if(psSwapChain->psBuffer)
+ {
+ OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
+ }
ErrorFreeSwapChain:
OMAPLFBFreeKernelMem(psSwapChain);
ExitUnLock:
}
/* Free resources */
- OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
+ if (psSwapChain->psBuffer)
+ {
+ OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
+ }
OMAPLFBFreeKernelMem(psSwapChain);
psDevInfo->psSwapChain = NULL;
#if defined(CONFIG_DSSCOMP)
if (is_tiler_addr(psBuffer->sSysAddr.uiAddr))
{
+ int res;
IMG_UINT32 w = psBuffer->psDevInfo->sDisplayDim.ui32Width;
IMG_UINT32 h = psBuffer->psDevInfo->sDisplayDim.ui32Height;
struct dsscomp_setup_dispc_data comp = {
};
struct tiler_pa_info *pas[1] = { NULL };
comp.ovls[0].ba = (u32) psBuffer->sSysAddr.uiAddr;
- dsscomp_gralloc_queue(&comp, pas, true,
+ res = dsscomp_gralloc_queue(&comp, pas, true,
(void *) psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete,
(void *) psBuffer->hCmdComplete);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: dsscomp_gralloc_queue failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res));
+ }
}
else
#endif /* defined(CONFIG_DSSCOMP) */
{
struct tiler_pa_info *apsTilerPAs[5];
IMG_UINT32 i, k;
+ struct
+ {
+ IMG_UINTPTR_T uiAddr;
+ IMG_UINTPTR_T uiUVAddr;
+ struct tiler_pa_info *psTilerInfo;
+ }
+ asMemInfo[5] = {};
+ int res;
if(ui32DssDataLength != sizeof(*psDssData))
{
return IMG_FALSE;
}
- for(i = k = 0; i < ui32NumMemInfos && k < ARRAY_SIZE(apsTilerPAs); i++, k++)
+ for(i = k = 0; i < ui32NumMemInfos && k < ARRAY_SIZE(asMemInfo); i++, k++)
{
struct tiler_pa_info *psTilerInfo;
IMG_CPU_VIRTADDR virtAddr;
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetByteSize(ppsMemInfos[i], &uByteSize);
ui32NumPages = (uByteSize + PAGE_SIZE - 1) >> PAGE_SHIFT;
- apsTilerPAs[k] = NULL;
-
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], 0, &phyAddr);
- /* NV12 buffers are already mapped to tiler */
- if(psDssData->ovls[k].cfg.color_mode == OMAP_DSS_COLOR_NV12)
- {
- psDssData->ovls[k].ba = (u32)phyAddr.uiAddr;
-
- psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], (uByteSize * 2) / 3, &phyAddr);
- psDssData->ovls[k].uv = (u32)phyAddr.uiAddr;
- continue;
- }
-
- /* Other kinds of buffer may also already be mapped to tiler */
+ /* TILER buffers do not need meminfos */
if(is_tiler_addr((u32)phyAddr.uiAddr))
{
- psDssData->ovls[k].ba = (u32)phyAddr.uiAddr;
+#ifdef CONFIG_DRM_OMAP_DMM_TILER
+ enum tiler_fmt fmt;
+#endif
+ asMemInfo[k].uiAddr = phyAddr.uiAddr;
+#ifdef CONFIG_DRM_OMAP_DMM_TILER
+ if(tiler_get_fmt((u32)phyAddr.uiAddr, &fmt) && fmt == TILFMT_8BIT)
+#else
+ if(tiler_fmt((u32)phyAddr.uiAddr) == TILFMT_8BIT)
+#endif
+ {
+ psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], (uByteSize * 2) / 3, &phyAddr);
+ asMemInfo[k].uiUVAddr = phyAddr.uiAddr;
+ }
continue;
}
+ /* normal gralloc layer */
psTilerInfo = kzalloc(sizeof(*psTilerInfo), GFP_KERNEL);
if(!psTilerInfo)
{
psTilerInfo->num_pg = ui32NumPages;
psTilerInfo->memtype = TILER_MEM_USING;
-
for(j = 0; j < ui32NumPages; j++)
{
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], j << PAGE_SHIFT, &phyAddr);
psTilerInfo->mem[j] = (u32)phyAddr.uiAddr;
}
- /* Need base address for in-page offset */
+ /* need base address for in-page offset */
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuVAddr(ppsMemInfos[i], &virtAddr);
- psDssData->ovls[k].ba = (u32)virtAddr;
- apsTilerPAs[k] = psTilerInfo;
+ asMemInfo[k].uiAddr = (IMG_UINTPTR_T) virtAddr;
+ asMemInfo[k].psTilerInfo = psTilerInfo;
}
- /* Set up cloned layer addresses (but don't duplicate tiler_pas) */
- for(i = k; i < psDssData->num_ovls && i < ARRAY_SIZE(apsTilerPAs); i++)
+ for(i = 0; i < psDssData->num_ovls; i++)
{
- unsigned int ix = psDssData->ovls[i].ba;
- if(ix >= ARRAY_SIZE(apsTilerPAs))
+ unsigned int ix;
+ apsTilerPAs[i] = NULL;
+
+ /* only supporting Post2, cloned and fbmem layers */
+ if (psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_LAYER_IX &&
+ psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_OVL_IX &&
+ psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_FB)
{
- WARN(1, "Invalid clone layer (%u); skipping all cloned layers", ix);
- psDssData->num_ovls = k;
- break;
+ psDssData->ovls[i].cfg.enabled = false;
+ }
+
+ if (psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_LAYER_IX)
+ {
+ continue;
}
- apsTilerPAs[i] = apsTilerPAs[ix];
- psDssData->ovls[i].ba = psDssData->ovls[ix].ba;
- psDssData->ovls[i].uv = psDssData->ovls[ix].uv;
+
+ /* Post2 layers */
+ ix = psDssData->ovls[i].ba;
+ if (ix >= k)
+ {
+ WARN(1, "Invalid Post2 layer (%u)", ix);
+ psDssData->ovls[i].cfg.enabled = false;
+ continue;
+ }
+
+ psDssData->ovls[i].addressing = OMAP_DSS_BUFADDR_DIRECT;
+ psDssData->ovls[i].ba = (u32) asMemInfo[ix].uiAddr;
+ psDssData->ovls[i].uv = (u32) asMemInfo[ix].uiUVAddr;
+ apsTilerPAs[i] = asMemInfo[ix].psTilerInfo;
}
- dsscomp_gralloc_queue(psDssData, apsTilerPAs, false,
+ res = dsscomp_gralloc_queue(psDssData, apsTilerPAs, false,
(void *)psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete,
(void *)hCmdCookie);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: dsscomp_gralloc_queue failed (%d)\n", __FUNCTION__, psDevInfo->uiFBDevID, res));
+ }
for(i = 0; i < k; i++)
{
struct module *psLINFBOwner;
OMAPLFB_FBINFO *psPVRFBInfo = &psDevInfo->sFBInfo;
OMAPLFB_ERROR eError = OMAPLFB_ERROR_GENERIC;
- unsigned long FBSize;
- unsigned long ulLCM;
unsigned uiFBDevID = psDevInfo->uiFBDevID;
OMAPLFB_CONSOLE_LOCK();
goto ErrorRelSem;
}
- FBSize = (psLINFBInfo->screen_size) != 0 ?
- psLINFBInfo->screen_size :
- psLINFBInfo->fix.smem_len;
-
- /*
- * Try and filter out invalid FB info structures (a problem
- * seen on some OMAP3 systems).
- */
- if (FBSize == 0 || psLINFBInfo->fix.line_length == 0)
- {
- eError = OMAPLFB_ERROR_INVALID_DEVICE;
- goto ErrorRelSem;
- }
-
psLINFBOwner = psLINFBInfo->fbops->owner;
if (!try_module_get(psLINFBOwner))
{
psDevInfo->psLINFBInfo = psLINFBInfo;
- ulLCM = LCM(psLINFBInfo->fix.line_length, OMAPLFB_PAGE_SIZE);
+ psPVRFBInfo->ulWidth = psLINFBInfo->var.xres;
+ psPVRFBInfo->ulHeight = psLINFBInfo->var.yres;
+
+ if (psPVRFBInfo->ulWidth == 0 || psPVRFBInfo->ulHeight == 0)
+ {
+ eError = OMAPLFB_ERROR_INVALID_DEVICE;
+ goto ErrorFBRel;
+ }
+
+#if !defined(CONFIG_DSSCOMP)
+ psPVRFBInfo->ulFBSize = (psLINFBInfo->screen_size) != 0 ?
+ psLINFBInfo->screen_size :
+ psLINFBInfo->fix.smem_len;
+
+ /*
+ * Try and filter out invalid FB info structures (a problem
+ * seen on some OMAP3 systems).
+ */
+ if (psPVRFBInfo->ulFBSize == 0 || psLINFBInfo->fix.line_length == 0)
+ {
+ eError = OMAPLFB_ERROR_INVALID_DEVICE;
+ goto ErrorFBRel;
+ }
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer physical address: 0x%lx\n",
- psDevInfo->uiFBDevID, psLINFBInfo->fix.smem_start));
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer virtual address: 0x%lx\n",
- psDevInfo->uiFBDevID, (unsigned long)psLINFBInfo->screen_base));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
": Device %u: Framebuffer size: %lu\n",
- psDevInfo->uiFBDevID, FBSize));
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulFBSize));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
": Device %u: Framebuffer virtual width: %u\n",
psDevInfo->uiFBDevID, psLINFBInfo->var.xres_virtual));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
": Device %u: Framebuffer virtual height: %u\n",
psDevInfo->uiFBDevID, psLINFBInfo->var.yres_virtual));
+#endif
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer width: %u\n",
- psDevInfo->uiFBDevID, psLINFBInfo->var.xres));
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer height: %u\n",
- psDevInfo->uiFBDevID, psLINFBInfo->var.yres));
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer stride: %u\n",
- psDevInfo->uiFBDevID, psLINFBInfo->fix.line_length));
+ ": Device %u: Framebuffer width: %lu\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulWidth));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: LCM of stride and page size: %lu\n",
- psDevInfo->uiFBDevID, ulLCM));
-
- /* Additional implementation specific information */
- OMAPLFBPrintInfo(psDevInfo);
+ ": Device %u: Framebuffer height: %lu\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulHeight));
#if defined(CONFIG_DSSCOMP)
{
- /* for some reason we need at least 3 buffers in the swap chain */
- int n = FBSize / RoundUpToMultiple(psLINFBInfo->fix.line_length * psLINFBInfo->var.yres, ulLCM);
+#if defined(SUPPORT_PVRSRV_GET_DC_SYSTEM_BUFFER)
+ /*
+ * Assume we need 3 swap buffers, and a separate system
+ * buffer.
+ */
+ int n = 4;
+#else
+ /*
+ * Assume we need just 3 swap buffers, and no separate
+ * system buffer.
+ */
+ int n = 3;
+#endif
int res;
int i, x, y, w;
ion_phys_addr_t phys;
{
/* TILER will align width to 128-bytes */
/* however, SGX must have full page width */
- .w = ALIGN(psLINFBInfo->var.xres, PAGE_SIZE / (psLINFBInfo->var.bits_per_pixel / 8)),
- .h = psLINFBInfo->var.yres,
+ .w = ALIGN(psPVRFBInfo->ulWidth, PAGE_SIZE / (psLINFBInfo->var.bits_per_pixel / 8)),
+ .h = psPVRFBInfo->ulHeight,
.fmt = psLINFBInfo->var.bits_per_pixel == 16 ? TILER_PIXEL_FMT_16BIT : TILER_PIXEL_FMT_32BIT,
.flags = 0,
};
" %s: Device %u: Requesting %d TILER 2D framebuffers\n",
__FUNCTION__, uiFBDevID, n);
- /* INTEGRATION_POINT: limit to MAX 3 FBs to save TILER container space */
- if (n != 3)
- n = 3;
-
sAllocData.w *= n;
psPVRFBInfo->uiBytesPerPixel = psLINFBInfo->var.bits_per_pixel >> 3;
psPVRFBInfo->bIs2D = OMAPLFB_TRUE;
- res = omap_ion_tiler_alloc(gpsIONClient, &sAllocData);
+ res = omap_ion_tiler_alloc(psDevInfo->psIONClient, &sAllocData);
psPVRFBInfo->psIONHandle = sAllocData.handle;
if (res < 0)
{
printk(KERN_ERR DRIVER_PREFIX
" %s: Device %u: Could not allocate 2D framebuffer(%d)\n",
__FUNCTION__, uiFBDevID, res);
- goto ErrorModPut;
+ goto ErrorFBRel;
}
- psLINFBInfo->fix.smem_start = ion_phys(gpsIONClient, sAllocData.handle, &phys, &size);
+ res = ion_phys(psDevInfo->psIONClient, sAllocData.handle, &phys, &size);
+ if (res < 0)
+ {
+ printk(KERN_ERR DRIVER_PREFIX
+ " %s: Device %u: Could not get 2D framebufferphysical address (%d)\n",
+ __FUNCTION__, uiFBDevID, res);
+ goto ErrorFBRel;
+ }
psPVRFBInfo->sSysAddr.uiAddr = phys;
psPVRFBInfo->sCPUVAddr = 0;
- psPVRFBInfo->ulWidth = psLINFBInfo->var.xres;
- psPVRFBInfo->ulHeight = psLINFBInfo->var.yres;
psPVRFBInfo->ulByteStride = PAGE_ALIGN(psPVRFBInfo->ulWidth * psPVRFBInfo->uiBytesPerPixel);
w = psPVRFBInfo->ulByteStride >> PAGE_SHIFT;
- /* this is an "effective" FB size to get correct number of buffers */
psPVRFBInfo->ulFBSize = sAllocData.h * n * psPVRFBInfo->ulByteStride;
psPVRFBInfo->psPageList = kzalloc(w * n * psPVRFBInfo->ulHeight * sizeof(*psPVRFBInfo->psPageList), GFP_KERNEL);
if (!psPVRFBInfo->psPageList)
{
printk(KERN_WARNING DRIVER_PREFIX ": %s: Device %u: Could not allocate page list\n", __FUNCTION__, psDevInfo->uiFBDevID);
- ion_free(gpsIONClient, sAllocData.handle);
- goto ErrorModPut;
+ ion_free(psDevInfo->psIONClient, sAllocData.handle);
+ goto ErrorFBRel;
}
tilview_create(&view, phys, psDevInfo->sFBInfo.ulWidth, psDevInfo->sFBInfo.ulHeight);
psPVRFBInfo->sSysAddr.uiAddr = psLINFBInfo->fix.smem_start;
psPVRFBInfo->sCPUVAddr = psLINFBInfo->screen_base;
- psPVRFBInfo->ulWidth = psLINFBInfo->var.xres;
- psPVRFBInfo->ulHeight = psLINFBInfo->var.yres;
psPVRFBInfo->ulByteStride = psLINFBInfo->fix.line_length;
- psPVRFBInfo->ulFBSize = FBSize;
#endif /* defined(CONFIG_DSSCOMP) */
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: Framebuffer physical address: 0x%x\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->sSysAddr.uiAddr));
+
+ if (psPVRFBInfo->sCPUVAddr != NULL)
+ {
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: Framebuffer virtual address: %p\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->sCPUVAddr));
+ }
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: Framebuffer stride: %lu\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulByteStride));
+
+ /* Additional implementation specific information */
+ OMAPLFBPrintInfo(psDevInfo);
+
psPVRFBInfo->ulBufferSize = psPVRFBInfo->ulHeight * psPVRFBInfo->ulByteStride;
- /* Round the buffer size up to a multiple of the number of pages
- * and the byte stride.
- * This is used internally, to ensure buffers start on page
- * boundaries, for the benefit of PVR Services.
- */
- psPVRFBInfo->ulRoundedBufferSize = RoundUpToMultiple(psPVRFBInfo->ulBufferSize, ulLCM);
+#if defined(CONFIG_DSSCOMP)
+ psPVRFBInfo->ulRoundedBufferSize = psPVRFBInfo->ulBufferSize;
+#else
+ {
+ unsigned long ulLCM;
+ ulLCM = LCM(psPVRFBInfo->ulByteStride, OMAPLFB_PAGE_SIZE);
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: LCM of stride and page size: %lu\n",
+ psDevInfo->uiFBDevID, ulLCM));
+ /* Round the buffer size up to a multiple of the number of pages
+ * and the byte stride.
+ * This is used internally, to ensure buffers start on page
+ * boundaries, for the benefit of PVR Services.
+ */
+ psPVRFBInfo->ulRoundedBufferSize = RoundUpToMultiple(psPVRFBInfo->ulBufferSize, ulLCM);
+ }
+#endif
if(psLINFBInfo->var.bits_per_pixel == 16)
{
if((psLINFBInfo->var.red.length == 5) &&
eError = OMAPLFB_OK;
goto ErrorRelSem;
+ErrorFBRel:
+ if (psLINFBInfo->fbops->fb_release != NULL)
+ {
+ (void) psLINFBInfo->fbops->fb_release(psLINFBInfo, 0);
+ }
ErrorModPut:
module_put(psLINFBOwner);
ErrorRelSem:
kfree(psPVRFBInfo->psPageList);
if (psPVRFBInfo->psIONHandle)
{
- ion_free(gpsIONClient, psPVRFBInfo->psIONHandle);
+ ion_free(psDevInfo->psIONClient, psPVRFBInfo->psIONHandle);
}
}
#endif /* defined(CONFIG_DSSCOMP) */
{
goto ErrorFreeDevInfo;
}
+
+#if defined(CONFIG_ION_OMAP)
+ psDevInfo->psIONClient =
+ ion_client_create(omap_ion_device,
+ 1 << ION_HEAP_TYPE_CARVEOUT |
+ 1 << OMAP_ION_HEAP_TYPE_TILER,
+ "dc_omapfb3_linux");
+ if (IS_ERR_OR_NULL(psDevInfo->psIONClient))
+ {
+ printk(KERN_ERR DRIVER_PREFIX
+ ": %s: Device %u: Failed to create ion client\n", __FUNCTION__, uiFBDevID);
+
+ goto ErrorFreeDevInfo;
+ }
+#endif /* defined(CONFIG_ION_OMAP) */
#ifdef FBDEV_PRESENT
/* Save private fbdev information structure in the dev. info. */
if(OMAPLFBInitFBDev(psDevInfo) != OMAPLFB_OK)
* there is no Linux framebuffer device corresponding
* to the device ID.
*/
- goto ErrorFreeDevInfo;
+ goto ErrorIonClientDestroy;
}
psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers = (IMG_UINT32)(psDevInfo->sFBInfo.ulFBSize / psDevInfo->sFBInfo.ulRoundedBufferSize);
{
psDevInfo->sDisplayInfo.ui32MaxSwapChains = 1;
psDevInfo->sDisplayInfo.ui32MaxSwapInterval = 1;
+#if defined(CONFIG_DSSCOMP)
+ psDevInfo->sDisplayInfo.ui32MinSwapInterval = 1;
+#endif
}
psDevInfo->sDisplayInfo.ui32PhysicalWidthmm = psDevInfo->sFBInfo.ulPhysicalWidthmm;
#endif
+#if defined(CONFIG_DSSCOMP) && defined(SUPPORT_PVRSRV_GET_DC_SYSTEM_BUFFER)
+ OMAPLFBFlip(psDevInfo, &psDevInfo->sSystemBuffer);
+#endif
+
/*
Setup the DC Jtable so SRVKM can call into this driver
*/
#if defined(SUPPORT_DRI_DRM)
OMAPLFBAtomicBoolInit(&psDevInfo->sLeaveVT, OMAPLFB_FALSE);
#endif
+
return psDevInfo;
ErrorUnregisterDevice:
(void)psDevInfo->sPVRJTable.pfnPVRSRVRemoveDCDevice(psDevInfo->uiPVRDevID);
ErrorDeInitFBDev:
OMAPLFBDeInitFBDev(psDevInfo);
+ErrorIonClientDestroy:
+#if defined(CONFIG_ION_OMAP)
+ ion_client_destroy(psDevInfo->psIONClient);
+#endif /* defined(CONFIG_ION_OMAP) */
ErrorFreeDevInfo:
OMAPLFBFreeKernelMem(psDevInfo);
ErrorExit:
{
PVRSRV_DC_DISP2SRV_KMJTABLE *psPVRJTable = &psDevInfo->sPVRJTable;
- OMAPLFBCreateSwapChainLockDeInit(psDevInfo);
-
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sBlanked);
- OMAPLFBAtomicIntDeInit(&psDevInfo->sBlankEvents);
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sFlushCommands);
-#if defined(CONFIG_HAS_EARLYSUSPEND)
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sEarlySuspendFlag);
-#endif
-#if defined(SUPPORT_DRI_DRM)
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sLeaveVT);
-#endif
- psPVRJTable = &psDevInfo->sPVRJTable;
-
if (psPVRJTable->pfnPVRSRVRemoveCmdProcList (psDevInfo->uiPVRDevID, OMAPLFB_COMMAND_COUNT) != PVRSRV_OK)
{
printk(KERN_ERR DRIVER_PREFIX
": %s: Device %u: PVR Device %u: Couldn't remove device from PVR Services\n", __FUNCTION__, psDevInfo->uiFBDevID, psDevInfo->uiPVRDevID);
return OMAPLFB_FALSE;
}
-
+
+#if defined(CONFIG_DSSCOMP)
+ /* Disable the overlay, as we will be freeing the display buffers */
+ psDevInfo->sSystemBuffer.sSysAddr.uiAddr = 0;
+ OMAPLFBFlip(psDevInfo, &psDevInfo->sSystemBuffer);
+#endif /* defined(CONFIG_DSSCOMP) */
+
+ OMAPLFBCreateSwapChainLockDeInit(psDevInfo);
+
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sBlanked);
+ OMAPLFBAtomicIntDeInit(&psDevInfo->sBlankEvents);
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sFlushCommands);
+#if defined(CONFIG_HAS_EARLYSUSPEND)
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sEarlySuspendFlag);
+#endif
+#if defined(SUPPORT_DRI_DRM)
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sLeaveVT);
+#endif
+
+#ifdef FBDEV_PRESENT
OMAPLFBDeInitFBDev(psDevInfo);
+#endif
+
+#if defined(CONFIG_ION_OMAP)
+ ion_client_destroy(psDevInfo->psIONClient);
+#endif
OMAPLFBSetDevInfoPtr(psDevInfo->uiFBDevID, NULL);
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
*/ /**************************************************************************/
/**************************************************************************
#include <video/da8xx-fb.h>
#if defined(PVR_OMAPLFB_DRM_FB)
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0))
#include <plat/display.h>
+#else
+#include <video/omapdss.h>
+#endif
#include <linux/omap_gpu.h>
#else /* defined(PVR_OMAPLFB_DRM_FB) */
/* OmapZoom.org OMAP3 2.6.29 kernel tree - Needs mach/vrfb.h
#endif
#if defined(PVR_OMAPFB3_NEEDS_PLAT_VRFB_H)
+#ifdef FBDEV_PRESENT
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0))
#include <plat/vrfb.h>
+#else
+#include <video/omapvrfb.h>
+#endif
+#endif
+
#else
#if defined(PVR_OMAPFB3_NEEDS_MACH_VRFB_H)
#include <mach/vrfb.h>
#define PVR_DEBUG DEBUG
#undef DEBUG
#endif
+#ifdef FBDEV_PRESENT
#include <omapfb/omapfb.h>
+#endif
#if defined(DEBUG)
#undef DEBUG
#endif
#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#if defined(CONFIG_DSSCOMP)
+#if defined(CONFIG_DRM_OMAP_DMM_TILER)
+#include <../drivers/staging/omapdrm/omap_dmm_tiler.h>
+#include <../drivers/video/omap2/dsscomp/tiler-utils.h>
+#elif defined(CONFIG_TI_TILER)
#include <mach/tiler.h>
+#else /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
+#error CONFIG_DSSCOMP support requires either \
+ CONFIG_DRM_OMAP_DMM_TILER or CONFIG_TI_TILER
+#endif /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
#include <video/dsscomp.h>
#include <plat/dsscomp.h>
#endif /* defined(CONFIG_DSSCOMP) */
#if !defined(PVR_OMAPLFB_DRM_FB)
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))
#define OMAP_DSS_DRIVER(drv, dev) struct omap_dss_driver *drv = (dev) != NULL ? (dev)->driver : NULL
+//#define OMAP_DSS_MANAGER(man, dev) struct omap_overlay_manager *man = (dev) != NULL ? (dev)->manager : NULL
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0))
#define OMAP_DSS_MANAGER(man, dev) struct omap_overlay_manager *man = (dev) != NULL ? (dev)->manager : NULL
+#else
+#define OMAP_DSS_MANAGER(man, dev) struct omap_overlay_manager *man = (dev) != NULL ? (dev)->output->manager : NULL
+#endif
#define WAIT_FOR_VSYNC(man) ((man)->wait_for_vsync)
#else
#define OMAP_DSS_DRIVER(drv, dev) struct omap_dss_device *drv = (dev)
OMAPLFB_ERROR OMAPLFBCreateSwapQueue(OMAPLFB_SWAPCHAIN *psSwapChain)
{
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
+#if (LINUX_VERSION_CODE == KERNEL_VERSION(2,6,37))
+#define WQ_FREEZABLE WQ_FREEZEABLE
+#endif
/*
* Calling alloc_ordered_workqueue with the WQ_FREEZABLE and
* WQ_MEM_RECLAIM flags set, (currently) has the same effect as
* conditions, preventing the driver from holding on to
* resources longer than it needs to.
*/
-#if (LINUX_VERSION_CODE == KERNEL_VERSION(2,6,37))
- psSwapChain->psWorkQueue = alloc_ordered_workqueue(DEVNAME, WQ_FREEZEABLE | WQ_MEM_RECLAIM);
-#else
psSwapChain->psWorkQueue = alloc_ordered_workqueue(DEVNAME, WQ_FREEZABLE | WQ_MEM_RECLAIM);
-#endif
-
#else
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36))
psSwapChain->psWorkQueue = create_freezable_workqueue(DEVNAME);
{
struct fb_var_screeninfo sFBVar;
int res;
- unsigned long ulYResVirtual;
OMAPLFB_CONSOLE_LOCK();
sFBVar.xoffset = 0;
sFBVar.yoffset = psBuffer->ulYOffset;
- ulYResVirtual = psBuffer->ulYOffset + sFBVar.yres;
-
#if defined(CONFIG_DSSCOMP)
+ /*
+ * If flipping to a NULL buffer, blank the screen to prevent
+ * warnings/errors from the display subsystem.
+ */
+ if (psBuffer->sSysAddr.uiAddr == 0)
+ {
+ struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
+ OMAP_DSS_MANAGER(psDSSMan, psDSSDev);
+
+ if (psDSSMan != NULL && psDSSMan->blank != NULL)
+ {
+ res = psDSSMan->blank(psDSSMan, false);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: DSS manager blank call failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res));
+ }
+ }
+ }
+
{
/*
* If using DSSCOMP, we need to use dsscomp queuing for normal
.width = sFBVar.xres_virtual,
.height = sFBVar.yres_virtual,
.stride = sFBFix.line_length,
- .enabled = 1,
+ .enabled = (psBuffer->sSysAddr.uiAddr != 0),
.global_alpha = 255,
},
},
/* do not map buffer into TILER1D as it is contiguous */
struct tiler_pa_info *pas[] = { NULL };
- d.ovls[0].ba = sFBFix.smem_start;
+ d.ovls[0].ba = (u32) psBuffer->sSysAddr.uiAddr;
+
omapfb_mode_to_dss_mode(&sFBVar, &d.ovls[0].cfg.color_mode);
res = dsscomp_gralloc_queue(&d, pas, true, NULL, NULL);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: dsscomp_gralloc_queue failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res));
+ }
}
#else /* defined(CONFIG_DSSCOMP) */
- /*
- * PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY should be defined to work
- * around flipping problems seen with the Taal LCDs on Blaze.
- * The work around is safe to use with other types of screen on Blaze
- * (e.g. HDMI) and on other platforms (e.g. Panda board).
- */
+ {
+ unsigned long ulYResVirtual = psBuffer->ulYOffset + sFBVar.yres;
+
+ /*
+ * PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY should be defined to
+ * work around flipping problems seen with the Taal LCDs on
+ * Blaze.
+ * The work around is safe to use with other types of screen
+ * on Blaze (e.g. HDMI) and on other platforms (e.g. Panda
+ * board).
+ */
#if !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY)
- /*
- * Attempt to change the virtual screen resolution if it is too
- * small. Note that fb_set_var also pans the display.
- */
- if (sFBVar.xres_virtual != sFBVar.xres || sFBVar.yres_virtual < ulYResVirtual)
+ /*
+ * Attempt to change the virtual screen resolution if it is too
+ * small. Note that fb_set_var also pans the display.
+ */
+ if (sFBVar.xres_virtual != sFBVar.xres || sFBVar.yres_virtual < ulYResVirtual)
#endif /* !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY) */
- {
- sFBVar.xres_virtual = sFBVar.xres;
- sFBVar.yres_virtual = ulYResVirtual;
+ {
+ sFBVar.xres_virtual = sFBVar.xres;
+ sFBVar.yres_virtual = ulYResVirtual;
- sFBVar.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
+ sFBVar.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
- res = fb_set_var(psDevInfo->psLINFBInfo, &sFBVar);
- if (res != 0)
- {
- printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_set_var failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ res = fb_set_var(psDevInfo->psLINFBInfo, &sFBVar);
+ if (res != 0)
+ {
+ printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_set_var failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ }
}
- }
#if !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY)
- else
- {
- res = fb_pan_display(psDevInfo->psLINFBInfo, &sFBVar);
- if (res != 0)
+ else
{
- printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_pan_display failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ res = fb_pan_display(psDevInfo->psLINFBInfo, &sFBVar);
+ if (res != 0)
+ {
+ printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_pan_display failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ }
}
- }
#endif /* !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY) */
+ }
#endif /* defined(CONFIG_DSSCOMP) */
OMAPLFB_CONSOLE_UNLOCK();
}
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
+/* Newer kernels don't have any update mode capability */
+
+//#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0))
+//#define PVR_OMAPLFB_HAS_UPDATE_MODE
+//#endif
+
+//#if defined(PVR_OMAPLFB_HAS_UPDATE_MODE)
#if !defined(PVR_OMAPLFB_DRM_FB) || defined(DEBUG)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
static OMAPLFB_BOOL OMAPLFBValidateDSSUpdateMode(enum omap_dss_update_mode eMode)
{
switch (eMode)
}
#endif
#endif
-
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
static OMAPLFB_BOOL OMAPLFBValidateUpdateMode(OMAPLFB_UPDATE_MODE eMode)
{
return OMAPLFB_FALSE;
}
#endif
+
#if 0
static enum omap_dss_update_mode OMAPLFBToDSSUpdateMode(OMAPLFB_UPDATE_MODE eMode)
{
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
static const char *OMAPLFBDSSUpdateModeToString(enum omap_dss_update_mode eMode)
{
-
if (!OMAPLFBValidateDSSUpdateMode(eMode))
{
return "Unknown Update Mode";
return OMAPLFBUpdateModeToString(OMAPLFBFromDSSUpdateMode(eMode));
}
#endif
-void OMAPLFBPrintInfo(OMAPLFB_DEVINFO *psDevInfo)
-{
-#if defined(PVR_OMAPLFB_DRM_FB)
- struct drm_connector *psConnector;
- unsigned uConnectors;
- unsigned uConnector;
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: DRM framebuffer\n", psDevInfo->uiFBDevID));
-
- for (psConnector = NULL, uConnectors = 0;
- (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL;)
- {
- uConnectors++;
- }
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Number of screens (DRM connectors): %u\n", psDevInfo->uiFBDevID, uConnectors));
-
- if (uConnectors == 0)
- {
- return;
- }
-
- for (psConnector = NULL, uConnector = 0;
- (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL; uConnector++)
- {
- enum omap_dss_update_mode eMode = omap_connector_get_update_mode(psConnector);
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Screen %u: %s (%d)\n", psDevInfo->uiFBDevID, uConnector, OMAPLFBDSSUpdateModeToString(eMode), (int)eMode));
-
- }
-#else /* defined(PVR_OMAPLFB_DRM_FB) */
- OMAPLFB_UPDATE_MODE eMode = OMAPLFBGetUpdateMode(psDevInfo);
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: non-DRM framebuffer\n", psDevInfo->uiFBDevID));
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: %s\n", psDevInfo->uiFBDevID, OMAPLFBUpdateModeToString(eMode)));
-#endif /* defined(PVR_OMAPLFB_DRM_FB) */
-}
-#endif /* defined(DEBUG) */
+#endif /* defined(DEBUG) */
/*
* Get display update mode.
*/
OMAPLFB_UPDATE_MODE OMAPLFBGetUpdateMode(OMAPLFB_DEVINFO *psDevInfo)
{
-#if 0
#if defined(PVR_OMAPLFB_DRM_FB)
struct drm_connector *psConnector;
OMAPLFB_UPDATE_MODE eMode = OMAPLFB_UPDATE_MODE_UNDEFINED;
return eMode;
#else /* defined(PVR_OMAPLFB_DRM_FB) */
-
+#if 0
struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
OMAP_DSS_DRIVER(psDSSDrv, psDSSDev);
{
return OMAPLFB_UPDATE_MODE_AUTO;
}
-// DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: No get_update_mode function\n", __FUNCTION__, psDevInfo->uiFBDevID));
-// return OMAPLFB_UPDATE_MODE_UNDEFINED;
- return OMAPLFB_UPDATE_MODE_AUTO;
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: No get_update_mode function\n", __FUNCTION__, psDevInfo->uiFBDevID));
+ return OMAPLFB_UPDATE_MODE_UNDEFINED;
}
eMode = psDSSDrv->get_update_mode(psDSSDev);
}
return OMAPLFBFromDSSUpdateMode(eMode);
-#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#endif
return OMAPLFB_UPDATE_MODE_AUTO;
+#endif /* defined(PVR_OMAPLFB_DRM_FB) */
}
/* Set display update mode */
OMAPLFB_BOOL OMAPLFBSetUpdateMode(OMAPLFB_DEVINFO *psDevInfo, OMAPLFB_UPDATE_MODE eMode)
{
-#if 0
#if defined(PVR_OMAPLFB_DRM_FB)
struct drm_connector *psConnector;
enum omap_dss_update_mode eDSSMode;
return OMAPLFB_TRUE;
#else /* defined(PVR_OMAPLFB_DRM_FB) */
+#if 0
struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
OMAP_DSS_DRIVER(psDSSDrv, psDSSDev);
enum omap_dss_update_mode eDSSMode;
}
return (res == 0);
-#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#endif
return 1;
+#endif /* defined(PVR_OMAPLFB_DRM_FB) */
}
+//#else /* defined(PVR_OMAPLFB_HAS_UPDATE_MODE) */
+
+//OMAPLFB_UPDATE_MODE OMAPLFBGetUpdateMode(OMAPLFB_DEVINFO *psDevInfo)
+//{
+// return OMAPLFB_UPDATE_MODE_UNDEFINED;
+//}
+
+//#endif /* defined(PVR_OMAPLFB_HAS_UPDATE_MODE) */
+
+#if defined(DEBUG)
+void OMAPLFBPrintInfo(OMAPLFB_DEVINFO *psDevInfo)
+{
+#if defined(PVR_OMAPLFB_DRM_FB)
+ struct drm_connector *psConnector;
+ unsigned uConnectors;
+ unsigned uConnector;
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: DRM framebuffer\n", psDevInfo->uiFBDevID));
+
+ for (psConnector = NULL, uConnectors = 0;
+ (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL;)
+ {
+ uConnectors++;
+ }
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Number of screens (DRM connectors): %u\n", psDevInfo->uiFBDevID, uConnectors));
+
+ if (uConnectors == 0)
+ {
+ return;
+ }
+
+ for (psConnector = NULL, uConnector = 0;
+ (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL; uConnector++)
+ {
+ enum omap_dss_update_mode eMode = omap_connector_get_update_mode(psConnector);
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Screen %u: %s (%d)\n", psDevInfo->uiFBDevID, uConnector, OMAPLFBDSSUpdateModeToString(eMode), (int)eMode));
+
+ }
+#else /* defined(PVR_OMAPLFB_DRM_FB) */
+//#if defined(PVR_OMAPLFB_HAS_UPDATE_MODE)
+ OMAPLFB_UPDATE_MODE eMode = OMAPLFBGetUpdateMode(psDevInfo);
+
+// DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: %s\n", psDevInfo->uiFBDevID, OMAPLFBUpdateModeToString(eMode)));
+//#endif
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: non-DRM framebuffer\n", psDevInfo->uiFBDevID));
+
+#endif /* defined(PVR_OMAPLFB_DRM_FB) */
+}
+#endif /* defined(DEBUG) */
/* Wait for VSync */
OMAPLFB_BOOL OMAPLFBWaitForVSync(OMAPLFB_DEVINFO *psDevInfo)
{
-#if 0
#if defined(PVR_OMAPLFB_DRM_FB)
struct drm_connector *psConnector;
return OMAPLFB_TRUE;
#else /* defined(PVR_OMAPLFB_DRM_FB) */
+#if 0
struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
OMAP_DSS_MANAGER(psDSSMan, psDSSDev);
}
return OMAPLFB_TRUE;
-#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#endif
-
+#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#if FBDEV_PRESENT
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0))
int r;
void grpx_irq_wait_handler(void *data)
{
- complete((struct completion *)data);
+ if (data != NULL)
+ complete((struct completion *)data);
// do_gettimeofday(&tv);
// curtime=tv.tv_usec;
//printk("The time in handler is %ld\n",curtime);
printk (KERN_WARNING DRIVER_PREFIX ": Failed to un-register for vsync call back\n");
return OMAPLFB_FALSE;
}
+#endif
#endif
return OMAPLFB_TRUE;
+
}
/*
*/
OMAPLFB_BOOL OMAPLFBManualSync(OMAPLFB_DEVINFO *psDevInfo)
{
-#if 0
#if defined(PVR_OMAPLFB_DRM_FB)
struct drm_connector *psConnector;
return OMAPLFB_TRUE;
#else /* defined(PVR_OMAPLFB_DRM_FB) */
+#if 0
struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
OMAP_DSS_DRIVER(psDSSDrv, psDSSDev);
}
return OMAPLFB_TRUE;
-#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#endif
-return OMAPLFB_TRUE;
+ return OMAPLFB_TRUE;
+#endif /* defined(PVR_OMAPLFB_DRM_FB) */
}
/*
OMAPLFB_CONSOLE_UNLOCK();
}
+#if 0
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
#if !defined(PVR_OMAPLFB_DRM_FB) || defined(DEBUG)
static OMAPLFB_BOOL OMAPLFBValidateDSSUpdateMode(enum omap_dss_update_mode eMode)
return OMAPLFB_FALSE;
}
-#if 0
static enum omap_dss_update_mode OMAPLFBToDSSUpdateMode(OMAPLFB_UPDATE_MODE eMode)
{
switch(eMode)
return "Unknown Update Mode";
}
+#if 0
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
static const char *OMAPLFBDSSUpdateModeToString(enum omap_dss_update_mode eMode)
{
return OMAPLFBUpdateModeToString(OMAPLFBFromDSSUpdateMode(eMode));
}
#endif
+#endif
void OMAPLFBPrintInfo(OMAPLFB_DEVINFO *psDevInfo)
{
#if defined(PVR_OMAPLFB_DRM_FB)
drm_crtc.o drm_modes.o drm_edid.o \
drm_info.o drm_debugfs.o drm_encoder_slave.o
else
+# Works for 2.6.37 till 3.2 kernel
drm-y := pvr_drm_stubs.o drm_auth.o drm_bufs.o drm_cache.o drm_context.o drm_dma.o drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \
drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \
drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \
drm_crtc.o drm_modes.o drm_edid.o \
drm_info.o drm_debugfs.o drm_encoder_slave.o drm_global.o drm_platform.o drm_trace_points.o
endif
+
+# For 3.3 kernel only
+#drm-y := pvr_drm_stubs.o drm_auth.o drm_bufs.o drm_cache.o drm_context.o drm_dma.o drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \
+# drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \
+# drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \
+# drm_sysfs.o drm_hashtab.o drm_mm.o \
+# drm_crtc.o drm_modes.o drm_edid.o \
+# drm_info.o drm_debugfs.o drm_encoder_slave.o drm_global.o drm_platform.o drm_trace_points.o
+
+# For greater than/equal to 3.4 till 3.8 kernel
+#drm-y := pvr_drm_stubs.o drm_auth.o drm_bufs.o drm_cache.o drm_context.o drm_dma.o drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \
+# drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \
+# drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \
+# drm_sysfs.o drm_hashtab.o drm_mm.o \
+# drm_crtc.o drm_modes.o drm_edid.o \
+# drm_info.o drm_debugfs.o drm_encoder_slave.o drm_global.o drm_platform.o drm_trace_points.o drm_prime.o
+
# less than 2.6.32 kernel
#drm-y := pvr_drm_stubs.o drm_auth.o drm_bufs.o drm_cache.o drm_context.o drm_dma.o drm_drawable.o drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \
DRM_SOURCE_DIR := drivers/gpu/drm
ccflags-y += \
- -I$(KERNELDIR)/include/drm \
+ -Iinclude/drm \
-I$(DRM_SOURCE_DIR)
drm-y += \
{
}
+int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,int where, u32 *val)
+{
+ return 0;
+
+}
+
+
+
int
drm_pvr_dev_add(void)
{
IMG_VOID *pvParamOut; /*!< output data buffer */
IMG_UINT32 ui32OutBufferSize; /*!< size of output data buffer */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelServices; /*!< kernel servcies handle */
-#else
IMG_HANDLE hKernelServices; /*!< kernel servcies handle */
-#endif
}PVRSRV_BRIDGE_PACKAGE;
typedef struct PVRSRV_BRIDGE_IN_CLOSE_DISPCLASS_DEVICE_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
} PVRSRV_BRIDGE_IN_CLOSE_DISPCLASS_DEVICE;
typedef struct PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_FORMATS_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
} PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_FORMATS;
typedef struct PVRSRV_BRIDGE_IN_GET_DISPCLASS_SYSBUFFER_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
} PVRSRV_BRIDGE_IN_GET_DISPCLASS_SYSBUFFER;
typedef struct PVRSRV_BRIDGE_IN_GET_DISPCLASS_INFO_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
} PVRSRV_BRIDGE_IN_GET_DISPCLASS_INFO;
typedef struct PVRSRV_BRIDGE_IN_CLOSE_BUFFERCLASS_DEVICE_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
} PVRSRV_BRIDGE_IN_CLOSE_BUFFERCLASS_DEVICE;
typedef struct PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_INFO_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
} PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_INFO;
typedef struct PVRSRV_BRIDGE_IN_RELEASE_DEVICEINFO_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
} PVRSRV_BRIDGE_IN_RELEASE_DEVICEINFO;
typedef struct PVRSRV_BRIDGE_IN_GET_DEVMEM_HEAPINFO_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hDevMemContext;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hDevMemContext;
-#endif
}PVRSRV_BRIDGE_IN_GET_DEVMEM_HEAPINFO;
typedef struct PVRSRV_BRIDGE_IN_CREATE_DEVMEMCONTEXT_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
}PVRSRV_BRIDGE_IN_CREATE_DEVMEMCONTEXT;
typedef struct PVRSRV_BRIDGE_IN_DESTROY_DEVMEMCONTEXT_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hDevMemContext;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hDevMemContext;
-#endif
}PVRSRV_BRIDGE_IN_DESTROY_DEVMEMCONTEXT;
typedef struct PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hDevMemHeap;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hDevMemHeap;
-#endif
IMG_UINT32 ui32Attribs;
- IMG_SIZE_T ui32Size;
- IMG_SIZE_T ui32Alignment;
+ IMG_SIZE_T uSize;
+ IMG_SIZE_T uAlignment;
IMG_PVOID pvPrivData;
IMG_UINT32 ui32PrivDataLength;
typedef struct PVRSRV_BRIDGE_IN_MAPMEMINFOTOUSER_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
}PVRSRV_BRIDGE_IN_MAPMEMINFOTOUSER;
typedef struct PVRSRV_BRIDGE_IN_UNMAPMEMINFOFROMUSER_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
IMG_PVOID pvLinAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMappingInfo;
-#else
IMG_HANDLE hMappingInfo;
-#endif
}PVRSRV_BRIDGE_IN_UNMAPMEMINFOFROMUSER;
typedef struct PVRSRV_BRIDGE_IN_FREEDEVICEMEM_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hKernelMemInfo;
-#else
IMG_HANDLE hDevCookie;
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
}PVRSRV_BRIDGE_IN_FREEDEVICEMEM;
typedef struct PVRSRV_BRIDGE_IN_EXPORTDEVICEMEM_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hKernelMemInfo;
-#else
IMG_HANDLE hDevCookie;
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
}PVRSRV_BRIDGE_IN_EXPORTDEVICEMEM;
/******************************************************************************
* 'bridge in' map ion handle
*****************************************************************************/
+#define ION_IMPORT_MAX_FDS 3
+#define ION_IMPORT_MAX_CHUNK_COUNT 3
typedef struct _PVRSRV_BRIDGE_IN_MAP_ION_HANDLE_
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
- IMG_HANDLE handle;
+ IMG_UINT32 ui32NumFDs;
+ IMG_INT32 ai32BufferFDs[ION_IMPORT_MAX_FDS];
IMG_UINT32 ui32Attribs;
- IMG_SIZE_T ui32Size;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hDevMemContext;
-#else
+ IMG_UINT32 ui32ChunkCount;
+ IMG_SIZE_T auiOffset[ION_IMPORT_MAX_CHUNK_COUNT];
+ IMG_SIZE_T auiSize[ION_IMPORT_MAX_CHUNK_COUNT];
IMG_HANDLE hDevCookie;
- IMG_HANDLE hDevMemContext;
-#endif
+ IMG_HANDLE hDevMemHeap;
} PVRSRV_BRIDGE_IN_MAP_ION_HANDLE;
/******************************************************************************
typedef struct PVRSRV_BRIDGE_IN_UNMAP_ION_HANDLE_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
}PVRSRV_BRIDGE_IN_UNMAP_ION_HANDLE;
/******************************************************************************
typedef struct PVRSRV_BRIDGE_IN_CREATECOMMANDQUEUE_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
- IMG_SIZE_T ui32QueueSize;
+ IMG_SIZE_T uQueueSize;
}PVRSRV_BRIDGE_IN_CREATECOMMANDQUEUE;
typedef struct PVRSRV_BRIDGE_IN_DESTROYCOMMANDQUEUE_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
PVRSRV_QUEUE_INFO *psQueueInfo;
}PVRSRV_BRIDGE_IN_DESTROYCOMMANDQUEUE;
typedef struct PVRSRV_BRIDGE_IN_MHANDLE_TO_MMAP_DATA_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMHandle; /* Handle associated with the memory that needs to be mapped */
-#else
IMG_HANDLE hMHandle; /* Handle associated with the memory that needs to be mapped */
-#endif
} PVRSRV_BRIDGE_IN_MHANDLE_TO_MMAP_DATA;
typedef struct PVRSRV_BRIDGE_IN_RELEASE_MMAP_DATA_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMHandle; /* Handle associated with the memory that needs to be mapped */
-#else
IMG_HANDLE hMHandle; /* Handle associated with the memory that needs to be mapped */
-#endif
} PVRSRV_BRIDGE_IN_RELEASE_MMAP_DATA;
typedef struct PVRSRV_BRIDGE_IN_RESERVE_DEV_VIRTMEM_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap;
-#else
IMG_HANDLE hDevMemHeap;
-#endif
IMG_DEV_VIRTADDR *psDevVAddr;
- IMG_SIZE_T ui32Size;
- IMG_SIZE_T ui32Alignment;
+ IMG_SIZE_T uSize;
+ IMG_SIZE_T uAlignment;
}PVRSRV_BRIDGE_IN_RESERVE_DEV_VIRTMEM;
typedef struct PVRSRV_BRIDGE_OUT_CONNECT_SERVICES_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelServices;
-#else
IMG_HANDLE hKernelServices;
-#endif
}PVRSRV_BRIDGE_OUT_CONNECT_SERVICES;
/******************************************************************************
typedef struct PVRSRV_BRIDGE_OUT_RESERVE_DEV_VIRTMEM_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
- IMG_SID hKernelSyncInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
typedef struct PVRSRV_BRIDGE_IN_FREE_DEV_VIRTMEM_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
typedef struct PVRSRV_BRIDGE_IN_MAP_DEV_MEMORY_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
- IMG_SID hDstDevMemHeap;
-#else
IMG_HANDLE hKernelMemInfo;
IMG_HANDLE hDstDevMemHeap;
-#endif
}PVRSRV_BRIDGE_IN_MAP_DEV_MEMORY;
typedef struct PVRSRV_BRIDGE_OUT_MAP_DEV_MEMORY_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDstKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psDstKernelMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sDstClientMemInfo;
PVRSRV_CLIENT_SYNC_INFO sDstClientSyncInfo;
typedef struct PVRSRV_BRIDGE_IN_UNMAP_DEV_MEMORY_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
typedef struct PVRSRV_BRIDGE_IN_MAP_EXT_MEMORY_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
IMG_SYS_PHYADDR *psSysPAddr;
IMG_UINT32 ui32Flags;
typedef struct PVRSRV_BRIDGE_IN_MAP_DEVICECLASS_MEMORY_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceClassBuffer;
- IMG_SID hDevMemContext;
-#else
IMG_HANDLE hDeviceClassBuffer;
IMG_HANDLE hDevMemContext;
-#endif
}PVRSRV_BRIDGE_IN_MAP_DEVICECLASS_MEMORY;
PVRSRV_ERROR eError;
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
- IMG_SID hMappingInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
IMG_HANDLE hMappingInfo;
-#endif
}PVRSRV_BRIDGE_OUT_MAP_DEVICECLASS_MEMORY;
typedef struct PVRSRV_BRIDGE_IN_UNMAP_DEVICECLASS_MEMORY_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_MEMPOL_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
IMG_UINT32 ui32Offset;
IMG_UINT32 ui32Value;
IMG_UINT32 ui32Mask;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_SYNCPOL_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo;
-#else
PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
-#endif
IMG_BOOL bIsRead;
IMG_BOOL bUseLastOpDumpVal;
IMG_UINT32 ui32Value;
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
IMG_PVOID pvLinAddr;
IMG_PVOID pvAltLinAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
IMG_UINT32 ui32Offset;
IMG_UINT32 ui32Bytes;
IMG_UINT32 ui32Flags;
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
IMG_PVOID pvAltLinAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo;
-#else
PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
-#endif
IMG_UINT32 ui32Offset;
IMG_UINT32 ui32Bytes;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPREG_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
PVRSRV_HWREG sHWReg;
IMG_UINT32 ui32Flags;
IMG_CHAR szRegRegion[32];
typedef struct PVRSRV_BRIDGE_IN_PDUMP_REGPOL_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
PVRSRV_HWREG sHWReg;
IMG_UINT32 ui32Mask;
IMG_UINT32 ui32Flags;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_MEMPAGES_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hKernelMemInfo;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hKernelMemInfo;
-#endif
IMG_DEV_PHYADDR *pPages;
IMG_UINT32 ui32NumPages;
IMG_DEV_VIRTADDR sDevVAddr;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_BITMAP_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_CHAR szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
IMG_UINT32 ui32FileOffset;
IMG_UINT32 ui32Width;
IMG_UINT32 ui32Height;
IMG_UINT32 ui32StrideInBytes;
IMG_DEV_VIRTADDR sDevBaseAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext;
-#else
IMG_HANDLE hDevMemContext;
-#endif
IMG_UINT32 ui32Size;
PDUMP_PIXEL_FORMAT ePixelFormat;
PDUMP_MEM_FORMAT eMemFormat;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_READREG_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_CHAR szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
IMG_UINT32 ui32FileOffset;
IMG_UINT32 ui32Address;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
IMG_HANDLE hKernelMemInfo;
-#endif
IMG_UINT32 ui32Offset;
IMG_DEV_PHYADDR sPDDevPAddr;
}PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR;
typedef struct PVRSRV_BRIDGE_PDUM_IN_CYCLE_COUNT_REG_READ_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_UINT32 ui32RegOffset;
IMG_BOOL bLastFrame;
}PVRSRV_BRIDGE_IN_PDUMP_CYCLE_COUNT_REG_READ;
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
} PVRSRV_BRIDGE_OUT_ACQUIRE_DEVICEINFO;
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
IMG_UINT32 ui32DeviceID;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
}PVRSRV_BRIDGE_IN_OPEN_DISPCLASS_DEVICE;
typedef struct PVRSRV_BRIDGE_OUT_OPEN_DISPCLASS_DEVICE_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
}PVRSRV_BRIDGE_OUT_OPEN_DISPCLASS_DEVICE;
typedef struct PVRSRV_BRIDGE_IN_WRAP_EXT_MEMORY_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hDevMemContext;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hDevMemContext;
-#endif
IMG_VOID *pvLinAddr;
- IMG_SIZE_T ui32ByteSize;
- IMG_SIZE_T ui32PageOffset;
+ IMG_SIZE_T uByteSize;
+ IMG_SIZE_T uPageOffset;
IMG_BOOL bPhysContig;
IMG_UINT32 ui32NumPageTableEntries;
IMG_SYS_PHYADDR *psSysPAddr;
typedef struct PVRSRV_BRIDGE_IN_UNWRAP_EXT_MEMORY_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
IMG_HANDLE hKernelMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
typedef struct PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_DIMS_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
DISPLAY_FORMAT sFormat;
}PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_DIMS;
typedef struct PVRSRV_BRIDGE_OUT_GET_DISPCLASS_SYSBUFFER_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hBuffer;
-#else
IMG_HANDLE hBuffer;
-#endif
}PVRSRV_BRIDGE_OUT_GET_DISPCLASS_SYSBUFFER;
typedef struct PVRSRV_BRIDGE_IN_CREATE_DISPCLASS_SWAPCHAIN_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
IMG_UINT32 ui32Flags;
DISPLAY_SURF_ATTRIBUTES sDstSurfAttrib;
DISPLAY_SURF_ATTRIBUTES sSrcSurfAttrib;
typedef struct PVRSRV_BRIDGE_OUT_CREATE_DISPCLASS_SWAPCHAIN_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain;
-#else
IMG_HANDLE hSwapChain;
-#endif
IMG_UINT32 ui32SwapChainID;
} PVRSRV_BRIDGE_OUT_CREATE_DISPCLASS_SWAPCHAIN;
typedef struct PVRSRV_BRIDGE_IN_DESTROY_DISPCLASS_SWAPCHAIN_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
- IMG_SID hSwapChain;
-#else
IMG_HANDLE hDeviceKM;
IMG_HANDLE hSwapChain;
-#endif
} PVRSRV_BRIDGE_IN_DESTROY_DISPCLASS_SWAPCHAIN;
typedef struct PVRSRV_BRIDGE_IN_SET_DISPCLASS_RECT_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
- IMG_SID hSwapChain;
-#else
IMG_HANDLE hDeviceKM;
IMG_HANDLE hSwapChain;
-#endif
IMG_RECT sRect;
} PVRSRV_BRIDGE_IN_SET_DISPCLASS_RECT;
typedef struct PVRSRV_BRIDGE_IN_SET_DISPCLASS_COLOURKEY_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
- IMG_SID hSwapChain;
-#else
IMG_HANDLE hDeviceKM;
IMG_HANDLE hSwapChain;
-#endif
IMG_UINT32 ui32CKColour;
} PVRSRV_BRIDGE_IN_SET_DISPCLASS_COLOURKEY;
typedef struct PVRSRV_BRIDGE_IN_GET_DISPCLASS_BUFFERS_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
- IMG_SID hSwapChain;
-#else
IMG_HANDLE hDeviceKM;
IMG_HANDLE hSwapChain;
-#endif
} PVRSRV_BRIDGE_IN_GET_DISPCLASS_BUFFERS;
{
PVRSRV_ERROR eError;
IMG_UINT32 ui32BufferCount;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahBuffer[PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS];
-#else
IMG_HANDLE ahBuffer[PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS];
-#endif
IMG_SYS_PHYADDR asPhyAddr[PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS];
} PVRSRV_BRIDGE_OUT_GET_DISPCLASS_BUFFERS;
typedef struct PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
- IMG_SID hBuffer;
-#else
IMG_HANDLE hDeviceKM;
IMG_HANDLE hBuffer;
-#endif
IMG_UINT32 ui32SwapInterval;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hPrivateTag;
-#else
IMG_HANDLE hPrivateTag;
-#endif
IMG_UINT32 ui32ClipRectCount;
IMG_RECT sClipRect[PVRSRV_MAX_DC_CLIP_RECTS];
} PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER;
+
/******************************************************************************
- * 'bridge in' swap to buffer
+ * 'bridge in' swap to buffer 2
*****************************************************************************/
typedef struct PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER2_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
- IMG_SID hSwapChain;
-#else
IMG_HANDLE hDeviceKM;
IMG_HANDLE hSwapChain;
-#endif
IMG_UINT32 ui32SwapInterval;
IMG_UINT32 ui32NumMemInfos;
} PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER2;
+
+/******************************************************************************
+ * 'bridge out' swap to buffer 2
+ *****************************************************************************/
+typedef struct PVRSRV_BRIDGE_OUT_SWAP_DISPCLASS_TO_BUFFER2_TAG
+{
+ PVRSRV_ERROR eError;
+ IMG_HANDLE hFence;
+
+} PVRSRV_BRIDGE_OUT_SWAP_DISPCLASS_TO_BUFFER2;
+
+
/******************************************************************************
* 'bridge in' swap to system buffer (primary)
*****************************************************************************/
typedef struct PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_SYSTEM_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
- IMG_SID hSwapChain;
-#else
IMG_HANDLE hDeviceKM;
IMG_HANDLE hSwapChain;
-#endif
} PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_SYSTEM;
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
IMG_UINT32 ui32DeviceID;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
} PVRSRV_BRIDGE_IN_OPEN_BUFFERCLASS_DEVICE;
typedef struct PVRSRV_BRIDGE_OUT_OPEN_BUFFERCLASS_DEVICE_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
} PVRSRV_BRIDGE_OUT_OPEN_BUFFERCLASS_DEVICE;
typedef struct PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_BUFFER_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
IMG_UINT32 ui32BufferIndex;
} PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_BUFFER;
typedef struct PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_BUFFER_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hBuffer;
-#else
IMG_HANDLE hBuffer;
-#endif
} PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_BUFFER;
typedef struct PVRSRV_BRIDGE_OUT_CREATE_DEVMEMCONTEXT_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext;
-#else
IMG_HANDLE hDevMemContext;
-#endif
IMG_UINT32 ui32ClientHeapCount;
PVRSRV_HEAP_INFO sHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
typedef struct PVRSRV_BRIDGE_OUT_CREATE_DEVMEMHEAP_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap;
-#else
IMG_HANDLE hDevMemHeap;
-#endif
} PVRSRV_BRIDGE_OUT_CREATE_DEVMEMHEAP;
typedef struct PVRSRV_BRIDGE_OUT_ALLOCDEVICEMEM_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
typedef struct PVRSRV_BRIDGE_OUT_EXPORTDEVICEMEM_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMemInfo;
-#else
IMG_HANDLE hMemInfo;
-#endif
#if defined(SUPPORT_MEMINFO_IDS)
IMG_UINT64 ui64Stamp;
#endif
typedef struct _PVRSRV_BRIDGE_OUT_MAP_ION_HANDLE_
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
+ IMG_SIZE_T uiIonBufferSize;
} PVRSRV_BRIDGE_OUT_MAP_ION_HANDLE;
{
PVRSRV_ERROR eError;
IMG_PVOID pvLinAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMappingInfo;
-#else
IMG_HANDLE hMappingInfo;
-#endif
}PVRSRV_BRIDGE_OUT_MAPMEMINFOTOUSER;
typedef struct PVRSRV_BRIDGE_OUT_GETFREEDEVICEMEM_TAG
{
PVRSRV_ERROR eError;
- IMG_SIZE_T ui32Total;
- IMG_SIZE_T ui32Free;
- IMG_SIZE_T ui32LargestBlock;
+ IMG_SIZE_T uTotal;
+ IMG_SIZE_T uFree;
+ IMG_SIZE_T uLargestBlock;
} PVRSRV_BRIDGE_OUT_GETFREEDEVICEMEM;
/* This is a the offset you should pass to mmap(2) so that
* the driver can look up the full details for the mapping
* request. */
- IMG_UINT32 ui32MMapOffset;
+ IMG_UINTPTR_T uiMMapOffset;
/* This is the byte offset you should add to the mapping you
* get from mmap */
- IMG_UINT32 ui32ByteOffset;
+ IMG_UINTPTR_T uiByteOffset;
/* This is the real size of the mapping that will be created
* which should be passed to mmap _and_ munmap. */
- IMG_UINT32 ui32RealByteSize;
+ IMG_SIZE_T uiRealByteSize;
/* User mode address associated with mapping */
- IMG_UINT32 ui32UserVAddr;
+ IMG_UINTPTR_T uiUserVAddr;
} PVRSRV_BRIDGE_OUT_MHANDLE_TO_MMAP_DATA;
IMG_BOOL bMUnmap;
/* User mode address associated with mapping */
- IMG_UINT32 ui32UserVAddr;
+ IMG_UINTPTR_T uiUserVAddr;
/* Size of mapping */
- IMG_UINT32 ui32RealByteSize;
+ IMG_SIZE_T uiRealByteSize;
} PVRSRV_BRIDGE_OUT_RELEASE_MMAP_DATA;
//#endif
typedef struct PVRSRV_BRIDGE_IN_GET_FB_STATS_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
- IMG_SIZE_T ui32Total;
- IMG_SIZE_T ui32Available;
+ IMG_SIZE_T uTotal;
+ IMG_SIZE_T uAvailable;
} PVRSRV_BRIDGE_IN_GET_FB_STATS;
typedef struct PVRSRV_BRIDGE_IN_MAPPHYSTOUSERSPACE_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_SYS_PHYADDR sSysPhysAddr;
IMG_UINT32 uiSizeInBytes;
typedef struct PVRSRV_BRIDGE_IN_UNMAPPHYSTOUSERSPACE_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_PVOID pvUserAddr;
IMG_PVOID pvProcess;
} PVRSRV_BRIDGE_OUT_GETPHYSTOUSERSPACEMAP;
-#if !defined (SUPPORT_SID_INTERFACE)
/******************************************************************************
* 'bridge in' Register RTSIM process thread
*****************************************************************************/
PVRSRV_ERROR eError;
} PVRSRV_BRIDGE_IN_PROCESS_SIMISR_EVENT;
-#endif /* #if !defined (SUPPORT_SID_INTERFACE) */
/******************************************************************************
* 'bridge in' initialisation server disconnect
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
IMG_UINT32 ui32Flags;
- IMG_SIZE_T ui32Size;
+ IMG_SIZE_T uSize;
}PVRSRV_BRIDGE_IN_ALLOC_SHARED_SYS_MEM;
typedef struct PVRSRV_BRIDGE_OUT_ALLOC_SHARED_SYS_MEM_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
}PVRSRV_BRIDGE_OUT_ALLOC_SHARED_SYS_MEM;
typedef struct PVRSRV_BRIDGE_IN_FREE_SHARED_SYS_MEM_TAG
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
- IMG_SID hMappingInfo;
-#else
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
}PVRSRV_BRIDGE_IN_FREE_SHARED_SYS_MEM;
typedef struct PVRSRV_BRIDGE_IN_MAP_MEMINFO_MEM_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
IMG_HANDLE hKernelMemInfo;
-#endif
}PVRSRV_BRIDGE_IN_MAP_MEMINFO_MEM;
typedef struct PVRSRV_BRIDGE_OUT_MAP_MEMINFO_MEM_TAG
{
PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
PVRSRV_ERROR eError;
}PVRSRV_BRIDGE_OUT_MAP_MEMINFO_MEM;
typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_WAI_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hOSEventKM;
-#else
IMG_HANDLE hOSEventKM;
-#endif
} PVRSRV_BRIDGE_IN_EVENT_OBJECT_WAIT;
typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN_TAG
typedef struct PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN_TAG
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_UINT32 hOSEvent;
-#else
IMG_HANDLE hOSEvent;
-#endif
PVRSRV_ERROR eError;
} PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN;
typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE_TAG
{
PVRSRV_EVENTOBJECT sEventObject;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hOSEventKM;
-#else
IMG_HANDLE hOSEventKM;
-#endif
} PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE;
typedef struct PVRSRV_BRIDGE_OUT_CREATE_SYNC_INFO_MOD_OBJ_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj;
-#else
IMG_HANDLE hKernelSyncInfoModObj;
-#endif
} PVRSRV_BRIDGE_OUT_CREATE_SYNC_INFO_MOD_OBJ;
typedef struct PVRSRV_BRIDGE_IN_DESTROY_SYNC_INFO_MOD_OBJ
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj;
-#else
IMG_HANDLE hKernelSyncInfoModObj;
-#endif
} PVRSRV_BRIDGE_IN_DESTROY_SYNC_INFO_MOD_OBJ;
typedef struct PVRSRV_BRIDGE_IN_MODIFY_PENDING_SYNC_OPS_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj;
- IMG_SID hKernelSyncInfo;
-#else
IMG_HANDLE hKernelSyncInfoModObj;
IMG_HANDLE hKernelSyncInfo;
-#endif
IMG_UINT32 ui32ModifyFlags;
} PVRSRV_BRIDGE_IN_MODIFY_PENDING_SYNC_OPS;
typedef struct PVRSRV_BRIDGE_IN_MODIFY_COMPLETE_SYNC_OPS_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj;
-#else
IMG_HANDLE hKernelSyncInfoModObj;
-#endif
} PVRSRV_BRIDGE_IN_MODIFY_COMPLETE_SYNC_OPS;
typedef struct PVRSRV_BRIDGE_OUT_MODIFY_PENDING_SYNC_OPS_TAG
typedef struct PVRSRV_BRIDGE_IN_SYNC_OPS_TAKE_TOKEN_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo;
-#else
IMG_HANDLE hKernelSyncInfo;
-#endif
} PVRSRV_BRIDGE_IN_SYNC_OPS_TAKE_TOKEN;
typedef struct PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_TOKEN_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo;
-#else
IMG_HANDLE hKernelSyncInfo;
-#endif
IMG_UINT32 ui32ReadOpsPendingSnapshot;
IMG_UINT32 ui32WriteOpsPendingSnapshot;
IMG_UINT32 ui32ReadOps2PendingSnapshot;
typedef struct PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_MOD_OBJ_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj;
-#else
IMG_HANDLE hKernelSyncInfoModObj;
-#endif
} PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_MOD_OBJ;
typedef struct PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_DELTA_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo;
-#else
IMG_HANDLE hKernelSyncInfo;
-#endif
IMG_UINT32 ui32Delta;
} PVRSRV_BRIDGE_IN_SYNC_OPS_FLUSH_TO_DELTA;
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
} PVRSRV_BRIDGE_IN_ALLOC_SYNC_INFO;
typedef struct PVRSRV_BRIDGE_OUT_ALLOC_SYNC_INFO_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo;
-#else
IMG_HANDLE hKernelSyncInfo;
-#endif
} PVRSRV_BRIDGE_OUT_ALLOC_SYNC_INFO;
typedef struct PVRSRV_BRIDGE_IN_FREE_SYNC_INFO_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo;
-#else
IMG_HANDLE hKernelSyncInfo;
-#endif
} PVRSRV_BRIDGE_IN_FREE_SYNC_INFO;
typedef struct PVRSRV_BRIDGE_IN_CHG_DEV_MEM_ATTRIBS_TAG
#if defined(__linux__)
PVRSRV_ERROR LinuxBridgeInit(IMG_VOID);
IMG_VOID LinuxBridgeDeInit(IMG_VOID);
+
+#if defined(SUPPORT_MEMINFO_IDS)
+extern IMG_UINT64 g_ui64MemInfoID;
+#endif
+
#endif
IMG_IMPORT
IMG_HANDLE *phDevCookie);
IMG_IMPORT
-PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateCommandQueueKM(IMG_SIZE_T ui32QueueSize,
+PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateCommandQueueKM(IMG_SIZE_T uQueueSize,
PVRSRV_QUEUE_INFO **ppsQueueInfo);
IMG_IMPORT
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapsKM(IMG_HANDLE hDevCookie,
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_HEAP_INFO_KM *psHeapInfo);
-#else
PVRSRV_HEAP_INFO *psHeapInfo);
-#endif
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDeviceMemContextKM(IMG_HANDLE hDevCookie,
PVRSRV_PER_PROCESS_DATA *psPerProc,
IMG_HANDLE *phDevMemContext,
IMG_UINT32 *pui32ClientHeapCount,
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_HEAP_INFO_KM *psHeapInfo,
-#else
PVRSRV_HEAP_INFO *psHeapInfo,
-#endif
IMG_BOOL *pbCreated,
IMG_BOOL *pbShared);
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfoKM(IMG_HANDLE hDevCookie,
IMG_HANDLE hDevMemContext,
IMG_UINT32 *pui32ClientHeapCount,
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_HEAP_INFO_KM *psHeapInfo,
-#else
PVRSRV_HEAP_INFO *psHeapInfo,
-#endif
IMG_BOOL *pbShared
);
IMG_IMPORT
PVRSRV_ERROR PVRSRVMapIonHandleKM(PVRSRV_PER_PROCESS_DATA *psPerProc,
IMG_HANDLE hDevCookie,
- IMG_HANDLE hDevMemContext,
- IMG_HANDLE hIon,
+ IMG_HANDLE hDevMemHeap,
+ IMG_UINT32 ui32NumFDs,
+ IMG_INT32 *pai32BufferFDs,
IMG_UINT32 ui32Flags,
- IMG_UINT32 ui32Size,
- PVRSRV_KERNEL_MEM_INFO **ppsKernelMemInfo);
+ IMG_UINT32 ui32ChunkCount,
+ IMG_SIZE_T *pauiOffset,
+ IMG_SIZE_T *pauiSize,
+ IMG_SIZE_T *puiIonBufferSize,
+ PVRSRV_KERNEL_MEM_INFO **ppsKernelMemInfo,
+ IMG_UINT64 *pui64Stamp);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVUnmapIonHandleKM(PVRSRV_KERNEL_MEM_INFO *psMemInfo);
PVRSRV_KERNEL_SYNC_INFO **ppsSyncInfos,
IMG_UINT32 ui32NumMemSyncInfos,
IMG_PVOID pvPrivData,
- IMG_UINT32 ui32PrivDataLength);
+ IMG_UINT32 ui32PrivDataLength,
+ IMG_HANDLE *phFence);
IMG_IMPORT
PVRSRV_ERROR PVRSRVSwapToDCSystemKM(IMG_HANDLE hDeviceKM,
IMG_HANDLE hSwapChain);
IMG_VOID IMG_CALLCONV PVRSRVReleaseSyncInfoKM(PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo);
IMG_IMPORT
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO_KM *psMiscInfo);
-#else
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo);
-#endif
/*!
* *****************************************************************************
@return PVRSRV_OK, or error code.
***************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRPMapKMem(IMG_HANDLE hModule, IMG_VOID **ppvLinAddr, IMG_VOID *pvLinAddrKM, IMG_SID *phMappingInfo, IMG_SID hMHandle);
-#else
PVRSRV_ERROR PVRPMapKMem(IMG_HANDLE hModule, IMG_VOID **ppvLinAddr, IMG_VOID *pvLinAddrKM, IMG_HANDLE *phMappingInfo, IMG_HANDLE hMHandle);
-#endif
/*!
@return IMG_BOOL indicating success or otherwise.
***************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-IMG_BOOL PVRUnMapKMem(IMG_HANDLE hModule, IMG_SID hMappingInfo, IMG_SID hMHandle);
-#else
IMG_BOOL PVRUnMapKMem(IMG_HANDLE hModule, IMG_HANDLE hMappingInfo, IMG_HANDLE hMHandle);
-#endif
#endif /* _PVRMMAP_H_ */
/* ptr to associated kernel sync info - NULL if no sync */
struct _PVRSRV_KERNEL_SYNC_INFO_ *psKernelSyncInfo;
+ IMG_HANDLE hIonSyncInfo;
+
PVRSRV_MEMTYPE memType;
/*
allocated on back of this structure, i.e. is resident in Q */
PFN_QUEUE_COMMAND_COMPLETE pfnCommandComplete; /*!< Command complete callback */
IMG_HANDLE hCallbackData; /*!< Command complete callback data */
+
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ IMG_VOID *pvCleanupFence; /*!< Sync fence to 'put' after timeline inc() */
+ IMG_VOID *pvTimeline; /*!< Android sync timeline to inc() */
+#endif
}PVRSRV_COMMAND, *PPVRSRV_COMMAND;
IMG_VOID *pvLinQueueUM; /*!< Pointer to the command buffer in the user's
address space */
- volatile IMG_SIZE_T ui32ReadOffset; /*!< Index into the buffer at which commands are being
+ volatile IMG_SIZE_T uReadOffset; /*!< Index into the buffer at which commands are being
consumed */
- volatile IMG_SIZE_T ui32WriteOffset; /*!< Index into the buffer at which commands are being
+ volatile IMG_SIZE_T uWriteOffset; /*!< Index into the buffer at which commands are being
added */
IMG_UINT32 *pui32KickerAddrKM; /*!< kicker address in the kernel's
IMG_UINT32 *pui32KickerAddrUM; /*!< kicker address in the user's
address space */
- IMG_SIZE_T ui32QueueSize; /*!< Size in bytes of the buffer - excluding the safety allocation */
+ IMG_SIZE_T uQueueSize; /*!< Size in bytes of the buffer - excluding the safety allocation */
IMG_UINT32 ui32ProcessID; /*!< Process ID required by resource locking */
IMG_HANDLE hMemBlock[2];
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ IMG_UINT32 ui32FenceValue; /*!< 'Target' timeline value when fence signals */
+ IMG_VOID *pvTimeline; /*!< Android struct sync_timeline object */
+#endif
+
struct _PVRSRV_QUEUE_INFO_ *psNextKM; /*!< The next queue in the system */
}PVRSRV_QUEUE_INFO;
*/
typedef struct PVRSRV_CLIENT_DEVICECLASS_INFO_TAG
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDeviceKM;
-#else
IMG_HANDLE hDeviceKM;
-#endif
IMG_HANDLE hServices;
} PVRSRV_CLIENT_DEVICECLASS_INFO;
IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV
PVRSRVAllocSharedSysMem(const PVRSRV_CONNECTION *psConnection,
IMG_UINT32 ui32Flags,
- IMG_SIZE_T ui32Size,
+ IMG_SIZE_T uSize,
PVRSRV_CLIENT_MEM_INFO **ppsClientMemInfo);
/*!
********************************************************************************/
IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV
PVRSRVMapMemInfoMem(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo,
-#else
IMG_HANDLE hKernelMemInfo,
-#endif
PVRSRV_CLIENT_MEM_INFO **ppsClientMemInfo);
#if !defined(__SGX_BRIDGE_H__)
#define __SGX_BRIDGE_H__
-#if defined (SUPPORT_SID_INTERFACE)
-#include "sgxapi.h"
-#else
#include "sgxapi_km.h"
-#endif
#include "sgxinfo.h"
#include "pvr_bridge.h"
typedef struct PVRSRV_BRIDGE_IN_SGX_SET_TRANSFER_CONTEXT_PRIORITY_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
- #if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hHWTransferContext;
- #else
IMG_HANDLE hDevCookie;
IMG_HANDLE hHWTransferContext;
- #endif
IMG_UINT32 ui32Priority;
IMG_UINT32 ui32OffsetOfPriorityField;
}PVRSRV_BRIDGE_IN_SGX_SET_TRANSFER_CONTEXT_PRIORITY;
typedef struct PVRSRV_BRIDGE_IN_SGX_SET_RENDER_CONTEXT_PRIORITY_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hHWRenderContext;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hHWRenderContext;
-#endif
IMG_UINT32 ui32Priority;
IMG_UINT32 ui32OffsetOfPriorityField;
}PVRSRV_BRIDGE_IN_SGX_SET_RENDER_CONTEXT_PRIORITY;
typedef struct PVRSRV_BRIDGE_IN_GETCLIENTINFO_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
}PVRSRV_BRIDGE_IN_GETCLIENTINFO;
/*!
typedef struct PVRSRV_BRIDGE_IN_GETINTERNALDEVINFO_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
}PVRSRV_BRIDGE_IN_GETINTERNALDEVINFO;
/*!
typedef struct PVRSRV_BRIDGE_IN_RELEASECLIENTINFO_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
SGX_CLIENT_INFO sClientInfo;
}PVRSRV_BRIDGE_IN_RELEASECLIENTINFO;
typedef struct PVRSRV_BRIDGE_IN_ISPBREAKPOLL_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
}PVRSRV_BRIDGE_IN_ISPBREAKPOLL;
/*!
typedef struct PVRSRV_BRIDGE_IN_DOKICK_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
SGX_CCB_KICK sCCBKick;
}PVRSRV_BRIDGE_IN_DOKICK;
typedef struct PVRSRV_BRIDGE_IN_SGX_SCHEDULE_PROCESS_QUEUES_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
}PVRSRV_BRIDGE_IN_SGX_SCHEDULE_PROCESS_QUEUES;
typedef struct PVRSRV_BRIDGE_IN_SUBMITTRANSFER_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
PVRSRV_TRANSFER_SGX_KICK sKick;
}PVRSRV_BRIDGE_IN_SUBMITTRANSFER;
typedef struct PVRSRV_BRIDGE_IN_SUBMIT2D_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
PVRSRV_2D_SGX_KICK sKick;
} PVRSRV_BRIDGE_IN_SUBMIT2D;
#endif
typedef struct PVRSRV_BRIDGE_IN_READREGDWORD_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_PCHAR pszKey;
IMG_PCHAR pszValue;
}PVRSRV_BRIDGE_IN_READREGDWORD;
typedef struct PVRSRV_BRIDGE_IN_SGXGETMISCINFO_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
SGX_MISC_INFO *psMiscInfo;
}PVRSRV_BRIDGE_IN_SGXGETMISCINFO;
typedef struct PVRSRV_BRIDGE_IN_SGXINFO_FOR_SRVINIT_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
}PVRSRV_BRIDGE_IN_SGXINFO_FOR_SRVINIT;
/*!
typedef struct PVRSRV_BRIDGE_IN_SGXDEVINITPART2_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
SGX_BRIDGE_INIT_INFO sInitInfo;
}PVRSRV_BRIDGE_IN_SGXDEVINITPART2;
typedef struct PVRSRV_BRIDGE_IN_2DQUERYBLTSCOMPLETE_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hKernSyncInfo;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hKernSyncInfo;
-#endif
IMG_BOOL bWaitForComplete;
}PVRSRV_BRIDGE_IN_2DQUERYBLTSCOMPLETE;
typedef struct PVRSRV_BRIDGE_IN_SGXFINDSHAREDPBDESC_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_BOOL bLockOnFailure;
IMG_UINT32 ui32TotalPBSize;
}PVRSRV_BRIDGE_IN_SGXFINDSHAREDPBDESC;
typedef struct PVRSRV_BRIDGE_OUT_SGXFINDSHAREDPBDESC_TAG
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
- IMG_SID hSharedPBDesc;
- IMG_SID hSharedPBDescKernelMemInfoHandle;
- IMG_SID hHWPBDescKernelMemInfoHandle;
- IMG_SID hBlockKernelMemInfoHandle;
- IMG_SID hHWBlockKernelMemInfoHandle;
- IMG_SID ahSharedPBDescSubKernelMemInfoHandles[PVRSRV_BRIDGE_SGX_SHAREDPBDESC_MAX_SUBMEMINFOS];
-#else
IMG_HANDLE hKernelMemInfo;
IMG_HANDLE hSharedPBDesc;
IMG_HANDLE hSharedPBDescKernelMemInfoHandle;
IMG_HANDLE hBlockKernelMemInfoHandle;
IMG_HANDLE hHWBlockKernelMemInfoHandle;
IMG_HANDLE ahSharedPBDescSubKernelMemInfoHandles[PVRSRV_BRIDGE_SGX_SHAREDPBDESC_MAX_SUBMEMINFOS];
-#endif
IMG_UINT32 ui32SharedPBDescSubKernelMemInfoHandlesCount;
PVRSRV_ERROR eError;
}PVRSRV_BRIDGE_OUT_SGXFINDSHAREDPBDESC;
typedef struct PVRSRV_BRIDGE_IN_SGXUNREFSHAREDPBDESC_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSharedPBDesc;
-#else
IMG_HANDLE hSharedPBDesc;
-#endif
}PVRSRV_BRIDGE_IN_SGXUNREFSHAREDPBDESC;
typedef struct PVRSRV_BRIDGE_OUT_SGXUNREFSHAREDPBDESC_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
IMG_UINT32 ui32TotalPBSize;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hSharedPBDescKernelMemInfo;
- IMG_SID hHWPBDescKernelMemInfo;
- IMG_SID hBlockKernelMemInfo;
- IMG_SID hHWBlockKernelMemInfo;
- IMG_SID *phKernelMemInfoHandles;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hSharedPBDescKernelMemInfo;
IMG_HANDLE hHWPBDescKernelMemInfo;
IMG_HANDLE hBlockKernelMemInfo;
IMG_HANDLE hHWBlockKernelMemInfo;
IMG_HANDLE *phKernelMemInfoHandles;
-#endif
IMG_UINT32 ui32KernelMemInfoHandlesCount;
IMG_DEV_VIRTADDR sHWPBDescDevVAddr;
}PVRSRV_BRIDGE_IN_SGXADDSHAREDPBDESC;
typedef struct PVRSRV_BRIDGE_OUT_SGXADDSHAREDPBDESC_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSharedPBDesc;
-#else
IMG_HANDLE hSharedPBDesc;
-#endif
}PVRSRV_BRIDGE_OUT_SGXADDSHAREDPBDESC;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_3D_SIGNATURE_REGISTERS_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hDevMemContext;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hDevMemContext;
-#endif
IMG_UINT32 ui32DumpFrameNum;
IMG_BOOL bLastFrame;
IMG_UINT32 *pui32Registers;
typedef struct PVRSRV_BRIDGE_IN_PDUMPCOUNTER_REGISTERS_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_UINT32 ui32DumpFrameNum;
IMG_BOOL bLastFrame;
IMG_UINT32 *pui32Registers;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_TA_SIGNATURE_REGISTERS_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_UINT32 ui32DumpFrameNum;
IMG_UINT32 ui32TAKickCount;
IMG_BOOL bLastFrame;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_HWPERFCB_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hDevMemContext;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hDevMemContext;
-#endif
IMG_CHAR szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
IMG_UINT32 ui32FileOffset;
IMG_UINT32 ui32PDumpFlags;
typedef struct PVRSRV_BRIDGE_IN_PDUMP_SAVEMEM
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hDevMemContext;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_CHAR szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
IMG_UINT32 ui32FileOffset;
IMG_DEV_VIRTADDR sDevVAddr;
IMG_UINT32 ui32Size;
-#if !defined (SUPPORT_SID_INTERFACE)
IMG_HANDLE hDevMemContext;
-#endif
IMG_UINT32 ui32PDumpFlags;
}PVRSRV_BRIDGE_IN_PDUMP_SAVEMEM;
typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_RENDER_CONTEXT_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_CPU_VIRTADDR pHWRenderContextCpuVAddr;
IMG_UINT32 ui32HWRenderContextSize;
IMG_UINT32 ui32OffsetToPDDevPAddr;
typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHWRenderContext;
-#else
IMG_HANDLE hHWRenderContext;
-#endif
IMG_DEV_VIRTADDR sHWRenderContextDevVAddr;
}PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT;
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
IMG_BOOL bForceCleanup;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hHWRenderContext;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hHWRenderContext;
-#endif
}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT;
typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_CPU_VIRTADDR pHWTransferContextCpuVAddr;
IMG_UINT32 ui32HWTransferContextSize;
IMG_UINT32 ui32OffsetToPDDevPAddr;
typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHWTransferContext;
-#else
IMG_HANDLE hHWTransferContext;
-#endif
IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
}PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT;
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
IMG_BOOL bForceCleanup;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hHWTransferContext;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hHWTransferContext;
-#endif
}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT;
typedef struct PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_DEV_VIRTADDR sHWRTDataSetDevVAddr;
}PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET;
typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_CPU_VIRTADDR pHW2DContextCpuVAddr;
IMG_UINT32 ui32HW2DContextSize;
IMG_UINT32 ui32OffsetToPDDevPAddr;
typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT_TAG
{
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHW2DContext;
-#else
IMG_HANDLE hHW2DContext;
-#endif
IMG_DEV_VIRTADDR sHW2DContextDevVAddr;
}PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT;
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
IMG_BOOL bForceCleanup;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
- IMG_SID hHW2DContext;
-#else
IMG_HANDLE hDevCookie;
IMG_HANDLE hHW2DContext;
-#endif
}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT;
#define SGX2D_MAX_BLT_CMD_SIZ 256 /* Maximum size of a blit command, in bytes */
typedef struct PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_CB_TAG
{
IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie;
-#else
IMG_HANDLE hDevCookie;
-#endif
IMG_UINT32 ui32ArraySize;
PVRSRV_SGX_HWPERF_CB_ENTRY *psHWPerfCBData;
} PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_CB;
IMG_UINT32 ui32PerfGroup; /*!< Specifies the HW's active group */
#endif /* SGX_FEATURE_EXTENDED_PERF_COUNTERS */
-#if defined(FIX_HW_BRN_31939)
- IMG_UINT32 ui32BRN31939Mem;
-#endif
-
IMG_UINT32 ui32OpenCLDelayCount; /* Counter to keep track OpenCL task completion time in units of regular task time out events */
+ IMG_UINT32 ui32InterruptCount;
} SGXMKIF_HOST_CTL;
/*
/* need to be able to check reads and writes on 2D ops, and update writes */
PVRSRV_DEVICE_SYNC_OBJECT s3DSyncData;
+
+ IMG_UINT32 ui32NumStatusVals;
+ CTL_STATUS sCtlStatusInfo[SGXTQ_MAX_STATUS];
} SGXMKIF_2DCMD_SHARED, *PSGXMKIF_2DCMD_SHARED;
#endif /* SGX_FEATURE_2D_HARDWARE */
MKTC_ST(MKTC_KICKTA_FREECONTEXT)
#define MKTC_KICKTA_PIM_PATCHING 0xAD00080C
MKTC_ST(MKTC_KICKTA_PIM_PATCHING)
+#define MKTC_KICKTA_TPC_CHECK_START 0xAD00080D
+MKTC_ST(MKTC_KICKTA_TPC_CHECK_START)
+#define MKTC_KICKTA_TPC_CHECK_END 0xAD00080E
+MKTC_ST(MKTC_KICKTA_TPC_CHECK_END)
+#define MKTC_KICKTA_TPC_CHECK_CORE 0xAD00080F
+MKTC_ST(MKTC_KICKTA_TPC_CHECK_CORE)
+#define MKTC_KICKTA_TPC_CHECK_FAIL 0xAD000810
+MKTC_ST(MKTC_KICKTA_TPC_CHECK_FAIL)
#define MKTC_KICKTA_CHKPT_START_DUMMY_CS 0xAD0008A1
MKTC_ST(MKTC_KICKTA_CHKPT_START_DUMMY_CS)
#define MKTC_TAFINISHED_TERM_COMPLETE_END 0xAD001711
MKTC_ST(MKTC_TAFINISHED_TERM_COMPLETE_END)
-#define MKTC_TAFINISHED_DPMPAGERECYCLING 0xAD001720
+#define MKTC_TAFINISHED_DPMPAGERECYCLING 0xAD001720
MKTC_ST(MKTC_TAFINISHED_DPMPAGERECYCLING)
#define MKTC_2DEVENT_2DCOMPLETE 0xAD001800
MKTC_ST(MKTC_FTD_3DOPSBLOCKED)
#define MKTC_FTD_DSTREADOPS2BLOCKED 0xAD001818
MKTC_ST(MKTC_FTD_DSTREADOPS2BLOCKED)
+#define MKTC_U2DSO_UPDATESTATUSVALS 0xAD001819
+MKTC_ST(MKTC_U2DSO_UPDATESTATUSVALS)
+#define MKTC_U2DSO_UPDATESTATUSVALS_DONE 0xAD00181A
+MKTC_ST(MKTC_U2DSO_UPDATESTATUSVALS_DONE)
#define MKTC_FCM_START 0xAD001900
MKTC_ST(MKTC_FCM_START)
#define MKTC_FCM_END 0xAD001901
MKTC_ST(MKTC_FCM_END)
+#define MKTC_FCM_PB_SAME 0xAD001902
+MKTC_ST(MKTC_FCM_PB_SAME)
+#define MKTC_FCM_TQ_IN_PROGESS 0xAD001903
+MKTC_ST(MKTC_FCM_TQ_IN_PROGESS)
+#define MKTC_FCM_TQ_MEMCONTEXT_DIFFERENT 0xAD001904
+MKTC_ST(MKTC_FCM_TQ_MEMCONTEXT_DIFFERENT)
#define MKTC_TIMER_ACTIVE_POWER 0xAD001A00
MKTC_ST(MKTC_TIMER_ACTIVE_POWER)
#include "sgxscript.h"
#include "servicesint.h"
#include "services.h"
-#if !defined (SUPPORT_SID_INTERFACE)
#include "sgxapi_km.h"
-#endif
#include "sgx_mkif_km.h"
typedef struct _SGX_BRIDGE_INIT_INFO_
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelCCBMemInfo;
- IMG_SID hKernelCCBCtlMemInfo;
- IMG_SID hKernelCCBEventKickerMemInfo;
- IMG_SID hKernelSGXHostCtlMemInfo;
- IMG_SID hKernelSGXTA3DCtlMemInfo;
-#if defined(FIX_HW_BRN_31272) || defined(FIX_HW_BRN_31780) || defined(FIX_HW_BRN_33920)
- IMG_SID hKernelSGXPTLAWriteBackMemInfo;
-#endif
- IMG_SID hKernelSGXMiscMemInfo;
-#else
IMG_HANDLE hKernelCCBMemInfo;
IMG_HANDLE hKernelCCBCtlMemInfo;
IMG_HANDLE hKernelCCBEventKickerMemInfo;
IMG_HANDLE hKernelSGXPTLAWriteBackMemInfo;
#endif
IMG_HANDLE hKernelSGXMiscMemInfo;
-#endif
IMG_UINT32 aui32HostKickAddr[SGXMKIF_CMD_MAX];
SGX_MISCINFO_STRUCT_SIZES sSGXStructSizes;
#if defined(SGX_SUPPORT_HWPROFILING)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelHWProfilingMemInfo;
-#else
IMG_HANDLE hKernelHWProfilingMemInfo;
#endif
-#endif
#if defined(SUPPORT_SGX_HWPERF)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelHWPerfCBMemInfo;
-#else
IMG_HANDLE hKernelHWPerfCBMemInfo;
#endif
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelTASigBufferMemInfo;
- IMG_SID hKernel3DSigBufferMemInfo;
-#else
IMG_HANDLE hKernelTASigBufferMemInfo;
IMG_HANDLE hKernel3DSigBufferMemInfo;
-#endif
-#if defined(FIX_HW_BRN_29702)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelCFIMemInfo;
-#else
- IMG_HANDLE hKernelCFIMemInfo;
-#endif
-#endif
-#if defined(FIX_HW_BRN_29823)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelDummyTermStreamMemInfo;
-#else
- IMG_HANDLE hKernelDummyTermStreamMemInfo;
-#endif
-#endif
#if defined(FIX_HW_BRN_31542) || defined(FIX_HW_BRN_36513)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelClearClipWAVDMStreamMemInfo;
- IMG_SID hKernelClearClipWAIndexStreamMemInfo;
- IMG_SID hKernelClearClipWAPDSMemInfo;
- IMG_SID hKernelClearClipWAUSEMemInfo;
- IMG_SID hKernelClearClipWAParamMemInfo;
- IMG_SID hKernelClearClipWAPMPTMemInfo;
- IMG_SID hKernelClearClipWATPCMemInfo;
- IMG_SID hKernelClearClipWAPSGRgnHdrMemInfo;
-#else
IMG_HANDLE hKernelClearClipWAVDMStreamMemInfo;
IMG_HANDLE hKernelClearClipWAIndexStreamMemInfo;
IMG_HANDLE hKernelClearClipWAPDSMemInfo;
IMG_HANDLE hKernelClearClipWATPCMemInfo;
IMG_HANDLE hKernelClearClipWAPSGRgnHdrMemInfo;
#endif
-#endif
-#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31559)
- IMG_HANDLE hKernelVDMSnapShotBufferMemInfo;
- IMG_HANDLE hKernelVDMCtrlStreamBufferMemInfo;
-#endif
#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && \
defined(FIX_HW_BRN_33657) && defined(SUPPORT_SECURE_33657_FIX)
IMG_HANDLE hKernelVDMStateUpdateBufferMemInfo;
#endif
#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelEDMStatusBufferMemInfo;
-#else
IMG_HANDLE hKernelEDMStatusBufferMemInfo;
-#endif
#endif
IMG_UINT32 ui32EDMTaskReg0;
IMG_UINT32 ui32CacheControl;
IMG_UINT32 asInitDevData[SGX_MAX_DEV_DATA];
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID asInitMemHandles[SGX_MAX_INIT_MEM_HANDLES];
-#else
IMG_HANDLE asInitMemHandles[SGX_MAX_INIT_MEM_HANDLES];
-#endif
} SGX_BRIDGE_INIT_INFO;
{
PSGXMKIF_HWDEVICE_SYNC_LIST psHWDeviceSyncList;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelHWSyncListMemInfo;
-#else
IMG_HANDLE hKernelHWSyncListMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO *psHWDeviceSyncListClientMemInfo;
PVRSRV_CLIENT_MEM_INFO *psAccessResourceClientMemInfo;
/* Must be the last variable in the structure */
IMG_UINT32 ui32NumSyncObjects;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahSyncHandles[1];
-#else
IMG_HANDLE ahSyncHandles[1];
-#endif
} SGX_DEVICE_SYNC_LIST, *PSGX_DEVICE_SYNC_LIST;
typedef struct _SGX_INTERNEL_STATUS_UPDATE_
{
CTL_STATUS sCtlStatus;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
IMG_HANDLE hKernelMemInfo;
-#endif
} SGX_INTERNEL_STATUS_UPDATE;
typedef struct _SGX_CCB_KICK_
{
SGXMKIF_COMMAND sCommand;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hCCBKernelMemInfo;
-#else
IMG_HANDLE hCCBKernelMemInfo;
-#endif
IMG_UINT32 ui32NumDstSyncObjects;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelHWSyncListMemInfo;
-#else
IMG_HANDLE hKernelHWSyncListMemInfo;
-#endif
/* DST syncs */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *pahDstSyncHandles;
-#else
IMG_HANDLE *pahDstSyncHandles;
-#endif
IMG_UINT32 ui32NumTAStatusVals;
IMG_UINT32 ui32Num3DStatusVals;
#if defined(SUPPORT_SGX_NEW_STATUS_VALS)
SGX_INTERNEL_STATUS_UPDATE asTAStatusUpdate[SGX_MAX_TA_STATUS_VALS];
SGX_INTERNEL_STATUS_UPDATE as3DStatusUpdate[SGX_MAX_3D_STATUS_VALS];
-#else
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
- IMG_SID ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
#else
IMG_HANDLE ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
IMG_HANDLE ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
-#endif
#endif
IMG_BOOL bFirstKickOrResume;
#if defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS)
/* SRC and DST syncs */
IMG_UINT32 ui32NumTASrcSyncs;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahTASrcKernelSyncInfo[SGX_MAX_TA_SRC_SYNCS];
-#else
IMG_HANDLE ahTASrcKernelSyncInfo[SGX_MAX_TA_SRC_SYNCS];
-#endif
IMG_UINT32 ui32NumTADstSyncs;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahTADstKernelSyncInfo[SGX_MAX_TA_DST_SYNCS];
-#else
IMG_HANDLE ahTADstKernelSyncInfo[SGX_MAX_TA_DST_SYNCS];
-#endif
IMG_UINT32 ui32Num3DSrcSyncs;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ah3DSrcKernelSyncInfo[SGX_MAX_3D_SRC_SYNCS];
-#else
IMG_HANDLE ah3DSrcKernelSyncInfo[SGX_MAX_3D_SRC_SYNCS];
-#endif
#else
/* SRC syncs */
IMG_UINT32 ui32NumSrcSyncs;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS_TA];
-#else
IMG_HANDLE ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS_TA];
-#endif
#endif
/* TA/3D dependency data */
IMG_BOOL bTADependency;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hTA3DSyncInfo;
-
- IMG_SID hTASyncInfo;
- IMG_SID h3DSyncInfo;
-#else
IMG_HANDLE hTA3DSyncInfo;
IMG_HANDLE hTASyncInfo;
IMG_HANDLE h3DSyncInfo;
-#endif
#if defined(PDUMP)
IMG_UINT32 ui32CCBDumpWOff;
#endif
typedef struct _SGX_INTERNAL_DEVINFO_
{
IMG_UINT32 ui32Flags;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHostCtlKernelMemInfoHandle;
-#else
IMG_HANDLE hHostCtlKernelMemInfoHandle;
-#endif
IMG_BOOL bForcePTOff;
} SGX_INTERNAL_DEVINFO;
#if defined(TRANSFER_QUEUE)
typedef struct _PVRSRV_TRANSFER_SGX_KICK_
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hCCBMemInfo;
-#else
IMG_HANDLE hCCBMemInfo;
-#endif
IMG_UINT32 ui32SharedCmdCCBOffset;
IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hTASyncInfo;
- IMG_SID h3DSyncInfo;
-#else
IMG_HANDLE hTASyncInfo;
IMG_HANDLE h3DSyncInfo;
-#endif
IMG_UINT32 ui32NumSrcSync;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
-#else
IMG_HANDLE ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
-#endif
IMG_UINT32 ui32NumDstSync;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
-#else
IMG_HANDLE ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
-#endif
IMG_UINT32 ui32Flags;
IMG_UINT32 ui32CCBDumpWOff;
#endif
IMG_HANDLE hDevMemContext;
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ /* Android >JB MR1 doesn't use ahSrcSyncInfo for synchronization */
+ IMG_INT iFenceFd;
+#endif
} PVRSRV_TRANSFER_SGX_KICK, *PPVRSRV_TRANSFER_SGX_KICK;
#if defined(SGX_FEATURE_2D_HARDWARE)
typedef struct _PVRSRV_2D_SGX_KICK_
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hCCBMemInfo;
-#else
IMG_HANDLE hCCBMemInfo;
-#endif
IMG_UINT32 ui32SharedCmdCCBOffset;
IMG_DEV_VIRTADDR sHW2DContextDevVAddr;
IMG_UINT32 ui32NumSrcSync;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
-
- /* need to be able to check reads and writes on dest, and update writes */
- IMG_SID hDstSyncInfo;
-
- /* need to be able to check reads and writes on TA ops, and update writes */
- IMG_SID hTASyncInfo;
-
- /* need to be able to check reads and writes on 2D ops, and update writes */
- IMG_SID h3DSyncInfo;
-#else
IMG_HANDLE ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
/* need to be able to check reads and writes on dest, and update writes */
/* need to be able to check reads and writes on 2D ops, and update writes */
IMG_HANDLE h3DSyncInfo;
-#endif
IMG_UINT32 ui32PDumpFlags;
#if defined(PDUMP)
IMG_UINT32 ui32CCBDumpWOff;
#endif
IMG_HANDLE hDevMemContext;
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ /* Android >JB MR1 doesn't use ahSrcSyncInfo for synchronization */
+ IMG_INT iFenceFd;
+#endif
} PVRSRV_2D_SGX_KICK, *PPVRSRV_2D_SGX_KICK;
#endif /* defined(SGX_FEATURE_2D_HARDWARE) */
#endif /* defined(TRANSFER_QUEUE) */
#endif
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+#include <linux/file.h>
+#include <linux/sync.h>
+#endif
+
#include "srvkm.h"
/* FIXME: we should include an OS specific header here to allow configuration of
PVRSRV_BRIDGE_GLOBAL_STATS g_BridgeGlobalStats;
#endif
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
static IMG_BOOL abSharedDeviceMemHeap[PVRSRV_MAX_CLIENT_HEAPS];
static IMG_BOOL *pbSharedDeviceMemHeap = abSharedDeviceMemHeap;
#else
IMG_HANDLE hDevMemContextInt;
IMG_UINT32 i;
IMG_BOOL bCreated;
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_HEAP_INFO_KM asHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CREATE_DEVMEMCONTEXT);
psPerProc,
&hDevMemContextInt,
&psCreateDevMemContextOUT->ui32ClientHeapCount,
-#if defined (SUPPORT_SID_INTERFACE)
- &asHeapInfo[0],
-#else
&psCreateDevMemContextOUT->sHeapInfo[0],
-#endif
&bCreated,
pbSharedDeviceMemHeap);
for(i = 0; i < psCreateDevMemContextOUT->ui32ClientHeapCount; i++)
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeapExt;
-#else
IMG_HANDLE hDevMemHeapExt;
-#endif
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
if(abSharedDeviceMemHeap[i])
#endif
{
* driver, hence, we use shared handles for these
* heaps.
*/
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRVAllocHandleNR(psPerProc->psHandleBase,
- &hDevMemHeapExt,
- asHeapInfo[i].hDevMemHeap,
- PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
- PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
-#else
PVRSRVAllocHandleNR(psPerProc->psHandleBase, &hDevMemHeapExt,
psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap,
PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
-#endif
}
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
else
{
/*
*/
if(bCreated)
{
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &hDevMemHeapExt,
- asHeapInfo[i].hDevMemHeap,
- PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
- PVRSRV_HANDLE_ALLOC_FLAG_NONE,
- psCreateDevMemContextOUT->hDevMemContext);
-#else
PVRSRVAllocSubHandleNR(psPerProc->psHandleBase, &hDevMemHeapExt,
psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap,
PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
PVRSRV_HANDLE_ALLOC_FLAG_NONE,
psCreateDevMemContextOUT->hDevMemContext);
-#endif
}
else
{
psCreateDevMemContextOUT->eError =
PVRSRVFindHandle(psPerProc->psHandleBase,
&hDevMemHeapExt,
-#if defined (SUPPORT_SID_INTERFACE)
- asHeapInfo[i].hDevMemHeap,
-#else
psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap,
-#endif
PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
if(psCreateDevMemContextOUT->eError != PVRSRV_OK)
{
}
#endif
psCreateDevMemContextOUT->sHeapInfo[i].hDevMemHeap = hDevMemHeapExt;
-#if defined (SUPPORT_SID_INTERFACE)
- psCreateDevMemContextOUT->sHeapInfo[i].ui32HeapID = asHeapInfo[i].ui32HeapID;
- psCreateDevMemContextOUT->sHeapInfo[i].sDevVAddrBase = asHeapInfo[i].sDevVAddrBase;
- psCreateDevMemContextOUT->sHeapInfo[i].ui32HeapByteSize = asHeapInfo[i].ui32HeapByteSize;
- psCreateDevMemContextOUT->sHeapInfo[i].ui32Attribs = asHeapInfo[i].ui32Attribs;
- psCreateDevMemContextOUT->sHeapInfo[i].ui32XTileStride = asHeapInfo[i].ui32XTileStride;
-#endif
}
COMMIT_HANDLE_BATCH_OR_ERROR(psCreateDevMemContextOUT->eError, psPerProc)
IMG_HANDLE hDevCookieInt;
IMG_HANDLE hDevMemContextInt;
IMG_UINT32 i;
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_HEAP_INFO_KM asHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_DEVMEM_HEAPINFO);
PVRSRVGetDeviceMemHeapInfoKM(hDevCookieInt,
hDevMemContextInt,
&psGetDevMemHeapInfoOUT->ui32ClientHeapCount,
-#if defined (SUPPORT_SID_INTERFACE)
- &asHeapInfo[0],
-#else
&psGetDevMemHeapInfoOUT->sHeapInfo[0],
-#endif
pbSharedDeviceMemHeap);
if(psGetDevMemHeapInfoOUT->eError != PVRSRV_OK)
for(i = 0; i < psGetDevMemHeapInfoOUT->ui32ClientHeapCount; i++)
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeapExt;
-#else
IMG_HANDLE hDevMemHeapExt;
-#endif
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
if(abSharedDeviceMemHeap[i])
#endif
{
* driver, hence, we use shared handles for these
* heaps.
*/
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRVAllocHandleNR(psPerProc->psHandleBase,
- &hDevMemHeapExt,
- asHeapInfo[i].hDevMemHeap,
- PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
- PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
-#else
PVRSRVAllocHandleNR(psPerProc->psHandleBase, &hDevMemHeapExt,
psGetDevMemHeapInfoOUT->sHeapInfo[i].hDevMemHeap,
PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
-#endif
}
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
else
{
/*
psGetDevMemHeapInfoOUT->eError =
PVRSRVFindHandle(psPerProc->psHandleBase,
&hDevMemHeapExt,
-#if defined (SUPPORT_SID_INTERFACE)
- asHeapInfo[i].hDevMemHeap,
-#else
psGetDevMemHeapInfoOUT->sHeapInfo[i].hDevMemHeap,
-#endif
PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
if(psGetDevMemHeapInfoOUT->eError != PVRSRV_OK)
{
}
#endif
psGetDevMemHeapInfoOUT->sHeapInfo[i].hDevMemHeap = hDevMemHeapExt;
-#if defined (SUPPORT_SID_INTERFACE)
- psGetDevMemHeapInfoOUT->sHeapInfo[i].ui32HeapID = asHeapInfo[i].ui32HeapID;
- psGetDevMemHeapInfoOUT->sHeapInfo[i].sDevVAddrBase = asHeapInfo[i].sDevVAddrBase;
- psGetDevMemHeapInfoOUT->sHeapInfo[i].ui32HeapByteSize = asHeapInfo[i].ui32HeapByteSize;
- psGetDevMemHeapInfoOUT->sHeapInfo[i].ui32Attribs = asHeapInfo[i].ui32Attribs;
- psGetDevMemHeapInfoOUT->sHeapInfo[i].ui32XTileStride = asHeapInfo[i].ui32XTileStride;
-#endif
}
COMMIT_HANDLE_BATCH_OR_ERROR(psGetDevMemHeapInfoOUT->eError, psPerProc)
psPerProc,
hDevMemHeapInt,
psAllocDeviceMemIN->ui32Attribs,
- psAllocDeviceMemIN->ui32Size,
- psAllocDeviceMemIN->ui32Alignment,
+ psAllocDeviceMemIN->uSize,
+ psAllocDeviceMemIN->uAlignment,
psAllocDeviceMemIN->pvPrivData,
psAllocDeviceMemIN->ui32PrivDataLength,
psAllocDeviceMemIN->ui32ChunkSize,
psMemInfo->sShareMemWorkaround.ui32ShareIndex = ui32ShareIndex;
psMemInfo->sShareMemWorkaround.hDevCookieInt = hDevCookieInt;
psMemInfo->sShareMemWorkaround.ui32OrigReqAttribs = psAllocDeviceMemIN->ui32Attribs;
- psMemInfo->sShareMemWorkaround.ui32OrigReqSize = (IMG_UINT32)psAllocDeviceMemIN->ui32Size;
- psMemInfo->sShareMemWorkaround.ui32OrigReqAlignment = (IMG_UINT32)psAllocDeviceMemIN->ui32Alignment;
+ psMemInfo->sShareMemWorkaround.ui32OrigReqSize = (IMG_UINT32)psAllocDeviceMemIN->uSize;
+ psMemInfo->sShareMemWorkaround.ui32OrigReqAlignment = (IMG_UINT32)psAllocDeviceMemIN->uAlignment;
}
OSMemSet(&psAllocDeviceMemOUT->sClientMemInfo,
psAllocDeviceMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
psAllocDeviceMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
psAllocDeviceMemOUT->sClientMemInfo.uAllocSize = psMemInfo->uAllocSize;
-#if defined (SUPPORT_SID_INTERFACE)
- /* see below */
-#else
psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
-#endif
PVRSRVAllocHandleNR(psPerProc->psHandleBase,
&psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO,
PVRSRV_HANDLE_ALLOC_FLAG_NONE);
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_ASSERT(psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo != 0);
-
- if (psMemInfo->sMemBlk.hOSMemHandle != IMG_NULL)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo,
- psMemInfo->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_MEM_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_NONE,
- psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo);
- }
- else
- {
- psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo = 0;
- }
-#endif
if(psAllocDeviceMemIN->ui32Attribs & PVRSRV_MEM_NO_SYNCOBJ)
{
psAllocDeviceMemOUT->sClientSyncInfo.sReadOps2CompleteDevVAddr =
psMemInfo->psKernelSyncInfo->sReadOps2CompleteDevVAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- if (psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != IMG_NULL)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psAllocDeviceMemOUT->sClientSyncInfo.hMappingInfo,
- psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_SYNC_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_NONE,
- psAllocDeviceMemOUT->sClientMemInfo.hKernelMemInfo);
- }
- else
- {
- psAllocDeviceMemOUT->sClientSyncInfo.hMappingInfo = 0;
- }
-#else
psAllocDeviceMemOUT->sClientSyncInfo.hMappingInfo =
psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
-#endif
#endif
PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
&pvKernelMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psFreeDeviceMemIN->hKernelMemInfo,
-#else
psFreeDeviceMemIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(psRetOUT->eError != PVRSRV_OK)
psRetOUT->eError =
PVRSRVReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- psFreeDeviceMemIN->hKernelMemInfo,
-#else
psFreeDeviceMemIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
return 0;
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
IMG_HANDLE hDevCookieInt;
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo = IMG_NULL;
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
-#endif
PVR_ASSERT(ui32BridgeID == PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_EXPORT_DEVICEMEM) ||
ui32BridgeID == PVRSRV_GET_BRIDGE_ID(PVRSRV_BRIDGE_EXPORT_DEVICEMEM_2));
psExportDeviceMemOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
(IMG_PVOID *)&psKernelMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psExportDeviceMemIN->hKernelMemInfo,
-#else
psExportDeviceMemIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(psExportDeviceMemOUT->eError != PVRSRV_OK)
psMapDevMemOUT->sDstClientMemInfo.sDevVAddr = psDstKernelMemInfo->sDevVAddr;
psMapDevMemOUT->sDstClientMemInfo.ui32Flags = psDstKernelMemInfo->ui32Flags;
psMapDevMemOUT->sDstClientMemInfo.uAllocSize = psDstKernelMemInfo->uAllocSize;
-#if defined (SUPPORT_SID_INTERFACE)
- /* see below */
-#else
psMapDevMemOUT->sDstClientMemInfo.hMappingInfo = psDstKernelMemInfo->sMemBlk.hOSMemHandle;
-#endif
/* allocate handle to the DST kernel meminfo */
PVRSRVAllocHandleNR(psPerProc->psHandleBase,
PVRSRV_HANDLE_ALLOC_FLAG_NONE);
psMapDevMemOUT->sDstClientSyncInfo.hKernelSyncInfo = IMG_NULL;
-#if defined (SUPPORT_SID_INTERFACE)
- /* alloc subhandle for the mapping info */
- if (psDstKernelMemInfo->sMemBlk.hOSMemHandle != IMG_NULL)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psMapDevMemOUT->sDstClientMemInfo.hMappingInfo,
- psDstKernelMemInfo->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_MEM_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_NONE,
- psMapDevMemOUT->sDstClientMemInfo.hKernelMemInfo);
- }
- else
- {
- psMapDevMemOUT->sDstClientMemInfo.hMappingInfo = 0;
- }
-#endif
/* and setup the sync info */
if(psDstKernelMemInfo->psKernelSyncInfo)
psMapDevMemOUT->sDstClientSyncInfo.sReadOps2CompleteDevVAddr =
psDstKernelMemInfo->psKernelSyncInfo->sReadOps2CompleteDevVAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- /* alloc subhandle for the mapping info */
- if (psDstKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != IMG_NULL)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psMapDevMemOUT->sDstClientSyncInfo.hMappingInfo,
- psDstKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_MEM_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_NONE,
- psMapDevMemOUT->sDstClientMemInfo.hKernelMemInfo);
- }
- else
- {
- psMapDevMemOUT->sDstClientSyncInfo.hMappingInfo = 0;
- }
-#else
psMapDevMemOUT->sDstClientSyncInfo.hMappingInfo =
psDstKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
-#endif
#endif
psMapDevMemOUT->sDstClientMemInfo.psClientSyncInfo = &psMapDevMemOUT->sDstClientSyncInfo;
psRetOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
(IMG_VOID**)&psKernelMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psUnmapDevMemIN->hKernelMemInfo,
-#else
psUnmapDevMemIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(psRetOUT->eError != PVRSRV_OK)
{
}
psRetOUT->eError = PVRSRVReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- psUnmapDevMemIN->hKernelMemInfo,
-#else
psUnmapDevMemIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
return 0;
/* Having looked up the handle, now check its type */
switch(eHandleType)
{
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
case PVRSRV_HANDLE_TYPE_DISP_BUFFER:
case PVRSRV_HANDLE_TYPE_BUF_BUFFER:
#else
psMapDevClassMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
psMapDevClassMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
psMapDevClassMemOUT->sClientMemInfo.uAllocSize = psMemInfo->uAllocSize;
-#if defined (SUPPORT_SID_INTERFACE)
- if (psMemInfo->sMemBlk.hOSMemHandle != 0)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psMapDevClassMemOUT->sClientMemInfo.hMappingInfo,
- psMemInfo->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_MEM_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_NONE,
- psMapDevClassMemIN->hDeviceClassBuffer);
- }
- else
- {
- psMapDevClassMemOUT->sClientMemInfo.hMappingInfo = 0;
- }
-#else
psMapDevClassMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
-#endif
PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
&psMapDevClassMemOUT->sClientMemInfo.hKernelMemInfo,
psMapDevClassMemOUT->sClientSyncInfo.sReadOps2CompleteDevVAddr =
psMemInfo->psKernelSyncInfo->sReadOps2CompleteDevVAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- if (psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != 0)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psMapDevClassMemOUT->sClientSyncInfo.hMappingInfo,
- psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_SYNC_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
- psMapDevClassMemOUT->sClientMemInfo.hKernelMemInfo);
- }
- else
- {
- psMapDevClassMemOUT->sClientSyncInfo.hMappingInfo = 0;
- }
-#else
psMapDevClassMemOUT->sClientSyncInfo.hMappingInfo =
psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
-#endif
#endif
psMapDevClassMemOUT->sClientMemInfo.psClientSyncInfo = &psMapDevClassMemOUT->sClientSyncInfo;
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase, &pvKernelMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psUnmapDevClassMemIN->hKernelMemInfo,
-#else
psUnmapDevClassMemIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(psRetOUT->eError != PVRSRV_OK)
{
psRetOUT->eError =
PVRSRVReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- psUnmapDevClassMemIN->hKernelMemInfo,
-#else
psUnmapDevClassMemIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
return 0;
PVRSRVWrapExtMemoryKM(hDevCookieInt,
psPerProc,
hDevMemContextInt,
- psWrapExtMemIN->ui32ByteSize,
- psWrapExtMemIN->ui32PageOffset,
+ psWrapExtMemIN->uByteSize,
+ psWrapExtMemIN->uPageOffset,
psWrapExtMemIN->bPhysContig,
psSysPAddr,
psWrapExtMemIN->pvLinAddr,
psWrapExtMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
psWrapExtMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
psWrapExtMemOUT->sClientMemInfo.uAllocSize = psMemInfo->uAllocSize;
-#if defined (SUPPORT_SID_INTERFACE)
-/* see below */
-#else
psWrapExtMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
-#endif
PVRSRVAllocHandleNR(psPerProc->psHandleBase,
&psWrapExtMemOUT->sClientMemInfo.hKernelMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO,
PVRSRV_HANDLE_ALLOC_FLAG_NONE);
-#if defined (SUPPORT_SID_INTERFACE)
- /* alloc subhandle for the mapping info */
- if (psMemInfo->sMemBlk.hOSMemHandle != IMG_NULL)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psWrapExtMemOUT->sClientMemInfo.hMappingInfo,
- psMemInfo->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_MEM_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_NONE,
- psWrapExtMemOUT->sClientMemInfo.hKernelMemInfo);
- }
- else
- {
- psWrapExtMemOUT->sClientMemInfo.hMappingInfo = 0;
- }
-#endif
/* setup the sync info */
#if !defined(PVRSRV_DISABLE_UM_SYNCOBJ_MAPPINGS)
psWrapExtMemOUT->sClientSyncInfo.sReadOps2CompleteDevVAddr =
psMemInfo->psKernelSyncInfo->sReadOps2CompleteDevVAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- /* alloc subhandle for the mapping info */
- if (psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != IMG_NULL)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psWrapExtMemOUT->sClientSyncInfo.hMappingInfo,
- psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_MEM_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_NONE,
- psWrapExtMemOUT->sClientMemInfo.hKernelMemInfo);
- }
- else
- {
- psWrapExtMemOUT->sClientSyncInfo.hMappingInfo = 0;
- }
-#else
psWrapExtMemOUT->sClientSyncInfo.hMappingInfo =
psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
-#endif
#endif
psWrapExtMemOUT->sClientMemInfo.psClientSyncInfo = &psWrapExtMemOUT->sClientSyncInfo;
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
+ IMG_UINT64 ui64Stamp;
psMapIonOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
&psMapIonIN->hDevCookie,
}
psMapIonOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
- &psMapIonIN->hDevMemContext,
- psMapIonIN->hDevMemContext,
- PVRSRV_HANDLE_TYPE_DEV_MEM_CONTEXT);
+ &psMapIonIN->hDevMemHeap,
+ psMapIonIN->hDevMemHeap,
+ PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP);
if (psMapIonOUT->eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "%s: Failed to lookup memory context handle", __FUNCTION__));
psMapIonOUT->eError = PVRSRVMapIonHandleKM(psPerProc,
psMapIonIN->hDevCookie,
- psMapIonIN->hDevMemContext,
- psMapIonIN->handle,
+ psMapIonIN->hDevMemHeap,
+ psMapIonIN->ui32NumFDs,
+ psMapIonIN->ai32BufferFDs,
psMapIonIN->ui32Attribs,
- psMapIonIN->ui32Size,
- &psKernelMemInfo);
+ psMapIonIN->ui32ChunkCount,
+ psMapIonIN->auiOffset,
+ psMapIonIN->auiSize,
+ &psMapIonOUT->uiIonBufferSize,
+ &psKernelMemInfo,
+ &ui64Stamp);
if (psMapIonOUT->eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "%s: Failed to map ion handle", __FUNCTION__));
/* No mapping info, we map through ion */
psMapIonOUT->sClientMemInfo.hMappingInfo = IMG_NULL;
+#if defined(SUPPORT_MEMINFO_IDS)
+ psMapIonOUT->sClientMemInfo.ui64Stamp = ui64Stamp;
+#endif
PVRSRVAllocHandleNR(psPerProc->psHandleBase,
&psMapIonOUT->sClientMemInfo.hKernelMemInfo,
psMapIonOUT->sClientSyncInfo.sReadOps2CompleteDevVAddr =
psKernelMemInfo->psKernelSyncInfo->sReadOps2CompleteDevVAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- if (psKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != IMG_NULL)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psMapIonOUT->sClientSyncInfo.hMappingInfo,
- psMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_SYNC_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_NONE,
- psMapIonOUT->sClientMemInfo.hKernelMemInfo);
- }
- else
- {
- psMapIonOUT->sClientSyncInfo.hMappingInfo = 0;
- }
-#else
psMapIonOUT->sClientSyncInfo.hMappingInfo =
psKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
-#endif
#endif
PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
psUnmapIonOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
&pvKernelMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psUnmapIonIN->hKernelMemInfo,
-#else
psUnmapIonIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(psUnmapIonOUT->eError != PVRSRV_OK)
psUnmapIonOUT->eError =
PVRSRVReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- psUnmapIonIN->hKernelMemInfo,
-#else
psUnmapIonIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
return 0;
psGetFreeDeviceMemOUT->eError =
PVRSRVGetFreeDeviceMemKM(psGetFreeDeviceMemIN->ui32Flags,
- &psGetFreeDeviceMemOUT->ui32Total,
- &psGetFreeDeviceMemOUT->ui32Free,
- &psGetFreeDeviceMemOUT->ui32LargestBlock);
+ &psGetFreeDeviceMemOUT->uTotal,
+ &psGetFreeDeviceMemOUT->uFree,
+ &psGetFreeDeviceMemOUT->uLargestBlock);
return 0;
}
psMMapDataOUT->eError =
PVRMMapOSMemHandleToMMapData(psPerProc,
psMMapDataIN->hMHandle,
- &psMMapDataOUT->ui32MMapOffset,
- &psMMapDataOUT->ui32ByteOffset,
- &psMMapDataOUT->ui32RealByteSize,
- &psMMapDataOUT->ui32UserVAddr);
+ &psMMapDataOUT->uiMMapOffset,
+ &psMMapDataOUT->uiByteOffset,
+ &psMMapDataOUT->uiRealByteSize,
+ &psMMapDataOUT->uiUserVAddr);
#else
PVR_UNREFERENCED_PARAMETER(psPerProc);
PVR_UNREFERENCED_PARAMETER(psMMapDataIN);
PVRMMapReleaseMMapData(psPerProc,
psMMapDataIN->hMHandle,
&psMMapDataOUT->bMUnmap,
- &psMMapDataOUT->ui32RealByteSize,
- &psMMapDataOUT->ui32UserVAddr);
+ &psMMapDataOUT->uiRealByteSize,
+ &psMMapDataOUT->uiUserVAddr);
#else
PVR_UNREFERENCED_PARAMETER(psPerProc);
}
-#if defined (SUPPORT_SID_INTERFACE)
-static IMG_INT
-PVRSRVChangeDeviceMemoryAttributesBW(IMG_UINT32 ui32BridgeID,
- PVRSRV_BRIDGE_IN_CHG_DEV_MEM_ATTRIBS *psChgMemAttribIN,
- PVRSRV_BRIDGE_RETURN *psRetOUT,
- PVRSRV_PER_PROCESS_DATA *psPerProc)
-{
- IMG_HANDLE hKernelMemInfo;
-
- PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_CHG_DEV_MEM_ATTRIBS);
-
- psRetOUT->eError =
- PVRSRVLookupHandle(psPerProc->psHandleBase,
- &hKernelMemInfo,
- psChgMemAttribIN->hKernelMemInfo,
- PVRSRV_HANDLE_TYPE_MEM_INFO);
-
- if(psRetOUT->eError != PVRSRV_OK)
- {
- return 0;
- }
-
- psRetOUT->eError =
- PVRSRVChangeDeviceMemoryAttributesKM(hKernelMemInfo, psChgMemAttribIN->ui32Attribs);
-
- return 0;
-}
-#else
static IMG_INT
PVRSRVChangeDeviceMemoryAttributesBW(IMG_UINT32 ui32BridgeID,
PVRSRV_BRIDGE_IN_CHG_DEV_MEM_ATTRIBS *psChgMemAttribIN,
return 0;
}
-#endif
#ifdef PDUMP
static IMG_INT
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
&pvMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psPDumpMemPolIN->hKernelMemInfo,
-#else
psPDumpMemPolIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(psRetOUT->eError != PVRSRV_OK)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
&pvMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psPDumpMemDumpIN->hKernelMemInfo,
-#else
psPDumpMemDumpIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(psRetOUT->eError != PVRSRV_OK)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase, &pvSyncInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psPDumpSyncDumpIN->hKernelSyncInfo,
-#else
psPDumpSyncDumpIN->psKernelSyncInfo,
-#endif
PVRSRV_HANDLE_TYPE_SYNC_INFO);
if(psRetOUT->eError != PVRSRV_OK)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
&pvSyncInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psPDumpSyncPolIN->hKernelSyncInfo,
-#else
psPDumpSyncPolIN->psKernelSyncInfo,
-#endif
PVRSRV_HANDLE_TYPE_SYNC_INFO);
if(psRetOUT->eError != PVRSRV_OK)
{
PVRSRV_BRIDGE_OUT_GET_MISC_INFO *psGetMiscInfoOUT,
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_MISC_INFO_KM sMiscInfo = {0};
-#endif
PVRSRV_ERROR eError;
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_MISC_INFO);
-#if defined (SUPPORT_SID_INTERFACE)
- sMiscInfo.ui32StateRequest = psGetMiscInfoIN->sMiscInfo.ui32StateRequest;
- sMiscInfo.ui32StatePresent = psGetMiscInfoIN->sMiscInfo.ui32StatePresent;
- sMiscInfo.ui32MemoryStrLen = psGetMiscInfoIN->sMiscInfo.ui32MemoryStrLen;
- sMiscInfo.pszMemoryStr = psGetMiscInfoIN->sMiscInfo.pszMemoryStr;
-
- OSMemCopy(&sMiscInfo.sCacheOpCtl,
- &psGetMiscInfoIN->sMiscInfo.sCacheOpCtl,
- sizeof(sMiscInfo.sCacheOpCtl));
- OSMemCopy(&sMiscInfo.sGetRefCountCtl,
- &psGetMiscInfoIN->sMiscInfo.sGetRefCountCtl,
- sizeof(sMiscInfo.sGetRefCountCtl));
-#else
OSMemCopy(&psGetMiscInfoOUT->sMiscInfo,
&psGetMiscInfoIN->sMiscInfo,
sizeof(PVRSRV_MISC_INFO));
-#endif
if (((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) != 0) &&
((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_DDKVERSION_PRESENT) != 0) &&
((psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_FREEMEM_PRESENT) != 0))
{
/* Alloc kernel side buffer to write into */
-#if defined (SUPPORT_SID_INTERFACE)
- ASSIGN_AND_EXIT_ON_ERROR(psGetMiscInfoOUT->eError,
- OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
- psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
- (IMG_VOID **)&sMiscInfo.pszMemoryStr, 0,
- "Output string buffer"));
- psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&sMiscInfo);
-
- /* Copy result to user */
- eError = CopyToUserWrapper(psPerProc, ui32BridgeID,
- psGetMiscInfoIN->sMiscInfo.pszMemoryStr,
- sMiscInfo.pszMemoryStr,
- sMiscInfo.ui32MemoryStrLen);
-#else
ASSIGN_AND_EXIT_ON_ERROR(psGetMiscInfoOUT->eError,
OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
psGetMiscInfoIN->sMiscInfo.pszMemoryStr,
psGetMiscInfoOUT->sMiscInfo.pszMemoryStr,
psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen);
-#endif
/* Free kernel side buffer again */
-#if defined (SUPPORT_SID_INTERFACE)
- OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
- sMiscInfo.ui32MemoryStrLen,
- (IMG_VOID *)sMiscInfo.pszMemoryStr, 0);
-#else
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
(IMG_VOID *)psGetMiscInfoOUT->sMiscInfo.pszMemoryStr, 0);
-#endif
/* Replace output buffer pointer with input pointer, as both are expected
* to point to the same userspace memory.
}
else
{
-#if defined (SUPPORT_SID_INTERFACE)
- psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&sMiscInfo);
-#else
psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoOUT->sMiscInfo);
-#endif
}
/* Return on error so exit status of PVRSRVGetMiscInfoKM is propagated to client.
* (a shared handle is allocated at most once), and there is no
* resource allocation to undo if the handle allocation fails.
*/
-#if defined (SUPPORT_SID_INTERFACE)
- if (sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT)
-#else
if (psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT)
-#endif
{
psGetMiscInfoOUT->eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
&psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.hOSEventKM,
-#if defined (SUPPORT_SID_INTERFACE)
- sMiscInfo.sGlobalEventObject.hOSEventKM,
-#else
psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.hOSEventKM,
-#endif
PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT,
PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- OSMemCopy(&psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.szName,
- sMiscInfo.sGlobalEventObject.szName,
- EVENTOBJNAME_MAXLENGTH);
-#endif
}
-#if defined (SUPPORT_SID_INTERFACE)
- if (sMiscInfo.hSOCTimerRegisterOSMemHandle)
-#else
if (psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle)
-#endif
{
/* Allocate handle for SOC OSMemHandle */
psGetMiscInfoOUT->eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
&psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle,
-#if defined (SUPPORT_SID_INTERFACE)
- sMiscInfo.hSOCTimerRegisterOSMemHandle,
-#else
psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle,
-#endif
PVRSRV_HANDLE_TYPE_SOC_TIMER,
PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
return 0;
}
}
-#if defined (SUPPORT_SID_INTERFACE)
- else
- {
- psGetMiscInfoOUT->sMiscInfo.hSOCTimerRegisterOSMemHandle = 0;
- }
-
- /* copy data from local sMiscInfo to OUT */
- psGetMiscInfoOUT->sMiscInfo.ui32StateRequest = sMiscInfo.ui32StateRequest;
- psGetMiscInfoOUT->sMiscInfo.ui32StatePresent = sMiscInfo.ui32StatePresent;
-
- psGetMiscInfoOUT->sMiscInfo.pvSOCTimerRegisterKM = sMiscInfo.pvSOCTimerRegisterKM;
- psGetMiscInfoOUT->sMiscInfo.pvSOCTimerRegisterUM = sMiscInfo.pvSOCTimerRegisterUM;
- psGetMiscInfoOUT->sMiscInfo.pvSOCClockGateRegs = sMiscInfo.pvSOCClockGateRegs;
-
- psGetMiscInfoOUT->sMiscInfo.ui32SOCClockGateRegsSize = sMiscInfo.ui32SOCClockGateRegsSize;
-
- OSMemCopy(&psGetMiscInfoOUT->sMiscInfo.aui32DDKVersion,
- &sMiscInfo.aui32DDKVersion,
- sizeof(psGetMiscInfoOUT->sMiscInfo.aui32DDKVersion));
- OSMemCopy(&psGetMiscInfoOUT->sMiscInfo.sCacheOpCtl,
- &sMiscInfo.sCacheOpCtl,
- sizeof(psGetMiscInfoOUT->sMiscInfo.sCacheOpCtl));
- OSMemCopy(&psGetMiscInfoOUT->sMiscInfo.sGetRefCountCtl,
- &sMiscInfo.sGetRefCountCtl,
- sizeof(psGetMiscInfoOUT->sMiscInfo.sGetRefCountCtl));
-#endif
return 0;
}
IMG_VOID *pvDispClassInfo;
IMG_VOID *pvSwapChain;
IMG_UINT32 i;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_HANDLE *pahBuffer;
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_DISPCLASS_BUFFERS);
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- psGetDispClassBuffersOUT->eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
- sizeof(IMG_HANDLE) * PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS,
- (IMG_PVOID *)&pahBuffer, 0,
- "Temp Swapchain Buffers");
-
- if (psGetDispClassBuffersOUT->eError != PVRSRV_OK)
- {
- return 0;
- }
-#endif
psGetDispClassBuffersOUT->eError =
PVRSRVGetDCBuffersKM(pvDispClassInfo,
pvSwapChain,
&psGetDispClassBuffersOUT->ui32BufferCount,
-#if defined (SUPPORT_SID_INTERFACE)
- pahBuffer,
-#else
psGetDispClassBuffersOUT->ahBuffer,
-#endif
psGetDispClassBuffersOUT->asPhyAddr);
if (psGetDispClassBuffersOUT->eError != PVRSRV_OK)
{
for(i = 0; i < psGetDispClassBuffersOUT->ui32BufferCount; i++)
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hBufferExt;
-#else
IMG_HANDLE hBufferExt;
-#endif
/* PRQA S 1461 15 */ /* ignore warning about enum type being converted */
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &hBufferExt,
- pahBuffer[i],
- PVRSRV_HANDLE_TYPE_DISP_BUFFER,
- (PVRSRV_HANDLE_ALLOC_FLAG)(PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE | PVRSRV_HANDLE_ALLOC_FLAG_SHARED),
- psGetDispClassBuffersIN->hSwapChain);
-#else
PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
&hBufferExt,
psGetDispClassBuffersOUT->ahBuffer[i],
PVRSRV_HANDLE_TYPE_DISP_BUFFER,
(PVRSRV_HANDLE_ALLOC_FLAG)(PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE | PVRSRV_HANDLE_ALLOC_FLAG_SHARED),
psGetDispClassBuffersIN->hSwapChain);
-#endif
psGetDispClassBuffersOUT->ahBuffer[i] = hBufferExt;
}
-#if defined (SUPPORT_SID_INTERFACE)
- OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
- sizeof(IMG_HANDLE) * PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS,
- (IMG_PVOID)pahBuffer, 0);
-#endif
COMMIT_HANDLE_BATCH_OR_ERROR(psGetDispClassBuffersOUT->eError, psPerProc)
{
IMG_VOID *pvDispClassInfo;
IMG_VOID *pvSwapChainBuf;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_HANDLE hPrivateTag;
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER);
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- if (psSwapDispClassBufferIN->hPrivateTag != 0)
- {
- psRetOUT->eError =
- PVRSRVLookupSubHandle(psPerProc->psHandleBase,
- &hPrivateTag,
- psSwapDispClassBufferIN->hPrivateTag,
- PVRSRV_HANDLE_TYPE_DISP_BUFFER,
- psSwapDispClassBufferIN->hDeviceKM);
- if(psRetOUT->eError != PVRSRV_OK)
- {
- return 0;
- }
- }
- else
- {
- hPrivateTag = IMG_NULL;
- }
-#endif
psRetOUT->eError =
PVRSRVSwapToDCBufferKM(pvDispClassInfo,
pvSwapChainBuf,
psSwapDispClassBufferIN->ui32SwapInterval,
-#if defined (SUPPORT_SID_INTERFACE)
- hPrivateTag,
-#else
psSwapDispClassBufferIN->hPrivateTag,
-#endif
psSwapDispClassBufferIN->ui32ClipRectCount,
psSwapDispClassBufferIN->sClipRect);
static IMG_INT
PVRSRVSwapToDCBuffer2BW(IMG_UINT32 ui32BridgeID,
PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER2 *psSwapDispClassBufferIN,
- PVRSRV_BRIDGE_RETURN *psRetOUT,
+ PVRSRV_BRIDGE_OUT_SWAP_DISPCLASS_TO_BUFFER2 *psSwapDispClassBufferOUT,
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
IMG_VOID *pvPrivData = IMG_NULL;
+ IMG_HANDLE hFence = IMG_NULL;
IMG_VOID *pvDispClassInfo;
IMG_VOID *pvSwapChain;
IMG_UINT32 i;
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER2);
- psRetOUT->eError =
+ psSwapDispClassBufferOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
&pvDispClassInfo,
psSwapDispClassBufferIN->hDeviceKM,
PVRSRV_HANDLE_TYPE_DISP_INFO);
- if(psRetOUT->eError != PVRSRV_OK)
+ if(psSwapDispClassBufferOUT->eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVSwapToDCBuffer2BW: Failed to look up DISP_INFO handle"));
return 0;
}
- psRetOUT->eError =
+ psSwapDispClassBufferOUT->eError =
PVRSRVLookupSubHandle(psPerProc->psHandleBase,
&pvSwapChain,
psSwapDispClassBufferIN->hSwapChain,
PVRSRV_HANDLE_TYPE_DISP_SWAP_CHAIN,
psSwapDispClassBufferIN->hDeviceKM);
- if(psRetOUT->eError != PVRSRV_OK)
+ if(psSwapDispClassBufferOUT->eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVSwapToDCBuffer2BW: Failed to look up DISP_BUFFER handle"));
return 0;
for (i = 0; i < psSwapDispClassBufferIN->ui32NumMemInfos; i++)
{
- PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
- psRetOUT->eError =
+ psSwapDispClassBufferOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
(IMG_PVOID *)&psKernelMemInfo,
psSwapDispClassBufferIN->ppsKernelMemInfos[i],
PVRSRV_HANDLE_TYPE_MEM_INFO);
- if(psRetOUT->eError != PVRSRV_OK)
+ if(psSwapDispClassBufferOUT->eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVSwapToDCBuffer2BW: Failed to look up MEM_INFO handle"));
return 0;
}
+ psSwapDispClassBufferIN->ppsKernelMemInfos[i] = psKernelMemInfo;
- psRetOUT->eError =
- PVRSRVLookupHandle(psPerProc->psHandleBase,
- (IMG_PVOID *)&psKernelSyncInfo,
- psSwapDispClassBufferIN->ppsKernelSyncInfos[i],
- PVRSRV_HANDLE_TYPE_SYNC_INFO);
- if(psRetOUT->eError != PVRSRV_OK)
+#if !defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
{
- PVR_DPF((PVR_DBG_ERROR, "PVRSRVSwapToDCBuffer2BW: Failed to look up SYNC_INFO handle"));
- return 0;
+ PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
+
+ psSwapDispClassBufferOUT->eError =
+ PVRSRVLookupHandle(psPerProc->psHandleBase,
+ (IMG_PVOID *)&psKernelSyncInfo,
+ psSwapDispClassBufferIN->ppsKernelSyncInfos[i],
+ PVRSRV_HANDLE_TYPE_SYNC_INFO);
+ if(psSwapDispClassBufferOUT->eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVSwapToDCBuffer2BW: Failed to look up SYNC_INFO handle"));
+ return 0;
+ }
+ psSwapDispClassBufferIN->ppsKernelSyncInfos[i] = psKernelSyncInfo;
}
-
- psSwapDispClassBufferIN->ppsKernelMemInfos[i] = psKernelMemInfo;
- psSwapDispClassBufferIN->ppsKernelSyncInfos[i] = psKernelSyncInfo;
+#endif /* !defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
}
if(psSwapDispClassBufferIN->ui32PrivDataLength > 0)
}
}
- psRetOUT->eError =
+ psSwapDispClassBufferOUT->eError =
PVRSRVSwapToDCBuffer2KM(pvDispClassInfo,
pvSwapChain,
psSwapDispClassBufferIN->ui32SwapInterval,
psSwapDispClassBufferIN->ppsKernelSyncInfos,
psSwapDispClassBufferIN->ui32NumMemInfos,
pvPrivData,
- psSwapDispClassBufferIN->ui32PrivDataLength);
+ psSwapDispClassBufferIN->ui32PrivDataLength,
+ &hFence);
- if(psRetOUT->eError != PVRSRV_OK)
+ if(psSwapDispClassBufferOUT->eError != PVRSRV_OK)
{
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
psSwapDispClassBufferIN->ui32PrivDataLength,
pvPrivData, IMG_NULL);
}
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ if(hFence)
+ {
+ struct sync_fence *psFence = hFence;
+ int fd = get_unused_fd();
+
+ sync_fence_install(psFence, fd);
+ psSwapDispClassBufferOUT->hFence = (IMG_HANDLE)fd;
+ }
+ else
+#endif /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
+ {
+ psSwapDispClassBufferOUT->hFence = (IMG_HANDLE)-1;
+ }
+
return 0;
}
psAllocSharedSysMemOUT->eError =
PVRSRVAllocSharedSysMemoryKM(psPerProc,
psAllocSharedSysMemIN->ui32Flags,
- psAllocSharedSysMemIN->ui32Size,
+ psAllocSharedSysMemIN->uSize,
&psKernelMemInfo);
if(psAllocSharedSysMemOUT->eError != PVRSRV_OK)
{
psKernelMemInfo->ui32Flags;
psAllocSharedSysMemOUT->sClientMemInfo.uAllocSize =
psKernelMemInfo->uAllocSize;
-#if defined (SUPPORT_SID_INTERFACE)
- if (psKernelMemInfo->sMemBlk.hOSMemHandle != IMG_NULL)
- {
- PVRSRVAllocHandleNR(psPerProc->psHandleBase,
- &psAllocSharedSysMemOUT->sClientMemInfo.hMappingInfo,
- psKernelMemInfo->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_NONE);
- }
- else
- {
- psAllocSharedSysMemOUT->sClientMemInfo.hMappingInfo = 0;
- }
-#else
psAllocSharedSysMemOUT->sClientMemInfo.hMappingInfo = psKernelMemInfo->sMemBlk.hOSMemHandle;
-#endif
PVRSRVAllocHandleNR(psPerProc->psHandleBase,
&psAllocSharedSysMemOUT->sClientMemInfo.hKernelMemInfo,
psFreeSharedSysMemOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
(IMG_VOID **)&psKernelMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psFreeSharedSysMemIN->hKernelMemInfo,
-#else
psFreeSharedSysMemIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO);
if(psFreeSharedSysMemOUT->eError != PVRSRV_OK)
PVRSRVFreeSharedSysMemoryKM(psKernelMemInfo);
if(psFreeSharedSysMemOUT->eError != PVRSRV_OK)
return 0;
-#if defined (SUPPORT_SID_INTERFACE)
- if (psFreeSharedSysMemIN->hMappingInfo != 0)
- {
- psFreeSharedSysMemOUT->eError =
- PVRSRVReleaseHandle(psPerProc->psHandleBase,
- psFreeSharedSysMemIN->hMappingInfo,
- PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO);
- if(psFreeSharedSysMemOUT->eError != PVRSRV_OK)
- {
- return 0;
- }
- }
-#endif
psFreeSharedSysMemOUT->eError =
PVRSRVReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- psFreeSharedSysMemIN->hKernelMemInfo,
-#else
psFreeSharedSysMemIN->psKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO);
return 0;
}
{
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
PVRSRV_HANDLE_TYPE eHandleType;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hParent;
-#else
IMG_HANDLE hParent;
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_MAP_MEMINFO_MEM);
NEW_HANDLE_BATCH_OR_ERROR(psMapMemInfoMemOUT->eError, psPerProc, 2)
switch (eHandleType)
{
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
case PVRSRV_HANDLE_TYPE_MEM_INFO:
case PVRSRV_HANDLE_TYPE_MEM_INFO_REF:
case PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO:
{
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- if (hParent == 0)
-#else
if (hParent == IMG_NULL)
-#endif
{
hParent = psMapMemInfoMemIN->hKernelMemInfo;
}
psKernelMemInfo->ui32Flags;
psMapMemInfoMemOUT->sClientMemInfo.uAllocSize =
psKernelMemInfo->uAllocSize;
-#if defined (SUPPORT_SID_INTERFACE)
- if (psKernelMemInfo->sMemBlk.hOSMemHandle != IMG_NULL)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo,
- psKernelMemInfo->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_MEM_INFO_REF,
- PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
- hParent);
- }
- else
- {
- psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo = 0;
- }
-#else
psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo = psKernelMemInfo->sMemBlk.hOSMemHandle;
-#endif
PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
&psMapMemInfoMemOUT->sClientMemInfo.hKernelMemInfo,
psMapMemInfoMemOUT->sClientSyncInfo.sReadOps2CompleteDevVAddr =
psKernelMemInfo->psKernelSyncInfo->sReadOps2CompleteDevVAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- if (psKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle != IMG_NULL)
- {
- PVRSRVAllocSubHandleNR(psPerProc->psHandleBase,
- &psMapMemInfoMemOUT->sClientSyncInfo.hMappingInfo,
- psKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle,
- PVRSRV_HANDLE_TYPE_SYNC_INFO,
- PVRSRV_HANDLE_ALLOC_FLAG_MULTI,
- psMapMemInfoMemOUT->sClientMemInfo.hKernelMemInfo);
- }
- else
- {
- psMapMemInfoMemOUT->sClientSyncInfo.hMappingInfo = 0;
- }
-#else
psMapMemInfoMemOUT->sClientSyncInfo.hMappingInfo =
psKernelMemInfo->psKernelSyncInfo->psSyncDataMemInfoKM->sMemBlk.hOSMemHandle;
-#endif
#endif
psMapMemInfoMemOUT->sClientMemInfo.psClientSyncInfo = &psMapMemInfoMemOUT->sClientSyncInfo;
BridgeWrapperFunction pfFunction,
const IMG_CHAR *pszFunctionName)
{
- static IMG_UINT32 ui32PrevIndex = ~0UL; /* -1 */
+ static IMG_UINT uiPrevIndex = ~0U; /* -1 */
#if !defined(DEBUG)
PVR_UNREFERENCED_PARAMETER(pszIOCName);
#endif
* etc is likly to modify the available ioctls and thus be a point where
* mistakes are exposed. This isn't run at at a performance critical time.
*/
-// if((ui32PrevIndex != (IMG_UINT32)-1) &&
- if((ui32PrevIndex != ~0UL) &&
- ((ui32Index >= ui32PrevIndex + DISPATCH_TABLE_GAP_THRESHOLD) ||
- (ui32Index <= ui32PrevIndex)))
+// if((uiPrevIndex != (IMG_UINT)-1) &&
+ if((uiPrevIndex != ~0U) &&
+ ((ui32Index >= uiPrevIndex + DISPATCH_TABLE_GAP_THRESHOLD) ||
+ (ui32Index <= uiPrevIndex)))
{
#if defined(DEBUG_BRIDGE_KM)
PVR_DPF((PVR_DBG_WARNING,
"%s: There is a gap in the dispatch table between indices %u (%s) and %u (%s)",
- __FUNCTION__, ui32PrevIndex, g_BridgeDispatchTable[ui32PrevIndex].pszIOCName,
+ __FUNCTION__, uiPrevIndex, g_BridgeDispatchTable[uiPrevIndex].pszIOCName,
ui32Index, pszIOCName));
#else
PVR_DPF((PVR_DBG_WARNING,
"%s: There is a gap in the dispatch table between indices %u and %u (%s)",
- __FUNCTION__, (IMG_UINT)ui32PrevIndex, (IMG_UINT)ui32Index, pszIOCName));
+ __FUNCTION__, (IMG_UINT)uiPrevIndex, (IMG_UINT)ui32Index, pszIOCName));
#endif
PVR_DPF((PVR_DBG_ERROR, "NOTE: Enabling DEBUG_BRIDGE_KM_DISPATCH_TABLE may help debug this issue."));
}
g_BridgeDispatchTable[ui32Index].ui32CopyFromUserTotalBytes = 0;
#endif
- ui32PrevIndex = ui32Index;
+ uiPrevIndex = ui32Index;
}
static IMG_INT
PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN *psEventObjectOpenOUT,
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_EVENTOBJECT_KM sEventObject;
- IMG_HANDLE hOSEvent;
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_OPEN);
psEventObjectOpenOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sEventObject.hOSEventKM,
-#else
&psEventObjectOpenIN->sEventObject.hOSEventKM,
-#endif
psEventObjectOpenIN->sEventObject.hOSEventKM,
PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT);
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- OSMemCopy(&sEventObject.szName,
- &psEventObjectOpenIN->sEventObject.szName,
- EVENTOBJNAME_MAXLENGTH);
-
- psEventObjectOpenOUT->eError = OSEventObjectOpenKM(&sEventObject, &hOSEvent);
-#else
psEventObjectOpenOUT->eError = OSEventObjectOpenKM(&psEventObjectOpenIN->sEventObject, &psEventObjectOpenOUT->hOSEvent);
-#endif
if(psEventObjectOpenOUT->eError != PVRSRV_OK)
{
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
-/* Windows7, WinXP and Vista already use an Index type handle which the client glue uses directly */
-/* Linux requires a SID handle */
-#if !defined (WINXP) && !defined(SUPPORT_VISTA)
- PVRSRVAllocHandleNR(psPerProc->psHandleBase,
- &psEventObjectOpenOUT->hOSEvent,
- hOSEvent,
- PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT,
- PVRSRV_HANDLE_ALLOC_FLAG_MULTI);
-#endif
-#else
PVRSRVAllocHandleNR(psPerProc->psHandleBase,
&psEventObjectOpenOUT->hOSEvent,
psEventObjectOpenOUT->hOSEvent,
PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT,
PVRSRV_HANDLE_ALLOC_FLAG_MULTI);
-#endif
COMMIT_HANDLE_BATCH_OR_ERROR(psEventObjectOpenOUT->eError, psPerProc)
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
IMG_HANDLE hOSEventKM;
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_EVENTOBJECT_KM sEventObject;
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE);
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sEventObject.hOSEventKM,
-#else
&psEventObjectCloseIN->sEventObject.hOSEventKM,
-#endif
psEventObjectCloseIN->sEventObject.hOSEventKM,
PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT);
if(psRetOUT->eError != PVRSRV_OK)
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- if(CopyFromUserWrapper(psPerProc, ui32BridgeID,
- &sEventObject.szName,
- &psEventObjectCloseIN->sEventObject.szName,
- EVENTOBJNAME_MAXLENGTH) != PVRSRV_OK)
- {
- /*not nulling pointer, out of scope*/
- return -EFAULT;
- }
-
- psRetOUT->eError = OSEventObjectCloseKM(&sEventObject, hOSEventKM);
-#else
psRetOUT->eError = OSEventObjectCloseKM(&psEventObjectCloseIN->sEventObject, hOSEventKM);
-#endif
return 0;
}
#define ASSIGN_AND_EXIT_ON_ERROR(error, src) \
ASSIGN_AND_RETURN_ON_ERROR(error, src, 0)
-#if defined (PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
#ifdef INLINE_IS_PRAGMA
#pragma inline(NewHandleBatch)
#endif
* handle.
*/
PVRSRV_ERROR
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRVLookupOSMemHandle(PVRSRV_HANDLE_BASE *psHandleBase, IMG_HANDLE *phOSMemHandle, IMG_SID hMHandle)
-#else
PVRSRVLookupOSMemHandle(PVRSRV_HANDLE_BASE *psHandleBase, IMG_HANDLE *phOSMemHandle, IMG_HANDLE hMHandle)
-#endif
{
IMG_HANDLE hMHandleInt;
PVRSRV_HANDLE_TYPE eHandleType;
switch(eHandleType)
{
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
case PVRSRV_HANDLE_TYPE_MEM_INFO:
case PVRSRV_HANDLE_TYPE_MEM_INFO_REF:
case PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO:
* Derive the internal OS specific memory handle from a secure
* handle.
*/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVLookupOSMemHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phOSMemHandle, IMG_SID hMHandle);
-#else
PVRSRV_ERROR PVRSRVLookupOSMemHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phOSMemHandle, IMG_HANDLE hMHandle);
-#endif
#if defined (__cplusplus)
}
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
IMG_HANDLE hDevCookieInt;
-#if defined (SUPPORT_SID_INTERFACE)
- SGX_INTERNAL_DEVINFO_KM sSGXInternalDevInfo;
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_GETINTERNALDEVINFO);
psSGXGetInternalDevInfoOUT->eError =
SGXGetInternalDevInfoKM(hDevCookieInt,
-#if defined (SUPPORT_SID_INTERFACE)
- &sSGXInternalDevInfo);
-#else
&psSGXGetInternalDevInfoOUT->sSGXInternalDevInfo);
-#endif
/*
* Handle is not allocated in batch mode, as there is no resource
psSGXGetInternalDevInfoOUT->eError =
PVRSRVAllocHandle(psPerProc->psHandleBase,
&psSGXGetInternalDevInfoOUT->sSGXInternalDevInfo.hHostCtlKernelMemInfoHandle,
-#if defined (SUPPORT_SID_INTERFACE)
- sSGXInternalDevInfo.hHostCtlKernelMemInfoHandle,
-#else
psSGXGetInternalDevInfoOUT->sSGXInternalDevInfo.hHostCtlKernelMemInfoHandle,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO,
PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
IMG_UINT32 i;
IMG_INT ret = 0;
IMG_UINT32 ui32NumDstSyncs;
-#if defined (SUPPORT_SID_INTERFACE)
- SGX_CCB_KICK_KM sCCBKickKM = {{0}};
- IMG_HANDLE ahSyncInfoHandles[16];
-#else
IMG_HANDLE *phKernelSyncInfoHandles = IMG_NULL;
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_DOKICK);
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.hCCBKernelMemInfo,
-#else
&psDoKickIN->sCCBKick.hCCBKernelMemInfo,
-#endif
psDoKickIN->sCCBKick.hCCBKernelMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- if (psDoKickIN->sCCBKick.ui32NumDstSyncObjects > 16)
- {
- return 0;
- }
-
- if(psDoKickIN->sCCBKick.hTA3DSyncInfo != 0)
-#else
if(psDoKickIN->sCCBKick.hTA3DSyncInfo != IMG_NULL)
-#endif
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.hTA3DSyncInfo,
-#else
&psDoKickIN->sCCBKick.hTA3DSyncInfo,
-#endif
psDoKickIN->sCCBKick.hTA3DSyncInfo,
PVRSRV_HANDLE_TYPE_SYNC_INFO);
}
}
-#if defined (SUPPORT_SID_INTERFACE)
- if(psDoKickIN->sCCBKick.hTASyncInfo != 0)
-#else
if(psDoKickIN->sCCBKick.hTASyncInfo != IMG_NULL)
-#endif
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.hTASyncInfo,
-#else
&psDoKickIN->sCCBKick.hTASyncInfo,
-#endif
psDoKickIN->sCCBKick.hTASyncInfo,
PVRSRV_HANDLE_TYPE_SYNC_INFO);
}
#endif
-#if defined (SUPPORT_SID_INTERFACE)
- if(psDoKickIN->sCCBKick.h3DSyncInfo != 0)
-#else
if(psDoKickIN->sCCBKick.h3DSyncInfo != IMG_NULL)
-#endif
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.h3DSyncInfo,
-#else
&psDoKickIN->sCCBKick.h3DSyncInfo,
-#endif
psDoKickIN->sCCBKick.h3DSyncInfo,
PVRSRV_HANDLE_TYPE_SYNC_INFO);
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- sCCBKickKM.ui32NumTASrcSyncs = psDoKickIN->sCCBKick.ui32NumTASrcSyncs;
-#endif
for(i=0; i<psDoKickIN->sCCBKick.ui32NumTASrcSyncs; i++)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.ahTASrcKernelSyncInfo[i],
-#else
&psDoKickIN->sCCBKick.ahTASrcKernelSyncInfo[i],
-#endif
psDoKickIN->sCCBKick.ahTASrcKernelSyncInfo[i],
PVRSRV_HANDLE_TYPE_SYNC_INFO);
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- sCCBKickKM.ui32NumTADstSyncs = psDoKickIN->sCCBKick.ui32NumTADstSyncs;
-#endif
for(i=0; i<psDoKickIN->sCCBKick.ui32NumTADstSyncs; i++)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.ahTADstKernelSyncInfo[i],
-#else
&psDoKickIN->sCCBKick.ahTADstKernelSyncInfo[i],
-#endif
psDoKickIN->sCCBKick.ahTADstKernelSyncInfo[i],
PVRSRV_HANDLE_TYPE_SYNC_INFO);
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- sCCBKickKM.ui32Num3DSrcSyncs = psDoKickIN->sCCBKick.ui32Num3DSrcSyncs;
-#endif
for(i=0; i<psDoKickIN->sCCBKick.ui32Num3DSrcSyncs; i++)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.ah3DSrcKernelSyncInfo[i],
-#else
&psDoKickIN->sCCBKick.ah3DSrcKernelSyncInfo[i],
-#endif
psDoKickIN->sCCBKick.ah3DSrcKernelSyncInfo[i],
PVRSRV_HANDLE_TYPE_SYNC_INFO);
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- sCCBKickKM.ui32NumSrcSyncs = psDoKickIN->sCCBKick.ui32NumSrcSyncs;
-#endif
+#if !defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
for(i=0; i<psDoKickIN->sCCBKick.ui32NumSrcSyncs; i++)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.ahSrcKernelSyncInfo[i],
-#else
&psDoKickIN->sCCBKick.ahSrcKernelSyncInfo[i],
-#endif
psDoKickIN->sCCBKick.ahSrcKernelSyncInfo[i],
PVRSRV_HANDLE_TYPE_SYNC_INFO);
return 0;
}
}
-#endif/* #if defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS) */
+#endif /* !defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
+#endif /* defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS) */
if (psDoKickIN->sCCBKick.ui32NumTAStatusVals > SGX_MAX_TA_STATUS_VALS)
{
psRetOUT->eError =
#if defined(SUPPORT_SGX_NEW_STATUS_VALS)
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.asTAStatusUpdate[i].hKernelMemInfo,
-#else
&psDoKickIN->sCCBKick.asTAStatusUpdate[i].hKernelMemInfo,
-#endif
psDoKickIN->sCCBKick.asTAStatusUpdate[i].hKernelMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
-#if defined (SUPPORT_SID_INTERFACE)
- sCCBKickKM.asTAStatusUpdate[i].sCtlStatus = psDoKickIN->sCCBKick.asTAStatusUpdate[i].sCtlStatus;
-#endif
#else
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.ahTAStatusSyncInfo[i],
-#else
&psDoKickIN->sCCBKick.ahTAStatusSyncInfo[i],
-#endif
psDoKickIN->sCCBKick.ahTAStatusSyncInfo[i],
PVRSRV_HANDLE_TYPE_SYNC_INFO);
#endif
psRetOUT->eError =
#if defined(SUPPORT_SGX_NEW_STATUS_VALS)
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.as3DStatusUpdate[i].hKernelMemInfo,
-#else
&psDoKickIN->sCCBKick.as3DStatusUpdate[i].hKernelMemInfo,
-#endif
psDoKickIN->sCCBKick.as3DStatusUpdate[i].hKernelMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
-#if defined (SUPPORT_SID_INTERFACE)
- sCCBKickKM.as3DStatusUpdate[i].sCtlStatus = psDoKickIN->sCCBKick.as3DStatusUpdate[i].sCtlStatus;
-#endif
#else
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.ah3DStatusSyncInfo[i],
-#else
&psDoKickIN->sCCBKick.ah3DStatusSyncInfo[i],
-#endif
psDoKickIN->sCCBKick.ah3DStatusSyncInfo[i],
PVRSRV_HANDLE_TYPE_SYNC_INFO);
#endif
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- sCCBKickKM.pahDstSyncHandles = phKernelSyncInfoHandles;
-#else
if(CopyFromUserWrapper(psPerProc,
ui32BridgeID,
phKernelSyncInfoHandles,
/* Set sCCBKick.pahDstSyncHandles to point to the local memory */
psDoKickIN->sCCBKick.pahDstSyncHandles = phKernelSyncInfoHandles;
-#endif
for( i = 0; i < ui32NumDstSyncs; i++)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.pahDstSyncHandles[i],
-#else
&psDoKickIN->sCCBKick.pahDstSyncHandles[i],
-#endif
psDoKickIN->sCCBKick.pahDstSyncHandles[i],
PVRSRV_HANDLE_TYPE_SYNC_INFO);
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM.hKernelHWSyncListMemInfo,
-#else
&psDoKickIN->sCCBKick.hKernelHWSyncListMemInfo,
-#endif
psDoKickIN->sCCBKick.hKernelHWSyncListMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
}
}
-#if defined (SUPPORT_SID_INTERFACE)
- OSMemCopy(&sCCBKickKM.sCommand, &psDoKickIN->sCCBKick.sCommand, sizeof(sCCBKickKM.sCommand));
-
- sCCBKickKM.ui32NumDstSyncObjects = psDoKickIN->sCCBKick.ui32NumDstSyncObjects;
- sCCBKickKM.ui32NumTAStatusVals = psDoKickIN->sCCBKick.ui32NumTAStatusVals;
- sCCBKickKM.ui32Num3DStatusVals = psDoKickIN->sCCBKick.ui32Num3DStatusVals;
- sCCBKickKM.bFirstKickOrResume = psDoKickIN->sCCBKick.bFirstKickOrResume;
- sCCBKickKM.ui32CCBOffset = psDoKickIN->sCCBKick.ui32CCBOffset;
- sCCBKickKM.bTADependency = psDoKickIN->sCCBKick.bTADependency;
-
-#if defined(NO_HARDWARE) || defined(PDUMP)
- sCCBKickKM.bTerminateOrAbort = psDoKickIN->sCCBKick.bTerminateOrAbort;
-#endif
-#if defined(PDUMP)
- sCCBKickKM.ui32CCBDumpWOff = psDoKickIN->sCCBKick.ui32CCBDumpWOff;
-#endif
-
-#if defined(NO_HARDWARE)
- sCCBKickKM.ui32WriteOpsPendingVal = psDoKickIN->sCCBKick.ui32WriteOpsPendingVal;
-#endif
-#endif /* #if defined (SUPPORT_SID_INTERFACE) */
psRetOUT->eError =
SGXDoKickKM(hDevCookieInt,
-#if defined (SUPPORT_SID_INTERFACE)
- &sCCBKickKM);
-#else
&psDoKickIN->sCCBKick);
-#endif
PVRSRV_BRIDGE_SGX_DOKICK_RETURN_RESULT:
{
IMG_HANDLE hDevCookieInt;
PVRSRV_TRANSFER_SGX_KICK *psKick;
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_TRANSFER_SGX_KICK_KM sKickKM = {0};
-#endif
IMG_UINT32 i;
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_SUBMITTRANSFER);
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sKickKM.hCCBMemInfo,
-#else
&psKick->hCCBMemInfo,
-#endif
psKick->hCCBMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(psRetOUT->eError != PVRSRV_OK)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sKickKM.hTASyncInfo,
-#else
&psKick->hTASyncInfo,
-#endif
psKick->hTASyncInfo,
PVRSRV_HANDLE_TYPE_SYNC_INFO);
if(psRetOUT->eError != PVRSRV_OK)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sKickKM.h3DSyncInfo,
-#else
&psKick->h3DSyncInfo,
-#endif
psKick->h3DSyncInfo,
PVRSRV_HANDLE_TYPE_SYNC_INFO);
if(psRetOUT->eError != PVRSRV_OK)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sKickKM.ahSrcSyncInfo[i],
-#else
&psKick->ahSrcSyncInfo[i],
-#endif
psKick->ahSrcSyncInfo[i],
PVRSRV_HANDLE_TYPE_SYNC_INFO);
if(psRetOUT->eError != PVRSRV_OK)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sKickKM.ahDstSyncInfo[i],
-#else
&psKick->ahDstSyncInfo[i],
-#endif
psKick->ahDstSyncInfo[i],
PVRSRV_HANDLE_TYPE_SYNC_INFO);
if(psRetOUT->eError != PVRSRV_OK)
}
}
-#if defined (SUPPORT_SID_INTERFACE)
- sKickKM.sHWTransferContextDevVAddr = psKick->sHWTransferContextDevVAddr;
- sKickKM.ui32SharedCmdCCBOffset = psKick->ui32SharedCmdCCBOffset;
- sKickKM.ui32NumSrcSync = psKick->ui32NumSrcSync;
- sKickKM.ui32NumDstSync = psKick->ui32NumDstSync;
- sKickKM.ui32Flags = psKick->ui32Flags;
- sKickKM.ui32PDumpFlags = psKick->ui32PDumpFlags;
-#if defined(PDUMP)
- sKickKM.ui32CCBDumpWOff = psKick->ui32CCBDumpWOff;
-#endif
-
- psRetOUT->eError = SGXSubmitTransferKM(hDevCookieInt, &sKickKM);
-#else
psRetOUT->eError = SGXSubmitTransferKM(hDevCookieInt, psKick);
-#endif
return 0;
}
{
IMG_HANDLE hDevCookieInt;
PVRSRV_2D_SGX_KICK *psKick;
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_2D_SGX_KICK_KM sKickKM;
-#endif
IMG_UINT32 i;
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_SUBMIT2D);
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sKickKM.hCCBMemInfo,
-#else
&psKick->hCCBMemInfo,
-#endif
psKick->hCCBMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(psRetOUT->eError != PVRSRV_OK)
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- if (psKick->hTASyncInfo != 0)
-#else
if (psKick->hTASyncInfo != IMG_NULL)
-#endif
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sKickKM.hTASyncInfo,
-#else
&psKick->hTASyncInfo,
-#endif
psKick->hTASyncInfo,
PVRSRV_HANDLE_TYPE_SYNC_INFO);
if(psRetOUT->eError != PVRSRV_OK)
return 0;
}
}
-#if defined (SUPPORT_SID_INTERFACE)
- else
- {
- sKickKM.hTASyncInfo = IMG_NULL;
- }
-#endif
if (psKick->h3DSyncInfo != IMG_NULL)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sKickKM.h3DSyncInfo,
-#else
&psKick->h3DSyncInfo,
-#endif
psKick->h3DSyncInfo,
PVRSRV_HANDLE_TYPE_SYNC_INFO);
if(psRetOUT->eError != PVRSRV_OK)
return 0;
}
}
-#if defined (SUPPORT_SID_INTERFACE)
- else
- {
- sKickKM.h3DSyncInfo = IMG_NULL;
- }
-#endif
if (psKick->ui32NumSrcSync > SGX_MAX_2D_SRC_SYNC_OPS)
{
psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- for (i = 0; i < SGX_MAX_2D_SRC_SYNC_OPS; i++)
- {
- if (i < psKick->ui32NumSrcSync)
- {
- psRetOUT->eError =
- PVRSRVLookupHandle(psPerProc->psHandleBase,
- &sKickKM.ahSrcSyncInfo[i],
- psKick->ahSrcSyncInfo[i],
- PVRSRV_HANDLE_TYPE_SYNC_INFO);
- if(psRetOUT->eError != PVRSRV_OK)
- {
- return 0;
- }
- }
- else
- {
- sKickKM.ahSrcSyncInfo[i] = IMG_NULL;
- }
- }
-#else
for (i = 0; i < psKick->ui32NumSrcSync; i++)
{
psRetOUT->eError =
return 0;
}
}
-#endif
if (psKick->hDstSyncInfo != IMG_NULL)
{
psRetOUT->eError =
PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &sKickKM.hDstSyncInfo,
-#else
&psKick->hDstSyncInfo,
-#endif
psKick->hDstSyncInfo,
PVRSRV_HANDLE_TYPE_SYNC_INFO);
if(psRetOUT->eError != PVRSRV_OK)
return 0;
}
}
-#if defined (SUPPORT_SID_INTERFACE)
- else
- {
- sKickKM.hDstSyncInfo = IMG_NULL;
- }
-
- /* copy common members across */
- sKickKM.ui32SharedCmdCCBOffset = psKick->ui32SharedCmdCCBOffset;
- sKickKM.ui32NumSrcSync = psKick->ui32NumSrcSync;
- sKickKM.ui32PDumpFlags = psKick->ui32PDumpFlags;
- sKickKM.sHW2DContextDevVAddr = psKick->sHW2DContextDevVAddr;
-#if defined(PDUMP)
- sKickKM.ui32CCBDumpWOff = psKick->ui32CCBDumpWOff;
-#endif
-#endif
psRetOUT->eError =
-#if defined (SUPPORT_SID_INTERFACE)
- SGXSubmit2DKM(hDevCookieInt, &sKickKM);
-#else
SGXSubmit2DKM(hDevCookieInt, psKick);
-#endif
return 0;
}
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
IMG_HANDLE hDevCookieInt;
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_ERROR eError = PVRSRV_OK;
-#else
PVRSRV_ERROR eError;
-#endif
IMG_BOOL bDissociateFailed = IMG_FALSE;
IMG_BOOL bLookupFailed = IMG_FALSE;
IMG_BOOL bReleaseFailed = IMG_FALSE;
IMG_HANDLE hDummy;
IMG_UINT32 i;
-#if defined (SUPPORT_SID_INTERFACE)
- SGX_BRIDGE_INIT_INFO_KM asInitInfoKM = {0};
-#endif
+ IMG_VOID *pCommands = IMG_NULL;
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_DEVINITPART2);
return 0;
}
+ /* Copy debug script commands from UM to KM */
+ for(i = 0; i < SGX_FEATURE_MP_CORE_COUNT_3D; i++)
+ {
+ /* Allocate memory in KM */
+ psSGXDevInitPart2OUT->eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+ SGX_MAX_PRINT_COMMANDS * sizeof(SGX_INIT_COMMAND),
+ (IMG_VOID **) &pCommands,
+ 0,
+ "debug script commands kernel copy");
+
+ if(psSGXDevInitPart2OUT->eError != PVRSRV_OK)
+ {
+ return 0;
+ }
+
+ /* Copy commands */
+ if(CopyFromUserWrapper(psPerProc,
+ ui32BridgeID,
+ pCommands,
+ psSGXDevInitPart2IN->sInitInfo.sScripts.apsSGXREGDebugCommandsPart2[i],
+ SGX_MAX_PRINT_COMMANDS * sizeof(SGX_INIT_COMMAND)) != PVRSRV_OK)
+ {
+ OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
+ SGX_MAX_PRINT_COMMANDS * sizeof(SGX_INIT_COMMAND),
+ pCommands,
+ 0);
+ return -EFAULT;
+
+ }
+ /* update pointer */
+ psSGXDevInitPart2IN->sInitInfo.sScripts.apsSGXREGDebugCommandsPart2[i] = pCommands;
+
+ }
+
/* Check all the meminfo handles */
eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
&hDummy,
bLookupFailed = IMG_TRUE;
}
-#if defined(FIX_HW_BRN_29702)
- eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
- &hDummy,
- psSGXDevInitPart2IN->sInitInfo.hKernelCFIMemInfo,
- PVRSRV_HANDLE_TYPE_MEM_INFO);
- if (eError != PVRSRV_OK)
- {
- bLookupFailed = IMG_TRUE;
- }
-#endif
-
-#if defined(FIX_HW_BRN_29823)
- eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
- &hDummy,
- psSGXDevInitPart2IN->sInitInfo.hKernelDummyTermStreamMemInfo,
- PVRSRV_HANDLE_TYPE_MEM_INFO);
- if (eError != PVRSRV_OK)
- {
- bLookupFailed = IMG_TRUE;
- }
-#endif
-
#if defined(FIX_HW_BRN_31542) || defined(FIX_HW_BRN_36513)
eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
}
#endif
-#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31559)
- eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
- &hDummy,
- psSGXDevInitPart2IN->sInitInfo.hKernelVDMSnapShotBufferMemInfo,
- PVRSRV_HANDLE_TYPE_MEM_INFO);
- if (eError != PVRSRV_OK)
- {
- bLookupFailed = IMG_TRUE;
- }
-
- eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
- &hDummy,
- psSGXDevInitPart2IN->sInitInfo.hKernelVDMCtrlStreamBufferMemInfo,
- PVRSRV_HANDLE_TYPE_MEM_INFO);
- if (eError != PVRSRV_OK)
- {
- bLookupFailed = IMG_TRUE;
- }
-#endif
#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && \
defined(FIX_HW_BRN_33657) && defined(SUPPORT_SECURE_33657_FIX)
eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHandle = psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
-#else
IMG_HANDLE hHandle = psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- if (hHandle == 0)
-#else
if (hHandle == IMG_NULL)
-#endif
{
continue;
}
/* Lookup and release the device memory handles */
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelCCBMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelCCBMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelCCBMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelCCBCtlMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelCCBCtlMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelCCBCtlMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelCCBEventKickerMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelCCBEventKickerMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelCCBEventKickerMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelSGXHostCtlMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelSGXHostCtlMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelSGXHostCtlMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelSGXTA3DCtlMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelSGXTA3DCtlMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelSGXTA3DCtlMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
#if defined(FIX_HW_BRN_31272) || defined(FIX_HW_BRN_31780) || defined(FIX_HW_BRN_33920)
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelSGXPTLAWriteBackMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelSGXPTLAWriteBackMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelSGXPTLAWriteBackMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
#endif
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelSGXMiscMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelSGXMiscMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelSGXMiscMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
#if defined(SGX_SUPPORT_HWPROFILING)
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelHWProfilingMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelHWProfilingMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelHWProfilingMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
#if defined(SUPPORT_SGX_HWPERF)
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelHWPerfCBMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
#endif
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelTASigBufferMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelTASigBufferMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelTASigBufferMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernel3DSigBufferMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernel3DSigBufferMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernel3DSigBufferMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
bReleaseFailed = IMG_TRUE;
}
-#if defined(FIX_HW_BRN_29702)
- eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelCFIMemInfo,
-#else
- &psSGXDevInitPart2IN->sInitInfo.hKernelCFIMemInfo,
-#endif
- psSGXDevInitPart2IN->sInitInfo.hKernelCFIMemInfo,
- PVRSRV_HANDLE_TYPE_MEM_INFO);
- if (eError != PVRSRV_OK)
- {
- bLookupFailed = IMG_TRUE;
- }
-#endif
-
-#if defined(FIX_HW_BRN_29823)
- eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelDummyTermStreamMemInfo,
-#else
- &psSGXDevInitPart2IN->sInitInfo.hKernelDummyTermStreamMemInfo,
-#endif
- psSGXDevInitPart2IN->sInitInfo.hKernelDummyTermStreamMemInfo,
- PVRSRV_HANDLE_TYPE_MEM_INFO);
- if (eError != PVRSRV_OK)
- {
- bReleaseFailed = IMG_TRUE;
- }
-#endif
-
#if defined(FIX_HW_BRN_31542) || defined(FIX_HW_BRN_36513)
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelClearClipWAVDMStreamMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAVDMStreamMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAVDMStreamMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
bReleaseFailed = IMG_TRUE;
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelClearClipWAIndexStreamMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAIndexStreamMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAIndexStreamMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
bReleaseFailed = IMG_TRUE;
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelClearClipWAPDSMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPDSMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPDSMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
bReleaseFailed = IMG_TRUE;
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelClearClipWAUSEMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAUSEMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAUSEMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
bReleaseFailed = IMG_TRUE;
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelClearClipWAParamMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAParamMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAParamMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
bReleaseFailed = IMG_TRUE;
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelClearClipWAPMPTMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPMPTMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPMPTMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
bReleaseFailed = IMG_TRUE;
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelClearClipWATPCMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWATPCMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWATPCMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
bReleaseFailed = IMG_TRUE;
}
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelClearClipWAPSGRgnHdrMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPSGRgnHdrMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPSGRgnHdrMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
bReleaseFailed = IMG_TRUE;
}
#endif
-#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31559)
- eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
- &psSGXDevInitPart2IN->sInitInfo.hKernelVDMSnapShotBufferMemInfo,
- psSGXDevInitPart2IN->sInitInfo.hKernelVDMSnapShotBufferMemInfo,
- PVRSRV_HANDLE_TYPE_MEM_INFO);
- if (eError != PVRSRV_OK)
- {
- bReleaseFailed = IMG_TRUE;
- }
-
- eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
- &psSGXDevInitPart2IN->sInitInfo.hKernelVDMCtrlStreamBufferMemInfo,
- psSGXDevInitPart2IN->sInitInfo.hKernelVDMCtrlStreamBufferMemInfo,
- PVRSRV_HANDLE_TYPE_MEM_INFO);
- if (eError != PVRSRV_OK)
- {
- bReleaseFailed = IMG_TRUE;
- }
-#endif
#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && \
defined(FIX_HW_BRN_33657) && defined(SUPPORT_SECURE_33657_FIX)
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- &asInitInfoKM.hKernelEDMStatusBufferMemInfo,
-#else
&psSGXDevInitPart2IN->sInitInfo.hKernelEDMStatusBufferMemInfo,
-#endif
psSGXDevInitPart2IN->sInitInfo.hKernelEDMStatusBufferMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHandle = psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
- IMG_HANDLE *phHandleKM = &asInitInfoKM.asInitMemHandles[i];
-
- if (hHandle == 0)
-#else
IMG_HANDLE *phHandle = &psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
if (*phHandle == IMG_NULL)
-#endif
continue;
eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
-#if defined (SUPPORT_SID_INTERFACE)
- phHandleKM,
- hHandle,
-#else
phHandle,
*phHandle,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
if (eError != PVRSRV_OK)
{
}
/* Dissociate device memory from caller */
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCCBMemInfo);
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCCBMemInfo);
-#endif
if (eError != PVRSRV_OK)
{
bDissociateFailed = IMG_TRUE;
}
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCCBCtlMemInfo);
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCCBCtlMemInfo);
-#endif
if (eError != PVRSRV_OK)
{
bDissociateFailed = IMG_TRUE;
}
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCCBEventKickerMemInfo);
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCCBEventKickerMemInfo);
-#endif
if (eError != PVRSRV_OK)
{
bDissociateFailed = IMG_TRUE;
}
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXHostCtlMemInfo);
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXHostCtlMemInfo);
-#endif
if (eError != PVRSRV_OK)
{
bDissociateFailed = IMG_TRUE;
}
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXTA3DCtlMemInfo);
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXTA3DCtlMemInfo);
-#endif
if (eError != PVRSRV_OK)
{
bDissociateFailed = IMG_TRUE;
}
#if defined(FIX_HW_BRN_31272) || defined(FIX_HW_BRN_31780) || defined(FIX_HW_BRN_33920)
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXPTLAWriteBackMemInfo);
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXPTLAWriteBackMemInfo);
-#endif
if (eError != PVRSRV_OK)
{
bDissociateFailed = IMG_TRUE;
#endif
/* Dissociate SGX MiscInfo buffer from user space */
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXMiscMemInfo);
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXMiscMemInfo);
-#endif
if (eError != PVRSRV_OK)
{
bDissociateFailed = IMG_TRUE;
#if defined(SGX_SUPPORT_HWPROFILING)
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelHWProfilingMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelHWProfilingMemInfo);
bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
#endif
-#endif
#if defined(SUPPORT_SGX_HWPERF)
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelHWPerfCBMemInfo);
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo);
-#endif
if (eError != PVRSRV_OK)
{
bDissociateFailed = IMG_TRUE;
}
#endif
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelTASigBufferMemInfo);
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelTASigBufferMemInfo);
-#endif
if (eError != PVRSRV_OK)
{
bDissociateFailed = IMG_TRUE;
}
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernel3DSigBufferMemInfo);
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernel3DSigBufferMemInfo);
-#endif
if (eError != PVRSRV_OK)
{
bDissociateFailed = IMG_TRUE;
}
-#if defined(FIX_HW_BRN_29702)
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCFIMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCFIMemInfo);
- bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
-#endif
-
-#if defined(FIX_HW_BRN_29823)
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelDummyTermStreamMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelDummyTermStreamMemInfo);
- bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
-#endif
-
#if defined(FIX_HW_BRN_31542) || defined(FIX_HW_BRN_36513)
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAVDMStreamMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAVDMStreamMemInfo);
bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAIndexStreamMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAIndexStreamMemInfo);
bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAPDSMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPDSMemInfo);
bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAUSEMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAUSEMemInfo);
bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAParamMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAParamMemInfo);
bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAPMPTMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPMPTMemInfo);
bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWATPCMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWATPCMemInfo);
bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelClearClipWAPSGRgnHdrMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelClearClipWAPSGRgnHdrMemInfo);
bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
#endif
-#endif
-#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31559)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelVDMSnapShotBufferMemInfo);
- bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelVDMCtrlStreamBufferMemInfo);
- bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && \
defined(FIX_HW_BRN_33657) && defined(SUPPORT_SECURE_33657_FIX)
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelVDMStateUpdateBufferMemInfo);
#endif
#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
-#if defined (SUPPORT_SID_INTERFACE)
- eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelEDMStatusBufferMemInfo);
- if (eError != PVRSRV_OK)
- {
- bDissociateFailed = IMG_TRUE;
- }
-#else
eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelEDMStatusBufferMemInfo);
bDissociateFailed |= (IMG_BOOL)(eError != PVRSRV_OK);
-#endif
#endif
for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_HANDLE hHandle = asInitInfoKM.asInitMemHandles[i];
-#else
IMG_HANDLE hHandle = psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
-#endif
if (hHandle == IMG_NULL)
continue;
/* If any dissociations failed, free all the device memory passed in */
if(bDissociateFailed)
{
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCCBMemInfo);
- PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelCCBCtlMemInfo);
- PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXHostCtlMemInfo);
- PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXTA3DCtlMemInfo);
-#if defined(FIX_HW_BRN_31272) || defined(FIX_HW_BRN_31780) || defined(FIX_HW_BRN_33920)
- PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXPTLAWriteBackMemInfo);
-#endif
- PVRSRVFreeDeviceMemKM(hDevCookieInt, asInitInfoKM.hKernelSGXMiscMemInfo);
-#else
PVRSRVFreeDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCCBMemInfo);
PVRSRVFreeDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelCCBCtlMemInfo);
PVRSRVFreeDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXHostCtlMemInfo);
PVRSRVFreeDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXPTLAWriteBackMemInfo);
#endif
PVRSRVFreeDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelSGXMiscMemInfo);
-#endif
for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_HANDLE hHandle = asInitInfoKM.asInitMemHandles[i];
-
- if (hHandle == 0)
-#else
IMG_HANDLE hHandle = psSGXDevInitPart2IN->sInitInfo.asInitMemHandles[i];
if (hHandle == IMG_NULL)
-#endif
continue;
PVRSRVFreeDeviceMemKM(hDevCookieInt, (PVRSRV_KERNEL_MEM_INFO *)hHandle);
return 0;
}
-#if defined (SUPPORT_SID_INTERFACE)
- asInitInfoKM.sScripts = psSGXDevInitPart2IN->sInitInfo.sScripts;
- asInitInfoKM.ui32ClientBuildOptions = psSGXDevInitPart2IN->sInitInfo.ui32ClientBuildOptions;
- asInitInfoKM.sSGXStructSizes = psSGXDevInitPart2IN->sInitInfo.sSGXStructSizes;
- asInitInfoKM.ui32CacheControl = psSGXDevInitPart2IN->sInitInfo.ui32CacheControl;
- asInitInfoKM.ui32EDMTaskReg0 = psSGXDevInitPart2IN->sInitInfo.ui32EDMTaskReg0;
- asInitInfoKM.ui32EDMTaskReg1 = psSGXDevInitPart2IN->sInitInfo.ui32EDMTaskReg1;
- asInitInfoKM.ui32ClkGateStatusReg = psSGXDevInitPart2IN->sInitInfo.ui32ClkGateStatusReg;
- asInitInfoKM.ui32ClkGateStatusMask = psSGXDevInitPart2IN->sInitInfo.ui32ClkGateStatusMask;
-
- OSMemCopy(&asInitInfoKM.asInitDevData ,
- &psSGXDevInitPart2IN->sInitInfo.asInitDevData,
- sizeof(asInitInfoKM.asInitDevData));
- OSMemCopy(&asInitInfoKM.aui32HostKickAddr,
- &psSGXDevInitPart2IN->sInitInfo.aui32HostKickAddr,
- sizeof(asInitInfoKM.aui32HostKickAddr));
-
- psSGXDevInitPart2OUT->eError =
- DevInitSGXPart2KM(psPerProc,
- hDevCookieInt,
- &asInitInfoKM);
-#else
psSGXDevInitPart2OUT->eError =
DevInitSGXPart2KM(psPerProc,
hDevCookieInt,
&psSGXDevInitPart2IN->sInitInfo);
-#endif
return 0;
}
PVRSRV_BRIDGE_RETURN *psRetOUT,
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_HANDLE hHWTransferContextInt = 0;
-#else
IMG_HANDLE hHWTransferContextInt;
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_UNREGISTER_HW_TRANSFER_CONTEXT);
IMG_UINT32 ui32KernelMemInfoHandlesCount =
psSGXAddSharedPBDescIN->ui32KernelMemInfoHandlesCount;
IMG_INT ret = 0;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phKernelMemInfoHandles = 0;
-#else
IMG_HANDLE *phKernelMemInfoHandles = IMG_NULL;
-#endif
PVRSRV_KERNEL_MEM_INFO **ppsKernelMemInfos = IMG_NULL;
IMG_UINT32 i;
PVRSRV_ERROR eError;
{
IMG_HANDLE hDevCookieInt;
IMG_UINT32 i;
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_HEAP_INFO_KM asHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
-#endif
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGXINFO_FOR_SRVINIT);
NEW_HANDLE_BATCH_OR_ERROR(psSGXInfoForSrvinitOUT->eError, psPerProc, PVRSRV_MAX_CLIENT_HEAPS);
psSGXInfoForSrvinitOUT->eError =
SGXGetInfoForSrvinitKM(hDevCookieInt,
-#if defined (SUPPORT_SID_INTERFACE)
- &asHeapInfo[0],
- &psSGXInfoForSrvinitOUT->sInitInfo.sPDDevPAddr);
-#else
&psSGXInfoForSrvinitOUT->sInitInfo);
-#endif
if(psSGXInfoForSrvinitOUT->eError != PVRSRV_OK)
{
psHeapInfo = &psSGXInfoForSrvinitOUT->sInitInfo.asHeapInfo[i];
-#if defined (SUPPORT_SID_INTERFACE)
- if ((asHeapInfo[i].ui32HeapID != (IMG_UINT32)SGX_UNDEFINED_HEAP_ID) &&
- (asHeapInfo[i].hDevMemHeap != IMG_NULL))
- {
- /* Allocate heap handle */
- PVRSRVAllocHandleNR(psPerProc->psHandleBase,
- &psHeapInfo->hDevMemHeap,
- asHeapInfo[i].hDevMemHeap,
- PVRSRV_HANDLE_TYPE_DEV_MEM_HEAP,
- PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
- }
- else
- {
- psHeapInfo->hDevMemHeap = 0;
- }
-
- psHeapInfo->ui32HeapID = asHeapInfo[i].ui32HeapID;
- psHeapInfo->sDevVAddrBase = asHeapInfo[i].sDevVAddrBase;
- psHeapInfo->ui32HeapByteSize = asHeapInfo[i].ui32HeapByteSize;
- psHeapInfo->ui32Attribs = asHeapInfo[i].ui32Attribs;
- psHeapInfo->ui32XTileStride = asHeapInfo[i].ui32XTileStride;
-#else
if (psHeapInfo->ui32HeapID != (IMG_UINT32)SGX_UNDEFINED_HEAP_ID)
{
IMG_HANDLE hDevMemHeapExt;
psHeapInfo->hDevMemHeap = hDevMemHeapExt;
}
}
-#endif
}
COMMIT_HANDLE_BATCH_OR_ERROR(psSGXInfoForSrvinitOUT->eError, psPerProc);
*****************************************************************************/
static IMG_VOID
DumpBufferArray(PVRSRV_PER_PROCESS_DATA *psPerProc,
-#if defined (SUPPORT_SID_INTERFACE)
- PSGX_KICKTA_DUMP_BUFFER_KM psBufferArray,
-#else
PSGX_KICKTA_DUMP_BUFFER psBufferArray,
-#endif
IMG_UINT32 ui32BufferArrayLength,
IMG_BOOL bDumpPolls)
{
for (i=0; i<ui32BufferArrayLength; i++)
{
-#if defined (SUPPORT_SID_INTERFACE)
- PSGX_KICKTA_DUMP_BUFFER_KM psBuffer;
-#else
PSGX_KICKTA_DUMP_BUFFER psBuffer;
-#endif
PVRSRV_KERNEL_MEM_INFO *psCtrlMemInfoKM;
IMG_CHAR * pszName;
IMG_HANDLE hUniqueTag;
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
IMG_UINT32 i;
-#if defined (SUPPORT_SID_INTERFACE)
- SGX_KICKTA_DUMP_BUFFER *psUMPtr;
- SGX_KICKTA_DUMP_BUFFER_KM *psKickTADumpBufferKM, *psKMPtr;
-#else
#if defined(__QNXNTO__)
const IMG_UINT32 NAME_BUFFER_SIZE = 30;
IMG_PCHAR pszNameBuffer, pszName;
IMG_UINT32 ui32NameBufferArraySize, ui32NameLength;
#endif
SGX_KICKTA_DUMP_BUFFER *psKickTADumpBuffer;
-#endif
IMG_UINT32 ui32BufferArrayLength =
psPDumpBufferArrayIN->ui32BufferArrayLength;
IMG_UINT32 ui32BufferArraySize =
PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_PDUMP_BUFFER_ARRAY);
-#if defined (SUPPORT_SID_INTERFACE)
- if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
- ui32BufferArraySize,
- (IMG_PVOID *)&psKickTADumpBufferKM, 0,
- "Array of Kick Tile Accelerator Dump Buffer") != PVRSRV_OK)
-#else
if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
ui32BufferArraySize,
(IMG_PVOID *)&psKickTADumpBuffer, 0,
"Array of Kick Tile Accelerator Dump Buffer") != PVRSRV_OK)
-#endif
{
return -ENOMEM;
}
-#if !defined (SUPPORT_SID_INTERFACE)
if(CopyFromUserWrapper(psPerProc,
ui32BridgeID,
psKickTADumpBuffer,
}
}
}
-#endif
#endif
for(i = 0; i < ui32BufferArrayLength; i++)
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_VOID *pvMemInfo = IMG_NULL;
- psUMPtr = &psPDumpBufferArrayIN->psBufferArray[i];
- psKMPtr = &psKickTADumpBufferKM[i];
-#else
IMG_VOID *pvMemInfo;
-#endif
eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
&pvMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psUMPtr->hKernelMemInfo,
-#else
psKickTADumpBuffer[i].hKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(eError != PVRSRV_OK)
"PVRSRVLookupHandle failed (%d)", eError));
break;
}
-#if defined (SUPPORT_SID_INTERFACE)
- psKMPtr->hKernelMemInfo = pvMemInfo;
-#else
psKickTADumpBuffer[i].hKernelMemInfo = pvMemInfo;
-#endif
#if defined(SUPPORT_SGX_NEW_STATUS_VALS)
eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
&pvMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- psUMPtr->hCtrlKernelMemInfo,
-#else
psKickTADumpBuffer[i].hCtrlKernelMemInfo,
-#endif
PVRSRV_HANDLE_TYPE_MEM_INFO);
if(eError != PVRSRV_OK)
"PVRSRVLookupHandle failed (%d)", eError));
break;
}
-#if defined (SUPPORT_SID_INTERFACE)
- psKMPtr->hCtrlKernelMemInfo = pvMemInfo;
- psKMPtr->sCtrlDevVAddr = psUMPtr->sCtrlDevVAddr;
-#else
psKickTADumpBuffer[i].hCtrlKernelMemInfo = pvMemInfo;
#endif
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- psKMPtr->ui32SpaceUsed = psUMPtr->ui32SpaceUsed;
- psKMPtr->ui32Start = psUMPtr->ui32Start;
- psKMPtr->ui32End = psUMPtr->ui32End;
- psKMPtr->ui32BufferSize = psUMPtr->ui32BufferSize;
- psKMPtr->ui32BackEndLength = psUMPtr->ui32BackEndLength;
- psKMPtr->uiAllocIndex = psUMPtr->uiAllocIndex;
- psKMPtr->pvLinAddr = psUMPtr->pvLinAddr;
- psKMPtr->pszName = psUMPtr->pszName;
-#endif
}
if(eError == PVRSRV_OK)
{
DumpBufferArray(psPerProc,
-#if defined (SUPPORT_SID_INTERFACE)
- psKickTADumpBufferKM,
-#else
psKickTADumpBuffer,
-#endif
ui32BufferArrayLength,
psPDumpBufferArrayIN->bDumpPolls);
}
-#if defined (SUPPORT_SID_INTERFACE)
- OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, ui32BufferArraySize, psKickTADumpBufferKM, 0);
-#else
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, ui32BufferArraySize, psKickTADumpBuffer, 0);
#if defined (__QNXNTO__)
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, ui32NameBufferArraySize, pszNameBuffer, 0);
-#endif
#endif
/*not nulling pointer, out of scope*/
PVRSRV_PER_PROCESS_DATA *psPerProc)
{
#if defined(SUPPORT_SGX_HWPERF)
-#if defined(__linux__)
+#if defined(__linux__) || defined(__QNXNTO__)
PVRSRV_SGXDEV_INFO *psDevInfo;
PVRSRV_DEVICE_NODE *psDeviceNode;
IMG_HANDLE hDevMemContextInt = 0;
#include "lists.h"
static IMG_BOOL
-ZeroBuf(BM_BUF *pBuf, BM_MAPPING *pMapping, IMG_SIZE_T ui32Bytes, IMG_UINT32 ui32Flags);
+ZeroBuf(BM_BUF *pBuf, BM_MAPPING *pMapping, IMG_SIZE_T uBytes, IMG_UINT32 ui32Flags);
static IMG_VOID
BM_FreeMemory (IMG_VOID *pH, IMG_UINTPTR_T base, BM_MAPPING *psMapping);
static IMG_BOOL
BM_ImportMemory(IMG_VOID *pH, IMG_SIZE_T uSize,
IMG_SIZE_T *pActualSize, BM_MAPPING **ppsMapping,
- IMG_UINT32 uFlags, IMG_PVOID pvPrivData,
+ IMG_UINT32 ui32Flags, IMG_PVOID pvPrivData,
IMG_UINT32 ui32PrivDataLength, IMG_UINTPTR_T *pBase);
static IMG_BOOL
DevMemoryAlloc (BM_CONTEXT *pBMContext,
BM_MAPPING *pMapping,
IMG_SIZE_T *pActualSize,
- IMG_UINT32 uFlags,
+ IMG_UINT32 ui32Flags,
IMG_UINT32 dev_vaddr_alignment,
IMG_DEV_VIRTADDR *pDevVAddr);
static IMG_VOID
@Input psBMHeap - BM heap
@Input psDevVAddr - device virtual address (optional)
@Input uSize - requested buffer size in bytes.
- @Input uFlags - property flags for the buffer.
+ @Input ui32Flags - property flags for the buffer.
@Input uDevVAddrAlignment - required device virtual address
alignment, or 0.
@Input pvPrivData - opaque private data passed through to allocator
BM_HEAP *psBMHeap,
IMG_DEV_VIRTADDR *psDevVAddr,
IMG_SIZE_T uSize,
- IMG_UINT32 uFlags,
+ IMG_UINT32 ui32Flags,
IMG_UINT32 uDevVAddrAlignment,
IMG_PVOID pvPrivData,
IMG_UINT32 ui32PrivDataLength,
RA_ARENA *pArena = IMG_NULL;
PVR_DPF ((PVR_DBG_MESSAGE,
- "AllocMemory (uSize=0x%x, uFlags=0x%x, align=0x%x)",
- uSize, uFlags, uDevVAddrAlignment));
+ "AllocMemory (uSize=0x%" SIZE_T_FMT_LEN "x, ui32Flags=0x%x, align=0x%x)",
+ uSize, ui32Flags, uDevVAddrAlignment));
/*
what to do depends on combination of DevVaddr generation
and backing RAM requirement
*/
- if(uFlags & PVRSRV_MEM_RAM_BACKED_ALLOCATION)
+ if(ui32Flags & PVRSRV_MEM_RAM_BACKED_ALLOCATION)
{
- if(uFlags & PVRSRV_MEM_USER_SUPPLIED_DEVVADDR)
+ if(ui32Flags & PVRSRV_MEM_USER_SUPPLIED_DEVVADDR)
{
/* user supplied DevVAddr, RAM backing */
PVR_DPF ((PVR_DBG_ERROR, "AllocMemory: combination of DevVAddr management and RAM backing mode unsupported"));
}
/* Now allocate from the arena we chose above. */
- if (uFlags & PVRSRV_MEM_SPARSE)
+ if (ui32Flags & PVRSRV_MEM_SPARSE)
{
IMG_BOOL bSuccess;
- IMG_SIZE_T puiActualSize;
+ IMG_SIZE_T uActualSize;
/* Allocate physcial memory */
bSuccess = BM_ImportMemory(psBMHeap,
ui32ChunkSize * ui32NumPhysChunks,
- &puiActualSize,
+ &uActualSize,
&pMapping,
- uFlags,
+ ui32Flags,
pvPrivData,
ui32PrivDataLength,
IMG_NULL); /* We allocate VM space */
return IMG_FALSE;
}
- if (puiActualSize != ui32ChunkSize * ui32NumPhysChunks)
+ if (uActualSize != ui32ChunkSize * ui32NumPhysChunks)
{
/*
Most likley the chunksize was not host page multiple so
bSuccess = DevMemoryAlloc (pBMContext,
pMapping,
IMG_NULL,
- uFlags,
- (IMG_UINT32)uDevVAddrAlignment,
+ ui32Flags,
+ uDevVAddrAlignment,
&pMapping->DevVAddr);
if (!bSuccess)
{
uSize,
IMG_NULL,
(IMG_VOID*) &pMapping,
- uFlags,
+ ui32Flags,
uDevVAddrAlignment,
0,
pvPrivData,
ui32PrivDataLength,
(IMG_UINTPTR_T *)&(pBuf->DevVAddr.uiAddr)))
{
- PVR_DPF((PVR_DBG_ERROR, "AllocMemory: RA_Alloc(0x%x) FAILED", uSize));
+ PVR_DPF((PVR_DBG_ERROR, "AllocMemory: RA_Alloc(0x%" SIZE_T_FMT_LEN "x) FAILED", uSize));
return IMG_FALSE;
}
}
* will have a physical address, else 0 */
pBuf->CpuPAddr.uiAddr = pMapping->CpuPAddr.uiAddr + uOffset;
- if(uFlags & PVRSRV_MEM_ZERO)
+ if(ui32Flags & PVRSRV_MEM_ZERO)
{
- if(!ZeroBuf(pBuf, pMapping, uSize, psBMHeap->ui32Attribs | uFlags))
+ if(!ZeroBuf(pBuf, pMapping, uSize, psBMHeap->ui32Attribs | ui32Flags))
{
return IMG_FALSE;
}
}
else
{
- if(uFlags & PVRSRV_MEM_USER_SUPPLIED_DEVVADDR)
+ if(ui32Flags & PVRSRV_MEM_USER_SUPPLIED_DEVVADDR)
{
/* user supplied DevVAddr, no RAM backing */
PVR_ASSERT(psDevVAddr != IMG_NULL);
(IMG_PVOID *)&pMapping, IMG_NULL,
"Buffer Manager Mapping") != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR, "AllocMemory: OSAllocMem(0x%x) FAILED", sizeof(*pMapping)));
+ PVR_DPF((PVR_DBG_ERROR, "AllocMemory: OSAllocMem(0x%" SIZE_T_FMT_LEN "x) FAILED", sizeof(*pMapping)));
return IMG_FALSE;
}
/* output some stats */
PVR_DPF ((PVR_DBG_MESSAGE,
- "AllocMemory: pMapping=%08x: DevV=%08X CpuV=%08x CpuP=%08X uSize=0x%x",
- (IMG_UINTPTR_T)pMapping,
+ "AllocMemory: pMapping=%p: DevV=%08X CpuV=%p CpuP=" CPUPADDR_FMT " uSize=0x%" SIZE_T_FMT_LEN "x",
+ pMapping,
pMapping->DevVAddr.uiAddr,
- (IMG_UINTPTR_T)pMapping->CpuVAddr,
+ pMapping->CpuVAddr,
pMapping->CpuPAddr.uiAddr,
pMapping->uSize));
PVR_DPF ((PVR_DBG_MESSAGE,
- "AllocMemory: pBuf=%08x: DevV=%08X CpuV=%08x CpuP=%08X uSize=0x%x",
- (IMG_UINTPTR_T)pBuf,
+ "AllocMemory: pBuf=%p: DevV=%08X CpuV=%p CpuP=" CPUPADDR_FMT " uSize=0x%" SIZE_T_FMT_LEN "x",
+ pBuf,
pBuf->DevVAddr.uiAddr,
- (IMG_UINTPTR_T)pBuf->CpuVAddr,
+ pBuf->CpuVAddr,
pBuf->CpuPAddr.uiAddr,
uSize));
@Input bPhysContig - Is the wrap physically contiguous.
@Input psAddr - List of pages to wrap.
@Input pvCPUVAddr - Optional CPU Kernel virtual address (page aligned) of memory to wrap
- @Input uFlags - property flags for the buffer.
+ @Input ui32Flags - property flags for the buffer.
@Output Buf - receives a pointer to a descriptor of the allocated
buffer.
@Return IMG_TRUE - Success
static IMG_BOOL
WrapMemory (BM_HEAP *psBMHeap,
IMG_SIZE_T uSize,
- IMG_SIZE_T ui32BaseOffset,
+ IMG_SIZE_T uiBaseOffset,
IMG_BOOL bPhysContig,
IMG_SYS_PHYADDR *psAddr,
IMG_VOID *pvCPUVAddr,
- IMG_UINT32 uFlags,
+ IMG_UINT32 ui32Flags,
BM_BUF *pBuf)
{
IMG_DEV_VIRTADDR DevVAddr = {0};
BM_MAPPING *pMapping;
IMG_BOOL bResult;
- IMG_SIZE_T const ui32PageSize = HOST_PAGESIZE();
+ IMG_SIZE_T const uPageSize = HOST_PAGESIZE();
+ /* We should not pass down R/W flags into the OS layers so create ui32Attribs */
+ IMG_UINT32 ui32Attribs = ui32Flags & ~(PVRSRV_MEM_READ | PVRSRV_MEM_WRITE);
PVR_DPF ((PVR_DBG_MESSAGE,
- "WrapMemory(psBMHeap=%08X, size=0x%x, offset=0x%x, bPhysContig=0x%x, pvCPUVAddr = 0x%08x, flags=0x%x)",
- (IMG_UINTPTR_T)psBMHeap, uSize, ui32BaseOffset, bPhysContig, (IMG_UINTPTR_T)pvCPUVAddr, uFlags));
-
- PVR_ASSERT((psAddr->uiAddr & (ui32PageSize - 1)) == 0);
+ "WrapMemory(psBMHeap=%p, size=0x%" SIZE_T_FMT_LEN "x, offset=0x%" SIZE_T_FMT_LEN
+ "x, bPhysContig=0x%x, sysPAddr=0x" SYSPADDR_FMT ", pvCPUVAddr = 0x%p, flags=0x%x)",
+ psBMHeap,
+ uSize,
+ uiBaseOffset,
+ bPhysContig,
+ psAddr->uiAddr,
+ pvCPUVAddr,
+ ui32Flags));
+
+ PVR_ASSERT((psAddr->uiAddr & (uPageSize - 1)) == 0);
/* Only need lower 12 bits of the cpu addr - don't care what size a void* is */
- PVR_ASSERT(((IMG_UINTPTR_T)pvCPUVAddr & (ui32PageSize - 1)) == 0);
+ PVR_ASSERT(((IMG_UINTPTR_T)pvCPUVAddr & (uPageSize - 1)) == 0);
- uSize += ui32BaseOffset;
+ uSize += uiBaseOffset;
uSize = HOST_PAGEALIGN (uSize);
/* allocate a mocked-up mapping */
(IMG_PVOID *)&pMapping, IMG_NULL,
"Mocked-up mapping") != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSAllocMem(0x%x) FAILED",sizeof(*pMapping)));
+ PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSAllocMem(0x%" SIZE_T_FMT_LEN "x) FAILED", sizeof(*pMapping)));
return IMG_FALSE;
}
if(OSRegisterMem(pMapping->CpuPAddr,
pMapping->CpuVAddr,
pMapping->uSize,
- uFlags,
+ ui32Attribs,
&pMapping->hOSMemHandle) != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSRegisterMem Phys=0x%08X, Size=%d) failed",
+ PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSRegisterMem Phys=0x" CPUPADDR_FMT ", Size=%" SIZE_T_FMT_LEN "u) failed",
pMapping->CpuPAddr.uiAddr, pMapping->uSize));
goto fail_cleanup;
}
if(OSRegisterDiscontigMem(pMapping->psSysAddr,
pMapping->CpuVAddr,
pMapping->uSize,
- uFlags,
+ ui32Attribs,
&pMapping->hOSMemHandle) != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSRegisterDiscontigMem Size=%d) failed",
+ PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSRegisterDiscontigMem Size=0x%" SIZE_T_FMT_LEN "u) failed",
pMapping->uSize));
goto fail_cleanup;
}
if(OSReservePhys(pMapping->CpuPAddr,
pMapping->uSize,
- uFlags,
+ ui32Attribs,
IMG_NULL,
&pMapping->CpuVAddr,
&pMapping->hOSMemHandle) != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSReservePhys Phys=0x%08X, Size=%d) failed",
+ PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSReservePhys Phys=0x" CPUPADDR_FMT ", Size=%" SIZE_T_FMT_LEN "u) failed",
pMapping->CpuPAddr.uiAddr, pMapping->uSize));
goto fail_cleanup;
}
if(OSReserveDiscontigPhys(pMapping->psSysAddr,
pMapping->uSize,
- uFlags,
+ ui32Attribs,
&pMapping->CpuVAddr,
&pMapping->hOSMemHandle) != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSReserveDiscontigPhys Size=%d) failed",
+ PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSReserveDiscontigPhys Size=%" SIZE_T_FMT_LEN "u) failed",
pMapping->uSize));
goto fail_cleanup;
}
}
/*
- * Allocate device memory for this buffer. Map wrapped pages as read/write
+ * Allocate device memory for this buffer.
*/
bResult = DevMemoryAlloc(psBMHeap->pBMContext,
pMapping,
IMG_NULL,
- uFlags | PVRSRV_MEM_READ | PVRSRV_MEM_WRITE,
- IMG_CAST_TO_DEVVADDR_UINT(ui32PageSize),
+ ui32Flags,
+ IMG_CAST_TO_DEVVADDR_UINT(uPageSize),
&DevVAddr);
if (!bResult)
{
PVR_DPF((PVR_DBG_ERROR,
- "WrapMemory: DevMemoryAlloc(0x%x) failed",
+ "WrapMemory: DevMemoryAlloc(0x%" SIZE_T_FMT_LEN "x) failed",
pMapping->uSize));
goto fail_cleanup;
}
* addresses associated with this allocation are placed at the same
* offset within the underlying chunk.
*/
- pBuf->CpuPAddr.uiAddr = pMapping->CpuPAddr.uiAddr + ui32BaseOffset;
- if(!ui32BaseOffset)
+ pBuf->CpuPAddr.uiAddr = pMapping->CpuPAddr.uiAddr + uiBaseOffset;
+ if(!uiBaseOffset)
{
pBuf->hOSMemHandle = pMapping->hOSMemHandle;
}
else
{
if(OSGetSubMemHandle(pMapping->hOSMemHandle,
- ui32BaseOffset,
- (pMapping->uSize-ui32BaseOffset),
- uFlags,
+ uiBaseOffset,
+ (pMapping->uSize - uiBaseOffset),
+ ui32Attribs,
&pBuf->hOSMemHandle)!=PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "WrapMemory: OSGetSubMemHandle failed"));
}
if(pMapping->CpuVAddr)
{
- pBuf->CpuVAddr = (IMG_VOID*) ((IMG_UINTPTR_T)pMapping->CpuVAddr + ui32BaseOffset);
+ pBuf->CpuVAddr = (IMG_VOID*) ((IMG_UINTPTR_T)pMapping->CpuVAddr + uiBaseOffset);
}
- pBuf->DevVAddr.uiAddr = pMapping->DevVAddr.uiAddr + IMG_CAST_TO_DEVVADDR_UINT(ui32BaseOffset);
+ pBuf->DevVAddr.uiAddr = pMapping->DevVAddr.uiAddr + IMG_CAST_TO_DEVVADDR_UINT(uiBaseOffset);
- if(uFlags & PVRSRV_MEM_ZERO)
+ if(ui32Flags & PVRSRV_MEM_ZERO)
{
- if(!ZeroBuf(pBuf, pMapping, uSize, uFlags))
+ if(!ZeroBuf(pBuf, pMapping, uSize, ui32Flags))
{
return IMG_FALSE;
}
PVR_DPF ((PVR_DBG_MESSAGE, "DevVaddr.uiAddr=%08X", DevVAddr.uiAddr));
PVR_DPF ((PVR_DBG_MESSAGE,
- "WrapMemory: DevV=%08X CpuP=%08X uSize=0x%x",
+ "WrapMemory: DevV=%08X CpuP=" CPUPADDR_FMT " uSize=0x%" SIZE_T_FMT_LEN "x",
pMapping->DevVAddr.uiAddr, pMapping->CpuPAddr.uiAddr, pMapping->uSize));
PVR_DPF ((PVR_DBG_MESSAGE,
- "WrapMemory: DevV=%08X CpuP=%08X uSize=0x%x",
+ "WrapMemory: DevV=%08X CpuP=" CPUPADDR_FMT " uSize=0x%" SIZE_T_FMT_LEN "x",
pBuf->DevVAddr.uiAddr, pBuf->CpuPAddr.uiAddr, uSize));
pBuf->pMapping = pMapping;
return IMG_TRUE;
fail_cleanup:
- if(ui32BaseOffset && pBuf->hOSMemHandle)
+ if(uiBaseOffset && pBuf->hOSMemHandle)
{
- OSReleaseSubMemHandle(pBuf->hOSMemHandle, uFlags);
+ OSReleaseSubMemHandle(pBuf->hOSMemHandle, ui32Attribs);
}
if(pMapping && (pMapping->CpuVAddr || pMapping->hOSMemHandle))
switch(pMapping->eCpuMemoryOrigin)
{
case hm_wrapped:
- OSUnReservePhys(pMapping->CpuVAddr, pMapping->uSize, uFlags, pMapping->hOSMemHandle);
+ OSUnReservePhys(pMapping->CpuVAddr, pMapping->uSize, ui32Attribs, pMapping->hOSMemHandle);
break;
case hm_wrapped_virtaddr:
- OSUnRegisterMem(pMapping->CpuVAddr, pMapping->uSize, uFlags, pMapping->hOSMemHandle);
+ OSUnRegisterMem(pMapping->CpuVAddr, pMapping->uSize, ui32Attribs, pMapping->hOSMemHandle);
break;
case hm_wrapped_scatter:
- OSUnReserveDiscontigPhys(pMapping->CpuVAddr, pMapping->uSize, uFlags, pMapping->hOSMemHandle);
+ OSUnReserveDiscontigPhys(pMapping->CpuVAddr, pMapping->uSize, ui32Attribs, pMapping->hOSMemHandle);
break;
case hm_wrapped_scatter_virtaddr:
- OSUnRegisterDiscontigMem(pMapping->CpuVAddr, pMapping->uSize, uFlags, pMapping->hOSMemHandle);
+ OSUnRegisterDiscontigMem(pMapping->CpuVAddr, pMapping->uSize, ui32Attribs, pMapping->hOSMemHandle);
break;
default:
break;
static IMG_BOOL
-ZeroBuf(BM_BUF *pBuf, BM_MAPPING *pMapping, IMG_SIZE_T ui32Bytes, IMG_UINT32 ui32Flags)
+ZeroBuf(BM_BUF *pBuf, BM_MAPPING *pMapping, IMG_SIZE_T uBytes, IMG_UINT32 ui32Flags)
{
IMG_VOID *pvCpuVAddr;
if(pBuf->CpuVAddr)
{
- OSMemSet(pBuf->CpuVAddr, 0, ui32Bytes);
+ OSMemSet(pBuf->CpuVAddr, 0, uBytes);
}
else if(pMapping->eCpuMemoryOrigin == hm_contiguous
|| pMapping->eCpuMemoryOrigin == hm_wrapped)
{
pvCpuVAddr = OSMapPhysToLin(pBuf->CpuPAddr,
- ui32Bytes,
+ uBytes,
PVRSRV_HAP_KERNEL_ONLY
| (ui32Flags & PVRSRV_HAP_CACHETYPE_MASK),
IMG_NULL);
PVR_DPF((PVR_DBG_ERROR, "ZeroBuf: OSMapPhysToLin for contiguous buffer failed"));
return IMG_FALSE;
}
- OSMemSet(pvCpuVAddr, 0, ui32Bytes);
+ OSMemSet(pvCpuVAddr, 0, uBytes);
OSUnMapPhysToLin(pvCpuVAddr,
- ui32Bytes,
+ uBytes,
PVRSRV_HAP_KERNEL_ONLY
| (ui32Flags & PVRSRV_HAP_CACHETYPE_MASK),
IMG_NULL);
}
else
{
- IMG_SIZE_T ui32BytesRemaining = ui32Bytes;
- IMG_SIZE_T ui32CurrentOffset = 0;
+ IMG_SIZE_T uBytesRemaining = uBytes;
+ IMG_SIZE_T uCurrentOffset = 0;
IMG_CPU_PHYADDR CpuPAddr;
/* Walk through the pBuf one page at a time and use
PVR_ASSERT(pBuf->hOSMemHandle);
- while(ui32BytesRemaining > 0)
+ while(uBytesRemaining > 0)
{
- IMG_SIZE_T ui32BlockBytes = MIN(ui32BytesRemaining, HOST_PAGESIZE());
- CpuPAddr = OSMemHandleToCpuPAddr(pBuf->hOSMemHandle, ui32CurrentOffset);
+ IMG_SIZE_T uBlockBytes = MIN(uBytesRemaining, HOST_PAGESIZE());
+ CpuPAddr = OSMemHandleToCpuPAddr(pBuf->hOSMemHandle, uCurrentOffset);
/* If the CpuPAddr isn't page aligned then start by writing up to the next page
- * boundary (or ui32BytesRemaining if less), so that subsequent iterations can
+ * boundary (or uBytesRemaining if less), so that subsequent iterations can
* copy full physical pages. */
if(CpuPAddr.uiAddr & (HOST_PAGESIZE() -1))
{
- ui32BlockBytes =
- MIN(ui32BytesRemaining, (IMG_UINT32)(HOST_PAGEALIGN(CpuPAddr.uiAddr) - CpuPAddr.uiAddr));
+ uBlockBytes =
+ MIN(uBytesRemaining, (IMG_UINT32)(HOST_PAGEALIGN(CpuPAddr.uiAddr) - CpuPAddr.uiAddr));
}
pvCpuVAddr = OSMapPhysToLin(CpuPAddr,
- ui32BlockBytes,
+ uBlockBytes,
PVRSRV_HAP_KERNEL_ONLY
| (ui32Flags & PVRSRV_HAP_CACHETYPE_MASK),
IMG_NULL);
PVR_DPF((PVR_DBG_ERROR, "ZeroBuf: OSMapPhysToLin while zeroing non-contiguous memory FAILED"));
return IMG_FALSE;
}
- OSMemSet(pvCpuVAddr, 0, ui32BlockBytes);
+ OSMemSet(pvCpuVAddr, 0, uBlockBytes);
OSUnMapPhysToLin(pvCpuVAddr,
- ui32BlockBytes,
+ uBlockBytes,
PVRSRV_HAP_KERNEL_ONLY
| (ui32Flags & PVRSRV_HAP_CACHETYPE_MASK),
IMG_NULL);
- ui32BytesRemaining -= ui32BlockBytes;
- ui32CurrentOffset += ui32BlockBytes;
+ uBytesRemaining -= uBlockBytes;
+ uCurrentOffset += uBlockBytes;
}
}
PVRSRV_DEVICE_NODE *psDeviceNode;
PVR_DPF ((PVR_DBG_MESSAGE,
- "FreeBuf: pBuf=0x%x: DevVAddr=%08X CpuVAddr=0x%x CpuPAddr=%08X",
- (IMG_UINTPTR_T)pBuf, pBuf->DevVAddr.uiAddr,
- (IMG_UINTPTR_T)pBuf->CpuVAddr, pBuf->CpuPAddr.uiAddr));
+ "FreeBuf: pBuf=0x%p: DevVAddr=%08X CpuVAddr=0x%p CpuPAddr=" CPUPADDR_FMT,
+ pBuf, pBuf->DevVAddr.uiAddr,
+ pBuf->CpuVAddr, pBuf->CpuPAddr.uiAddr));
/* record mapping */
pMapping = pBuf->pMapping;
BM_CONTEXT *pBMContext;
BM_HEAP *psBMHeap;
SYS_DATA *psSysData;
- IMG_UINT32 uFlags;
+ IMG_UINT32 ui32Flags;
if (pui32Flags == IMG_NULL)
{
return IMG_FALSE;
}
- uFlags = *pui32Flags;
+ ui32Flags = *pui32Flags;
PVR_DPF ((PVR_DBG_MESSAGE,
- "BM_Alloc (uSize=0x%x, uFlags=0x%x, uDevVAddrAlignment=0x%x)",
- uSize, uFlags, uDevVAddrAlignment));
+ "BM_Alloc (uSize=0x%" SIZE_T_FMT_LEN "x, ui32Flags=0x%x, uDevVAddrAlignment=0x%x)",
+ uSize, ui32Flags, uDevVAddrAlignment));
SysAcquireData(&psSysData);
psBMHeap,
psDevVAddr,
uSize,
- uFlags,
+ ui32Flags,
uDevVAddrAlignment,
pvPrivData,
ui32PrivDataLength,
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "BM_Alloc (uSize=0x%x, uFlags=0x%x)",
- uSize, uFlags));
+ "BM_Alloc (uSize=0x%" SIZE_T_FMT_LEN "x, ui32Flags=0x%x)",
+ uSize, ui32Flags));
/*
* Assign the handle and return.
*/
pBuf->ui32RefCount = 1;
*phBuf = (BM_HANDLE)pBuf;
- *pui32Flags = uFlags | psBMHeap->ui32Attribs;
+ *pui32Flags = ui32Flags | psBMHeap->ui32Attribs;
/*
* If the user has specified heap CACHETYPE flags themselves,
* override any CACHETYPE flags inherited from the heap.
*/
- if(uFlags & PVRSRV_HAP_CACHETYPE_MASK)
+ if(ui32Flags & PVRSRV_HAP_CACHETYPE_MASK)
{
*pui32Flags &= ~PVRSRV_HAP_CACHETYPE_MASK;
- *pui32Flags |= (uFlags & PVRSRV_HAP_CACHETYPE_MASK);
+ *pui32Flags |= (ui32Flags & PVRSRV_HAP_CACHETYPE_MASK);
}
return IMG_TRUE;
@Input psDeviceNode
@Input psSysPAddr - system address array
- @Input ui32PageSize - size of address array
+ @Input uPageSize - size of address array
@Return IMG_BOOL
*****************************************************************************/
static IMG_BOOL
-ValidSysPAddrArrayForDev(PVRSRV_DEVICE_NODE *psDeviceNode, IMG_SYS_PHYADDR *psSysPAddr, IMG_UINT32 ui32PageCount, IMG_SIZE_T ui32PageSize)
+ValidSysPAddrArrayForDev(PVRSRV_DEVICE_NODE *psDeviceNode, IMG_SYS_PHYADDR *psSysPAddr, IMG_UINT32 ui32PageCount, IMG_SIZE_T uPageSize)
{
IMG_UINT32 i;
return IMG_FALSE;
}
- sEndSysPAddr.uiAddr = sStartSysPAddr.uiAddr + ui32PageSize;
+ sEndSysPAddr.uiAddr = sStartSysPAddr.uiAddr + uPageSize;
if (!SysVerifySysPAddrToDevPAddr(psDeviceNode->sDevId.eDeviceType, sEndSysPAddr))
{
*****************************************************************************/
static IMG_BOOL
-ValidSysPAddrRangeForDev(PVRSRV_DEVICE_NODE *psDeviceNode, IMG_SYS_PHYADDR sStartSysPAddr, IMG_SIZE_T ui32Range)
+ValidSysPAddrRangeForDev(PVRSRV_DEVICE_NODE *psDeviceNode, IMG_SYS_PHYADDR sStartSysPAddr, IMG_SIZE_T uRange)
{
IMG_SYS_PHYADDR sEndSysPAddr;
return IMG_FALSE;
}
- sEndSysPAddr.uiAddr = sStartSysPAddr.uiAddr + ui32Range;
+ sEndSysPAddr.uiAddr = sStartSysPAddr.uiAddr + uRange;
if (!SysVerifySysPAddrToDevPAddr(psDeviceNode->sDevId.eDeviceType, sEndSysPAddr))
{
return IMG_TRUE;
}
-#define WRAP_MAPPING_SIZE(ui32ByteSize, ui32PageOffset) HOST_PAGEALIGN((ui32ByteSize) + (ui32PageOffset))
+#define WRAP_MAPPING_SIZE(uByteSize, uPageOffset) HOST_PAGEALIGN((uByteSize) + (uPageOffset))
-#define WRAP_PAGE_COUNT(ui32ByteSize, ui32PageOffset, ui32HostPageSize) (WRAP_MAPPING_SIZE(ui32ByteSize, ui32PageOffset) / (ui32HostPageSize))
+#define WRAP_PAGE_COUNT(uByteSize, uPageOffset, uHostPageSize) (WRAP_MAPPING_SIZE(uByteSize, uPageOffset) / (uHostPageSize))
#endif
The wrapped memory must be page aligned. BM_Wrap will
roundup the size to a multiple of cpu pages.
- @Input ui32Size - size of memory to wrap.
+ @Input uSize - size of memory to wrap.
@Input ui32Offset - Offset into page of memory to wrap.
@Input bPhysContig - Is the wrap physically contiguous.
@Input psSysAddr - list of system physical page addresses of memory to wrap.
@Input pvCPUVAddr - optional CPU kernel virtual address (Page aligned) of memory to wrap.
- @Input uFlags - bit mask of buffer property flags.
+ @Input ui32Flags - bit mask of buffer property flags.
@output phBuf - receives the buffer handle.
@Return IMG_TRUE - Success.
*****************************************************************************/
IMG_BOOL
BM_Wrap ( IMG_HANDLE hDevMemHeap,
- IMG_SIZE_T ui32Size,
- IMG_SIZE_T ui32Offset,
+ IMG_SIZE_T uSize,
+ IMG_SIZE_T uOffset,
IMG_BOOL bPhysContig,
IMG_SYS_PHYADDR *psSysAddr,
IMG_VOID *pvCPUVAddr,
BM_HEAP *psBMHeap;
SYS_DATA *psSysData;
IMG_SYS_PHYADDR sHashAddress;
- IMG_UINT32 uFlags;
+ IMG_UINT32 ui32Flags;
psBMHeap = (BM_HEAP*)hDevMemHeap;
psBMContext = psBMHeap->pBMContext;
- uFlags = psBMHeap->ui32Attribs & (PVRSRV_HAP_CACHETYPE_MASK | PVRSRV_HAP_MAPTYPE_MASK);
+ ui32Flags = psBMHeap->ui32Attribs & (PVRSRV_HAP_CACHETYPE_MASK | PVRSRV_HAP_MAPTYPE_MASK);
if ((pui32Flags != IMG_NULL) && ((*pui32Flags & PVRSRV_HAP_CACHETYPE_MASK) != 0))
{
- uFlags &= ~PVRSRV_HAP_CACHETYPE_MASK;
- uFlags |= *pui32Flags & PVRSRV_HAP_CACHETYPE_MASK;
+ ui32Flags &= ~PVRSRV_HAP_CACHETYPE_MASK;
+ ui32Flags |= *pui32Flags & PVRSRV_HAP_CACHETYPE_MASK;
+ }
+
+ if ((pui32Flags != IMG_NULL) && ((*pui32Flags & (PVRSRV_MEM_READ | PVRSRV_MEM_WRITE)) != 0))
+ {
+ ui32Flags &= ~(PVRSRV_MEM_READ | PVRSRV_MEM_WRITE);
+ ui32Flags |= *pui32Flags & (PVRSRV_MEM_READ | PVRSRV_MEM_WRITE);
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "BM_Wrap (uSize=0x%x, uOffset=0x%x, bPhysContig=0x%x, pvCPUVAddr=0x%x, uFlags=0x%x)",
- ui32Size, ui32Offset, bPhysContig, (IMG_UINTPTR_T)pvCPUVAddr, uFlags));
+ "BM_Wrap (uSize=0x%" SIZE_T_FMT_LEN "x, uOffset=0x%" SIZE_T_FMT_LEN
+ "x, bPhysContig=0x%x, syspAddr=0x" SYSPADDR_FMT ", pvCPUVAddr=0x%p, ui32Flags=0x%x)",
+ uSize,
+ uOffset,
+ bPhysContig,
+ psSysAddr->uiAddr,
+ pvCPUVAddr,
+ ui32Flags));
SysAcquireData(&psSysData);
#if defined(PVR_LMA)
if (bPhysContig)
{
- if (!ValidSysPAddrRangeForDev(psBMContext->psDeviceNode, *psSysAddr, WRAP_MAPPING_SIZE(ui32Size, ui32Offset)))
+ if (!ValidSysPAddrRangeForDev(psBMContext->psDeviceNode, *psSysAddr, WRAP_MAPPING_SIZE(uSize, uOffset)))
{
PVR_DPF((PVR_DBG_ERROR, "BM_Wrap: System address range invalid for device"));
return IMG_FALSE;
}
else
{
- IMG_SIZE_T ui32HostPageSize = HOST_PAGESIZE();
+ IMG_SIZE_T uHostPageSize = HOST_PAGESIZE();
- if (!ValidSysPAddrArrayForDev(psBMContext->psDeviceNode, psSysAddr, WRAP_PAGE_COUNT(ui32Size, ui32Offset, ui32HostPageSize), ui32HostPageSize))
+ if (!ValidSysPAddrArrayForDev(psBMContext->psDeviceNode, psSysAddr, WRAP_PAGE_COUNT(uSize, uOffset, uHostPageSize), uHostPageSize))
{
PVR_DPF((PVR_DBG_ERROR, "BM_Wrap: Array of system addresses invalid for device"));
return IMG_FALSE;
sHashAddress = psSysAddr[0];
/* Add the in-page offset to ensure a unique hash */
- sHashAddress.uiAddr += ui32Offset;
+ sHashAddress.uiAddr += uOffset;
- /* See if this address has already been wrapped */
- pBuf = (BM_BUF *)HASH_Retrieve(psBMContext->pBufferHash, sHashAddress.uiAddr);
+ /* See if this address has already been wrapped, note that the cast is ok as this is only local mem */
+ pBuf = (BM_BUF *)HASH_Retrieve(psBMContext->pBufferHash, (IMG_UINTPTR_T)sHashAddress.uiAddr);
if(pBuf)
{
- IMG_SIZE_T ui32MappingSize = HOST_PAGEALIGN (ui32Size + ui32Offset);
+ IMG_SIZE_T uMappingSize = HOST_PAGEALIGN (uSize + uOffset);
/* Check base address, size and contiguity type match */
- if(pBuf->pMapping->uSize == ui32MappingSize && (pBuf->pMapping->eCpuMemoryOrigin == hm_wrapped ||
+ if(pBuf->pMapping->uSize == uMappingSize && (pBuf->pMapping->eCpuMemoryOrigin == hm_wrapped ||
pBuf->pMapping->eCpuMemoryOrigin == hm_wrapped_virtaddr))
{
PVR_DPF((PVR_DBG_MESSAGE,
- "BM_Wrap (Matched previous Wrap! uSize=0x%x, uOffset=0x%x, SysAddr=%08X)",
- ui32Size, ui32Offset, sHashAddress.uiAddr));
+ "BM_Wrap (Matched previous Wrap! uSize=0x%" SIZE_T_FMT_LEN "x, uOffset=0x%" SIZE_T_FMT_LEN "x, SysAddr=" SYSPADDR_FMT ")",
+ uSize,
+ uOffset,
+ sHashAddress.uiAddr));
PVRSRVBMBufIncRef(pBuf);
*phBuf = (BM_HANDLE)pBuf;
if(pui32Flags)
- *pui32Flags = uFlags;
+ *pui32Flags = ui32Flags;
return IMG_TRUE;
}
/*
* Actually perform the memory wrap.
*/
- if (WrapMemory (psBMHeap, ui32Size, ui32Offset, bPhysContig, psSysAddr, pvCPUVAddr, uFlags, pBuf) != IMG_TRUE)
+ if (WrapMemory (psBMHeap, uSize, uOffset, bPhysContig, psSysAddr, pvCPUVAddr, ui32Flags, pBuf) != IMG_TRUE)
{
PVR_DPF((PVR_DBG_ERROR, "BM_Wrap: WrapMemory FAILED"));
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof (BM_BUF), pBuf, IMG_NULL);
/* Have we calculated the right Hash key ? */
PVR_ASSERT(SysSysPAddrToCpuPAddr(sHashAddress).uiAddr == pBuf->CpuPAddr.uiAddr);
- if (!HASH_Insert (psBMContext->pBufferHash, sHashAddress.uiAddr, (IMG_UINTPTR_T)pBuf))
+ if (!HASH_Insert (psBMContext->pBufferHash, (IMG_UINTPTR_T)sHashAddress.uiAddr, (IMG_UINTPTR_T)pBuf))
{
- FreeBuf (pBuf, uFlags, IMG_TRUE);
+ FreeBuf (pBuf, ui32Flags, IMG_TRUE);
PVR_DPF((PVR_DBG_ERROR, "BM_Wrap: HASH_Insert FAILED"));
return IMG_FALSE;
}
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "BM_Wrap (uSize=0x%x, uFlags=0x%x, devVAddr=%08X)",
- ui32Size, uFlags, pBuf->DevVAddr.uiAddr));
+ "BM_Wrap (uSize=0x%" SIZE_T_FMT_LEN "x, ui32Flags=0x%x, devVAddr=%08X)",
+ uSize, ui32Flags, pBuf->DevVAddr.uiAddr));
/*
* Assign the handle and return.
if(pui32Flags)
{
/* need to override the heap attributes SINGLE PROC to MULT_PROC. */
- *pui32Flags = (uFlags & ~PVRSRV_HAP_MAPTYPE_MASK) | PVRSRV_HAP_MULTI_PROCESS;
+ *pui32Flags = (ui32Flags & ~PVRSRV_HAP_MAPTYPE_MASK) | PVRSRV_HAP_MULTI_PROCESS;
}
return IMG_TRUE;
SYS_DATA *psSysData;
IMG_SYS_PHYADDR sHashAddr;
- PVR_DPF ((PVR_DBG_MESSAGE, "BM_Free (h=0x%x)", (IMG_UINTPTR_T)hBuf));
+ PVR_DPF ((PVR_DBG_MESSAGE, "BM_Free (h=0x%p)", hBuf));
PVR_ASSERT (pBuf!=IMG_NULL);
if (pBuf == IMG_NULL)
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "BM_HandleToCpuVaddr(h=0x%x)=0x%x",
- (IMG_UINTPTR_T)hBuf, (IMG_UINTPTR_T)pBuf->CpuVAddr));
+ "BM_HandleToCpuVaddr(h=0x%p)=0x%p",
+ hBuf, pBuf->CpuVAddr));
return pBuf->CpuVAddr;
}
return DevVAddr;
}
- PVR_DPF ((PVR_DBG_MESSAGE, "BM_HandleToDevVaddr(h=0x%x)=%08X", (IMG_UINTPTR_T)hBuf, pBuf->DevVAddr.uiAddr));
+ PVR_DPF ((PVR_DBG_MESSAGE, "BM_HandleToDevVaddr(h=0x%p)=%08X", hBuf, pBuf->DevVAddr.uiAddr));
return pBuf->DevVAddr;
}
return PhysAddr;
}
- PVR_DPF ((PVR_DBG_MESSAGE, "BM_HandleToSysPaddr(h=0x%x)=%08X", (IMG_UINTPTR_T)hBuf, pBuf->CpuPAddr.uiAddr));
+ PVR_DPF ((PVR_DBG_MESSAGE, "BM_HandleToSysPaddr(h=0lx%p)=" CPUPADDR_FMT, hBuf, pBuf->CpuPAddr.uiAddr));
return SysCpuPAddrToSysPAddr (pBuf->CpuPAddr);
}
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "BM_HandleToOSMemHandle(h=0x%x)=0x%x",
- (IMG_UINTPTR_T)hBuf, (IMG_UINTPTR_T)pBuf->hOSMemHandle));
+ "BM_HandleToOSMemHandle(h=0x%p)=0x%p",
+ hBuf, pBuf->hOSMemHandle));
return pBuf->hOSMemHandle;
}
allocation.
@Output pActualSize - the actual size of the block allocated in
bytes.
- @Input uFlags - allocation flags
+ @Input ui32Flags - allocation flags
@Input dev_vaddr_alignment - required device virtual address
alignment, or 0.
@Output pDevVAddr - receives the device virtual base address of the
DevMemoryAlloc (BM_CONTEXT *pBMContext,
BM_MAPPING *pMapping,
IMG_SIZE_T *pActualSize,
- IMG_UINT32 uFlags,
+ IMG_UINT32 ui32Flags,
IMG_UINT32 dev_vaddr_alignment,
IMG_DEV_VIRTADDR *pDevVAddr)
{
PVRSRV_DEVICE_NODE *psDeviceNode;
#ifdef PDUMP
IMG_UINT32 ui32PDumpSize = (IMG_UINT32)pMapping->uSize;
+ IMG_UINT32 ui32PDumpFlags;
#endif
psDeviceNode = pBMContext->psDeviceNode;
- if(uFlags & PVRSRV_MEM_INTERLEAVED)
+#ifdef PDUMP
+#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
+ ui32PDumpFlags = psDeviceNode->pfnMMUIsHeapShared(pMapping->pBMHeap->pMMUHeap)
+ ? PDUMP_FLAGS_PERSISTENT : PDUMP_FLAGS_CONTINUOUS;
+#else
+ ui32PDumpFlags = PDUMP_FLAGS_CONTINUOUS;
+#endif
+#endif
+
+ if(ui32Flags & PVRSRV_MEM_INTERLEAVED)
{
/* double the size */
pMapping->uSize *= 2;
}
#ifdef PDUMP
- if(uFlags & PVRSRV_MEM_DUMMY)
+ if(ui32Flags & PVRSRV_MEM_DUMMY)
{
/* only one page behind a dummy allocation */
ui32PDumpSize = pMapping->pBMHeap->sDevArena.ui32DataPageSize;
pMapping->hOSMemHandle,
ui32PDumpSize,
pMapping->pBMHeap->sDevArena.ui32DataPageSize,
-#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
- psDeviceNode->pfnMMUIsHeapShared(pMapping->pBMHeap->pMMUHeap),
-#else
- IMG_FALSE, // unused
-#endif /* SUPPORT_PDUMP_MULTI_PROCESS */
- (IMG_HANDLE)pMapping);
+ (IMG_HANDLE)pMapping,
+ ui32PDumpFlags);
#endif
switch (pMapping->eCpuMemoryOrigin)
case hm_wrapped_virtaddr:
case hm_contiguous:
{
- if (uFlags & PVRSRV_MEM_SPARSE)
+ if (ui32Flags & PVRSRV_MEM_SPARSE)
{
/* Check if this device supports sparse mappings */
PVR_ASSERT(psDeviceNode->pfnMMUMapPagesSparse != IMG_NULL);
pMapping->ui32NumVirtChunks,
pMapping->ui32NumPhysChunks,
pMapping->pabMapChunk,
- uFlags,
+ ui32Flags,
(IMG_HANDLE)pMapping);
}
else
pMapping->DevVAddr,
SysCpuPAddrToSysPAddr (pMapping->CpuPAddr),
pMapping->uSize,
- uFlags,
+ ui32Flags,
(IMG_HANDLE)pMapping);
}
*pDevVAddr = pMapping->DevVAddr;
}
case hm_env:
{
- if (uFlags & PVRSRV_MEM_SPARSE)
+ if (ui32Flags & PVRSRV_MEM_SPARSE)
{
/* Check if this device supports sparse mappings */
PVR_ASSERT(psDeviceNode->pfnMMUMapShadowSparse != IMG_NULL);
pMapping->CpuVAddr,
pMapping->hOSMemHandle,
pDevVAddr,
- uFlags,
+ ui32Flags,
(IMG_HANDLE)pMapping);
}
else
pMapping->CpuVAddr,
pMapping->hOSMemHandle,
pDevVAddr,
- uFlags,
+ ui32Flags,
(IMG_HANDLE)pMapping);
}
break;
pMapping->DevVAddr,
pMapping->psSysAddr,
pMapping->uSize,
- uFlags,
+ ui32Flags,
(IMG_HANDLE)pMapping);
*pDevVAddr = pMapping->DevVAddr;
IMG_DEV_PHYADDR sDevPAddr;
#ifdef PDUMP
IMG_UINT32 ui32PSize;
+ IMG_UINT32 ui32PDumpFlags;
#endif
psDeviceNode = pMapping->pBMHeap->pBMContext->psDeviceNode;
sDevPAddr = psDeviceNode->pfnMMUGetPhysPageAddr(pMapping->pBMHeap->pMMUHeap, pMapping->DevVAddr);
+#ifdef PDUMP
+#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
+ ui32PDumpFlags = psDeviceNode->pfnMMUIsHeapShared(pMapping->pBMHeap->pMMUHeap)
+ ? PDUMP_FLAGS_PERSISTENT : PDUMP_FLAGS_CONTINUOUS;
+#else
+ ui32PDumpFlags = PDUMP_FLAGS_CONTINUOUS;
+#endif
+#endif
+
if (sDevPAddr.uiAddr != 0)
{
#ifdef PDUMP
pMapping->pBMHeap->sDevArena.ui32DataPageSize,
(IMG_HANDLE)pMapping,
(pMapping->ui32Flags & PVRSRV_MEM_INTERLEAVED) ? IMG_TRUE : IMG_FALSE,
- (pMapping->ui32Flags & PVRSRV_MEM_SPARSE) ? IMG_TRUE : IMG_FALSE);
+ (pMapping->ui32Flags & PVRSRV_MEM_SPARSE) ? IMG_TRUE : IMG_FALSE,
+ ui32PDumpFlags);
#endif
}
PVR_ASSERT(pMapping->uSizeVM != 0);
}
sSysPAddr = gXProcWorkaroundShareData[ui32Index].sSysPAddr;
RA_Free (gXProcWorkaroundShareData[ui32Index].psArena,
- sSysPAddr.uiAddr,
+ (IMG_UINTPTR_T)sSysPAddr.uiAddr,
IMG_FALSE);
}
else
which may be >= requested size
@Output ppsMapping - receives the arbitrary user reference
associated with the underlying storage.
- @Input uFlags - bit mask of allocation flags
+ @Input ui32Flags - bit mask of allocation flags
@Input pvPrivData - opaque private data passed through to allocator
@Input ui32PrivDataLength - length of opaque private data
@Output pBase - receives a pointer to the allocated storage.
IMG_SIZE_T uRequestSize,
IMG_SIZE_T *pActualSize,
BM_MAPPING **ppsMapping,
- IMG_UINT32 uFlags,
+ IMG_UINT32 ui32Flags,
IMG_PVOID pvPrivData,
IMG_UINT32 ui32PrivDataLength,
IMG_UINTPTR_T *pBase)
IMG_SIZE_T uDevVAddrAlignment = 0; /* ? */
PVR_DPF ((PVR_DBG_MESSAGE,
- "BM_ImportMemory (pBMContext=0x%x, uRequestSize=0x%x, uFlags=0x%x, uAlign=0x%x)",
- (IMG_UINTPTR_T)pBMContext, uRequestSize, uFlags, uDevVAddrAlignment));
+ "BM_ImportMemory (pBMContext=0x%p, uRequestSize=0x%" SIZE_T_FMT_LEN
+ "x, ui32Flags=0x%x, uAlign=0x%" SIZE_T_FMT_LEN "x)",
+ pBMContext, uRequestSize, ui32Flags, uDevVAddrAlignment));
PVR_ASSERT (ppsMapping != IMG_NULL);
PVR_ASSERT (pBMContext != IMG_NULL);
pMapping->DevVAddr.uiAddr = 0;
pMapping->CpuPAddr.uiAddr = 0;
pMapping->uSize = uSize;
- if ((uFlags & PVRSRV_MEM_SPARSE) == 0)
+ if ((ui32Flags & PVRSRV_MEM_SPARSE) == 0)
{
pMapping->uSizeVM = uSize;
}
pMapping->pBMHeap = pBMHeap;
- pMapping->ui32Flags = uFlags;
+ pMapping->ui32Flags = ui32Flags;
/*
* If anyone want's to know, pass back the actual size of our allocation.
uPSize = pMapping->uSize;
}
- if (uFlags & PVRSRV_MEM_XPROC)
+ if (ui32Flags & PVRSRV_MEM_XPROC)
{
IMG_UINT32 ui32Attribs = pBMHeap->ui32Attribs | PVRSRV_MEM_XPROC;
IMG_BOOL bBadBackingStoreType;
- if(uFlags & PVRSRV_MEM_ION)
+ if(ui32Flags & PVRSRV_MEM_ION)
{
ui32Attribs |= PVRSRV_MEM_ION;
}
&pMapping->hOSMemHandle) != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
- "BM_ImportMemory: XProcWorkaroundAllocShareable(0x%x) failed",
+ "BM_ImportMemory: XProcWorkaroundAllocShareable(0x%" SIZE_T_FMT_LEN "x) failed",
uPSize));
goto fail_mapping_alloc;
}
&pMapping->hOSMemHandle) != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
- "BM_ImportMemory: XProcWorkaroundAllocShareable(0x%x) failed",
+ "BM_ImportMemory: XProcWorkaroundAllocShareable(0x%" SIZE_T_FMT_LEN "x) failed",
uPSize));
goto fail_mapping_alloc;
}
&pMapping->hOSMemHandle) != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
- "BM_ImportMemory: OSAllocPages(0x%x) failed",
+ "BM_ImportMemory: OSAllocPages(0x%" SIZE_T_FMT_LEN "x) failed",
uPSize));
goto fail_mapping_alloc;
}
ui32PrivDataLength,
(IMG_UINTPTR_T *)&sSysPAddr.uiAddr))
{
- PVR_DPF((PVR_DBG_ERROR, "BM_ImportMemory: RA_Alloc(0x%x) FAILED", uPSize));
+ PVR_DPF((PVR_DBG_ERROR, "BM_ImportMemory: RA_Alloc(0x%" SIZE_T_FMT_LEN "x) FAILED", uPSize));
goto fail_mapping_alloc;
}
/*
* Allocate some device memory for what we just allocated.
*/
- if ((uFlags & PVRSRV_MEM_SPARSE) == 0)
+ if ((ui32Flags & PVRSRV_MEM_SPARSE) == 0)
{
bResult = DevMemoryAlloc (pBMContext,
pMapping,
IMG_NULL,
- uFlags,
+ ui32Flags,
(IMG_UINT32)uDevVAddrAlignment,
&pMapping->DevVAddr);
if (!bResult)
{
PVR_DPF((PVR_DBG_ERROR,
- "BM_ImportMemory: DevMemoryAlloc(0x%x) failed",
+ "BM_ImportMemory: DevMemoryAlloc(0x%" SIZE_T_FMT_LEN "x) failed",
pMapping->uSize));
goto fail_dev_mem_alloc;
}
uPSize = pMapping->uSize;
}
- if (uFlags & PVRSRV_MEM_XPROC)
+ if (ui32Flags & PVRSRV_MEM_XPROC)
{
XProcWorkaroundFreeShareable(pMapping->hOSMemHandle);
}
pMapping->hOSMemHandle);
}
sSysPAddr = SysCpuPAddrToSysPAddr(pMapping->CpuPAddr);
- RA_Free (pBMHeap->pLocalDevMemArena, sSysPAddr.uiAddr, IMG_FALSE);
+ RA_Free (pBMHeap->pLocalDevMemArena, (IMG_UINTPTR_T)sSysPAddr.uiAddr, IMG_FALSE);
}
}
fail_mapping_alloc:
PVR_UNREFERENCED_PARAMETER (_base);
PVR_DPF ((PVR_DBG_MESSAGE,
- "BM_FreeMemory (h=0x%x, base=0x%x, psMapping=0x%x)",
- (IMG_UINTPTR_T)h, _base, (IMG_UINTPTR_T)psMapping));
+ "BM_FreeMemory (h=0x%p, base=0x" UINTPTR_FMT ", psMapping=0x%p)",
+ h, _base, psMapping));
PVR_ASSERT (psMapping != IMG_NULL);
sSysPAddr = SysCpuPAddrToSysPAddr(psMapping->CpuPAddr);
- RA_Free (pBMHeap->pLocalDevMemArena, sSysPAddr.uiAddr, IMG_FALSE);
+ RA_Free (pBMHeap->pLocalDevMemArena, (IMG_UINTPTR_T)sSysPAddr.uiAddr, IMG_FALSE);
}
else
{
/*not nulling pointer, copy on stack*/
PVR_DPF((PVR_DBG_MESSAGE,
- "..BM_FreeMemory (h=0x%x, base=0x%x)",
- (IMG_UINTPTR_T)h, _base));
+ "..BM_FreeMemory (h=0x%p, base=0x" UINTPTR_FMT ")",
+ h, _base));
}
/*!
/*************************************************************************/ /*!
+@File
@Title Device class services functions
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Kernel services functions for device class devices
#include "lists.h"
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+#include "pvr_sync.h"
+#endif
+
PVRSRV_ERROR AllocateDeviceID(SYS_DATA *psSysData, IMG_UINT32 *pui32DevID);
PVRSRV_ERROR FreeDeviceID(SYS_DATA *psSysData, IMG_UINT32 ui32DevID);
-#if defined(SUPPORT_MISR_IN_THREAD)
-void OSVSyncMISR(IMG_HANDLE, IMG_BOOL);
-#endif
-
#if defined(SUPPORT_CUSTOM_SWAP_OPERATIONS)
IMG_VOID PVRSRVFreeCommandCompletePacketKM(IMG_HANDLE hCmdCookie,
IMG_BOOL bScheduleMISR);
#if !defined(SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED)
if (psSwapChain->ppsLastSyncInfos)
{
+ for (i = 0; i < psSwapChain->ui32LastNumSyncInfos; i++)
+ {
+ if (psSwapChain->ppsLastSyncInfos[i])
+ {
+ PVRSRVKernelSyncInfoDecRef(psSwapChain->ppsLastSyncInfos[i], IMG_NULL);
+ psSwapChain->ppsLastSyncInfos[i] = IMG_NULL;
+ }
+ }
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(PVRSRV_KERNEL_SYNC_INFO *) * psSwapChain->ui32LastNumSyncInfos,
psSwapChain->ppsLastSyncInfos, IMG_NULL);
}
IMG_UINT32 i;
DISPLAY_INFO sDisplayInfo;
-
if(!hDeviceKM
|| !psDstSurfAttrib
|| !psSrcSurfAttrib
return PVRSRV_ERROR_INVALID_PARAMS;
}
+ OSMemSet (apsSyncData, 0, sizeof(PVRSRV_SYNC_DATA *) * PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS);
+
if (ui32BufferCount > PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVCreateDCSwapChainKM: Too many buffers"));
return PVRSRV_ERROR_TOOMANYBUFFERS;
}
- if (ui32BufferCount < 2)
- {
- PVR_DPF((PVR_DBG_ERROR,"PVRSRVCreateDCSwapChainKM: Too few buffers"));
- return PVRSRV_ERROR_TOO_FEW_BUFFERS;
- }
-
psDCInfo = DCDeviceHandleToDCInfo(hDeviceKM);
if( ui32Flags & PVRSRV_CREATE_SWAPCHAIN_QUERY )
psSwapChain->ui32RefCount = 1;
psSwapChain->ui32Flags = ui32Flags;
- /* Save pointer in DC structure if ti's shared struct */
+ /* Save pointer in DC structure if it's shared struct */
if( ui32Flags & PVRSRV_CREATE_SWAPCHAIN_SHARED )
{
if(! psDCInfo->psDCSwapChainShared )
phBuffer[i] = (IMG_HANDLE)&psSwapChain->asBuffer[i];
}
-#if defined(SUPPORT_GET_DC_BUFFERS_SYS_PHYADDRS)
- for(i = 0; i < *pui32BufferCount; i++)
- {
- IMG_UINT32 ui32ByteSize, ui32TilingStride;
- IMG_SYS_PHYADDR *pPhyAddr;
- IMG_BOOL bIsContiguous;
- IMG_HANDLE hOSMapInfo;
- IMG_VOID *pvVAddr;
-
- eError = psDCInfo->psFuncTable->pfnGetBufferAddr(psDCInfo->hExtDevice,
- ahExtBuffer[i],
- &pPhyAddr,
- &ui32ByteSize,
- &pvVAddr,
- &hOSMapInfo,
- &bIsContiguous,
- &ui32TilingStride);
- if(eError != PVRSRV_OK)
- {
- break;
- }
-
- psPhyAddr[i] = *pPhyAddr;
- }
-#endif /* defined(SUPPORT_GET_DC_BUFFERS_SYS_PHYADDRS) */
-
return eError;
}
apsSrcSync,
sizeof(DISPLAYCLASS_FLIP_COMMAND) + (sizeof(IMG_RECT) * ui32ClipRectCount),
IMG_NULL,
+ IMG_NULL,
IMG_NULL);
if(eError != PVRSRV_OK)
{
PVRSRV_KERNEL_SYNC_INFO **ppsSyncInfos,
IMG_UINT32 ui32NumMemSyncInfos,
IMG_PVOID pvPrivData,
- IMG_UINT32 ui32PrivDataLength)
+ IMG_UINT32 ui32PrivDataLength,
+ IMG_HANDLE *phFence)
{
+ IMG_UINT32 ui32NumSyncInfos = ui32NumMemSyncInfos;
PVRSRV_KERNEL_SYNC_INFO **ppsCompiledSyncInfos;
IMG_UINT32 i, ui32NumCompiledSyncInfos;
DISPLAYCLASS_FLIP_COMMAND2 *psFlipCmd;
PVRSRV_DISPLAYCLASS_INFO *psDCInfo;
PVRSRV_DC_SWAPCHAIN *psSwapChain;
- PVRSRV_ERROR eError = PVRSRV_OK;
CALLBACK_DATA *psCallbackData;
PVRSRV_QUEUE_INFO *psQueue;
PVRSRV_COMMAND *psCommand;
IMG_PVOID *ppvMemInfos;
+ PVRSRV_ERROR eError;
SYS_DATA *psSysData;
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ struct sync_fence *apsFence[SGX_MAX_SRC_SYNCS_TA];
+#endif /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
+
if(!hDeviceKM || !hSwapChain || !ppsMemInfos || !ppsSyncInfos || ui32NumMemSyncInfos < 1)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Invalid parameters"));
psCallbackData->ppvMemInfos = ppvMemInfos;
psCallbackData->ui32NumMemInfos = ui32NumMemSyncInfos;
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ eError = PVRSyncFencesToSyncInfos(ppsSyncInfos, &ui32NumSyncInfos, apsFence);
+ if(eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: PVRSyncFencesToSyncInfos failed"));
+ goto Exit;
+ }
+#endif /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
+
/* get the queue from the buffer structure */
psQueue = psSwapChain->psQueue;
if(psSwapChain->ppsLastSyncInfos)
{
IMG_UINT32 ui32NumUniqueSyncInfos = psSwapChain->ui32LastNumSyncInfos;
+ IMG_BOOL *abUnique;
IMG_UINT32 j;
+ if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+ sizeof(IMG_BOOL) * psSwapChain->ui32LastNumSyncInfos,
+ (IMG_VOID **)&abUnique, IMG_NULL,
+ "Unique booleans") != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Failed to allocate space for unique booleans"));
+ goto Exit;
+ }
+
for(j = 0; j < psSwapChain->ui32LastNumSyncInfos; j++)
{
- for(i = 0; i < ui32NumMemSyncInfos; i++)
+ abUnique[j] = IMG_TRUE;
+ for(i = 0; i < ui32NumSyncInfos; i++)
{
+ PVR_ASSERT(psSwapChain->ppsLastSyncInfos[j]);
+ PVR_ASSERT(ppsSyncInfos[i]);
if(psSwapChain->ppsLastSyncInfos[j] == ppsSyncInfos[i])
{
- psSwapChain->ppsLastSyncInfos[j] = IMG_NULL;
+ abUnique[j] = IMG_FALSE;
ui32NumUniqueSyncInfos--;
+ break;
}
}
}
- ui32NumCompiledSyncInfos = ui32NumMemSyncInfos + ui32NumUniqueSyncInfos;
+ ui32NumCompiledSyncInfos = ui32NumSyncInfos + ui32NumUniqueSyncInfos;
if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
sizeof(PVRSRV_KERNEL_SYNC_INFO *) * ui32NumCompiledSyncInfos,
"Compiled syncinfos") != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Failed to allocate space for meminfo list"));
+ OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
+ sizeof(IMG_BOOL) * psSwapChain->ui32LastNumSyncInfos,
+ (IMG_VOID *)abUnique, IMG_NULL);
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ for(i = 0; apsFence[i]; i++)
+ if(apsFence[i])
+ sync_fence_put(apsFence[i]);
+#endif
goto Exit;
}
- OSMemCopy(ppsCompiledSyncInfos, ppsSyncInfos, sizeof(PVRSRV_KERNEL_SYNC_INFO *) * ui32NumMemSyncInfos);
- for(j = 0, i = ui32NumMemSyncInfos; j < psSwapChain->ui32LastNumSyncInfos; j++)
+ OSMemCopy(ppsCompiledSyncInfos, ppsSyncInfos, sizeof(PVRSRV_KERNEL_SYNC_INFO *) * ui32NumSyncInfos);
+ for(j = 0, i = ui32NumSyncInfos; j < psSwapChain->ui32LastNumSyncInfos; j++)
{
- if(psSwapChain->ppsLastSyncInfos[j])
+ if(abUnique[j])
{
ppsCompiledSyncInfos[i] = psSwapChain->ppsLastSyncInfos[j];
i++;
}
}
+
+ OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
+ sizeof(IMG_BOOL) * psSwapChain->ui32LastNumSyncInfos,
+ (IMG_VOID *)abUnique, IMG_NULL);
}
else
#endif /* !defined(SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED) */
{
- ppsCompiledSyncInfos = ppsSyncInfos;
- ui32NumCompiledSyncInfos = ui32NumMemSyncInfos;
+ IMG_UINT32 j, ui32Missing = 0;
+
+ /* Older synchronization schemes would just pass down the syncinfos
+ * hanging off of the meminfos. So we would expect identical lists.
+ * However, newer drivers may send down additional synchronization
+ * i.e. for TQ fence operations. In such a case we need to allocate
+ * more space for the compiled syncinfos to ensure everything is
+ * ROP2 synchronized.
+ */
+ for(j = 0; j < ui32NumSyncInfos; j++)
+ {
+ IMG_BOOL bFound = IMG_FALSE;
+
+ for(i = 0; i < ui32NumSyncInfos; i++)
+ {
+ if(ppsSyncInfos[j] == ppsMemInfos[i]->psKernelSyncInfo)
+ {
+ bFound = IMG_TRUE;
+ break;
+ }
+ }
+
+ if(!bFound)
+ ui32Missing++;
+ }
+
+ if(ui32Missing)
+ {
+ IMG_UINT32 k;
+
+ ui32NumCompiledSyncInfos = ui32NumSyncInfos + ui32Missing;
+
+ if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
+ sizeof(PVRSRV_KERNEL_SYNC_INFO *) * ui32NumCompiledSyncInfos,
+ (IMG_VOID **)&ppsCompiledSyncInfos, IMG_NULL,
+ "Compiled syncinfos") != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Failed to allocate space for meminfo list"));
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ for(i = 0; apsFence[i]; i++)
+ if(apsFence[i])
+ sync_fence_put(apsFence[i]);
+#endif
+ goto Exit;
+ }
+
+ for(i = 0; i < ui32NumSyncInfos; i++)
+ {
+ ppsCompiledSyncInfos[i] = ppsSyncInfos[i];
+ }
+
+ k = i;
+ for(i = 0; i < ui32NumSyncInfos; i++)
+ {
+ for(j = 0; j < ui32NumSyncInfos; j++)
+ {
+ if(ppsSyncInfos[j] == ppsMemInfos[i]->psKernelSyncInfo)
+ break;
+ }
+
+ if(j == ui32NumSyncInfos)
+ {
+ /* Insert the unique one */
+ PVR_ASSERT(k < ui32NumCompiledSyncInfos);
+ ppsCompiledSyncInfos[k] = ppsMemInfos[i]->psKernelSyncInfo;
+ k++;
+ }
+ }
+ }
+ else
+ {
+ ppsCompiledSyncInfos = ppsSyncInfos;
+ ui32NumCompiledSyncInfos = ui32NumSyncInfos;
+ }
}
/* insert the command (header) */
ppsCompiledSyncInfos,
sizeof(DISPLAYCLASS_FLIP_COMMAND2),
FreePrivateData,
- psCallbackData);
+ psCallbackData,
+ phFence);
+
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ /* InsertCommand bumped the refcount on the raw sync objects, so we
+ * can put the fences now. Even if the fences are deleted, the syncs
+ * will persist.
+ */
+ for(i = 0; apsFence[i]; i++)
+ if(apsFence[i])
+ sync_fence_put(apsFence[i]);
+#endif
if (ppsCompiledSyncInfos != ppsSyncInfos)
{
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Failed to submit command"));
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ sync_fence_put(psCommand->pvCleanupFence);
+ sync_fence_put(*phFence);
+ *phFence = IMG_NULL;
+#endif
goto Exit;
}
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Failed to schedule MISR"));
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ sync_fence_put(*phFence);
+ *phFence = IMG_NULL;
+#endif
goto Exit;
}
#if !defined(SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED)
/* Reallocate the syncinfo list if it was too small */
- if (psSwapChain->ui32LastNumSyncInfos < ui32NumMemSyncInfos)
+ if (psSwapChain->ui32LastNumSyncInfos < ui32NumSyncInfos)
{
if (psSwapChain->ppsLastSyncInfos)
{
+ for (i = 0; i < psSwapChain->ui32LastNumSyncInfos; i++)
+ {
+ if (psSwapChain->ppsLastSyncInfos[i])
+ {
+ PVRSRVKernelSyncInfoDecRef(psSwapChain->ppsLastSyncInfos[i], IMG_NULL);
+ psSwapChain->ppsLastSyncInfos[i] = IMG_NULL;
+ }
+ }
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(PVRSRV_KERNEL_SYNC_INFO *) * psSwapChain->ui32LastNumSyncInfos,
psSwapChain->ppsLastSyncInfos, IMG_NULL);
}
if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
- sizeof(PVRSRV_KERNEL_SYNC_INFO *) * ui32NumMemSyncInfos,
+ sizeof(PVRSRV_KERNEL_SYNC_INFO *) * ui32NumSyncInfos,
(IMG_VOID **)&psSwapChain->ppsLastSyncInfos, IMG_NULL,
"Last syncinfos") != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Failed to allocate space for meminfo list"));
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ sync_fence_put(*phFence);
+ *phFence = IMG_NULL;
+#endif
goto Exit;
}
}
- psSwapChain->ui32LastNumSyncInfos = ui32NumMemSyncInfos;
+ for (i = 0; i < psSwapChain->ui32LastNumSyncInfos; i++)
+ {
+ if (psSwapChain->ppsLastSyncInfos[i])
+ {
+ PVRSRVKernelSyncInfoDecRef(psSwapChain->ppsLastSyncInfos[i], IMG_NULL);
+ psSwapChain->ppsLastSyncInfos[i] = IMG_NULL;
+ }
+ }
+
+ psSwapChain->ui32LastNumSyncInfos = ui32NumSyncInfos;
- for(i = 0; i < ui32NumMemSyncInfos; i++)
+ for(i = 0; i < ui32NumSyncInfos; i++)
{
psSwapChain->ppsLastSyncInfos[i] = ppsSyncInfos[i];
+ PVRSRVKernelSyncInfoIncRef(psSwapChain->ppsLastSyncInfos[i], IMG_NULL);
}
#endif /* !defined(SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED) */
psSwapChain = psSwapChainRef->psSwapChain;
/*
- If more then 1 reference to the swapchain exist then
+ If more than 1 reference to the swapchain exists then
ignore any request to swap to the system buffer
*/
if (psSwapChain->ui32RefCount > 1)
apsSrcSync,
sizeof(DISPLAYCLASS_FLIP_COMMAND),
IMG_NULL,
+ IMG_NULL,
IMG_NULL);
if(eError != PVRSRV_OK)
{
psJTable->pfnPVRSRVOEMFunction = &SysOEMFunction;
psJTable->pfnPVRSRVRegisterCmdProcList = &PVRSRVRegisterCmdProcListKM;
psJTable->pfnPVRSRVRemoveCmdProcList = &PVRSRVRemoveCmdProcListKM;
-#if defined(SUPPORT_MISR_IN_THREAD)
- psJTable->pfnPVRSRVCmdComplete = &OSVSyncMISR;
-#else
- psJTable->pfnPVRSRVCmdComplete = &PVRSRVCommandCompleteKM;
-#endif
+ psJTable->pfnPVRSRVCmdComplete = &PVRSRVCommandCompleteKM;
psJTable->pfnPVRSRVRegisterSystemISRHandler = &PVRSRVRegisterSystemISRHandler;
psJTable->pfnPVRSRVRegisterPowerDevice = &PVRSRVRegisterPowerDevice;
#if defined(SUPPORT_CUSTOM_SWAP_OPERATIONS)
#include "pdump_km.h"
#include "pvr_bridge_km.h"
#include "osfunc.h"
+#include "devicemem.h"
#if defined(SUPPORT_ION)
#include "ion.h"
#include "env_perproc.h"
+#include "ion_sync.h"
+
+/* Start size of the g_IonSyncHash hash table */
+#define ION_SYNC_HASH_SIZE 20
+HASH_TABLE *g_psIonSyncHash = IMG_NULL;
#endif
/* local function prototypes */
******************************************************************************/
IMG_EXPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapsKM(IMG_HANDLE hDevCookie,
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_HEAP_INFO_KM *psHeapInfo)
-#else
PVRSRV_HEAP_INFO *psHeapInfo)
-#endif
{
PVRSRV_DEVICE_NODE *psDeviceNode;
IMG_UINT32 ui32HeapCount;
PVRSRV_PER_PROCESS_DATA *psPerProc,
IMG_HANDLE *phDevMemContext,
IMG_UINT32 *pui32ClientHeapCount,
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_HEAP_INFO_KM *psHeapInfo,
-#else
PVRSRV_HEAP_INFO *psHeapInfo,
-#endif
IMG_BOOL *pbCreated,
IMG_BOOL *pbShared)
{
IMG_DEV_PHYADDR sPDDevPAddr;
IMG_UINT32 i;
-#if !defined(PVR_SECURE_HANDLES) && !defined (SUPPORT_SID_INTERFACE)
+#if !defined(PVR_SECURE_HANDLES)
PVR_UNREFERENCED_PARAMETER(pbShared);
#endif
psHeapInfo[ui32ClientHeapCount].ui32XTileStride = 0;
#endif
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
pbShared[ui32ClientHeapCount] = IMG_TRUE;
#endif
ui32ClientHeapCount++;
#else
psHeapInfo[ui32ClientHeapCount].ui32XTileStride = 0;
#endif
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
pbShared[ui32ClientHeapCount] = IMG_FALSE;
#endif
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfoKM(IMG_HANDLE hDevCookie,
IMG_HANDLE hDevMemContext,
IMG_UINT32 *pui32ClientHeapCount,
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_HEAP_INFO_KM *psHeapInfo,
-#else
PVRSRV_HEAP_INFO *psHeapInfo,
-#endif
IMG_BOOL *pbShared)
{
PVRSRV_DEVICE_NODE *psDeviceNode;
IMG_HANDLE hDevMemHeap;
IMG_UINT32 i;
-#if !defined(PVR_SECURE_HANDLES) && !defined (SUPPORT_SID_INTERFACE)
+#if !defined(PVR_SECURE_HANDLES)
PVR_UNREFERENCED_PARAMETER(pbShared);
#endif
psHeapInfo[ui32ClientHeapCount].ui32HeapByteSize = psDeviceMemoryHeap[i].ui32HeapSize;
psHeapInfo[ui32ClientHeapCount].ui32Attribs = psDeviceMemoryHeap[i].ui32Attribs;
psHeapInfo[ui32ClientHeapCount].ui32XTileStride = psDeviceMemoryHeap[i].ui32XTileStride;
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
pbShared[ui32ClientHeapCount] = IMG_TRUE;
#endif
ui32ClientHeapCount++;
psHeapInfo[ui32ClientHeapCount].ui32HeapByteSize = psDeviceMemoryHeap[i].ui32HeapSize;
psHeapInfo[ui32ClientHeapCount].ui32Attribs = psDeviceMemoryHeap[i].ui32Attribs;
psHeapInfo[ui32ClientHeapCount].ui32XTileStride = psDeviceMemoryHeap[i].ui32XTileStride;
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
pbShared[ui32ClientHeapCount] = IMG_FALSE;
#endif
psSyncData->ui32LastReadOpDumpVal = 0;
psSyncData->ui64LastWrite = 0;
+ /*
+ Note:
+ PDumping here means that we PDump syncs that we might not
+ need to know about for the multi-process but this
+ unavoidable as there is no point where we can PDump
+ that guarantees it will be initialised before we us it
+ (e.g. kick time is too late as the client might have
+ issued a POL on it before that point)
+ */
#if defined(PDUMP)
PDUMPCOMMENT("Allocating kernel sync object");
PDUMPMEM(psKernelSyncInfo->psSyncDataMemInfoKM->pvLinAddrKM,
psKernelSyncInfo->psSyncDataMemInfoKM,
0,
(IMG_UINT32)psKernelSyncInfo->psSyncDataMemInfoKM->uAllocSize,
+#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
+ PDUMP_FLAGS_PERSISTENT,
+#else
PDUMP_FLAGS_CONTINUOUS,
+#endif
MAKEUNIQUETAG(psKernelSyncInfo->psSyncDataMemInfoKM));
#endif
{
if((psMemInfo->ui32Flags & PVRSRV_MEM_EXPORTED) != 0)
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMemInfo = 0;
-#else
IMG_HANDLE hMemInfo = IMG_NULL;
-#endif
/* find the handle */
eError = PVRSRVFindHandle(KERNEL_HANDLE_BASE,
freeExternal(psMemInfo);
case PVRSRV_MEMTYPE_DEVICE:
case PVRSRV_MEMTYPE_DEVICECLASS:
- if (psMemInfo->psKernelSyncInfo)
+#if defined(SUPPORT_ION)
+ if (psMemInfo->hIonSyncInfo)
{
- PVRSRVKernelSyncInfoDecRef(psMemInfo->psKernelSyncInfo, psMemInfo);
+ /*
+ For syncs attached to Ion imported buffers we handle
+ things a little differently
+ */
+ PVRSRVIonBufferSyncInfoDecRef(psMemInfo->hIonSyncInfo, psMemInfo);
+ }
+ else
+#endif
+ {
+ if (psMemInfo->psKernelSyncInfo)
+ {
+ PVRSRVKernelSyncInfoDecRef(psMemInfo->psKernelSyncInfo, psMemInfo);
+ }
}
break;
default:
return FreeMemCallBackCommon(psMemInfo, ui32Param, PVRSRV_FREE_CALLBACK_ORIGIN_ALLOCATOR);
}
+PVRSRV_ERROR PVRSRVIonBufferSyncAcquire(IMG_HANDLE hUnique,
+ IMG_HANDLE hDevCookie,
+ IMG_HANDLE hDevMemContext,
+ PVRSRV_ION_SYNC_INFO **ppsIonSyncInfo)
+{
+ PVRSRV_ION_SYNC_INFO *psIonSyncInfo;
+ PVRSRV_ERROR eError;
+ IMG_BOOL bRet;
+
+ /* Check the hash to see if we already have a sync for this buffer */
+ psIonSyncInfo = (PVRSRV_ION_SYNC_INFO *) HASH_Retrieve(g_psIonSyncHash, (IMG_UINTPTR_T) hUnique);
+ if (psIonSyncInfo == 0)
+ {
+ /* This buffer is new to us, create the syncinfo for it */
+ eError = OSAllocMem(PVRSRV_PAGEABLE_SELECT,
+ sizeof(PVRSRV_ION_SYNC_INFO),
+ (IMG_VOID **)&psIonSyncInfo, IMG_NULL,
+ "Ion Synchronization Info");
+ if (eError != PVRSRV_OK)
+ {
+ return eError;
+ }
+
+ eError = PVRSRVAllocSyncInfoKM(hDevCookie,
+ hDevMemContext,
+ &psIonSyncInfo->psSyncInfo);
+ if (eError != PVRSRV_OK)
+ {
+ OSFreeMem(PVRSRV_PAGEABLE_SELECT,
+ sizeof(PVRSRV_ION_SYNC_INFO),
+ psIonSyncInfo,
+ IMG_NULL);
+
+ return eError;
+ }
+#if defined(SUPPORT_MEMINFO_IDS)
+ psIonSyncInfo->ui64Stamp = ++g_ui64MemInfoID;
+#else
+ psIonSyncInfo->ui64Stamp = 0;
+#endif
+ bRet = HASH_Insert(g_psIonSyncHash, (IMG_UINTPTR_T) hUnique, (IMG_UINTPTR_T) psIonSyncInfo);
+ if (!bRet)
+ {
+ eError = PVRSRV_ERROR_OUT_OF_MEMORY;
+
+ PVRSRVKernelSyncInfoDecRef(psIonSyncInfo->psSyncInfo, IMG_NULL);
+ OSFreeMem(PVRSRV_PAGEABLE_SELECT,
+ sizeof(PVRSRV_ION_SYNC_INFO),
+ psIonSyncInfo,
+ IMG_NULL);
+
+ return eError;
+ }
+
+ psIonSyncInfo->ui32RefCount = 0;
+ psIonSyncInfo->hUnique = hUnique;
+ }
+
+ psIonSyncInfo->ui32RefCount++;
+ *ppsIonSyncInfo = psIonSyncInfo;
+ return PVRSRV_OK;
+}
+
+IMG_VOID PVRSRVIonBufferSyncRelease(PVRSRV_ION_SYNC_INFO *psIonSyncInfo)
+{
+ psIonSyncInfo->ui32RefCount--;
+
+ if (psIonSyncInfo->ui32RefCount == 0)
+ {
+ PVRSRV_ION_SYNC_INFO *psLookup;
+ /*
+ If we're holding the last reference to the syncinfo
+ then free it
+ */
+ psLookup = (PVRSRV_ION_SYNC_INFO *) HASH_Remove(g_psIonSyncHash, (IMG_UINTPTR_T) psIonSyncInfo->hUnique);
+ PVR_ASSERT(psLookup == psIonSyncInfo);
+ PVRSRVKernelSyncInfoDecRef(psIonSyncInfo->psSyncInfo, IMG_NULL);
+ OSFreeMem(PVRSRV_PAGEABLE_SELECT,
+ sizeof(PVRSRV_ION_SYNC_INFO),
+ psIonSyncInfo,
+ IMG_NULL);
+ }
+}
+
/*!
******************************************************************************
@Input psPerProc : PerProcess data
@Input hDevCookie : Device node cookie
- @Input hDevMemContext : Device memory context cookie
- @Input hIon : Handle to ION buffer
+ @Input hDevMemHeap : Heap ion handles are mapped into
+ @Input ui32NumBuffers : Number of ion handles to map. (If one handle is being
+ mapped, this should be 1, not 0.)
+ @Input phIon : Array of ui32NumBuffers ion handles (fds)
@Input ui32Flags : Mapping flags
- @Input ui32Size : Mapping size
+ @Input ui32ChunkCount : If ui32NumBuffers is 1, this is the number of
+ "chunks" specified to be mapped into device-virtual
+ address space. If ui32NumBuffers > 1, it is ignored.
+ @Input pauiOffset : Array of offsets in device-virtual address space to map
+ "chunks" of physical from the ion allocation.
+ @Input pauiSize : Array of sizes in bytes of device-virtual address space to
+ map "chunks" of physical from the ion allocation.
+ @Input puiIonBufferSize : Size in bytes of resulting device-virtual mapping.
@Output ppsKernelMemInfo: Output kernel meminfo if successful
@Return PVRSRV_ERROR :
IMG_EXPORT
PVRSRV_ERROR PVRSRVMapIonHandleKM(PVRSRV_PER_PROCESS_DATA *psPerProc,
IMG_HANDLE hDevCookie,
- IMG_HANDLE hDevMemContext,
- IMG_HANDLE hIon,
+ IMG_HANDLE hDevMemHeap,
+ IMG_UINT32 ui32NumFDs,
+ IMG_INT32 *pi32BufferFDs,
IMG_UINT32 ui32Flags,
- IMG_UINT32 ui32Size,
- PVRSRV_KERNEL_MEM_INFO **ppsKernelMemInfo)
+ IMG_UINT32 ui32ChunkCount,
+ IMG_SIZE_T *pauiOffset,
+ IMG_SIZE_T *pauiSize,
+ IMG_SIZE_T *puiIonBufferSize,
+ PVRSRV_KERNEL_MEM_INFO **ppsKernelMemInfo,
+ IMG_UINT64 *pui64Stamp)
{
PVRSRV_ENV_PER_PROCESS_DATA *psPerProcEnv = PVRSRVProcessPrivateData(psPerProc);
PVRSRV_DEVICE_NODE *psDeviceNode;
PVRSRV_KERNEL_MEM_INFO *psNewKernelMemInfo;
- DEVICE_MEMORY_INFO *psDevMemoryInfo;
- DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
IMG_SYS_PHYADDR *pasSysPhysAddr;
+ IMG_SYS_PHYADDR *pasAdjustedSysPhysAddr;
PVRSRV_MEMBLK *psMemBlock;
PVRSRV_ERROR eError;
- IMG_HANDLE hDevMemHeap = IMG_NULL;
IMG_HANDLE hPriv;
+ IMG_HANDLE hUnique;
BM_HANDLE hBuffer;
- IMG_UINT32 ui32HeapCount;
+ IMG_SIZE_T uiMapSize = 0;
+ IMG_SIZE_T uiAdjustOffset = 0;
IMG_UINT32 ui32PageCount;
IMG_UINT32 i;
IMG_BOOL bAllocSync = (ui32Flags & PVRSRV_MEM_NO_SYNCOBJ)?IMG_FALSE:IMG_TRUE;
- if ((hDevCookie == IMG_NULL) || (ui32Size == 0)
- || (hDevMemContext == IMG_NULL) || (ppsKernelMemInfo == IMG_NULL))
+ if ((hDevCookie == IMG_NULL) || (ui32ChunkCount == 0)
+ || (hDevMemHeap == IMG_NULL) || (ppsKernelMemInfo == IMG_NULL))
{
PVR_DPF((PVR_DBG_ERROR, "%s: Invalid params", __FUNCTION__));
return PVRSRV_ERROR_INVALID_PARAMS;
}
+ for (i=0;i<ui32ChunkCount;i++)
+ {
+ if ((pauiOffset[i] & HOST_PAGEMASK) != 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"%s: Chunk offset is not page aligned", __FUNCTION__));
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ if ((pauiSize[i] & HOST_PAGEMASK) != 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"%s: Chunk size is not page aligned", __FUNCTION__));
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+ uiMapSize += pauiSize[i];
+ }
+
psDeviceNode = (PVRSRV_DEVICE_NODE *)hDevCookie;
if(OSAllocMem(PVRSRV_PAGEABLE_SELECT,
}
OSMemSet(psNewKernelMemInfo, 0, sizeof(PVRSRV_KERNEL_MEM_INFO));
- /* Choose the heap to map to */
- ui32HeapCount = psDeviceNode->sDevMemoryInfo.ui32HeapCount;
- psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo;
- psDeviceMemoryHeap = psDeviceNode->sDevMemoryInfo.psDeviceMemoryHeap;
- for(i=0; i<PVRSRV_MAX_CLIENT_HEAPS; i++)
+ /* Import the ION buffer into our ion_client and DMA map it */
+ eError = IonImportBufferAndAcquirePhysAddr(psPerProcEnv->psIONClient,
+ ui32NumFDs,
+ pi32BufferFDs,
+ &ui32PageCount,
+ &pasSysPhysAddr,
+ &psNewKernelMemInfo->pvLinAddrKM,
+ &hPriv,
+ &hUnique);
+ if (eError != PVRSRV_OK)
{
- if(HEAP_IDX(psDeviceMemoryHeap[i].ui32HeapID) == psDevMemoryInfo->ui32IonHeapID)
- {
- if(psDeviceMemoryHeap[i].DevMemHeapType == DEVICE_MEMORY_HEAP_PERCONTEXT)
- {
- if (psDeviceMemoryHeap[i].ui32HeapSize > 0)
- {
- hDevMemHeap = BM_CreateHeap(hDevMemContext, &psDeviceMemoryHeap[i]);
- }
- else
- {
- hDevMemHeap = IMG_NULL;
- }
- }
- else
- {
- hDevMemHeap = psDevMemoryInfo->psDeviceMemoryHeap[i].hDevMemHeap;
- }
- break;
- }
+ PVR_DPF((PVR_DBG_ERROR, "%s: Failed to get ion buffer/buffer phys addr", __FUNCTION__));
+ goto exitFailedImport;
}
-
- if (hDevMemHeap == IMG_NULL)
+
+ /*
+ Make sure the number of pages detected by the ion import are at least
+ the size of the total chunked region
+ */
+ if(ui32PageCount * PAGE_SIZE < uiMapSize)
{
- PVR_DPF((PVR_DBG_ERROR, "%s: Failed to get ION heap", __FUNCTION__));
- eError = PVRSRV_ERROR_FAILED_TO_RETRIEVE_HEAPINFO;
- goto exitFailedHeap;
+ PVR_DPF((PVR_DBG_ERROR, "%s: ion allocator returned fewer page addresses "
+ "than specified chunk size(s)", __FUNCTION__));
+ eError = PVRSRV_ERROR_INVALID_PARAMS;
+ goto exitFailedAdjustedAlloc;
}
- /* Import the ION buffer into our ion_client and DMA map it */
- eError = IonImportBufferAndAquirePhysAddr(psPerProcEnv->psIONClient,
- hIon,
- &ui32PageCount,
- &pasSysPhysAddr,
- &psNewKernelMemInfo->pvLinAddrKM,
- &hPriv);
- if (eError != PVRSRV_OK)
+ /*
+ An Ion buffer might have a number of "chunks" in it which need to be
+ mapped virtually continuous so we need to create a new array of
+ addresses based on this chunk data for the actual wrap
+ */
+ if(OSAllocMem(PVRSRV_PAGEABLE_SELECT,
+ sizeof(IMG_SYS_PHYADDR) * (uiMapSize/HOST_PAGESIZE()),
+ (IMG_VOID **)&pasAdjustedSysPhysAddr, IMG_NULL,
+ "Ion adjusted system address array") != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR, "%s: Failed to get ion buffer/buffer phys addr", __FUNCTION__));
- goto exitFailedHeap;
+ PVR_DPF((PVR_DBG_ERROR,"%s: Failed to alloc memory for adjusted array", __FUNCTION__));
+ goto exitFailedAdjustedAlloc;
+ }
+ OSMemSet(pasAdjustedSysPhysAddr, 0, sizeof(IMG_SYS_PHYADDR) * (uiMapSize/HOST_PAGESIZE()));
+
+ for (i=0;i<ui32ChunkCount;i++)
+ {
+ OSMemCopy(&pasAdjustedSysPhysAddr[uiAdjustOffset],
+ &pasSysPhysAddr[pauiOffset[i]/HOST_PAGESIZE()],
+ (pauiSize[i]/HOST_PAGESIZE()) * sizeof(IMG_SYS_PHYADDR));
+
+ uiAdjustOffset += pauiSize[i]/HOST_PAGESIZE();
}
/* Wrap the returned addresses into our memory context */
if (!BM_Wrap(hDevMemHeap,
- ui32Size,
+ uiMapSize,
0,
IMG_FALSE,
- pasSysPhysAddr,
+ pasAdjustedSysPhysAddr,
IMG_NULL,
&ui32Flags, /* This function clobbers our bits in ui32Flags */
&hBuffer))
psMemBlock->hOSMemHandle = BM_HandleToOSMemHandle(hBuffer);
psMemBlock->hBuffer = (IMG_HANDLE) hBuffer;
psMemBlock->hOSWrapMem = hPriv; /* Saves creating a new element as we know hOSWrapMem will not be used */
- psMemBlock->psIntSysPAddr = pasSysPhysAddr;
+ psMemBlock->psIntSysPAddr = pasAdjustedSysPhysAddr;
psNewKernelMemInfo->ui32Flags = ui32Flags;
psNewKernelMemInfo->sDevVAddr = psMemBlock->sDevVirtAddr;
- psNewKernelMemInfo->uAllocSize = ui32Size;
+ psNewKernelMemInfo->uAllocSize = uiMapSize;
psNewKernelMemInfo->memType = PVRSRV_MEMTYPE_ION;
PVRSRVKernelMemInfoIncRef(psNewKernelMemInfo);
}
else
{
- eError = PVRSRVAllocSyncInfoKM(hDevCookie,
- hDevMemContext,
- &psNewKernelMemInfo->psKernelSyncInfo);
+ PVRSRV_ION_SYNC_INFO *psIonSyncInfo;
+ BM_HEAP *psBMHeap;
+ IMG_HANDLE hDevMemContext;
+
+ psBMHeap = (BM_HEAP*)hDevMemHeap;
+ hDevMemContext = (IMG_HANDLE)psBMHeap->pBMContext;
+
+ eError = PVRSRVIonBufferSyncInfoIncRef(hUnique,
+ hDevCookie,
+ hDevMemContext,
+ &psIonSyncInfo,
+ psNewKernelMemInfo);
if(eError != PVRSRV_OK)
{
goto exitFailedSync;
}
+ psNewKernelMemInfo->hIonSyncInfo = psIonSyncInfo;
+ psNewKernelMemInfo->psKernelSyncInfo = IonBufferSyncGetKernelSyncInfo(psIonSyncInfo);
+ *pui64Stamp = IonBufferSyncGetStamp(psIonSyncInfo);
}
/* register with the resman */
psNewKernelMemInfo->memType = PVRSRV_MEMTYPE_ION;
+ /*
+ As the user doesn't tell us the size, just the "chunk" information
+ return actual size of the Ion buffer so we can mmap it.
+ */
+ *puiIonBufferSize = ui32PageCount * HOST_PAGESIZE();
*ppsKernelMemInfo = psNewKernelMemInfo;
return PVRSRV_OK;
exitFailedResman:
if (psNewKernelMemInfo->psKernelSyncInfo)
{
- PVRSRVKernelSyncInfoDecRef(psNewKernelMemInfo->psKernelSyncInfo, psNewKernelMemInfo);
+ PVRSRVIonBufferSyncInfoDecRef(psNewKernelMemInfo->hIonSyncInfo, psNewKernelMemInfo);
}
exitFailedSync:
BM_Free(hBuffer, ui32Flags);
exitFailedWrap:
- IonUnimportBufferAndReleasePhysAddr(hPriv);
OSFreeMem(PVRSRV_PAGEABLE_SELECT,
- sizeof(IMG_SYS_PHYADDR) * ui32PageCount,
- pasSysPhysAddr,
+ sizeof(IMG_SYS_PHYADDR) * uiAdjustOffset,
+ pasAdjustedSysPhysAddr,
IMG_NULL);
-exitFailedHeap:
+exitFailedAdjustedAlloc:
+ IonUnimportBufferAndReleasePhysAddr(hPriv);
+exitFailedImport:
OSFreeMem(PVRSRV_PAGEABLE_SELECT,
sizeof(PVRSRV_KERNEL_MEM_INFO),
psNewKernelMemInfo,
IMG_UINT32 i;
IMG_SIZE_T uPageCount = 0;
+ PVR_DPF ((PVR_DBG_MESSAGE,
+ "PVRSRVWrapExtMemoryKM (uSize=0x%" SIZE_T_FMT_LEN "x, uPageOffset=0x%"
+ SIZE_T_FMT_LEN "x, bPhysContig=%d, extSysPAddr=" SYSPADDR_FMT
+ ", pvLinAddr=%p, ui32Flags=%u)",
+ uByteSize,
+ uPageOffset,
+ bPhysContig,
+ psExtSysPAddr?psExtSysPAddr->uiAddr:0x0,
+ pvLinAddr,
+ ui32Flags));
psDeviceNode = (PVRSRV_DEVICE_NODE*)hDevCookie;
PVR_ASSERT(psDeviceNode != IMG_NULL);
*/
bPhysContig = IMG_FALSE;
}
+ else
+ {
+ if (psExtSysPAddr)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVWrapExtMemoryKM: invalid parameter, physical address passing is not supported"));
+ }
+ else
+ {
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVWrapExtMemoryKM: invalid parameter, no address specificed"));
+ }
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
/* Choose the heap to map to */
psDevMemoryInfo = &((BM_CONTEXT*)hDevMemContext)->psDeviceNode->sDevMemoryInfo;
}
OSMemSet(psMemInfo, 0, sizeof(*psMemInfo));
- psMemInfo->ui32Flags = ui32Flags;
+ /*
+ Force the memory to be read/write. This used to be done in the BM, but
+ ion imports don't want this behaviour
+ */
+ psMemInfo->ui32Flags = ui32Flags | PVRSRV_MEM_READ | PVRSRV_MEM_WRITE;
psMemBlock = &(psMemInfo->sMemBlk);
}
OSMemSet(psMemInfo, 0, sizeof(*psMemInfo));
- psMemInfo->ui32Flags = psSrcMemInfo->ui32Flags;
+
+ /*
+ Force the memory to be read/write. This used to be done in the BM, but
+ ion imports don't want this behaviour
+ */
+ psMemInfo->ui32Flags = psSrcMemInfo->ui32Flags | PVRSRV_MEM_READ | PVRSRV_MEM_WRITE;
psMemBlock = &(psMemInfo->sMemBlk);
DEVICE_MEMORY_INFO *psDevMemoryInfo;
DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
IMG_HANDLE hDevMemHeap = IMG_NULL;
- IMG_SIZE_T uByteSize;
- IMG_SIZE_T ui32Offset;
- IMG_SIZE_T ui32PageSize = HOST_PAGESIZE();
+ IMG_UINT32 ui32ByteSize;
+ IMG_SIZE_T uOffset;
+ IMG_SIZE_T uPageSize = HOST_PAGESIZE();
BM_HANDLE hBuffer;
PVRSRV_MEMBLK *psMemBlock;
IMG_BOOL bBMError;
eError = psDeviceClassBuffer->pfnGetBufferAddr(psDeviceClassBuffer->hExtDevice,
psDeviceClassBuffer->hExtBuffer,
&psSysPAddr,
- &uByteSize,
+ &ui32ByteSize,
&pvCPUVAddr,
phOSMapInfo,
&bPhysContig,
}
/* Only need lower 12 bits of the cpu addr - don't care what size a void* is */
- ui32Offset = ((IMG_UINTPTR_T)pvCPUVAddr) & (ui32PageSize - 1);
- pvPageAlignedCPUVAddr = (IMG_VOID *)((IMG_UINTPTR_T)pvCPUVAddr - ui32Offset);
+ uOffset = ((IMG_UINTPTR_T)pvCPUVAddr) & (uPageSize - 1);
+ pvPageAlignedCPUVAddr = (IMG_VOID *)((IMG_UINTPTR_T)pvCPUVAddr - uOffset);
eError = OSAllocMem(PVRSRV_PAGEABLE_SELECT,
sizeof(PVRSRV_KERNEL_MEM_INFO),
OSMemSet(psMemInfo, 0, sizeof(*psMemInfo));
+ /*
+ Force the memory to be read/write. This used to be done in the BM, but
+ ion imports don't want this behaviour
+ */
+ psMemInfo->ui32Flags |= PVRSRV_MEM_READ | PVRSRV_MEM_WRITE;
+
psMemBlock = &(psMemInfo->sMemBlk);
bBMError = BM_Wrap(hDevMemHeap,
- uByteSize,
- ui32Offset,
+ ui32ByteSize,
+ uOffset,
bPhysContig,
psSysPAddr,
pvPageAlignedCPUVAddr,
/* Fill in the public fields of the MEM_INFO structure */
psMemInfo->sDevVAddr = psMemBlock->sDevVirtAddr;
- psMemInfo->uAllocSize = uByteSize;
+ psMemInfo->uAllocSize = ui32ByteSize;
psMemInfo->psKernelSyncInfo = psDeviceClassBuffer->psKernelSyncInfo;
PVR_ASSERT(psMemInfo->psKernelSyncInfo != IMG_NULL);
* behaviour.
*/
PDUMPCOMMENT("Dump display surface");
- PDUMPMEM(IMG_NULL, psMemInfo, ui32Offset, psMemInfo->uAllocSize, PDUMP_FLAGS_CONTINUOUS, ((BM_BUF*)psMemInfo->sMemBlk.hBuffer)->pMapping);
+ PDUMPMEM(IMG_NULL, psMemInfo, uOffset, psMemInfo->uAllocSize, PDUMP_FLAGS_CONTINUOUS, ((BM_BUF*)psMemInfo->sMemBlk.hBuffer)->pMapping);
}
#endif
return PVRSRV_OK;
return PVRSRV_OK;
}
+PVRSRV_ERROR IMG_CALLCONV PVRSRVInitDeviceMem(IMG_VOID)
+{
+ PVRSRV_ERROR eError = PVRSRV_OK;
+
+#if defined(SUPPORT_ION)
+ /*
+ For Ion buffers we need to store which ones we know about so
+ we don't give the same buffer a different sync
+ */
+ g_psIonSyncHash = HASH_Create(ION_SYNC_HASH_SIZE);
+ if (g_psIonSyncHash == IMG_NULL)
+ {
+ eError = PVRSRV_ERROR_OUT_OF_MEMORY;
+ }
+#endif
+
+ return eError;
+}
+
+IMG_VOID IMG_CALLCONV PVRSRVDeInitDeviceMem(IMG_VOID)
+{
+#if defined(SUPPORT_ION)
+ HASH_Delete(g_psIonSyncHash);
+#endif
+}
+
+
/******************************************************************************
End of file (devicemem.c)
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
-#if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
/* See handle.h for a description of the handle API. */
/*
#define INDEX_IS_VALID(psBase, i) ((i) < (psBase)->ui32TotalHandCount)
/* Valid handles are never NULL, but handle array indices are based from 0 */
-#if defined (SUPPORT_SID_INTERFACE)
-#define INDEX_TO_HANDLE(i) ((IMG_SID)((i) + 1))
-#define HANDLE_TO_INDEX(h) ((IMG_UINT32)(h) - 1)
-#else
#define INDEX_TO_HANDLE(i) ((IMG_HANDLE)((IMG_UINTPTR_T)(i) + 1))
#define HANDLE_TO_INDEX(h) ((IMG_UINT32)(IMG_UINTPTR_T)(h) - 1)
-#endif
#define INDEX_TO_BLOCK_INDEX(i) DIVIDE_BY_BLOCK_SIZE(i)
#define BLOCK_INDEX_TO_INDEX(i) MULTIPLY_BY_BLOCK_SIZE(i)
{
IMG_UINT32 ui32Prev;
IMG_UINT32 ui32Next;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hParent;
-#else
IMG_HANDLE hParent;
-#endif
};
enum ePVRSRVInternalHandleFlag
#pragma inline(HandleListInit)
#endif
static INLINE
-#if defined (SUPPORT_SID_INTERFACE)
-IMG_VOID HandleListInit(IMG_UINT32 ui32Index, struct sHandleList *psList, IMG_SID hParent)
-#else
IMG_VOID HandleListInit(IMG_UINT32 ui32Index, struct sHandleList *psList, IMG_HANDLE hParent)
-#endif
{
psList->ui32Next = ui32Index;
psList->ui32Prev = ui32Index;
#pragma inline(ParentHandle)
#endif
static INLINE
-#if defined (SUPPORT_SID_INTERFACE)
-IMG_SID ParentHandle(struct sHandle *psHandle)
-#else
IMG_HANDLE ParentHandle(struct sHandle *psHandle)
-#endif
{
return psHandle->sSiblings.hParent;
}
#pragma inline(GetHandleStructure)
#endif
static INLINE
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR GetHandleStructure(PVRSRV_HANDLE_BASE *psBase, struct sHandle **ppsHandle, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType)
-#else
PVRSRV_ERROR GetHandleStructure(PVRSRV_HANDLE_BASE *psBase, struct sHandle **ppsHandle, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType)
-#endif
{
IMG_UINT32 ui32Index = HANDLE_TO_INDEX(hHandle);
struct sHandle *psHandle;
if (!INDEX_IS_VALID(psBase, ui32Index))
{
PVR_DPF((PVR_DBG_ERROR, "GetHandleStructure: Handle index out of range (%u >= %u)", ui32Index, psBase->ui32TotalHandCount));
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DBG_BREAK
-#endif
return PVRSRV_ERROR_HANDLE_INDEX_OUT_OF_RANGE;
}
if (psHandle->eType == PVRSRV_HANDLE_TYPE_NONE)
{
PVR_DPF((PVR_DBG_ERROR, "GetHandleStructure: Handle not allocated (index: %u)", ui32Index));
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DBG_BREAK
-#endif
return PVRSRV_ERROR_HANDLE_NOT_ALLOCATED;
}
if (eType != PVRSRV_HANDLE_TYPE_NONE && eType != psHandle->eType)
{
PVR_DPF((PVR_DBG_ERROR, "GetHandleStructure: Handle type mismatch (%d != %d)", eType, psHandle->eType));
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DBG_BREAK
-#endif
return PVRSRV_ERROR_HANDLE_TYPE_MISMATCH;
}
#pragma inline(ParentIfPrivate)
#endif
static INLINE
-#if defined (SUPPORT_SID_INTERFACE)
-IMG_SID ParentIfPrivate(struct sHandle *psHandle)
-#else
IMG_HANDLE ParentIfPrivate(struct sHandle *psHandle)
-#endif
{
return TEST_ALLOC_FLAG(psHandle, PVRSRV_HANDLE_ALLOC_FLAG_PRIVATE) ?
ParentHandle(psHandle) : IMG_NULL;
#pragma inline(InitKey)
#endif
static INLINE
-#if defined (SUPPORT_SID_INTERFACE)
-IMG_VOID InitKey(HAND_KEY aKey, PVRSRV_HANDLE_BASE *psBase, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, IMG_SID hParent)
-#else
IMG_VOID InitKey(HAND_KEY aKey, PVRSRV_HANDLE_BASE *psBase, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, IMG_HANDLE hParent)
-#endif
{
PVR_UNREFERENCED_PARAMETER(psBase);
if (!TEST_ALLOC_FLAG(psHandle, PVRSRV_HANDLE_ALLOC_FLAG_MULTI) && !BATCHED_HANDLE_PARTIALLY_FREE(psHandle))
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHandle;
- hHandle = (IMG_SID) HASH_Remove_Extended(psBase->psHashTab, aKey);
-#else
IMG_HANDLE hHandle;
hHandle = (IMG_HANDLE) HASH_Remove_Extended(psBase->psHashTab, aKey);
-#endif
PVR_ASSERT(hHandle != IMG_NULL);
PVR_ASSERT(hHandle == INDEX_TO_HANDLE(ui32Index));
#pragma inline(FindHandle)
#endif
static INLINE
-#if defined (SUPPORT_SID_INTERFACE)
-IMG_SID FindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, IMG_SID hParent)
-#else
IMG_HANDLE FindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, IMG_HANDLE hParent)
-#endif
{
HAND_KEY aKey;
InitKey(aKey, psBase, pvData, eType, hParent);
-#if defined (SUPPORT_SID_INTERFACE)
- return (IMG_SID) HASH_Retrieve_Extended(psBase->psHashTab, aKey);
-#else
return (IMG_HANDLE) HASH_Retrieve_Extended(psBase->psHashTab, aKey);
-#endif
}
/*!
@Return Error code or PVRSRV_OK
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_SID hParent)
-#else
static PVRSRV_ERROR AllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_HANDLE hParent)
-#endif
{
IMG_UINT32 ui32NewIndex = DEFAULT_MAX_INDEX_PLUS_ONE;
struct sHandle *psNewHandle = IMG_NULL;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHandle;
-#else
IMG_HANDLE hHandle;
-#endif
HAND_KEY aKey;
PVRSRV_ERROR eError;
@Return Error code or PVRSRV_OK
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVAllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag)
-#else
PVRSRV_ERROR PVRSRVAllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag)
-#endif
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHandle;
-#else
IMG_HANDLE hHandle;
-#endif
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- *phHandle = 0;
-#else
*phHandle = IMG_NULL;
-#endif
if (HANDLES_BATCHED(psBase))
{
{
/* See if there is already a handle for this data pointer */
hHandle = FindHandle(psBase, pvData, eType, IMG_NULL);
-#if defined (SUPPORT_SID_INTERFACE)
- if (hHandle != 0)
-#else
if (hHandle != IMG_NULL)
-#endif
{
struct sHandle *psHandle;
goto exit_ok;
}
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DBG_BREAK
-#endif
return PVRSRV_ERROR_HANDLE_NOT_SHAREABLE;
}
}
@Return Error code or PVRSRV_OK
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_SID hParent)
-#else
PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_HANDLE hParent)
-#endif
{
struct sHandle *psPHand;
struct sHandle *psCHand;
PVRSRV_ERROR eError;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hParentKey;
- IMG_SID hHandle;
-
- *phHandle = 0;
-#else
IMG_HANDLE hParentKey;
IMG_HANDLE hHandle;
*phHandle = IMG_NULL;
-#endif
if (HANDLES_BATCHED(psBase))
{
{
/* See if there is already a handle for this data pointer */
hHandle = FindHandle(psBase, pvData, eType, hParentKey);
-#if defined (SUPPORT_SID_INTERFACE)
- if (hHandle != 0)
-#else
if (hHandle != IMG_NULL)
-#endif
{
struct sHandle *psCHandle;
PVRSRV_ERROR eErr;
*phHandle = hHandle;
goto exit_ok;
}
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DBG_BREAK
-#endif
return PVRSRV_ERROR_HANDLE_NOT_SHAREABLE;
}
}
@Return Error code or PVRSRV_OK
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVFindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType)
-#else
PVRSRV_ERROR PVRSRVFindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType)
-#endif
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHandle;
-#else
IMG_HANDLE hHandle;
-#endif
PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
/* See if there is a handle for this data pointer */
-#if defined (SUPPORT_SID_INTERFACE)
- hHandle = (IMG_SID) FindHandle(psBase, pvData, eType, IMG_NULL);
-#else
hHandle = (IMG_HANDLE) FindHandle(psBase, pvData, eType, IMG_NULL);
-#endif
if (hHandle == IMG_NULL)
{
return PVRSRV_ERROR_HANDLE_NOT_FOUND;
@Return Error code or PVRSRV_OK
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVLookupHandleAnyType(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, PVRSRV_HANDLE_TYPE *peType, IMG_SID hHandle)
-#else
PVRSRV_ERROR PVRSRVLookupHandleAnyType(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, PVRSRV_HANDLE_TYPE *peType, IMG_HANDLE hHandle)
-#endif
{
struct sHandle *psHandle;
PVRSRV_ERROR eError;
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVLookupHandleAnyType: Error looking up handle (%d)", eError));
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DBG_BREAK
-#endif
+ OSDumpStack();
return eError;
}
@Return Error code or PVRSRV_OK
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVLookupHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType)
-#else
PVRSRV_ERROR PVRSRVLookupHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType)
-#endif
{
struct sHandle *psHandle;
PVRSRV_ERROR eError;
PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_ASSERT(hHandle != 0);
-#endif
eError = GetHandleStructure(psBase, &psHandle, hHandle, eType);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVLookupHandle: Error looking up handle (%d)", eError));
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DBG_BREAK
-#endif
+ OSDumpStack();
return eError;
}
@Return Error code or PVRSRV_OK
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVLookupSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType, IMG_SID hAncestor)
-#else
PVRSRV_ERROR PVRSRVLookupSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType, IMG_HANDLE hAncestor)
-#endif
{
struct sHandle *psPHand;
struct sHandle *psCHand;
PVRSRV_ERROR eError;
PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_ASSERT(hHandle != 0);
-#endif
eError = GetHandleStructure(psBase, &psCHand, hHandle, eType);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVLookupSubHandle: Error looking up subhandle (%d)", eError));
+ OSDumpStack();
return eError;
}
not regarded as an error.
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVGetParentHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phParent, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType)
-#else
PVRSRV_ERROR PVRSRVGetParentHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *phParent, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType)
-#endif
{
struct sHandle *psHandle;
PVRSRV_ERROR eError;
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVGetParentHandle: Error looking up subhandle (%d)", eError));
+ OSDumpStack();
return eError;
}
@Return Error code or PVRSRV_OK
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVLookupAndReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType)
-#else
PVRSRV_ERROR PVRSRVLookupAndReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType)
-#endif
{
struct sHandle *psHandle;
PVRSRV_ERROR eError;
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVLookupAndReleaseHandle: Error looking up handle (%d)", eError));
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DBG_BREAK
-#endif
+ OSDumpStack();
return eError;
}
@Return Error code or PVRSRV_OK
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType)
-#else
PVRSRV_ERROR PVRSRVReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType)
-#endif
{
struct sHandle *psHandle;
PVRSRV_ERROR eError;
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVReleaseHandle: Error looking up handle (%d)", eError));
+ OSDumpStack();
return eError;
}
}
#else
/* disable warning about empty module */
-#endif /* #if defined(PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE) */
+#endif /* #if defined(PVR_SECURE_HANDLES) */
/******************************************************************************
End of file (handle.c)
******************************************************************************/
BUCKET *pBucket;
PVR_DPF ((PVR_DBG_MESSAGE,
- "HASH_Insert_Extended: Hash=0x%08x, pKey=0x%08x, v=0x%x",
- (IMG_UINTPTR_T)pHash, (IMG_UINTPTR_T)pKey, v));
+ "HASH_Insert_Extended: Hash=0x%p, pKey=0x%p, v=0x" UINTPTR_FMT,
+ pHash, pKey, v));
PVR_ASSERT (pHash != IMG_NULL);
HASH_Insert (HASH_TABLE *pHash, IMG_UINTPTR_T k, IMG_UINTPTR_T v)
{
PVR_DPF ((PVR_DBG_MESSAGE,
- "HASH_Insert: Hash=0x%x, k=0x%x, v=0x%x",
- (IMG_UINTPTR_T)pHash, k, v));
+ "HASH_Insert: Hash=0x%p, k=0x" UINTPTR_FMT ", v=0x" UINTPTR_FMT,
+ pHash, k, v));
return HASH_Insert_Extended(pHash, &k, v);
}
BUCKET **ppBucket;
IMG_UINT32 uIndex;
- PVR_DPF ((PVR_DBG_MESSAGE, "HASH_Remove_Extended: Hash=0x%x, pKey=0x%x",
- (IMG_UINTPTR_T)pHash, (IMG_UINTPTR_T)pKey));
+ PVR_DPF ((PVR_DBG_MESSAGE, "HASH_Remove_Extended: Hash=0x%p, pKey=0x%p",
+ pHash, pKey));
PVR_ASSERT (pHash != IMG_NULL);
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "HASH_Remove_Extended: Hash=0x%x, pKey=0x%x = 0x%x",
- (IMG_UINTPTR_T)pHash, (IMG_UINTPTR_T)pKey, v));
+ "HASH_Remove_Extended: Hash=0x%p, pKey=0x%p = 0x" UINTPTR_FMT,
+ pHash, pKey, v));
return v;
}
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "HASH_Remove_Extended: Hash=0x%x, pKey=0x%x = 0x0 !!!!",
- (IMG_UINTPTR_T)pHash, (IMG_UINTPTR_T)pKey));
+ "HASH_Remove_Extended: Hash=0x%p, pKey=0x%p = 0x0 !!!!",
+ pHash, pKey));
return 0;
}
IMG_UINTPTR_T
HASH_Remove (HASH_TABLE *pHash, IMG_UINTPTR_T k)
{
- PVR_DPF ((PVR_DBG_MESSAGE, "HASH_Remove: Hash=0x%x, k=0x%x",
- (IMG_UINTPTR_T)pHash, k));
+ PVR_DPF ((PVR_DBG_MESSAGE, "HASH_Remove: Hash=0x%p, k=0x" UINTPTR_FMT,
+ pHash, k));
return HASH_Remove_Extended(pHash, &k);
}
BUCKET **ppBucket;
IMG_UINT32 uIndex;
- PVR_DPF ((PVR_DBG_MESSAGE, "HASH_Retrieve_Extended: Hash=0x%x, pKey=0x%x",
- (IMG_UINTPTR_T)pHash, (IMG_UINTPTR_T)pKey));
+ PVR_DPF ((PVR_DBG_MESSAGE, "HASH_Retrieve_Extended: Hash=0x%p, pKey=0x%p",
+ pHash, pKey));
PVR_ASSERT (pHash != IMG_NULL);
IMG_UINTPTR_T v = pBucket->v;
PVR_DPF ((PVR_DBG_MESSAGE,
- "HASH_Retrieve: Hash=0x%x, pKey=0x%x = 0x%x",
- (IMG_UINTPTR_T)pHash, (IMG_UINTPTR_T)pKey, v));
+ "HASH_Retrieve: Hash=0x%p, pKey=0x%p = 0x" UINTPTR_FMT,
+ pHash, pKey, v));
return v;
}
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "HASH_Retrieve: Hash=0x%x, pKey=0x%x = 0x0 !!!!",
- (IMG_UINTPTR_T)pHash, (IMG_UINTPTR_T)pKey));
+ "HASH_Retrieve: Hash=0x%p, pKey=0x%p = 0x0 !!!!",
+ pHash, pKey));
return 0;
}
IMG_UINTPTR_T
HASH_Retrieve (HASH_TABLE *pHash, IMG_UINTPTR_T k)
{
- PVR_DPF ((PVR_DBG_MESSAGE, "HASH_Retrieve: Hash=0x%x, k=0x%x",
- (IMG_UINTPTR_T)pHash, k));
+ PVR_DPF ((PVR_DBG_MESSAGE, "HASH_Retrieve: Hash=0x%p, k=0x" UINTPTR_FMT,
+ pHash, k));
return HASH_Retrieve_Extended(pHash, &k);
}
*/
IMG_VOID OSCheckMemDebug(IMG_PVOID pvCpuVAddr, IMG_SIZE_T uSize, const IMG_CHAR *pszFileName, const IMG_UINT32 uLine)
{
- OSMEM_DEBUG_INFO const *psInfo = (OSMEM_DEBUG_INFO *)((IMG_UINT32)pvCpuVAddr - TEST_BUFFER_PADDING_STATUS);
+ OSMEM_DEBUG_INFO const *psInfo = (OSMEM_DEBUG_INFO *)((IMG_UINTPTR_T)pvCpuVAddr - TEST_BUFFER_PADDING_STATUS);
/* invalid pointer */
if (pvCpuVAddr == IMG_NULL)
{
- PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%X : null pointer"
+ PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%p : null pointer"
" - referenced %s:%d - allocated %s:%d",
pvCpuVAddr,
pszFileName, uLine,
/* align */
if (((IMG_UINT32)pvCpuVAddr&3) != 0)
{
- PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%X : invalid alignment"
+ PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%p : invalid alignment"
" - referenced %s:%d - allocated %s:%d",
pvCpuVAddr,
pszFileName, uLine,
/*check guard region before*/
if (!MemCheck((IMG_PVOID)psInfo->sGuardRegionBefore, 0xB1, sizeof(psInfo->sGuardRegionBefore)))
{
- PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%X : guard region before overwritten"
+ PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%p : guard region before overwritten"
" - referenced %s:%d - allocated %s:%d",
pvCpuVAddr,
pszFileName, uLine,
/*check size*/
if (uSize != psInfo->uSize)
{
- PVR_DPF((PVR_DBG_WARNING, "Pointer 0x%X : supplied size was different to stored size (0x%X != 0x%X)"
+ PVR_DPF((PVR_DBG_WARNING,
+ "Pointer 0x%p : supplied size was different to stored size (0x%"
+ SIZE_T_FMT_LEN "X != 0x%" SIZE_T_FMT_LEN "X)"
" - referenced %s:%d - allocated %s:%d",
pvCpuVAddr, uSize, psInfo->uSize,
pszFileName, uLine,
/*check size parity*/
if ((0x01234567 ^ psInfo->uSizeParityCheck) != psInfo->uSize)
{
- PVR_DPF((PVR_DBG_WARNING, "Pointer 0x%X : stored size parity error (0x%X != 0x%X)"
+ PVR_DPF((PVR_DBG_WARNING,
+ "Pointer 0x%p : stored size parity error (0x%"
+ SIZE_T_FMT_LEN "X != 0x%" SIZE_T_FMT_LEN "X)"
" - referenced %s:%d - allocated %s:%d",
pvCpuVAddr, psInfo->uSize, 0x01234567 ^ psInfo->uSizeParityCheck,
pszFileName, uLine,
/*check padding after*/
if (uSize)
{
- if (!MemCheck((IMG_VOID*)((IMG_UINT32)pvCpuVAddr + uSize), 0xB2, TEST_BUFFER_PADDING_AFTER))
+ if (!MemCheck((IMG_VOID*)((IMG_UINTPTR_T)pvCpuVAddr + uSize), 0xB2, TEST_BUFFER_PADDING_AFTER))
{
- PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%X : guard region after overwritten"
+ PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%p : guard region after overwritten"
" - referenced from %s:%d - allocated from %s:%d",
pvCpuVAddr,
pszFileName, uLine,
/* allocated... */
if (psInfo->eValid != isAllocated)
{
- PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%X : not allocated (freed? %d)"
+ PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%p : not allocated (freed? %d)"
" - referenced %s:%d - freed %s:%d",
pvCpuVAddr, psInfo->eValid == isFree,
pszFileName, uLine,
psInfo->uSizeParityCheck = 0x01234567 ^ ui32Size;
/*point to the user data section*/
- *ppvCpuVAddr = (IMG_PVOID) ((IMG_UINT32)*ppvCpuVAddr)+TEST_BUFFER_PADDING_STATUS;
+ *ppvCpuVAddr = (IMG_PVOID) ((IMG_UINTPTR_T)*ppvCpuVAddr)+TEST_BUFFER_PADDING_STATUS;
#ifdef PVRSRV_LOG_MEMORY_ALLOCS
/*this is here to simplify the surounding logging macro, that is a expression
maybe the macro should be an expression */
- PVR_TRACE(("Allocated pointer (after debug info): 0x%X from %s:%d", *ppvCpuVAddr, pszFilename, ui32Line));
+ PVR_TRACE(("Allocated pointer (after debug info): 0x%p from %s:%d", *ppvCpuVAddr, pszFilename, ui32Line));
#endif
return PVRSRV_OK;
OSMemSet(pvCpuVAddr, 0xBF, ui32Size + TEST_BUFFER_PADDING_AFTER);
/*point to the starting address of the total allocated memory*/
- psInfo = (OSMEM_DEBUG_INFO *)((IMG_UINT32) pvCpuVAddr - TEST_BUFFER_PADDING_STATUS);
+ psInfo = (OSMEM_DEBUG_INFO *)((IMG_UINTPTR_T) pvCpuVAddr - TEST_BUFFER_PADDING_STATUS);
/*update dbg info struct*/
psInfo->uSize = 0;
IMG_UINT32 g_ui32EveryLineCounter = 1U;
#endif
-#ifdef INLINE_IS_PRAGMA
-#pragma inline(_PDumpIsPersistent)
-#endif
-static INLINE
-IMG_BOOL _PDumpIsPersistent(IMG_VOID)
-{
- PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData();
-
- if(psPerProc == IMG_NULL)
- {
- /* only occurs early in driver init, and init phase is already persistent */
- return IMG_FALSE;
- }
- return psPerProc->bPDumpPersistent;
-}
-
#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
-static INLINE
IMG_BOOL _PDumpIsProcessActive(IMG_VOID)
{
PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData();
{
PVRSRV_ERROR eErr;
PDUMP_GET_SCRIPT_STRING()
+
+ PDUMP_LOCK();
PDUMP_DBG(("PDumpRegWithFlagsKM"));
eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "WRW :%s:0x%08X 0x%08X\r\n",
pszPDumpRegName, ui32Reg, ui32Data);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
PVRSRV_ERROR eErr;
IMG_UINT32 ui32PollCount;
-
PDUMP_GET_SCRIPT_STRING();
+
+ PDUMP_LOCK();
PDUMP_DBG(("PDumpRegPolWithFlagsKM"));
- if ( _PDumpIsPersistent() )
- {
- /* Don't pdump-poll if the process is persistent */
- return PVRSRV_OK;
- }
ui32PollCount = POLL_COUNT_LONG;
ui32Mask, eOperator, ui32PollCount, POLL_DELAY);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
IMG_HANDLE hOSMemHandle,
IMG_UINT32 ui32NumBytes,
IMG_UINT32 ui32PageSize,
- IMG_BOOL bShared,
- IMG_HANDLE hUniqueTag)
+ IMG_HANDLE hUniqueTag,
+ IMG_UINT32 ui32Flags)
{
PVRSRV_ERROR eErr;
IMG_PUINT8 pui8LinAddr;
IMG_UINT32 ui32NumPages;
IMG_DEV_PHYADDR sDevPAddr;
IMG_UINT32 ui32Page;
- IMG_UINT32 ui32Flags = PDUMP_FLAGS_CONTINUOUS;
-
+ IMG_UINT32 ui32PageSizeShift = 0;
+ IMG_UINT32 ui32PageSizeTmp;
PDUMP_GET_SCRIPT_STRING();
-#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
- /* Always dump physical pages backing a shared allocation */
- ui32Flags |= ( _PDumpIsPersistent() || bShared ) ? PDUMP_FLAGS_PERSISTENT : 0;
-#else
- PVR_UNREFERENCED_PARAMETER(bShared);
- ui32Flags |= ( _PDumpIsPersistent() ) ? PDUMP_FLAGS_PERSISTENT : 0;
-#endif
+
+ PDUMP_LOCK();
/* However, lin addr is only required in non-linux OSes */
#if !defined(LINUX)
PVR_ASSERT(((IMG_UINT32) ui32DevVAddr & HOST_PAGEMASK) == 0);
PVR_ASSERT(((IMG_UINT32) ui32NumBytes & HOST_PAGEMASK) == 0);
+ /*
+ Compute the amount to right-shift in order to divide by the page-size.
+ Required for 32-bit PAE kernels (thus phys addresses are 64-bits) where
+ 64-bit division is unsupported.
+ */
+ ui32PageSizeTmp = ui32PageSize;
+ while (ui32PageSizeTmp >>= 1)
+ ui32PageSizeShift++;
+
/*
Write a comment to the PDump2 script streams indicating the memory allocation
*/
- eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "-- MALLOC :%s:VA_%08X 0x%08X %u\r\n",
- psDevID->pszPDumpDevName, ui32DevVAddr, ui32NumBytes, ui32PageSize);
+ eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "-- MALLOC :%s:VA_%08X 0x%08X %u (%d pages)\r\n",
+ psDevID->pszPDumpDevName, ui32DevVAddr, ui32NumBytes, ui32PageSize, ui32NumBytes / ui32PageSize);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
*/
pui8LinAddr = (IMG_PUINT8) pvLinAddr;
ui32Offset = 0;
- ui32NumPages = ui32NumBytes / ui32PageSize;
+ ui32NumPages = ui32NumBytes >> ui32PageSizeShift;
while (ui32NumPages)
{
ui32NumPages--;
pui8LinAddr,
ui32PageSize,
&sDevPAddr);
- ui32Page = (IMG_UINT32)(sDevPAddr.uiAddr / ui32PageSize);
+ ui32Page = (IMG_UINT32)(sDevPAddr.uiAddr >> ui32PageSizeShift);
/* increment kernel virtual address */
pui8LinAddr += ui32PageSize;
ui32Offset += ui32PageSize;
- eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "MALLOC :%s:PA_%08X%08X %u %u 0x%08X\r\n",
+ sDevPAddr.uiAddr = ui32Page * ui32PageSize;
+
+ eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "MALLOC :%s:PA_" UINTPTR_FMT DEVPADDR_FMT " %u %u 0x" DEVPADDR_FMT "\r\n",
psDevID->pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag,
- ui32Page * ui32PageSize,
+ (IMG_UINTPTR_T)hUniqueTag,
+ sDevPAddr.uiAddr,
ui32PageSize,
ui32PageSize,
- ui32Page * ui32PageSize);
+ sDevPAddr.uiAddr);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
}
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
{
PVRSRV_ERROR eErr;
IMG_DEV_PHYADDR sDevPAddr;
-
PDUMP_GET_SCRIPT_STRING();
+ PDUMP_LOCK();
PVR_ASSERT(((IMG_UINTPTR_T)pvLinAddr & (ui32PTSize - 1)) == 0);
+
ui32Flags |= PDUMP_FLAGS_CONTINUOUS;
- ui32Flags |= ( _PDumpIsPersistent() ) ? PDUMP_FLAGS_PERSISTENT : 0;
-
+
/*
Write a comment to the PDump2 script streams indicating the memory allocation
*/
ui32PTSize);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
ui32PTSize,
&sDevPAddr);
- eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "MALLOC :%s:PA_%08X%08X 0x%X %u 0x%08X\r\n",
+ eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "MALLOC :%s:PA_" UINTPTR_FMT DEVPADDR_FMT
+ " 0x%X %u 0x" DEVPADDR_FMT "\r\n",
psDevId->pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag,
+ (IMG_UINTPTR_T)hUniqueTag,
sDevPAddr.uiAddr,
ui32PTSize,//size
ui32PTSize,//alignment
sDevPAddr.uiAddr);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
IMG_UINT32 ui32PageSize,
IMG_HANDLE hUniqueTag,
IMG_BOOL bInterleaved,
- IMG_BOOL bSparse)
+ IMG_BOOL bSparse,
+ IMG_UINT32 ui32Flags)
{
PVRSRV_ERROR eErr;
IMG_UINT32 ui32NumPages, ui32PageCounter;
IMG_DEV_PHYADDR sDevPAddr;
- IMG_UINT32 ui32Flags = PDUMP_FLAGS_CONTINUOUS;
PVRSRV_DEVICE_NODE *psDeviceNode;
-
PDUMP_GET_SCRIPT_STRING();
+ PDUMP_LOCK();
PVR_ASSERT(((IMG_UINT32) sDevVAddr.uiAddr & (ui32PageSize - 1)) == 0);
PVR_ASSERT(((IMG_UINT32) ui32NumBytes & (ui32PageSize - 1)) == 0);
psDeviceNode = psBMHeap->pBMContext->psDeviceNode;
- ui32Flags |= ( _PDumpIsPersistent() ) ? PDUMP_FLAGS_PERSISTENT : 0;
/*
Write a comment to the PDUMP2 script streams indicating the memory free
psDeviceNode->sDevId.pszPDumpDevName, sDevVAddr.uiAddr);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
-#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
- /* if we're dumping a shared heap, need to ensure phys allocation
- * is freed even if this app isn't the one marked for pdumping
- */
- {
- PVRSRV_DEVICE_NODE *psDeviceNode = psBMHeap->pBMContext->psDeviceNode;
-
- if( psDeviceNode->pfnMMUIsHeapShared(psBMHeap->pMMUHeap) )
- {
- ui32Flags |= PDUMP_FLAGS_PERSISTENT;
- }
- }
-#endif
PDumpOSWriteString2(hScript, ui32Flags);
/*
PVR_ASSERT(sDevPAddr.uiAddr != 0);
- eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "FREE :%s:PA_%08X%08X\r\n",
- psDeviceNode->sDevId.pszPDumpDevName, (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag, sDevPAddr.uiAddr);
+ eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "FREE :%s:PA_" UINTPTR_FMT DEVPADDR_FMT "\r\n",
+ psDeviceNode->sDevId.pszPDumpDevName,
+ (IMG_UINTPTR_T)hUniqueTag,
+ sDevPAddr.uiAddr);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
sDevVAddr.uiAddr += ui32PageSize;
}
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
{
PVRSRV_ERROR eErr;
IMG_DEV_PHYADDR sDevPAddr;
-
PDUMP_GET_SCRIPT_STRING();
-
PVR_UNREFERENCED_PARAMETER(ui32PTSize);
- ui32Flags |= PDUMP_FLAGS_CONTINUOUS;
- ui32Flags |= ( _PDumpIsPersistent() ) ? PDUMP_FLAGS_PERSISTENT : 0;
+
+ PDUMP_LOCK();
/* override QAC warning about wrap around */
PVR_ASSERT(((IMG_UINTPTR_T)pvLinAddr & (ui32PTSize-1UL)) == 0); /* PRQA S 3382 */
eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "-- FREE :%s:PAGE_TABLE\r\n", psDevID->pszPDumpDevName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
&sDevPAddr);
{
- eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "FREE :%s:PA_%08X%08X\r\n",
+ eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "FREE :%s:PA_" UINTPTR_FMT DEVPADDR_FMT "\r\n",
psDevID->pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag,
+ (IMG_UINTPTR_T)hUniqueTag,
sDevPAddr.uiAddr);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
}
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
{
PVRSRV_ERROR eErr;
IMG_CHAR *pszRegString;
+ IMG_DEV_PHYADDR sDevPAddr;
+
PDUMP_GET_SCRIPT_STRING()
-
+
+ PDUMP_LOCK();
if(psMMUAttrib->pszPDRegRegion != IMG_NULL)
{
pszRegString = psMMUAttrib->pszPDRegRegion;
Write to the MMU script stream indicating the physical page directory
*/
#if defined(SGX_FEATURE_36BIT_MMU)
+ sDevPAddr.uiAddr = ((ui32Data & psMMUAttrib->ui32PDEMask) << psMMUAttrib->ui32PDEAlignShift);
+
eErr = PDumpOSBufprintf(hScript, ui32MaxLen,
- "WRW :%s:$1 :%s:PA_%08X%08X:0x0\r\n",
+ "WRW :%s:$1 :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)hUniqueTag,
- (ui32Data & psMMUAttrib->ui32PDEMask) << psMMUAttrib->ui32PDEAlignShift);
+ (IMG_UINTPTR_T)hUniqueTag,
+ sDevPAddr.uiAddr,
+ ui32Data & ~psMMUAttrib->ui32PDEMask);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
psMMUAttrib->sDevId.pszPDumpDevName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
psMMUAttrib->sDevId.pszPDumpDevName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
#else
+ sDevPAddr.uiAddr = ((ui32Data & psMMUAttrib->ui32PDEMask) << psMMUAttrib->ui32PDEAlignShift);
+
eErr = PDumpOSBufprintf(hScript,
ui32MaxLen,
- "WRW :%s:0x%08X :%s:PA_%08X%08X:0x%08X\r\n",
+ "WRW :%s:0x%08X :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X\r\n",
pszRegString,
ui32Reg,
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag,
- (ui32Data & psMMUAttrib->ui32PDEMask) << psMMUAttrib->ui32PDEAlignShift,
+ (IMG_UINTPTR_T)hUniqueTag,
+ sDevPAddr.uiAddr,
ui32Data & ~psMMUAttrib->ui32PDEMask);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
#endif
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
PDUMP_GET_SCRIPT_STRING();
+ PDUMP_LOCK();
if (PDumpOSIsSuspended())
{
- return PVRSRV_OK;
- }
-
- if ( _PDumpIsPersistent() )
- {
- /* Don't pdump-poll if the process is persistent */
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
MEMPOLL_DELAY);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
eErr = PDumpOSBufprintf(hScript,
ui32MaxLen,
- "POL :%s:PA_%08X%08X:0x%08X 0x%08X 0x%08X %d %d %d\r\n",
+ "POL :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X 0x%08X 0x%08X %d %d %d\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag,
+ (IMG_UINTPTR_T)hUniqueTag,
sDevPAddr.uiAddr & ~(psMMUAttrib->ui32DataPageMask),
- sDevPAddr.uiAddr & (psMMUAttrib->ui32DataPageMask),
+ (unsigned int)(sDevPAddr.uiAddr & (psMMUAttrib->ui32DataPageMask)),
ui32Value,
ui32Mask,
eOperator,
MEMPOLL_DELAY);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
IMG_UINT32 ui32ParamOutPos;
PDUMP_MMU_ATTRIB *psMMUAttrib;
IMG_UINT32 ui32DataPageSize;
-
PDUMP_GET_SCRIPT_AND_FILE_STRING();
-
+
+ PDUMP_LOCK();
/* PRQA S 3415 1 */ /* side effects desired */
if (ui32Bytes == 0 || PDumpOSIsSuspended())
{
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
if (!PDumpOSJTInitialised())
{
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_PDUMP_NOT_AVAILABLE;
}
-#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
- /* if we're dumping a shared heap, need to ensure phys allocation
- * is initialised even if this app isn't the one marked for pdumping
- */
- {
- BM_HEAP *pHeap = ((BM_BUF*)psMemInfo->sMemBlk.hBuffer)->pMapping->pBMHeap;
- PVRSRV_DEVICE_NODE *psDeviceNode = pHeap->pBMContext->psDeviceNode;
-
- if( psDeviceNode->pfnMMUIsHeapShared(pHeap->pMMUHeap) )
- {
- ui32Flags |= PDUMP_FLAGS_PERSISTENT;
- }
- }
-#endif
-
/* setup memory addresses */
if(pvAltLinAddr)
{
ui32Bytes,
ui32Flags))
{
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_PDUMP_BUFFER_FULL;
}
}
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
*/
eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "-- LDB :%s:VA_%08X%08X:0x%08X 0x%08X 0x%08X %s\r\n",
+ "-- LDB :%s:VA_" UINTPTR_FMT "%08X:0x%08X 0x%08X 0x%08X %s\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag,
+ (IMG_UINTPTR_T)hUniqueTag,
psMemInfo->sDevVAddr.uiAddr,
ui32Offset,
ui32Bytes,
pszFileName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "LDB :%s:PA_%08X%08X:0x%08X 0x%08X 0x%08X %s\r\n",
+ "LDB :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X 0x%08X 0x%08X %s\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag,
+ (IMG_UINTPTR_T)hUniqueTag,
sDevPAddr.uiAddr & ~(psMMUAttrib->ui32DataPageMask),
- sDevPAddr.uiAddr & (psMMUAttrib->ui32DataPageMask),
+ (unsigned int)(sDevPAddr.uiAddr & (psMMUAttrib->ui32DataPageMask)),
ui32BlockBytes,
ui32ParamOutPos,
pszFileName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
ui32ParamOutPos += ui32BlockBytes;
}
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
IMG_UINT32 ui32BlockBytes;
IMG_UINT8* pui8LinAddr;
IMG_DEV_PHYADDR sDevPAddr;
+ IMG_DEV_PHYADDR sDevPAddrTmp;
IMG_CPU_PHYADDR sCpuPAddr;
IMG_UINT32 ui32Offset;
IMG_UINT32 ui32ParamOutPos;
IMG_UINT32 ui32PageMask; /* mask for the physical page backing the PT */
+#if !defined(SGX_FEATURE_36BIT_MMU)
+ IMG_DEV_PHYADDR sDevPAddrTmp2;
+#endif
PDUMP_GET_SCRIPT_AND_FILE_STRING();
- ui32Flags |= ( _PDumpIsPersistent() ) ? PDUMP_FLAGS_PERSISTENT : 0;
+
+ PDUMP_LOCK();
+
if (PDumpOSIsSuspended())
{
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
if (!PDumpOSJTInitialised())
{
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_PDUMP_NOT_AVAILABLE;
}
if (!pvLinAddr)
{
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_INVALID_PARAMS;
}
ui32Bytes,
ui32Flags | PDUMP_FLAGS_CONTINUOUS))
{
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_PDUMP_BUFFER_FULL;
}
}
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
}
{
eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "LDB :%s:PA_%08X%08X:0x%08X 0x%08X 0x%08X %s\r\n",
+ "LDB :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X 0x%08X 0x%08X %s\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag1,
+ (IMG_UINTPTR_T)hUniqueTag1,
sDevPAddr.uiAddr & ~ui32PageMask,
- sDevPAddr.uiAddr & ui32PageMask,
+ (unsigned int)(sDevPAddr.uiAddr & ui32PageMask),
ui32BlockBytes,
ui32ParamOutPos,
pszFileName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags | PDUMP_FLAGS_CONTINUOUS);
{
/* PT entry points to non-null page */
#if defined(SGX_FEATURE_36BIT_MMU)
+ sDevPAddrTmp.uiAddr = ((ui32PTE & psMMUAttrib->ui32PDEMask) << psMMUAttrib->ui32PTEAlignShift);
+
eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "WRW :%s:$1 :%s:PA_%08X%08X:0x0\r\n",
+ "WRW :%s:$1 :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x0\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)hUniqueTag2,
- (ui32PTE & psMMUAttrib->ui32PDEMask) << psMMUAttrib->ui32PTEAlignShift);
+ (IMG_UINTPTR_T)hUniqueTag2,
+ sDevPAddrTmp.uiAddr);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags | PDUMP_FLAGS_CONTINUOUS);
psMMUAttrib->sDevId.pszPDumpDevName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags | PDUMP_FLAGS_CONTINUOUS);
ui32PTE & ~psMMUAttrib->ui32PDEMask);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags | PDUMP_FLAGS_CONTINUOUS);
+ sDevPAddrTmp.uiAddr = (sDevPAddr.uiAddr + ui32Offset) & ~ui32PageMask;
+
eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "WRW :%s:PA_%08X%08X:0x%08X :%s:$1\r\n",
+ "WRW :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X :%s:$1\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)hUniqueTag1,
- (sDevPAddr.uiAddr + ui32Offset) & ~ui32PageMask,
- (sDevPAddr.uiAddr + ui32Offset) & ui32PageMask,
+ (IMG_UINTPTR_T)hUniqueTag1,
+ sDevPAddrTmp.uiAddr,
+ (unsigned int)((sDevPAddr.uiAddr + ui32Offset) & ui32PageMask),
psMMUAttrib->sDevId.pszPDumpDevName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags | PDUMP_FLAGS_CONTINUOUS);
#else
+ sDevPAddrTmp.uiAddr = (sDevPAddr.uiAddr + ui32Offset) & ~ui32PageMask;
+ sDevPAddrTmp2.uiAddr = (ui32PTE & psMMUAttrib->ui32PDEMask) << psMMUAttrib->ui32PTEAlignShift;
+
eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "WRW :%s:PA_%08X%08X:0x%08X :%s:PA_%08X%08X:0x%08X\r\n",
+ "WRW :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag1,
- (sDevPAddr.uiAddr + ui32Offset) & ~ui32PageMask,
- (sDevPAddr.uiAddr + ui32Offset) & ui32PageMask,
+ (IMG_UINTPTR_T)hUniqueTag1,
+ sDevPAddrTmp.uiAddr,
+ (unsigned int)((sDevPAddr.uiAddr + ui32Offset) & ui32PageMask),
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag2,
- (ui32PTE & psMMUAttrib->ui32PDEMask) << psMMUAttrib->ui32PTEAlignShift,
- ui32PTE & ~psMMUAttrib->ui32PDEMask);
+ (IMG_UINTPTR_T)hUniqueTag2,
+ sDevPAddrTmp2.uiAddr,
+ (unsigned int)(ui32PTE & ~psMMUAttrib->ui32PDEMask));
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags | PDUMP_FLAGS_CONTINUOUS);
#if !defined(FIX_HW_BRN_31620)
PVR_ASSERT((ui32PTE & psMMUAttrib->ui32PTEValid) == 0UL);
#endif
+ sDevPAddrTmp.uiAddr = (sDevPAddr.uiAddr + ui32Offset) & ~ui32PageMask;
+
eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "WRW :%s:PA_%08X%08X:0x%08X 0x%08X%08X\r\n",
+ "WRW :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X 0x%08X" UINTPTR_FMT "\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag1,
- (sDevPAddr.uiAddr + ui32Offset) & ~ui32PageMask,
- (sDevPAddr.uiAddr + ui32Offset) & ui32PageMask,
- (ui32PTE << psMMUAttrib->ui32PTEAlignShift),
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag2);
+ (IMG_UINTPTR_T)hUniqueTag1,
+ sDevPAddrTmp.uiAddr,
+ (unsigned int)((sDevPAddr.uiAddr + ui32Offset) & ui32PageMask),
+ ui32PTE << psMMUAttrib->ui32PTEAlignShift,
+ (IMG_UINTPTR_T)hUniqueTag2);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags | PDUMP_FLAGS_CONTINUOUS);
ui32ParamOutPos += ui32BlockBytes;
}
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
IMG_UINT32 ui32ParamOutPos;
PDUMP_MMU_ATTRIB *psMMUAttrib;
IMG_UINT32 ui32PageMask; /* mask for the physical page backing the PT */
+ IMG_DEV_PHYADDR sDevPAddrTmp;
PDUMP_GET_SCRIPT_AND_FILE_STRING();
+ PDUMP_LOCK();
if (!PDumpOSJTInitialised())
{
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_PDUMP_NOT_AVAILABLE;
}
sizeof(IMG_DEV_PHYADDR),
ui32Flags))
{
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_PDUMP_BUFFER_FULL;
}
}
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
/* Write a comment indicating the PD phys addr write, so that the offsets
* into the param stream increase in correspondence with the number of bytes
* written. */
+ sDevPAddrTmp.uiAddr = sPDDevPAddr.uiAddr & ~ui32PageMask;
+
eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "-- LDB :%s:PA_0x%08X%08X:0x%08X 0x%08X 0x%08X %s\r\n",
+ "-- LDB :%s:PA_0x" UINTPTR_FMT DEVPADDR_FMT ":0x%08X 0x%08" SIZE_T_FMT_LEN "X 0x%08X %s\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag1,
- sPDDevPAddr.uiAddr & ~ui32PageMask,
- sPDDevPAddr.uiAddr & ui32PageMask,
+ (IMG_UINTPTR_T)hUniqueTag1,
+ sDevPAddrTmp.uiAddr,
+ (unsigned int)(sPDDevPAddr.uiAddr & ui32PageMask),
sizeof(IMG_DEV_PHYADDR),
ui32ParamOutPos,
pszFileName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
BM_GetPhysPageAddr(psMemInfo, sDevVPageAddr, &sDevPAddr);
sDevPAddr.uiAddr += ui32PageByteOffset + ui32Offset;
- if ((sPDDevPAddr.uiAddr & psMMUAttrib->ui32PDEMask) != 0UL)
- {
#if defined(SGX_FEATURE_36BIT_MMU)
- eErr = PDumpOSBufprintf(hScript,
- ui32MaxLenScript,
- "WRW :%s:$1 :%s:PA_%08X%08X:0x0\r\n",
- psMMUAttrib->sDevId.pszPDumpDevName,
- psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)hUniqueTag2,
- sPDDevPAddr.uiAddr);
- if(eErr != PVRSRV_OK)
- {
- return eErr;
- }
- PDumpOSWriteString2(hScript, ui32Flags);
+ sDevPAddrTmp.uiAddr = sPDDevPAddr.uiAddr & ~ui32PageMask;
- eErr = PDumpOSBufprintf(hScript, ui32MaxLenScript, "AND :%s:$2 :%s:$1 0xFFFFFFFF\r\n",
- psMMUAttrib->sDevId.pszPDumpDevName,
- psMMUAttrib->sDevId.pszPDumpDevName);
- if(eErr != PVRSRV_OK)
- {
- return eErr;
- }
- PDumpOSWriteString2(hScript, ui32Flags);
-
- eErr = PDumpOSBufprintf(hScript,
+ eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "WRW :%s:PA_%08X%08X:0x%08X :%s:$2\r\n",
+ "WRW :%s:$1 :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)hUniqueTag1,
- (sDevPAddr.uiAddr) & ~(psMMUAttrib->ui32DataPageMask),
- (sDevPAddr.uiAddr) & (psMMUAttrib->ui32DataPageMask),
- psMMUAttrib->sDevId.pszPDumpDevName);
- if(eErr != PVRSRV_OK)
- {
- return eErr;
- }
- PDumpOSWriteString2(hScript, ui32Flags);
+ psMMUAttrib->sDevId.pszPDumpDevName,
+ (IMG_UINTPTR_T)hUniqueTag2,
+ sDevPAddrTmp.uiAddr,
+ (unsigned int)(sPDDevPAddr.uiAddr & ui32PageMask));
+ if(eErr != PVRSRV_OK)
+ {
+ PDUMP_UNLOCK();
+ return eErr;
+ }
+ PDumpOSWriteString2(hScript, ui32Flags);
- eErr = PDumpOSBufprintf(hScript, ui32MaxLenScript, "SHR :%s:$2 :%s:$1 0x20\r\n",
+ eErr = PDumpOSBufprintf(hScript, ui32MaxLenScript, "SHR :%s:$1 :%s:$1 0x4\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
psMMUAttrib->sDevId.pszPDumpDevName);
- if(eErr != PVRSRV_OK)
- {
- return eErr;
- }
- PDumpOSWriteString2(hScript, ui32Flags);
+ if(eErr != PVRSRV_OK)
+ {
+ PDUMP_UNLOCK();
+ return eErr;
+ }
- eErr = PDumpOSBufprintf(hScript,
+ PDumpOSWriteString2(hScript, ui32Flags);
+ sDevPAddrTmp.uiAddr = sDevPAddr.uiAddr & ~(psMMUAttrib->ui32DataPageMask);
+
+ eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "WRW :%s:PA_%08X%08X:0x%08X :%s:$2\r\n",
+ "WRW :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X :%s:$1\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)hUniqueTag1,
- (sDevPAddr.uiAddr + 4) & ~(psMMUAttrib->ui32DataPageMask),
- (sDevPAddr.uiAddr + 4) & (psMMUAttrib->ui32DataPageMask),
+ (IMG_UINTPTR_T)hUniqueTag1,
+ sDevPAddrTmp.uiAddr,
+ (unsigned int)((sDevPAddr.uiAddr) & (psMMUAttrib->ui32DataPageMask)),
psMMUAttrib->sDevId.pszPDumpDevName);
- if(eErr != PVRSRV_OK)
- {
- return eErr;
- }
- PDumpOSWriteString2(hScript, ui32Flags);
-#else
- eErr = PDumpOSBufprintf(hScript,
- ui32MaxLenScript,
- "WRW :%s:PA_%08X%08X:0x%08X :%s:PA_%08X%08X:0x%08X\r\n",
- psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag1,
- sDevPAddr.uiAddr & ~ui32PageMask,
- sDevPAddr.uiAddr & ui32PageMask,
- psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag2,
- sPDDevPAddr.uiAddr & psMMUAttrib->ui32PDEMask,
- sPDDevPAddr.uiAddr & ~psMMUAttrib->ui32PDEMask);
- if(eErr != PVRSRV_OK)
- {
- return eErr;
- }
-#endif
+ if(eErr != PVRSRV_OK)
+ {
+ PDUMP_UNLOCK();
+ return eErr;
}
- else
+#else
+ eErr = PDumpOSBufprintf(hScript,
+ ui32MaxLenScript,
+ "WRW :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X \r\n",
+ psMMUAttrib->sDevId.pszPDumpDevName,
+ (IMG_UINTPTR_T)hUniqueTag1,
+ sDevPAddr.uiAddr & ~ui32PageMask,
+ (unsigned int)(sDevPAddr.uiAddr & ui32PageMask),
+ psMMUAttrib->sDevId.pszPDumpDevName,
+ (IMG_UINTPTR_T)hUniqueTag2,
+ sPDDevPAddr.uiAddr & psMMUAttrib->ui32PDEMask,
+ (unsigned int)(sPDDevPAddr.uiAddr & ~psMMUAttrib->ui32PDEMask));
+ if(eErr != PVRSRV_OK)
{
- PVR_ASSERT(!(sDevPAddr.uiAddr & psMMUAttrib->ui32PTEValid));
- eErr = PDumpOSBufprintf(hScript,
- ui32MaxLenScript,
- "WRW :%s:PA_%08X%08X:0x%08X 0x%08X\r\n",
- psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag1,
- sDevPAddr.uiAddr & ~ui32PageMask,
- sDevPAddr.uiAddr & ui32PageMask,
- sPDDevPAddr.uiAddr);
- if(eErr != PVRSRV_OK)
- {
- return eErr;
- }
+ PDUMP_UNLOCK();
+ return eErr;
}
+#endif
PDumpOSWriteString2(hScript, ui32Flags);
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
#endif
IMG_UINT32 ui32LenCommentPrefix;
PDUMP_GET_SCRIPT_STRING();
+
+ PDUMP_LOCK();
PDUMP_DBG(("PDumpCommentKM"));
-#if defined(PDUMP_DEBUG_OUTFILES)
- /* include comments in the "extended" init phase.
- * default is to ignore them.
- */
- ui32Flags |= ( _PDumpIsPersistent() ) ? PDUMP_FLAGS_PERSISTENT : 0;
-#endif
+
/* Put \r \n sequence at the end if it isn't already there */
PDumpOSVerifyLineEnding(pszComment, ui32MaxLen);
{
PVR_DPF((PVR_DBG_WARNING, "Incomplete comment, %d: %s (continuous set)",
g_ui32EveryLineCounter, pszComment));
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_PDUMP_BUFFER_FULL;
}
else if(ui32Flags & PDUMP_FLAGS_PERSISTENT)
{
PVR_DPF((PVR_DBG_WARNING, "Incomplete comment, %d: %s (persistent set)",
g_ui32EveryLineCounter, pszComment));
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_CMD_NOT_PROCESSED;
}
else
{
PVR_DPF((PVR_DBG_WARNING, "Incomplete comment, %d: %s",
g_ui32EveryLineCounter, pszComment));
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_CMD_NOT_PROCESSED;
}
#else
PVR_DPF((PVR_DBG_WARNING, "Incomplete comment, %s",
pszComment));
+ PDUMP_UNLOCK();
return PVRSRV_ERROR_CMD_NOT_PROCESSED;
#endif
}
if( (eErr != PVRSRV_OK) &&
(eErr != PVRSRV_ERROR_PDUMP_BUF_OVERFLOW))
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
PDUMP_va_list ap;
PDUMP_GET_MSG_STRING();
+ PDUMP_LOCK_MSG();
/* Construct the string */
PDUMP_va_start(ap, pszFormat);
eErr = PDumpOSVSprintf(pszMsg, ui32MaxLen, pszFormat, ap);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK_MSG();
return eErr;
}
- return PDumpCommentKM(pszMsg, ui32Flags);
+ eErr = PDumpCommentKM(pszMsg, ui32Flags);
+ PDUMP_UNLOCK_MSG();
+ return eErr;
}
/**************************************************************************
PDUMP_va_list ap;
PDUMP_GET_MSG_STRING();
+ PDUMP_LOCK_MSG();
/* Construct the string */
PDUMP_va_start(ap, pszFormat);
eErr = PDumpOSVSprintf(pszMsg, ui32MaxLen, pszFormat, ap);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK_MSG();
return eErr;
}
- return PDumpCommentKM(pszMsg, PDUMP_FLAGS_CONTINUOUS);
+ eErr = PDumpCommentKM(pszMsg, PDUMP_FLAGS_CONTINUOUS);
+ PDUMP_UNLOCK_MSG();
+ return eErr;
}
/**************************************************************************
IMG_UINT32 ui32MsgLen;
PDUMP_GET_MSG_STRING();
+ PDUMP_LOCK_MSG();
/* Construct the string */
eErr = PDumpOSSprintf(pszMsg, ui32MaxLen, "%s", pszString);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK_MSG();
return eErr;
}
{
if (ui32Flags & PDUMP_FLAGS_CONTINUOUS)
{
+ PDUMP_UNLOCK_MSG();
return PVRSRV_ERROR_PDUMP_BUFFER_FULL;
}
else
{
+ PDUMP_UNLOCK_MSG();
return PVRSRV_ERROR_CMD_NOT_PROCESSED;
}
}
+
+ PDUMP_UNLOCK_MSG();
return PVRSRV_OK;
}
PVRSRV_ERROR eErr;
PDUMP_GET_SCRIPT_STRING();
- if ( _PDumpIsPersistent() )
- {
- return PVRSRV_OK;
- }
-
PDumpCommentWithFlags(ui32PDumpFlags, "\r\n-- Dump bitmap of render\r\n");
+ PDUMP_LOCK();
/* find MMU context ID */
ui32MMUContextID = psDeviceNode->pfnMMUGetContextID( hDevMemContext );
eMemFormat);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2( hScript, ui32PDumpFlags);
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
{
PVRSRV_ERROR eErr;
PDUMP_GET_SCRIPT_STRING();
-
PVR_UNREFERENCED_PARAMETER(ui32Size);
+ PDUMP_LOCK();
eErr = PDumpOSBufprintf(hScript,
ui32MaxLen,
"SAB :%s:0x%08X 0x%08X %s\r\n",
pszFileName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2( hScript, ui32PDumpFlags);
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
PDumpOSWriteString2(hScript, ui32Flags);
*pui32FileOffset += ui32Size;
+
return PVRSRV_OK;
}
{
PVRSRV_ERROR eErr;
IMG_UINT32 ui32FileOffset, ui32Flags;
-
PDUMP_GET_FILE_STRING();
ui32Flags = bLastFrame ? PDUMP_FLAGS_LASTFRAME : 0;
return eErr;
}
+ /*
+ Note:
+ PDumpCommentWithFlags will take the lock so we defer the lock
+ taking until here
+ */
+ PDUMP_LOCK();
PDumpRegisterRange(psDevId,
pszFileName,
pui32Registers,
sizeof(IMG_UINT32),
ui32Flags);
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
{
PVRSRV_ERROR eErr;
IMG_UINT32 ui32FileOffset, ui32Flags;
-
PDUMP_GET_FILE_STRING();
ui32Flags = bLastFrame ? PDUMP_FLAGS_LASTFRAME : 0;
return eErr;
}
+ /*
+ Note:
+ PDumpCommentWithFlags will take the lock so we defer the lock
+ taking until here
+ */
+ PDUMP_LOCK();
PDumpRegisterRange(psDevId,
pszFileName,
pui32Registers,
&ui32FileOffset,
sizeof(IMG_UINT32),
ui32Flags);
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
{
PVRSRV_ERROR eErr;
IMG_UINT32 ui32FileOffset, ui32Flags;
-
PDUMP_GET_FILE_STRING();
ui32Flags = bLastFrame ? PDUMP_FLAGS_LASTFRAME : 0UL;
{
return eErr;
}
-
+ /*
+ Note:
+ PDumpCommentWithFlags will take the lock so we defer the lock
+ taking until here
+ */
+ PDUMP_LOCK();
PDumpRegisterRange(psDevId,
pszFileName,
pui32Registers,
sizeof(IMG_UINT32),
ui32Flags);
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
PVRSRV_ERROR eErr;
PDUMP_GET_SCRIPT_STRING();
+ PDUMP_LOCK();
eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "RDW :%s:0x%X\r\n",
pszPDumpRegName,
ui32RegOffset);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
{
PVRSRV_ERROR eErr;
PDUMP_GET_SCRIPT_STRING();
-
+
+ PDUMP_LOCK();
eErr = PDumpOSBufprintf(hScript,
ui32MaxLen,
"SAB :%s:v%x:0x%08X 0x%08X 0x%08X %s.bin\r\n",
pszFileName);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32PDumpFlags);
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
PVRSRV_ERROR eErr;
PDUMP_GET_SCRIPT_STRING();
+ PDUMP_LOCK();
eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "RDW :%s:0x%X\r\n",
psDevId->pszPDumpRegName,
ui32RegOffset);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, bLastFrame ? PDUMP_FLAGS_LASTFRAME : 0);
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
IMG_DEV_VIRTADDR sDevVPageAddr;
//IMG_CPU_PHYADDR CpuPAddr;
PDUMP_MMU_ATTRIB *psMMUAttrib;
-
PDUMP_GET_SCRIPT_STRING();
+ PDUMP_LOCK();
psMMUAttrib = ((BM_BUF*)psROffMemInfo->sMemBlk.hBuffer)->pMapping->pBMHeap->psMMUAttrib;
/* Check the offset and size don't exceed the bounds of the allocation */
eErr = PDumpOSBufprintf(hScript,
ui32MaxLen,
- "CBP :%s:PA_%08X%08X:0x%08X 0x%08X 0x%08X 0x%08X\r\n",
+ "CBP :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X 0x%08X 0x%08X 0x%08X\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag,
+ (IMG_UINTPTR_T)hUniqueTag,
sDevPAddr.uiAddr & ~(psMMUAttrib->ui32DataPageMask),
- sDevPAddr.uiAddr & (psMMUAttrib->ui32DataPageMask),
+ (unsigned int)(sDevPAddr.uiAddr & (psMMUAttrib->ui32DataPageMask)),
ui32WPosVal,
ui32PacketSize,
ui32BufferSize);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
{
PVRSRV_ERROR eErr;
PDUMP_GET_SCRIPT_STRING();
+
+ PDUMP_LOCK();
PDUMP_DBG(("PDumpIDLWithFlags"));
eErr = PDumpOSBufprintf(hScript, ui32MaxLen, "IDL %u\r\n", ui32Clocks);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, ui32Flags);
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
PVRSRV_ERROR eErr;
PDUMP_GET_SCRIPT_STRING();
+ PDUMP_LOCK();
+
eErr = _PdumpAllocMMUContext(&ui32MMUContextID);
if(eErr != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PDumpSetMMUContext: _PdumpAllocMMUContext failed: %d", eErr));
+ PDUMP_UNLOCK();
return eErr;
}
eErr = PDumpOSBufprintf(hScript,
ui32MaxLen,
- "MMU :%s:v%d %d :%s:PA_%08X%08X\r\n",
+ "MMU :%s:v%d %d :%s:PA_" UINTPTR_FMT DEVPADDR_FMT "\r\n",
pszMemSpace,
ui32MMUContextID,
ui32MMUType,
pszMemSpace,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag1,
+ (IMG_UINTPTR_T)hUniqueTag1,
sDevPAddr.uiAddr);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
PDumpOSWriteString2(hScript, PDUMP_FLAGS_CONTINUOUS);
/* return the MMU Context ID */
*pui32MMUContextID = ui32MMUContextID;
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
* all OSes and platforms
*/
PDumpComment("Clear MMU Context for memory space %s\r\n", pszMemSpace);
+
+ /*
+ Note:
+ PDumpComment takes the lock so we can't take it until here
+ */
+ PDUMP_LOCK();
eErr = PDumpOSBufprintf(hScript,
ui32MaxLen,
"MMU :%s:v%d\r\n",
ui32MMUContextID);
if(eErr != PVRSRV_OK)
{
+ PDUMP_UNLOCK();
return eErr;
}
+
PDumpOSWriteString2(hScript, PDUMP_FLAGS_CONTINUOUS);
eErr = _PdumpFreeMMUContext(ui32MMUContextID);
if(eErr != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PDumpClearMMUContext: _PdumpFreeMMUContext failed: %d", eErr));
+ PDUMP_UNLOCK();
return eErr;
}
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
PDUMP_GET_SCRIPT_STRING();
+ PDUMP_LOCK();
/*
query the buffer manager for the physical pages that back the
virtual address
PDumpOSBufprintf(hScript,
ui32MaxLen,
- "SAB :%s:PA_%08X%08X:0x%08X 0x%08X 0x%08X %s\r\n",
+ "SAB :%s:PA_" UINTPTR_FMT DEVPADDR_FMT ":0x%08X 0x%08X 0x%08X %s\r\n",
psMMUAttrib->sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)hUniqueTag,
- sDevPAddr.uiAddr & ~psMMUAttrib->ui32DataPageMask,
- sDevPAddr.uiAddr & psMMUAttrib->ui32DataPageMask,
+ (IMG_UINTPTR_T)hUniqueTag,
+ (sDevPAddr.uiAddr & ~psMMUAttrib->ui32DataPageMask),
+ (unsigned int)(sDevPAddr.uiAddr & psMMUAttrib->ui32DataPageMask),
ui32Size,
ui32FileOffset,
pszFileName);
PDumpOSWriteString2(hScript, ui32PDumpFlags);
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
{
PDUMP_GET_SCRIPT_STRING();
+ PDUMP_LOCK();
+
PDumpOSBufprintf(hScript,
ui32MaxLen,
"CBP :%s:0x%08X 0x%08X 0x%08X 0x%08X\r\n",
ui32PacketSize,
ui32BufferSize);
PDumpOSWriteString2(hScript, ui32Flags);
-
+
+ PDUMP_UNLOCK();
return PVRSRV_OK;
}
/* Return if process is not marked for pdumping, unless it's persistent.
*/
if ( (_PDumpIsProcessActive() == IMG_FALSE ) &&
- ((ui32Flags & PDUMP_FLAGS_PERSISTENT) == 0) )
+ ((ui32Flags & PDUMP_FLAGS_PERSISTENT) == 0) && psCtrl->bInitPhaseComplete)
{
return ui32BCount;
}
if (ui32BytesWritten == 0)
{
+ PVR_DPF((PVR_DBG_ERROR, "DbgWrite: Failed to send persistent data"));
PDumpOSReleaseExecution();
}
while (((IMG_UINT32) ui32BCount > 0) && (ui32BytesWritten != 0xFFFFFFFFU))
{
- if ((ui32Flags & PDUMP_FLAGS_CONTINUOUS) != 0)
+ /* If we're in the init phase we treat persisent as meaning continuous */
+ if (((ui32Flags & PDUMP_FLAGS_CONTINUOUS) != 0) || ((ui32Flags & PDUMP_FLAGS_PERSISTENT) != 0))
{
/*
If pdump client (or its equivalent) isn't running then throw continuous data away.
*/
if (ui32BytesWritten == 0)
{
+ if (ui32Flags & PDUMP_FLAGS_CONTINUOUS)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "Buffer is full during writing of %s", &pui8Data[ui32Off]));
+ }
PDumpOSReleaseExecution();
}
ui32Off += ui32BytesWritten;
ui32BCount -= ui32BytesWritten;
}
-
+ else
+ {
+ if (ui32Flags & PDUMP_FLAGS_CONTINUOUS)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "Error during writing of %s", &pui8Data[ui32Off]));
+ }
+ }
/* loop exits when i) all data is written, or ii) an unrecoverable error occurs */
}
#include "ttrace.h"
#endif
#include "perfkm.h"
+#include "devicemem.h"
#include "pvrversion.h"
/* mark which parts of Services were initialised */
#define INIT_DATA_ENABLE_PDUMPINIT 0x1U
#define INIT_DATA_ENABLE_TTARCE 0x2U
+#define INIT_DATA_ENABLE_DEVMEM 0x4U
/*!
******************************************************************************
IMG_EXPORT
IMG_VOID WriteHWReg(IMG_PVOID pvLinRegBaseAddr, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value)
{
- PVR_DPF((PVR_DBG_MESSAGE,"WriteHWReg Base:%x, Offset: %x, Value %x",
- (IMG_UINTPTR_T)pvLinRegBaseAddr,ui32Offset,ui32Value));
+ PVR_DPF((PVR_DBG_MESSAGE,"WriteHWReg Base:%p, Offset: %x, Value %x",
+ pvLinRegBaseAddr,ui32Offset,ui32Value));
*(IMG_UINT32*)((IMG_UINTPTR_T)pvLinRegBaseAddr+ui32Offset) = ui32Value;
}
PDUMPINIT();
g_ui32InitFlags |= INIT_DATA_ENABLE_PDUMPINIT;
+#if defined(SUPPORT_ION)
+ eError = PVRSRVInitDeviceMem();
+ if (eError != PVRSRV_OK)
+ goto Error;
+ g_ui32InitFlags |= INIT_DATA_ENABLE_DEVMEM;
+#endif
+
PERFINIT();
return eError;
PERFDEINIT();
+#if defined(SUPPORT_ION)
+ if ((g_ui32InitFlags & INIT_DATA_ENABLE_DEVMEM) > 0)
+ {
+ PVRSRVDeInitDeviceMem();
+ }
+#endif
+
#if defined(TTRACE)
/* deinitialise ttrace */
if ((g_ui32InitFlags & INIT_DATA_ENABLE_TTARCE) > 0)
******************************************************************************/
IMG_EXPORT
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO_KM *psMiscInfo)
-#else
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo)
-#endif
{
SYS_DATA *psSysData;
}
else
{
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo = psMiscInfo->sCacheOpCtl.psKernelMemInfo;
-
- if(!psMiscInfo->sCacheOpCtl.psKernelMemInfo)
-#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
PVRSRV_PER_PROCESS_DATA *psPerProc;
if(!psMiscInfo->sCacheOpCtl.u.psKernelMemInfo)
-#endif
{
PVR_DPF((PVR_DBG_WARNING, "PVRSRVGetMiscInfoKM: "
"Ignoring non-deferred cache op with no meminfo"));
"to combine deferred cache ops with immediate ones"));
}
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DBG_BREAK
-#else
psPerProc = PVRSRVFindPerProcessData();
if(PVRSRVLookupHandle(psPerProc->psHandleBase,
"Can't find kernel meminfo"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
-#endif
if(psMiscInfo->sCacheOpCtl.eCacheOpType == PVRSRV_MISC_INFO_CPUCACHEOP_FLUSH)
{
}
else if(psMiscInfo->sCacheOpCtl.eCacheOpType == PVRSRV_MISC_INFO_CPUCACHEOP_CLEAN)
{
- if(!OSCleanCPUCacheRangeKM(psKernelMemInfo->sMemBlk.hOSMemHandle,
- 0,
- psMiscInfo->sCacheOpCtl.pvBaseVAddr,
- psMiscInfo->sCacheOpCtl.ui32Length))
+ if(psMiscInfo->sCacheOpCtl.ui32Length!=0)
{
- return PVRSRV_ERROR_CACHEOP_FAILED;
+ if(!OSCleanCPUCacheRangeKM(psKernelMemInfo->sMemBlk.hOSMemHandle,
+ 0,
+ psMiscInfo->sCacheOpCtl.pvBaseVAddr,
+ psMiscInfo->sCacheOpCtl.ui32Length))
+ {
+ return PVRSRV_ERROR_CACHEOP_FAILED;
+ }
}
}
}
if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_GET_REF_COUNT_PRESENT) != 0UL)
{
-#if !defined (SUPPORT_SID_INTERFACE)
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
PVRSRV_PER_PROCESS_DATA *psPerProc;
-#endif
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_GET_REF_COUNT_PRESENT;
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DBG_BREAK
-#else
psPerProc = PVRSRVFindPerProcessData();
if(PVRSRVLookupHandle(psPerProc->psHandleBase,
}
psMiscInfo->sGetRefCountCtl.ui32RefCount = psKernelMemInfo->ui32RefCount;
-#endif
}
if ((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_GET_PAGE_SIZE_PRESENT) != 0UL)
return (PVRSRV_ERROR_OUT_OF_MEMORY);
}
- PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVSaveRestoreLiveSegments: Base %08x size %08x", sSegDetails.sCpuPhyAddr.uiAddr, sSegDetails.uiSize));
+ PVR_DPF((
+ PVR_DBG_MESSAGE,
+ "PVRSRVSaveRestoreLiveSegments: Base " CPUPADDR_FMT " size %" SIZE_T_FMT_LEN "x",
+ sSegDetails.sCpuPhyAddr.uiAddr,
+ sSegDetails.uiSize));
/* Map the device's local memory area onto the host. */
pvLocalMemCPUVAddr = OSMapPhysToLin(sSegDetails.sCpuPhyAddr,
#include "lists.h"
#include "ttrace.h"
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+#include <linux/sw_sync.h>
+static struct sync_fence *AllocQueueFence(struct sw_sync_timeline *psTimeline, IMG_UINT32 ui32FenceValue, const char *szName)
+{
+ struct sync_fence *psFence = IMG_NULL;
+ struct sync_pt *psPt;
+
+ psPt = sw_sync_pt_create(psTimeline, ui32FenceValue);
+ if(psPt)
+ {
+ psFence = sync_fence_create(szName, psPt);
+ if(!psFence)
+ {
+ sync_pt_free(psPt);
+ }
+ }
+
+ return psFence;
+}
+#endif /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
+
/*
* The number of commands of each type which can be in flight at once.
*/
{
PVRSRV_QUEUE_INFO *psQueue = (PVRSRV_QUEUE_INFO*)el;
IMG_INT cmds = 0;
- IMG_SIZE_T ui32ReadOffset;
- IMG_SIZE_T ui32WriteOffset;
+ IMG_SIZE_T uReadOffset;
+ IMG_SIZE_T uWriteOffset;
PVRSRV_COMMAND *psCmd;
if(el == PVR_PROC_SEQ_START_TOKEN)
return;
}
- ui32ReadOffset = psQueue->ui32ReadOffset;
- ui32WriteOffset = psQueue->ui32WriteOffset;
+ uReadOffset = psQueue->uReadOffset;
+ uWriteOffset = psQueue->uWriteOffset;
- while (ui32ReadOffset != ui32WriteOffset)
+ while (uReadOffset != uWriteOffset)
{
- psCmd= (PVRSRV_COMMAND *)((IMG_UINTPTR_T)psQueue->pvLinQueueKM + ui32ReadOffset);
+ psCmd= (PVRSRV_COMMAND *)((IMG_UINTPTR_T)psQueue->pvLinQueueKM + uReadOffset);
- seq_printf(sfile, "%x %x %5u %6u %3u %5u %2u %2u %3u \n",
- (IMG_UINTPTR_T)psQueue,
- (IMG_UINTPTR_T)psCmd,
+ seq_printf(sfile, "%p %p %5u %6u %3" SIZE_T_FMT_LEN "u %5u %2u %2u %3" SIZE_T_FMT_LEN "u \n",
+ psQueue,
+ psCmd,
psCmd->ui32ProcessID,
psCmd->CommandType,
psCmd->uCmdSize,
}
/* taken from UPDATE_QUEUE_ROFF in queue.h */
- ui32ReadOffset += psCmd->uCmdSize;
- ui32ReadOffset &= psQueue->ui32QueueSize - 1;
+ uReadOffset += psCmd->uCmdSize;
+ uReadOffset &= psQueue->uQueueSize - 1;
cmds++;
}
if (cmds == 0)
{
- seq_printf(sfile, "%x <empty>\n", (IMG_UINTPTR_T)psQueue);
+ seq_printf(sfile, "%p <empty>\n", psQueue);
}
}
* Macro to return space in given command queue
*/
#define GET_SPACE_IN_CMDQ(psQueue) \
- ((((psQueue)->ui32ReadOffset - (psQueue)->ui32WriteOffset) \
- + ((psQueue)->ui32QueueSize - 1)) & ((psQueue)->ui32QueueSize - 1))
+ ((((psQueue)->uReadOffset - (psQueue)->uWriteOffset) \
+ + ((psQueue)->uQueueSize - 1)) & ((psQueue)->uQueueSize - 1))
/*!
* Macro to Write Offset in given command queue
*/
-#define UPDATE_QUEUE_WOFF(psQueue, ui32Size) \
- (psQueue)->ui32WriteOffset = ((psQueue)->ui32WriteOffset + (ui32Size)) \
- & ((psQueue)->ui32QueueSize - 1);
+#define UPDATE_QUEUE_WOFF(psQueue, uSize) \
+ (psQueue)->uWriteOffset = ((psQueue)->uWriteOffset + (uSize)) \
+ & ((psQueue)->uQueueSize - 1);
/*!
* Check if an ops complete value has gone past the pending value.
Kernel-side functions of User->Kernel transitions
******************************************************************************/
-static IMG_SIZE_T NearestPower2(IMG_SIZE_T ui32Value)
+static IMG_SIZE_T NearestPower2(IMG_SIZE_T uValue)
{
- IMG_SIZE_T ui32Temp, ui32Result = 1;
+ IMG_SIZE_T uTemp, uResult = 1;
- if(!ui32Value)
+ if(!uValue)
return 0;
- ui32Temp = ui32Value - 1;
- while(ui32Temp)
+ uTemp = uValue - 1;
+ while(uTemp)
{
- ui32Result <<= 1;
- ui32Temp >>= 1;
+ uResult <<= 1;
+ uTemp >>= 1;
}
- return ui32Result;
+ return uResult;
}
Creates a new command queue into which render/blt commands etc can be
inserted.
- @Input ui32QueueSize :
+ @Input uQueueSize :
@Output ppsQueueInfo :
******************************************************************************/
IMG_EXPORT
-PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateCommandQueueKM(IMG_SIZE_T ui32QueueSize,
+PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateCommandQueueKM(IMG_SIZE_T uQueueSize,
PVRSRV_QUEUE_INFO **ppsQueueInfo)
{
PVRSRV_QUEUE_INFO *psQueueInfo;
- IMG_SIZE_T ui32Power2QueueSize = NearestPower2(ui32QueueSize);
+ IMG_SIZE_T uPower2QueueSize = NearestPower2(uQueueSize);
SYS_DATA *psSysData;
PVRSRV_ERROR eError;
IMG_HANDLE hMemBlock;
/* allocate the command queue buffer - allow for overrun */
eError = OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
- ui32Power2QueueSize + PVRSRV_MAX_CMD_SIZE,
+ uPower2QueueSize + PVRSRV_MAX_CMD_SIZE,
&psQueueInfo->pvLinQueueKM, &hMemBlock,
"Command Queue");
if (eError != PVRSRV_OK)
psQueueInfo->pvLinQueueUM = psQueueInfo->pvLinQueueKM;
/* Sanity check: Should be zeroed by OSMemSet */
- PVR_ASSERT(psQueueInfo->ui32ReadOffset == 0);
- PVR_ASSERT(psQueueInfo->ui32WriteOffset == 0);
+ PVR_ASSERT(psQueueInfo->uReadOffset == 0);
+ PVR_ASSERT(psQueueInfo->uWriteOffset == 0);
- psQueueInfo->ui32QueueSize = ui32Power2QueueSize;
+ psQueueInfo->uQueueSize = uPower2QueueSize;
+
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ psQueueInfo->pvTimeline = sw_sync_timeline_create("pvr_queue_proc");
+ if(psQueueInfo->pvTimeline == IMG_NULL)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"PVRSRVCreateCommandQueueKM: sw_sync_timeline_create() failed"));
+ goto ErrorExit;
+ }
+#endif
/* if this is the first q, create a lock resource for the q list */
if (psSysData->psQueueList == IMG_NULL)
if(psQueueInfo->pvLinQueueKM)
{
OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
- psQueueInfo->ui32QueueSize,
+ psQueueInfo->uQueueSize,
psQueueInfo->pvLinQueueKM,
psQueueInfo->hMemBlock[1]);
psQueueInfo->pvLinQueueKM = IMG_NULL;
/* PRQA S 3415,4109 1 */ /* macro format critical - leave alone */
LOOP_UNTIL_TIMEOUT(MAX_HW_TIME_US)
{
- if(psQueueInfo->ui32ReadOffset == psQueueInfo->ui32WriteOffset)
+ if(psQueueInfo->uReadOffset == psQueueInfo->uWriteOffset)
{
bTimeout = IMG_FALSE;
break;
goto ErrorExit;
}
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ sync_timeline_destroy(psQueueInfo->pvTimeline);
+#endif
+
if(psQueue == psQueueInfo)
{
psSysData->psQueueList = psQueueInfo->psNextKM;
OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
- NearestPower2(psQueueInfo->ui32QueueSize) + PVRSRV_MAX_CMD_SIZE,
+ NearestPower2(psQueueInfo->uQueueSize) + PVRSRV_MAX_CMD_SIZE,
psQueueInfo->pvLinQueueKM,
psQueueInfo->hMemBlock[1]);
psQueueInfo->pvLinQueueKM = IMG_NULL;
psQueue->psNextKM = psQueueInfo->psNextKM;
OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
- psQueueInfo->ui32QueueSize,
+ psQueueInfo->uQueueSize,
psQueueInfo->pvLinQueueKM,
psQueueInfo->hMemBlock[1]);
psQueueInfo->pvLinQueueKM = IMG_NULL;
*****************************************************************************/
IMG_EXPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetQueueSpaceKM(PVRSRV_QUEUE_INFO *psQueue,
- IMG_SIZE_T ui32ParamSize,
+ IMG_SIZE_T uParamSize,
IMG_VOID **ppvSpace)
{
IMG_BOOL bTimeout = IMG_TRUE;
/* round to 4byte units */
- ui32ParamSize = (ui32ParamSize+3) & 0xFFFFFFFC;
+ uParamSize = (uParamSize + 3) & 0xFFFFFFFC;
- if (ui32ParamSize > PVRSRV_MAX_CMD_SIZE)
+ if (uParamSize > PVRSRV_MAX_CMD_SIZE)
{
PVR_DPF((PVR_DBG_WARNING,"PVRSRVGetQueueSpace: max command size is %d bytes", PVRSRV_MAX_CMD_SIZE));
return PVRSRV_ERROR_CMD_TOO_BIG;
/* PRQA S 3415,4109 1 */ /* macro format critical - leave alone */
LOOP_UNTIL_TIMEOUT(MAX_HW_TIME_US)
{
- if (GET_SPACE_IN_CMDQ(psQueue) > ui32ParamSize)
+ if (GET_SPACE_IN_CMDQ(psQueue) > uParamSize)
{
bTimeout = IMG_FALSE;
break;
}
else
{
- *ppvSpace = (IMG_VOID *)((IMG_UINTPTR_T)psQueue->pvLinQueueUM + psQueue->ui32WriteOffset);
+ *ppvSpace = (IMG_VOID *)((IMG_UINTPTR_T)psQueue->pvLinQueueUM + psQueue->uWriteOffset);
}
return PVRSRV_OK;
PVRSRV_KERNEL_SYNC_INFO *apsDstSync[],
IMG_UINT32 ui32SrcSyncCount,
PVRSRV_KERNEL_SYNC_INFO *apsSrcSync[],
- IMG_SIZE_T ui32DataByteSize,
+ IMG_SIZE_T uDataByteSize,
PFN_QUEUE_COMMAND_COMPLETE pfnCommandComplete,
- IMG_HANDLE hCallbackData)
+ IMG_HANDLE hCallbackData,
+ IMG_HANDLE *phFence)
{
PVRSRV_ERROR eError;
PVRSRV_COMMAND *psCommand;
- IMG_SIZE_T ui32CommandSize;
+ IMG_SIZE_T uCommandSize;
IMG_UINT32 i;
SYS_DATA *psSysData;
DEVICE_COMMAND_DATA *psDeviceCommandData;
+#if !defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ PVR_UNREFERENCED_PARAMETER(phFence);
+#endif
+
/* Check that we've got enough space in our command complete data for this command */
SysAcquireData(&psSysData);
psDeviceCommandData = psSysData->apsDeviceCommandData[ui32DevIndex];
}
/* Round up to nearest 32 bit size so pointer arithmetic works */
- ui32DataByteSize = (ui32DataByteSize + 3UL) & ~3UL;
+ uDataByteSize = (uDataByteSize + 3UL) & ~3UL;
/* calc. command size */
- ui32CommandSize = sizeof(PVRSRV_COMMAND)
+ uCommandSize = sizeof(PVRSRV_COMMAND)
+ ((ui32DstSyncCount + ui32SrcSyncCount) * sizeof(PVRSRV_SYNC_OBJECT))
- + ui32DataByteSize;
+ + uDataByteSize;
/* wait for space in queue */
- eError = PVRSRVGetQueueSpaceKM (psQueue, ui32CommandSize, (IMG_VOID**)&psCommand);
+ eError = PVRSRVGetQueueSpaceKM (psQueue, uCommandSize, (IMG_VOID**)&psCommand);
if(eError != PVRSRV_OK)
{
return eError;
}
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ if(phFence != IMG_NULL)
+ {
+ struct sync_fence *psRetireFence, *psCleanupFence;
+
+ /* New command? New timeline target */
+ psQueue->ui32FenceValue++;
+
+ psRetireFence = AllocQueueFence(psQueue->pvTimeline, psQueue->ui32FenceValue, "pvr_queue_retire");
+ if(!psRetireFence)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVInsertCommandKM: sync_fence_create() failed"));
+ psQueue->ui32FenceValue--;
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ /* This similar to the retire fence, except that it is destroyed
+ * when a display command completes, rather than at the whim of
+ * userspace. It is used to keep the timeline alive.
+ */
+ psCleanupFence = AllocQueueFence(psQueue->pvTimeline, psQueue->ui32FenceValue, "pvr_queue_cleanup");
+ if(!psCleanupFence)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVInsertCommandKM: sync_fence_create() #2 failed"));
+ sync_fence_put(psRetireFence);
+ psQueue->ui32FenceValue--;
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psCommand->pvCleanupFence = psCleanupFence;
+ psCommand->pvTimeline = psQueue->pvTimeline;
+ *phFence = psRetireFence;
+ }
+ else
+ {
+ psCommand->pvTimeline = IMG_NULL;
+ }
+#endif /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
+
psCommand->ui32ProcessID = OSGetCurrentProcessIDKM();
/* setup the command */
- psCommand->uCmdSize = ui32CommandSize; /* this may change if cmd shrinks */
+ psCommand->uCmdSize = uCommandSize; /* this may change if cmd shrinks */
psCommand->ui32DevIndex = ui32DevIndex;
psCommand->CommandType = CommandType;
psCommand->ui32DstSyncCount = ui32DstSyncCount;
+ (ui32SrcSyncCount * sizeof(PVRSRV_SYNC_OBJECT)));
/* PRQA L:END_PTR_ASSIGNMENTS */
- psCommand->uDataSize = ui32DataByteSize;/* this may change if cmd shrinks */
+ psCommand->uDataSize = uDataByteSize;/* this may change if cmd shrinks */
psCommand->pfnCommandComplete = pfnCommandComplete;
psCommand->hCallbackData = hCallbackData;
if (psCommand->ui32DstSyncCount > 0)
{
psCommand->psDstSync = (PVRSRV_SYNC_OBJECT*)(((IMG_UINTPTR_T)psQueue->pvLinQueueKM)
- + psQueue->ui32WriteOffset + sizeof(PVRSRV_COMMAND));
+ + psQueue->uWriteOffset + sizeof(PVRSRV_COMMAND));
}
if (psCommand->ui32SrcSyncCount > 0)
{
psCommand->psSrcSync = (PVRSRV_SYNC_OBJECT*)(((IMG_UINTPTR_T)psQueue->pvLinQueueKM)
- + psQueue->ui32WriteOffset + sizeof(PVRSRV_COMMAND)
+ + psQueue->uWriteOffset + sizeof(PVRSRV_COMMAND)
+ (psCommand->ui32DstSyncCount * sizeof(PVRSRV_SYNC_OBJECT)));
}
psCommand->pvData = (PVRSRV_SYNC_OBJECT*)(((IMG_UINTPTR_T)psQueue->pvLinQueueKM)
- + psQueue->ui32WriteOffset + sizeof(PVRSRV_COMMAND)
+ + psQueue->uWriteOffset + sizeof(PVRSRV_COMMAND)
+ (psCommand->ui32DstSyncCount * sizeof(PVRSRV_SYNC_OBJECT))
+ (psCommand->ui32SrcSyncCount * sizeof(PVRSRV_SYNC_OBJECT)));
if (SYNCOPS_STALE(ui32WriteOpsComplete, psSync->ui32WriteOpsPending))
{
PVR_DPF((PVR_DBG_WARNING,
- "CheckIfSyncIsQueued: Stale syncops psSyncData:0x%x ui32WriteOpsComplete:0x%x ui32WriteOpsPending:0x%x",
- (IMG_UINTPTR_T)psSyncData, ui32WriteOpsComplete, psSync->ui32WriteOpsPending));
+ "CheckIfSyncIsQueued: Stale syncops psSyncData:0x%p ui32WriteOpsComplete:0x%x ui32WriteOpsPending:0x%x",
+ psSyncData, ui32WriteOpsComplete, psSync->ui32WriteOpsPending));
return PVRSRV_OK;
}
}
SYNCOPS_STALE(ui32ReadOpsComplete, psWalkerObj->ui32ReadOps2Pending))
{
PVR_DPF((PVR_DBG_WARNING,
- "PVRSRVProcessCommand: Stale syncops psSyncData:0x%x ui32WriteOpsComplete:0x%x ui32WriteOpsPending:0x%x",
- (IMG_UINTPTR_T)psSyncData, ui32WriteOpsComplete, psWalkerObj->ui32WriteOpsPending));
+ "PVRSRVProcessCommand: Stale syncops psSyncData:0x%p ui32WriteOpsComplete:0x%x ui32WriteOpsPending:0x%x",
+ psSyncData, ui32WriteOpsComplete, psWalkerObj->ui32WriteOpsPending));
}
if (!bFlush ||
psCmdCompleteData->pfnCommandComplete = psCommand->pfnCommandComplete;
psCmdCompleteData->hCallbackData = psCommand->hCallbackData;
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ psCmdCompleteData->pvCleanupFence = psCommand->pvCleanupFence;
+ psCmdCompleteData->pvTimeline = psCommand->pvTimeline;
+#endif
+
/* copy dst updates over */
psCmdCompleteData->ui32SrcSyncCount = psCommand->ui32SrcSyncCount;
for (i=0; i<psCommand->ui32SrcSyncCount; i++)
*/
psCmdCompleteData->bInUse = IMG_FALSE;
eError = PVRSRV_ERROR_CMD_NOT_PROCESSED;
+ PVR_LOG(("Failed to submit command from queue processor, this could cause sync wedge!"));
+ }
+ else
+ {
+ /* Increment the CCB offset */
+ psDeviceCommandData[psCommand->CommandType].ui32CCBOffset = (ui32CCBOffset + 1) % DC_NUM_COMMANDS_PER_TYPE;
}
-
- /* Increment the CCB offset */
- psDeviceCommandData[psCommand->CommandType].ui32CCBOffset = (ui32CCBOffset + 1) % DC_NUM_COMMANDS_PER_TYPE;
return eError;
}
while (psQueue)
{
- while (psQueue->ui32ReadOffset != psQueue->ui32WriteOffset)
+ while (psQueue->uReadOffset != psQueue->uWriteOffset)
{
- psCommand = (PVRSRV_COMMAND*)((IMG_UINTPTR_T)psQueue->pvLinQueueKM + psQueue->ui32ReadOffset);
+ psCommand = (PVRSRV_COMMAND*)((IMG_UINTPTR_T)psQueue->pvLinQueueKM + psQueue->uReadOffset);
if (PVRSRVProcessCommand(psSysData, psCommand, bFlush) == PVRSRV_OK)
{
/*!
******************************************************************************
- @Function PVRSRVCommandCompleteKM
+ @Function PVRSRVFreeCommandCompletePacketKM
@Description Updates non-private command complete sync objects
psCmdCompleteData->pfnCommandComplete(psCmdCompleteData->hCallbackData);
}
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ if(psCmdCompleteData->pvTimeline)
+ {
+ sw_sync_timeline_inc(psCmdCompleteData->pvTimeline, 1);
+ sync_fence_put(psCmdCompleteData->pvCleanupFence);
+ }
+#endif /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
+
/* free command complete storage */
psCmdCompleteData->bInUse = IMG_FALSE;
}
-
-
/*!
******************************************************************************
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "RA_InsertResourceSpan: arena='%s', base=0x%x, size=0x%x",
+ "RA_InsertResourceSpan: arena='%s', base=0x" UINTPTR_FMT ", size=0x%" SIZE_T_FMT_LEN "x",
pArena->name, base, uSize));
pSpanStart = _BuildSpanMarker (base, uSize);
else
aligned_base = pBT->base;
PVR_DPF ((PVR_DBG_MESSAGE,
- "RA_AttemptAllocAligned: pBT-base=0x%x "
- "pBT-size=0x%x alignedbase=0x%x size=0x%x",
- pBT->base, pBT->uSize, aligned_base, uSize));
+ "RA_AttemptAllocAligned: pBT-base=0x" UINTPTR_FMT " "
+ "pBT-size=0x%" SIZE_T_FMT_LEN "x alignedbase=0x"
+ UINTPTR_FMT " size=0x%" SIZE_T_FMT_LEN "x",
+ pBT->base,
+ pBT->uSize,
+ aligned_base,
+ uSize));
if (pBT->base + pBT->uSize >= aligned_base + uSize)
{
IMG_INT i;
PVR_DPF ((PVR_DBG_MESSAGE,
- "RA_Create: name='%s', base=0x%x, uSize=0x%x, alloc=0x%x, free=0x%x",
- name, base, uSize, (IMG_UINTPTR_T)imp_alloc, (IMG_UINTPTR_T)imp_free));
+ "RA_Create: name='%s', base=0x" UINTPTR_FMT ", uSize=0x%" SIZE_T_FMT_LEN "x, alloc=0x%p, free=0x%p",
+ name, base, uSize, imp_alloc, imp_free));
if (OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
{
PVR_DPF ((PVR_DBG_ERROR,"RA_Delete: allocations still exist in the arena that is being destroyed"));
PVR_DPF ((PVR_DBG_ERROR,"Likely Cause: client drivers not freeing alocations before destroying devmemcontext"));
- PVR_DPF ((PVR_DBG_ERROR,"RA_Delete: base = 0x%x size=0x%x", pBT->base, pBT->uSize));
+ PVR_DPF ((PVR_DBG_ERROR,"RA_Delete: base = 0x" UINTPTR_FMT " size=0x%" SIZE_T_FMT_LEN "x", pBT->base, pBT->uSize));
}
_SegmentListRemove (pArena, pBT);
if (pBT->type != btt_free)
{
PVR_DPF ((PVR_DBG_ERROR,"RA_TestDelete: detected resource leak!"));
- PVR_DPF ((PVR_DBG_ERROR,"RA_TestDelete: base = 0x%x size=0x%x", pBT->base, pBT->uSize));
+ PVR_DPF ((PVR_DBG_ERROR,"RA_TestDelete: base = 0x" UINTPTR_FMT " size=0x%" SIZE_T_FMT_LEN "x", pBT->base, pBT->uSize));
return IMG_FALSE;
}
}
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "RA_Add: name='%s', base=0x%x, size=0x%x", pArena->name, base, uSize));
+ "RA_Add: name='%s', base=0x" UINTPTR_FMT ", size=0x%" SIZE_T_FMT_LEN "x", pArena->name, base, uSize));
uSize = (uSize + pArena->uQuantum - 1) / pArena->uQuantum * pArena->uQuantum;
return ((IMG_BOOL)(_InsertResource (pArena, base, uSize) != IMG_NULL));
}
PVR_DPF ((PVR_DBG_MESSAGE,
- "RA_Alloc: arena='%s', size=0x%x(0x%x), alignment=0x%x, offset=0x%x",
+ "RA_Alloc: arena='%s', size=0x%" SIZE_T_FMT_LEN "x(0x%" SIZE_T_FMT_LEN "x), alignment=0x%x, offset=0x%x",
pArena->name, uSize, uRequestSize, uAlignment, uAlignmentOffset));
/* if allocation failed then we might have an import source which
pArena->pImportFree(pArena->pImportHandle, import_base,
psImportMapping);
PVR_DPF ((PVR_DBG_MESSAGE,
- "RA_Alloc: name='%s', size=0x%x failed!",
+ "RA_Alloc: name='%s', size=0x%" SIZE_T_FMT_LEN "x failed!",
pArena->name, uSize));
/* RA_Dump (arena); */
return IMG_FALSE;
#endif
PVR_DPF ((PVR_DBG_MESSAGE,
- "RA_Alloc: name='%s', size=0x%x, *base=0x%x = %d",
+ "RA_Alloc: name='%s', size=0x%" SIZE_T_FMT_LEN "x, *base=0x" UINTPTR_FMT " = %d",
pArena->name, uSize, *base, bResult));
/* RA_Dump (pArena);
(eNextSpan == IMPORTED_RESOURCE_SPAN_END)))
{
/* error - next span must be live, free or end */
- PVR_DPF((PVR_DBG_ERROR, "ValidateArena ERROR: adjacent boundary tags %d (base=0x%x) and %d (base=0x%x) are incompatible (arena: %s)",
- pSegment->ui32BoundaryTagID, pSegment->base, pSegment->pNextSegment->ui32BoundaryTagID, pSegment->pNextSegment->base, pArena->name));
+ PVR_DPF((PVR_DBG_ERROR,
+ "ValidateArena ERROR: adjacent boundary tags %d (base=0x" UINTPTR_FMT
+ ") and %d (base=0x" UINTPTR_FMT ") are incompatible (arena: %s)",
+ pSegment->ui32BoundaryTagID,
+ pSegment->base,
+ pSegment->pNextSegment->ui32BoundaryTagID,
+ pSegment->pNextSegment->base,
+ pArena->name));
PVR_DBG_BREAK;
}
(eNextSpan == IMPORTED_RESOURCE_SPAN_END)))
{
/* error - next span must be live or end */
- PVR_DPF((PVR_DBG_ERROR, "ValidateArena ERROR: adjacent boundary tags %d (base=0x%x) and %d (base=0x%x) are incompatible (arena: %s)",
- pSegment->ui32BoundaryTagID, pSegment->base, pSegment->pNextSegment->ui32BoundaryTagID, pSegment->pNextSegment->base, pArena->name));
+ PVR_DPF((PVR_DBG_ERROR,
+ "ValidateArena ERROR: adjacent boundary tags %d (base=0x" UINTPTR_FMT
+ ") and %d (base=0x" UINTPTR_FMT ") are incompatible (arena: %s)",
+ pSegment->ui32BoundaryTagID,
+ pSegment->base,
+ pSegment->pNextSegment->ui32BoundaryTagID,
+ pSegment->pNextSegment->base,
+ pArena->name));
PVR_DBG_BREAK;
}
(eNextSpan == IMPORTED_RESOURCE_SPAN_END))
{
/* error - next span cannot be live, free or end */
- PVR_DPF((PVR_DBG_ERROR, "ValidateArena ERROR: adjacent boundary tags %d (base=0x%x) and %d (base=0x%x) are incompatible (arena: %s)",
- pSegment->ui32BoundaryTagID, pSegment->base, pSegment->pNextSegment->ui32BoundaryTagID, pSegment->pNextSegment->base, pArena->name));
+ PVR_DPF((PVR_DBG_ERROR,
+ "ValidateArena ERROR: adjacent boundary tags %d (base=0x" UINTPTR_FMT
+ ") and %d (base=0x" UINTPTR_FMT ") are incompatible (arena: %s)",
+ pSegment->ui32BoundaryTagID,
+ pSegment->base,
+ pSegment->pNextSegment->ui32BoundaryTagID,
+ pSegment->pNextSegment->base,
+ pArena->name));
PVR_DBG_BREAK;
}
(eNextSpan == IMPORTED_RESOURCE_SPAN_FREE)))
{
/* error - next span must be live or free */
- PVR_DPF((PVR_DBG_ERROR, "ValidateArena ERROR: adjacent boundary tags %d (base=0x%x) and %d (base=0x%x) are incompatible (arena: %s)",
- pSegment->ui32BoundaryTagID, pSegment->base, pSegment->pNextSegment->ui32BoundaryTagID, pSegment->pNextSegment->base, pArena->name));
+ PVR_DPF((PVR_DBG_ERROR,
+ "ValidateArena ERROR: adjacent boundary tags %d (base=0x" UINTPTR_FMT
+ ") and %d (base=0x" UINTPTR_FMT ") are incompatible (arena: %s)",
+ pSegment->ui32BoundaryTagID,
+ pSegment->base,
+ pSegment->pNextSegment->ui32BoundaryTagID,
+ pSegment->pNextSegment->base,
+ pArena->name));
PVR_DBG_BREAK;
}
break;
default:
- PVR_DPF((PVR_DBG_ERROR, "ValidateArena ERROR: adjacent boundary tags %d (base=0x%x) and %d (base=0x%x) are incompatible (arena: %s)",
- pSegment->ui32BoundaryTagID, pSegment->base, pSegment->pNextSegment->ui32BoundaryTagID, pSegment->pNextSegment->base, pArena->name));
+ PVR_DPF((PVR_DBG_ERROR,
+ "ValidateArena ERROR: adjacent boundary tags %d (base=0x" UINTPTR_FMT
+ ") and %d (base=0x" UINTPTR_FMT ") are incompatible (arena: %s)",
+ pSegment->ui32BoundaryTagID,
+ pSegment->base,
+ pSegment->pNextSegment->ui32BoundaryTagID,
+ pSegment->pNextSegment->base,
+ pArena->name));
PVR_DBG_BREAK;
break;
(eNextSpan == RESOURCE_SPAN_LIVE)))
{
/* error - next span must be free or live */
- PVR_DPF((PVR_DBG_ERROR, "ValidateArena ERROR: adjacent boundary tags %d (base=0x%x) and %d (base=0x%x) are incompatible (arena: %s)",
- pSegment->ui32BoundaryTagID, pSegment->base, pSegment->pNextSegment->ui32BoundaryTagID, pSegment->pNextSegment->base, pArena->name));
+ PVR_DPF((PVR_DBG_ERROR,
+ "ValidateArena ERROR: adjacent boundary tags %d (base=0x" UINTPTR_FMT
+ ") and %d (base=0x" UINTPTR_FMT ") are incompatible (arena: %s)",
+ pSegment->ui32BoundaryTagID,
+ pSegment->base,
+ pSegment->pNextSegment->ui32BoundaryTagID,
+ pSegment->pNextSegment->base,
+ pArena->name));
PVR_DBG_BREAK;
}
(eNextSpan == RESOURCE_SPAN_LIVE)))
{
/* error - next span must be free or live */
- PVR_DPF((PVR_DBG_ERROR, "ValidateArena ERROR: adjacent boundary tags %d (base=0x%x) and %d (base=0x%x) are incompatible (arena: %s)",
- pSegment->ui32BoundaryTagID, pSegment->base, pSegment->pNextSegment->ui32BoundaryTagID, pSegment->pNextSegment->base, pArena->name));
+ PVR_DPF((PVR_DBG_ERROR,
+ "ValidateArena ERROR: adjacent boundary tags %d (base=0x" UINTPTR_FMT
+ ") and %d (base=0x" UINTPTR_FMT ") are incompatible (arena: %s)",
+ pSegment->ui32BoundaryTagID,
+ pSegment->base,
+ pSegment->pNextSegment->ui32BoundaryTagID,
+ pSegment->pNextSegment->base,
+ pArena->name));
PVR_DBG_BREAK;
}
break;
default:
- PVR_DPF((PVR_DBG_ERROR, "ValidateArena ERROR: adjacent boundary tags %d (base=0x%x) and %d (base=0x%x) are incompatible (arena: %s)",
- pSegment->ui32BoundaryTagID, pSegment->base, pSegment->pNextSegment->ui32BoundaryTagID, pSegment->pNextSegment->base, pArena->name));
+ PVR_DPF((PVR_DBG_ERROR,
+ "ValidateArena ERROR: adjacent boundary tags %d (base=0x" UINTPTR_FMT
+ ") and %d (base=0x" UINTPTR_FMT ") are incompatible (arena: %s)",
+ pSegment->ui32BoundaryTagID,
+ pSegment->base,
+ pSegment->pNextSegment->ui32BoundaryTagID,
+ pSegment->pNextSegment->base,
+ pArena->name));
PVR_DBG_BREAK;
break;
#endif
PVR_DPF ((PVR_DBG_MESSAGE,
- "RA_Free: name='%s', base=0x%x", pArena->name, base));
+ "RA_Free: name='%s', base=0x" UINTPTR_FMT, pArena->name, base));
pBT = (BT *) HASH_Remove (pArena->pSegmentHash, base);
PVR_ASSERT (pBT != IMG_NULL);
{
*p++ = 0xAA;
}
- PVR_DPF((PVR_DBG_MESSAGE,"BM_FREESPACE_CHECK: RA_Free Cleared %08X to %08X (size=0x%x)",(IMG_BYTE*)pBT->base + SysGetDevicePhysOffset(),endp-1,pBT->uSize));
+ PVR_DPF((PVR_DBG_MESSAGE,
+ "BM_FREESPACE_CHECK: RA_Free Cleared %p to %p (size=0x%" SIZE_T_FMT_LEN "x)",
+ (IMG_BYTE*)pBT->base + SysGetDevicePhysOffset(),
+ endp - 1,
+ pBT->uSize));
}
#endif
_FreeBT (pArena, pBT, bFreeBackingStore);
BT *pBT;
PVR_ASSERT (pArena != IMG_NULL);
PVR_DPF ((PVR_DBG_MESSAGE,"Arena '%s':", pArena->name));
- PVR_DPF ((PVR_DBG_MESSAGE," alloc=%08X free=%08X handle=%08X quantum=%d",
+ PVR_DPF ((PVR_DBG_MESSAGE," alloc=%p free=%p handle=%p quantum=%d",
pArena->pImportAlloc, pArena->pImportFree, pArena->pImportHandle,
pArena->uQuantum));
PVR_DPF ((PVR_DBG_MESSAGE," segment Chain:"));
for (pBT=pArena->pHeadSegment; pBT!=IMG_NULL; pBT=pBT->pNextSegment)
{
- PVR_DPF ((PVR_DBG_MESSAGE,"\tbase=0x%x size=0x%x type=%s",
- (IMG_UINT32) pBT->base, pBT->uSize, _BTType (pBT->type)));
+ PVR_DPF ((PVR_DBG_MESSAGE,"\tbase=0x" UINTPTR_FMT " size=0x%" SIZE_T_FMT_LEN "x type=%s",
+ pBT->base, pBT->uSize, _BTType (pBT->type)));
}
#ifdef HASH_TRACE
{
PVR_PROC_SEQ_HANDLERS *handlers = (PVR_PROC_SEQ_HANDLERS*)sfile->private;
RA_ARENA *pArena = (RA_ARENA *)handlers->data;
- IMG_INT off = (IMG_INT)el;
+ IMG_UINTPTR_T off = (IMG_UINTPTR_T)el;
switch (off)
{
case 1:
- seq_printf(sfile, "quantum\t\t\t%u\n", pArena->uQuantum);
+ seq_printf(sfile, "quantum\t\t\t%" SIZE_T_FMT_LEN "u\n", pArena->uQuantum);
break;
case 2:
- seq_printf(sfile, "import_handle\t\t%08X\n", (IMG_UINT)pArena->pImportHandle);
+ seq_printf(sfile, "import_handle\t\t%p\n", pArena->pImportHandle);
break;
#ifdef RA_STATS
case 3:
- seq_printf(sfile,"span count\t\t%u\n", pArena->sStatistics.uSpanCount);
+ seq_printf(sfile,"span count\t\t%" SIZE_T_FMT_LEN "u\n", pArena->sStatistics.uSpanCount);
break;
case 4:
- seq_printf(sfile, "live segment count\t%u\n", pArena->sStatistics.uLiveSegmentCount);
+ seq_printf(sfile, "live segment count\t%" SIZE_T_FMT_LEN "u\n", pArena->sStatistics.uLiveSegmentCount);
break;
case 5:
- seq_printf(sfile, "free segment count\t%u\n", pArena->sStatistics.uFreeSegmentCount);
+ seq_printf(sfile, "free segment count\t%" SIZE_T_FMT_LEN "u\n", pArena->sStatistics.uFreeSegmentCount);
break;
case 6:
- seq_printf(sfile, "free resource count\t%u (0x%x)\n",
+ seq_printf(sfile, "free resource count\t%" SIZE_T_FMT_LEN "u (0x%" SIZE_T_FMT_LEN "x)\n",
pArena->sStatistics.uFreeResourceCount,
- (IMG_UINT)pArena->sStatistics.uFreeResourceCount);
+ pArena->sStatistics.uFreeResourceCount);
break;
case 7:
- seq_printf(sfile, "total allocs\t\t%u\n", pArena->sStatistics.uCumulativeAllocs);
+ seq_printf(sfile, "total allocs\t\t%" SIZE_T_FMT_LEN "u\n", pArena->sStatistics.uCumulativeAllocs);
break;
case 8:
- seq_printf(sfile, "total frees\t\t%u\n", pArena->sStatistics.uCumulativeFrees);
+ seq_printf(sfile, "total frees\t\t%" SIZE_T_FMT_LEN "u\n", pArena->sStatistics.uCumulativeFrees);
break;
case 9:
- seq_printf(sfile, "import count\t\t%u\n", pArena->sStatistics.uImportCount);
+ seq_printf(sfile, "import count\t\t%" SIZE_T_FMT_LEN "u\n", pArena->sStatistics.uImportCount);
break;
case 10:
- seq_printf(sfile, "export count\t\t%u\n", pArena->sStatistics.uExportCount);
+ seq_printf(sfile, "export count\t\t%" SIZE_T_FMT_LEN "u\n", pArena->sStatistics.uExportCount);
break;
#endif
}
#else
if(off <= 1)
#endif
- return (void*)(IMG_INT)(off+1);
+ return (void*)(IMG_UINTPTR_T)(off+1);
return 0;
}
if (pBT)
{
- seq_printf(sfile, "%08x %8x %4s %08x\n",
- (IMG_UINT)pBT->base, (IMG_UINT)pBT->uSize, _BTType (pBT->type),
- (IMG_UINT)pBT->psMapping);
+ seq_printf(sfile, "%p %" SIZE_T_FMT_LEN "x %4s %p\n",
+ (IMG_PVOID)pBT->base, pBT->uSize, _BTType (pBT->type),
+ pBT->psMapping);
}
}
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, " allocCB=%p freeCB=%p handle=%p quantum=%d\n",
+ i32Count = OSSNPrintf(pszStr, 100, " allocCB=%p freeCB=%p handle=%p quantum=%" SIZE_T_FMT_LEN "u\n",
pArena->pImportAlloc,
pArena->pImportFree,
pArena->pImportHandle,
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, "span count\t\t%u\n", pArena->sStatistics.uSpanCount);
+ i32Count = OSSNPrintf(pszStr, 100, "span count\t\t%" SIZE_T_FMT_LEN "u\n",
+ pArena->sStatistics.uSpanCount);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, "live segment count\t%u\n", pArena->sStatistics.uLiveSegmentCount);
+ i32Count = OSSNPrintf(pszStr, 100, "live segment count\t%" SIZE_T_FMT_LEN "u\n",
+ pArena->sStatistics.uLiveSegmentCount);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, "free segment count\t%u\n", pArena->sStatistics.uFreeSegmentCount);
+ i32Count = OSSNPrintf(pszStr, 100, "free segment count\t%" SIZE_T_FMT_LEN "u\n",
+ pArena->sStatistics.uFreeSegmentCount);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, "free resource count\t%u (0x%x)\n",
+ i32Count = OSSNPrintf(pszStr, 100, "free resource count\t%" SIZE_T_FMT_LEN "u (0x%" SIZE_T_FMT_LEN "x)\n",
pArena->sStatistics.uFreeResourceCount,
- (IMG_UINT)pArena->sStatistics.uFreeResourceCount);
+ pArena->sStatistics.uFreeResourceCount);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, "total allocs\t\t%u\n", pArena->sStatistics.uCumulativeAllocs);
+ i32Count = OSSNPrintf(pszStr, 100, "total allocs\t\t%" SIZE_T_FMT_LEN "u\n",
+ pArena->sStatistics.uCumulativeAllocs);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, "total frees\t\t%u\n", pArena->sStatistics.uCumulativeFrees);
+ i32Count = OSSNPrintf(pszStr, 100, "total frees\t\t%" SIZE_T_FMT_LEN "u\n",
+ pArena->sStatistics.uCumulativeFrees);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, "import count\t\t%u\n", pArena->sStatistics.uImportCount);
+ i32Count = OSSNPrintf(pszStr, 100, "import count\t\t%" SIZE_T_FMT_LEN "u\n",
+ pArena->sStatistics.uImportCount);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, "export count\t\t%u\n", pArena->sStatistics.uExportCount);
+ i32Count = OSSNPrintf(pszStr, 100, "export count\t\t%" SIZE_T_FMT_LEN "u\n",
+ pArena->sStatistics.uExportCount);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
CHECK_SPACE(ui32StrLen);
for (pBT=pArena->pHeadSegment; pBT!=IMG_NULL; pBT=pBT->pNextSegment)
{
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, "\tbase=0x%x size=0x%x type=%s ref=%p\n",
- (IMG_UINT32) pBT->base,
+ i32Count = OSSNPrintf(pszStr, 100, "\tbase=0x%p size=0x%" SIZE_T_FMT_LEN "x type=%s ref=%p\n",
+ (void *)pBT->base,
pBT->uSize,
_BTType(pBT->type),
pBT->psMapping);
IMG_UINT32 ui32StrLen = *pui32StrLen;
IMG_INT32 i32Count;
CHECK_SPACE(ui32StrLen);
- i32Count = OSSNPrintf(pszStr, 100, "Bytes free: Arena %-30s: %u (0x%x)\n", pArena->name,
+ i32Count = OSSNPrintf(pszStr, 100, "Bytes free: Arena %-30s: %" SIZE_T_FMT_LEN "u (0x%" SIZE_T_FMT_LEN "x)\n", pArena->name,
pArena->sStatistics.uFreeResourceCount,
pArena->sStatistics.uFreeResourceCount);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
#if defined(__linux__)
#define PVRSRV_REFCOUNT_CCB_DEBUG_MMAP (1U << 16)
#define PVRSRV_REFCOUNT_CCB_DEBUG_MMAP2 (1U << 17)
+#define PVRSRV_REFCOUNT_CCB_DEBUG_ION_SYNC (1U << 18)
#else
#define PVRSRV_REFCOUNT_CCB_DEBUG_MMAP 0
#define PVRSRV_REFCOUNT_CCB_DEBUG_MMAP2 0
+#define PVRSRV_REFCOUNT_CCB_DEBUG_ION_SYNC 0
#endif
#define PVRSRV_REFCOUNT_CCB_DEBUG_ALL ~0U
/*static const IMG_UINT guiDebugMask = PVRSRV_REFCOUNT_CCB_DEBUG_ALL;*/
static const IMG_UINT guiDebugMask =
PVRSRV_REFCOUNT_CCB_DEBUG_SYNCINFO |
+#if defined(SUPPORT_ION)
+ PVRSRV_REFCOUNT_CCB_DEBUG_ION_SYNC |
+#endif
PVRSRV_REFCOUNT_CCB_DEBUG_MMAP2;
typedef struct
/* Early on, we won't have MAX_REFCOUNT_CCB_SIZE messages */
if(!psRefCountCCBEntry->pszFile)
- break;
+ continue;
PVR_LOG(("%s %d %s:%d", psRefCountCCBEntry->pcMesg,
psRefCountCCBEntry->ui32PID,
psOffsetStruct,
psOffsetStruct->ui32RefCount,
psOffsetStruct->ui32RefCount + 1,
- psOffsetStruct->ui32RealByteSize);
+ psOffsetStruct->uiRealByteSize);
gsRefCountCCB[giOffset].pcMesg[PVRSRV_REFCOUNT_CCB_MESG_MAX - 1] = 0;
giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
psOffsetStruct,
psOffsetStruct->ui32RefCount,
psOffsetStruct->ui32RefCount - 1,
- psOffsetStruct->ui32RealByteSize);
+ psOffsetStruct->uiRealByteSize);
gsRefCountCCB[giOffset].pcMesg[PVRSRV_REFCOUNT_CCB_MESG_MAX - 1] = 0;
giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
psOffsetStruct,
psOffsetStruct->ui32Mapped,
psOffsetStruct->ui32Mapped + 1,
- psOffsetStruct->ui32RealByteSize);
+ psOffsetStruct->uiRealByteSize);
gsRefCountCCB[giOffset].pcMesg[PVRSRV_REFCOUNT_CCB_MESG_MAX - 1] = 0;
giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
psOffsetStruct,
psOffsetStruct->ui32Mapped,
psOffsetStruct->ui32Mapped - 1,
- psOffsetStruct->ui32RealByteSize);
+ psOffsetStruct->uiRealByteSize);
gsRefCountCCB[giOffset].pcMesg[PVRSRV_REFCOUNT_CCB_MESG_MAX - 1] = 0;
giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
psOffsetStruct->ui32Mapped--;
}
+#if defined(SUPPORT_ION)
+PVRSRV_ERROR PVRSRVIonBufferSyncInfoIncRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
+ IMG_HANDLE hUnique,
+ IMG_HANDLE hDevCookie,
+ IMG_HANDLE hDevMemContext,
+ PVRSRV_ION_SYNC_INFO **ppsIonSyncInfo,
+ PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo)
+{
+ PVRSRV_ERROR eError;
+
+ /*
+ We have to do the call 1st as we need to Ion syninfo which it returns
+ */
+ eError = PVRSRVIonBufferSyncAcquire(hUnique,
+ hDevCookie,
+ hDevMemContext,
+ ppsIonSyncInfo);
+
+ if (eError == PVRSRV_OK)
+ {
+ if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_ION_SYNC))
+ goto skip;
+
+ PVRSRV_LOCK_CCB();
+
+ gsRefCountCCB[giOffset].pszFile = pszFile;
+ gsRefCountCCB[giOffset].iLine = iLine;
+ gsRefCountCCB[giOffset].ui32PID = OSGetCurrentProcessIDKM();
+ snprintf(gsRefCountCCB[giOffset].pcMesg,
+ PVRSRV_REFCOUNT_CCB_MESG_MAX - 1,
+ PVRSRV_REFCOUNT_CCB_FMT_STRING,
+ "ION_SYNC",
+ (*ppsIonSyncInfo)->psSyncInfo,
+ psKernelMemInfo,
+ NULL,
+ *ppsIonSyncInfo,
+ (*ppsIonSyncInfo)->ui32RefCount - 1,
+ (*ppsIonSyncInfo)->ui32RefCount,
+ 0);
+ gsRefCountCCB[giOffset].pcMesg[PVRSRV_REFCOUNT_CCB_MESG_MAX - 1] = 0;
+ giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
+
+ PVRSRV_UNLOCK_CCB();
+ }
+
+skip:
+ return eError;
+}
+
+void PVRSRVIonBufferSyncInfoDecRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
+ PVRSRV_ION_SYNC_INFO *psIonSyncInfo,
+ PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo)
+{
+ if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_ION_SYNC))
+ goto skip;
+
+ PVRSRV_LOCK_CCB();
+
+ gsRefCountCCB[giOffset].pszFile = pszFile;
+ gsRefCountCCB[giOffset].iLine = iLine;
+ gsRefCountCCB[giOffset].ui32PID = OSGetCurrentProcessIDKM();
+ snprintf(gsRefCountCCB[giOffset].pcMesg,
+ PVRSRV_REFCOUNT_CCB_MESG_MAX - 1,
+ PVRSRV_REFCOUNT_CCB_FMT_STRING,
+ "ION_SYNC",
+ psIonSyncInfo->psSyncInfo,
+ psKernelMemInfo,
+ NULL,
+ psIonSyncInfo,
+ psIonSyncInfo->ui32RefCount,
+ psIonSyncInfo->ui32RefCount - 1,
+ 0);
+ gsRefCountCCB[giOffset].pcMesg[PVRSRV_REFCOUNT_CCB_MESG_MAX - 1] = 0;
+ giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
+
+ PVRSRV_UNLOCK_CCB();
+skip:
+ PVRSRVIonBufferSyncRelease(psIonSyncInfo);
+}
+
+#endif /* defined (SUPPORT_ION) */
+
#endif /* defined(__linux__) */
#endif /* defined(PVRSRV_REFCOUNT_DEBUG) */
FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DEVICEMEM_MAPPING, 0, 0, IMG_TRUE);
FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_KERNEL_DEVICEMEM_ALLOCATION, 0, 0, IMG_TRUE);
FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DEVICEMEM_ALLOCATION, 0, 0, IMG_TRUE);
- FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DEVICEMEM_CONTEXT, 0, 0, IMG_TRUE);
- FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_SHARED_MEM_INFO, 0, 0, IMG_TRUE);
#if defined(SUPPORT_ION)
FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DEVICEMEM_ION, 0, 0, IMG_TRUE);
#endif
+ FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DEVICEMEM_CONTEXT, 0, 0, IMG_TRUE);
+ FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_SHARED_MEM_INFO, 0, 0, IMG_TRUE);
+
/* DISPLAY CLASS types: */
FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DISPLAYCLASS_SWAPCHAIN_REF, 0, 0, IMG_TRUE);
FreeResourceByCriteria(psResManContext, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_DISPLAYCLASS_DEVICE, 0, 0, IMG_TRUE);
VALIDATERESLIST();
PVR_DPF((PVR_DBG_MESSAGE, "ResManRegisterRes: register resource "
- "Context 0x%x, ResType 0x%x, pvParam 0x%x, ui32Param 0x%x, "
- "FreeFunc %08X",
- (IMG_UINTPTR_T)psResManContext,
+ "Context 0x%p, ResType 0x%x, pvParam 0x%p, ui32Param 0x%x, "
+ "FreeFunc %p",
+ psResManContext,
ui32ResType,
- (IMG_UINTPTR_T)pvParam,
+ pvParam,
ui32Param,
- (IMG_UINTPTR_T)pfnFreeResource));
+ pfnFreeResource));
/* Allocate memory for the new resource structure */
if (OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
return PVRSRV_OK;
}
- PVR_DPF((PVR_DBG_MESSAGE, "ResManFreeResByPtr: freeing resource at %08X",
- (IMG_UINTPTR_T)psResItem));
+ PVR_DPF((PVR_DBG_MESSAGE, "ResManFreeResByPtr: freeing resource at %p",
+ psResItem));
/*Acquire resource list sync object*/
ACQUIRE_SYNC_OBJ;
VALIDATERESLIST();
PVR_DPF((PVR_DBG_MESSAGE, "ResManFreeResByCriteria: "
- "Context 0x%x, Criteria 0x%x, Type 0x%x, Addr 0x%x, Param 0x%x",
- (IMG_UINTPTR_T)psResManContext, ui32SearchCriteria, ui32ResType,
- (IMG_UINTPTR_T)pvParam, ui32Param));
+ "Context 0x%p, Criteria 0x%x, Type 0x%x, Addr 0x%p, Param 0x%x",
+ psResManContext, ui32SearchCriteria, ui32ResType,
+ pvParam, ui32Param));
/* Free resources by criteria for this context */
eError = FreeResourceByCriteria(psResManContext, ui32SearchCriteria,
ACQUIRE_SYNC_OBJ;
PVR_DPF((PVR_DBG_MESSAGE,
- "FindResourceByPtr: psItem=%08X, psItem->psNext=%08X",
- (IMG_UINTPTR_T)psItem, (IMG_UINTPTR_T)psItem->psNext));
+ "FindResourceByPtr: psItem=%p, psItem->psNext=%p",
+ psItem, psItem->psNext));
PVR_DPF((PVR_DBG_MESSAGE,
- "FindResourceByPtr: Resource Ctx 0x%x, Type 0x%x, Addr 0x%x, "
- "Param 0x%x, FnCall %08X, Flags 0x%x",
- (IMG_UINTPTR_T)psResManContext,
+ "FindResourceByPtr: Resource Ctx 0x%p, Type 0x%x, Addr 0x%p, "
+ "Param 0x%x, FnCall %p, Flags 0x%x",
+ psResManContext,
psItem->ui32ResType,
- (IMG_UINTPTR_T)psItem->pvParam,
+ psItem->pvParam,
psItem->ui32Param,
- (IMG_UINTPTR_T)psItem->pfnFreeResource,
+ psItem->pfnFreeResource,
psItem->ui32Flags));
/* Search resource items starting at after the first dummy item */
#endif
PVR_DPF((PVR_DBG_MESSAGE,
- "FreeResourceByPtr: psItem=%08X, psItem->psNext=%08X",
- (IMG_UINTPTR_T)psItem, (IMG_UINTPTR_T)psItem->psNext));
+ "FreeResourceByPtr: psItem=%p, psItem->psNext=%p",
+ psItem, psItem->psNext));
PVR_DPF((PVR_DBG_MESSAGE,
- "FreeResourceByPtr: Type 0x%x, Addr 0x%x, "
- "Param 0x%x, FnCall %08X, Flags 0x%x",
+ "FreeResourceByPtr: Type 0x%x, Addr 0x%p, "
+ "Param 0x%x, FnCall %p, Flags 0x%x",
psItem->ui32ResType,
- (IMG_UINTPTR_T)psItem->pvParam, psItem->ui32Param,
- (IMG_UINTPTR_T)psItem->pfnFreeResource, psItem->ui32Flags));
+ psItem->pvParam,
+ psItem->ui32Param,
+ psItem->pfnFreeResource, psItem->ui32Flags));
/* Release resource list sync object just in case the free routine calls the resource manager */
RELEASE_SYNC_OBJ;
if (psCurContext->ppsThis != ppsThisContext)
{
PVR_DPF((PVR_DBG_WARNING,
- "psCC=%08X psCC->ppsThis=%08X psCC->psNext=%08X ppsTC=%08X",
- (IMG_UINTPTR_T)psCurContext,
- (IMG_UINTPTR_T)psCurContext->ppsThis,
- (IMG_UINTPTR_T)psCurContext->psNext,
- (IMG_UINTPTR_T)ppsThisContext));
+ "psCC=%p psCC->ppsThis=%p psCC->psNext=%p ppsTC=%p",
+ psCurContext,
+ psCurContext->ppsThis,
+ psCurContext->psNext,
+ ppsThisContext));
PVR_ASSERT(psCurContext->ppsThis == ppsThisContext);
}
if (psCurItem->ppsThis != ppsThisItem)
{
PVR_DPF((PVR_DBG_WARNING,
- "psCurItem=%08X psCurItem->ppsThis=%08X psCurItem->psNext=%08X ppsThisItem=%08X",
- (IMG_UINTPTR_T)psCurItem,
- (IMG_UINTPTR_T)psCurItem->ppsThis,
- (IMG_UINTPTR_T)psCurItem->psNext,
- (IMG_UINTPTR_T)ppsThisItem));
+ "psCurItem=%p psCurItem->ppsThis=%p psCurItem->psNext=%p ppsThisItem=%p",
+ psCurItem,
+ psCurItem->ppsThis,
+ psCurItem->psNext,
+ ppsThisItem));
PVR_ASSERT(psCurItem->ppsThis == ppsThisItem);
}
--- /dev/null
+/*************************************************************************/ /*!
+@Title Timed Trace functions
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+#if defined (TTRACE)
+
+#include "services_headers.h"
+#include "ttrace.h"
+
+#if defined(PVRSRV_NEED_PVR_DPF)
+#define CHECKSIZE(n,m) \
+ if ((n & m) != n) \
+ PVR_DPF((PVR_DBG_ERROR,"Size check failed for " #m))
+#else
+#define CHECKSIZE(n,m)
+#endif
+
+#define TIME_TRACE_HASH_TABLE_SIZE 32
+
+HASH_TABLE *g_psBufferTable;
+IMG_UINT32 g_ui32HostUID;
+IMG_HANDLE g_psTimer;
+
+/* Trace buffer struct */
+typedef struct
+{
+ IMG_UINT32 ui32Woff; /* Offset to where next item will be written */
+ IMG_UINT32 ui32Roff; /* Offset to where to start reading from */
+ IMG_UINT32 ui32ByteCount; /* Number of bytes in buffer */
+ IMG_UINT8 ui8Data[0];
+} sTimeTraceBuffer;
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVTimeTraceItemSize
+
+ @Description
+
+ Calculate the size of a trace item
+
+ @Input psTraceItem : Trace item
+
+ @Return size of trace item
+
+******************************************************************************/
+static IMG_UINT32
+PVRSRVTimeTraceItemSize(IMG_UINT32 *psTraceItem)
+{
+ IMG_UINT32 ui32Size = PVRSRV_TRACE_ITEM_SIZE;
+
+ ui32Size += READ_HEADER(SIZE, psTraceItem[PVRSRV_TRACE_DATA_HEADER]);
+
+ return ui32Size;
+}
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVTimeTraceAllocItem
+
+ @Description
+
+ Allocate a trace item from the buffer of the current process
+
+ @Output ppsTraceItem : Pointer to allocated trace item
+
+ @Input ui32Size : Size of data packet to be allocated
+
+ @Return none
+
+******************************************************************************/
+static IMG_VOID
+PVRSRVTimeTraceAllocItem(IMG_UINT32 **pui32Item, IMG_UINT32 ui32Size)
+{
+ IMG_UINT32 ui32PID = OSGetCurrentProcessIDKM();
+ IMG_UINT32 ui32AllocOffset;
+ sTimeTraceBuffer *psBuffer = (sTimeTraceBuffer *) HASH_Retrieve(g_psBufferTable, (IMG_UINTPTR_T) ui32PID);
+
+ /* The caller only asks for extra data space */
+ ui32Size += PVRSRV_TRACE_ITEM_SIZE;
+
+ /* Always round to 32-bit */
+ ui32Size = ((ui32Size - 1) & (~0x3)) + 0x04;
+
+ if (!psBuffer)
+ {
+ PVRSRV_ERROR eError;
+
+ PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVTimeTraceAllocItem: Creating buffer for PID %u", ui32PID));
+ eError = PVRSRVTimeTraceBufferCreate(ui32PID);
+ if (eError != PVRSRV_OK)
+ {
+ *pui32Item = IMG_NULL;
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVTimeTraceAllocItem: Failed to create buffer"));
+ return;
+ }
+
+ psBuffer = (sTimeTraceBuffer *) HASH_Retrieve(g_psBufferTable, (IMG_UINTPTR_T) ui32PID);
+ if (psBuffer == IMG_NULL)
+ {
+ *pui32Item = NULL;
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVTimeTraceAllocItem: Failed to retrieve buffer"));
+ return;
+ }
+ }
+
+ /* Can't allocate more then buffer size */
+ if (ui32Size >= TIME_TRACE_BUFFER_SIZE)
+ {
+ *pui32Item = NULL;
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVTimeTraceAllocItem: Error trace item too large (%d)", ui32Size));
+ return;
+ }
+
+ /* FIXME: Enter critical section? */
+
+ /* Always ensure we have enough space to write a padding message */
+ if ((psBuffer->ui32Woff + ui32Size + PVRSRV_TRACE_ITEM_SIZE) > TIME_TRACE_BUFFER_SIZE)
+ {
+ IMG_UINT32 *ui32WriteEOB = (IMG_UINT32 *) &psBuffer->ui8Data[psBuffer->ui32Woff];
+ IMG_UINT32 ui32Remain = TIME_TRACE_BUFFER_SIZE - psBuffer->ui32Woff;
+
+ /* Not enough space at the end of the buffer, back to the start */
+ *ui32WriteEOB++ = WRITE_HEADER(GROUP, PVRSRV_TRACE_GROUP_PADDING);
+ *ui32WriteEOB++ = 0; /* Don't need timestamp */
+ *ui32WriteEOB++ = 0; /* Don't need UID */
+ *ui32WriteEOB = WRITE_HEADER(SIZE, (ui32Remain - PVRSRV_TRACE_ITEM_SIZE));
+ psBuffer->ui32ByteCount += ui32Remain;
+ psBuffer->ui32Woff = ui32AllocOffset = 0;
+ }
+ else
+ ui32AllocOffset = psBuffer->ui32Woff;
+
+ psBuffer->ui32Woff = psBuffer->ui32Woff + ui32Size;
+ psBuffer->ui32ByteCount += ui32Size;
+
+ /* This allocation will start overwriting past our read pointer, move the read pointer along */
+ while (psBuffer->ui32ByteCount > TIME_TRACE_BUFFER_SIZE)
+ {
+ IMG_UINT32 *psReadItem = (IMG_UINT32 *) &psBuffer->ui8Data[psBuffer->ui32Roff];
+ IMG_UINT32 ui32ReadSize;
+
+ ui32ReadSize = PVRSRVTimeTraceItemSize(psReadItem);
+ psBuffer->ui32Roff = (psBuffer->ui32Roff + ui32ReadSize) & (TIME_TRACE_BUFFER_SIZE - 1);
+ psBuffer->ui32ByteCount -= ui32ReadSize;
+ }
+
+ *pui32Item = (IMG_UINT32 *) &psBuffer->ui8Data[ui32AllocOffset];
+ /* FIXME: Exit critical section? */
+}
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVTimeTraceBufferCreate
+
+ @Description
+
+ Create a trace buffer.
+
+ Note: We assume that this will only be called once per process.
+
+ @Input ui32PID : PID of the process that is creating the buffer
+
+ @Return none
+
+******************************************************************************/
+PVRSRV_ERROR PVRSRVTimeTraceBufferCreate(IMG_UINT32 ui32PID)
+{
+ sTimeTraceBuffer *psBuffer;
+ PVRSRV_ERROR eError = PVRSRV_OK;
+
+ eError = OSAllocMem(PVRSRV_PAGEABLE_SELECT,
+ sizeof(sTimeTraceBuffer) + TIME_TRACE_BUFFER_SIZE,
+ (IMG_VOID **)&psBuffer, IMG_NULL,
+ "Time Trace Buffer");
+ if (eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVTimeTraceBufferCreate: Error allocating trace buffer"));
+ return eError;
+ }
+
+ OSMemSet(psBuffer, 0, TIME_TRACE_BUFFER_SIZE);
+
+ if (!HASH_Insert(g_psBufferTable, (IMG_UINTPTR_T) ui32PID, (IMG_UINTPTR_T) psBuffer))
+ {
+ OSFreeMem(PVRSRV_PAGEABLE_SELECT, sizeof(sTimeTraceBuffer) + TIME_TRACE_BUFFER_SIZE,
+ psBuffer, NULL);
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVTimeTraceBufferCreate: Error adding trace buffer to hash table"));
+ return PVRSRV_ERROR_OUT_OF_MEMORY;
+ }
+
+ return eError;
+}
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVTimeTraceBufferDestroy
+
+ @Description
+
+ Destroy a trace buffer.
+
+ Note: We assume that this will only be called once per process.
+
+ @Input ui32PID : PID of the process that is creating the buffer
+
+ @Return none
+
+******************************************************************************/
+PVRSRV_ERROR PVRSRVTimeTraceBufferDestroy(IMG_UINT32 ui32PID)
+{
+ sTimeTraceBuffer *psBuffer;
+
+#if defined(DUMP_TTRACE_BUFFERS_ON_EXIT)
+ PVRSRVDumpTimeTraceBuffers();
+#endif
+ psBuffer = (sTimeTraceBuffer *) HASH_Retrieve(g_psBufferTable, (IMG_UINTPTR_T) ui32PID);
+ if (psBuffer)
+ {
+ OSFreeMem(PVRSRV_PAGEABLE_SELECT, sizeof(sTimeTraceBuffer) + TIME_TRACE_BUFFER_SIZE,
+ psBuffer, NULL);
+ HASH_Remove(g_psBufferTable, (IMG_UINTPTR_T) ui32PID);
+ return PVRSRV_OK;
+ }
+
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVTimeTraceBufferDestroy: Can't find trace buffer in hash table"));
+ return PVRSRV_ERROR_INVALID_PARAMS;
+}
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVTimeTraceInit
+
+ @Description
+
+ Initialise the timed trace subsystem.
+
+ @Return Error
+
+******************************************************************************/
+PVRSRV_ERROR PVRSRVTimeTraceInit(IMG_VOID)
+{
+ g_psBufferTable = HASH_Create(TIME_TRACE_HASH_TABLE_SIZE);
+
+ /* Create hash table to store the per process buffers in */
+ if (!g_psBufferTable)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVTimeTraceInit: Error creating hash table"));
+ return PVRSRV_ERROR_OUT_OF_MEMORY;
+ }
+
+ /* Create the kernel buffer */
+ PVRSRVTimeTraceBufferCreate(KERNEL_ID);
+
+ g_psTimer = OSFuncHighResTimerCreate();
+
+ if (!g_psTimer)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVTimeTraceInit: Error creating timer"));
+ return PVRSRV_ERROR_INIT_FAILURE;
+ }
+ return PVRSRV_OK;
+}
+
+static PVRSRV_ERROR _PVRSRVTimeTraceBufferDestroy(IMG_UINTPTR_T hKey, IMG_UINTPTR_T hData)
+{
+ PVR_UNREFERENCED_PARAMETER(hData);
+ PVR_DPF((PVR_DBG_MESSAGE, "_PVRSRVTimeTraceBufferDestroy: Destroying buffer for PID %u", (IMG_UINT32) hKey));
+
+ PVRSRVTimeTraceBufferDestroy(hKey);
+ return PVRSRV_OK;
+}
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVTimeTraceDeinit
+
+ @Description
+
+ De-initialise the timed trace subsystem.
+
+ @Return Error
+
+******************************************************************************/
+IMG_VOID PVRSRVTimeTraceDeinit(IMG_VOID)
+{
+ PVRSRVTimeTraceBufferDestroy(KERNEL_ID);
+ /* Free any buffers the where created at alloc item time */
+ HASH_Iterate(g_psBufferTable, _PVRSRVTimeTraceBufferDestroy);
+ HASH_Delete(g_psBufferTable);
+ OSFuncHighResTimerDestroy(g_psTimer);
+}
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVTimeTraceWriteHeader
+
+ @Description
+
+ Write the header for a trace item.
+
+ @Input pui32TraceItem : Pointer to trace item
+
+ @Input ui32Group : Trace item's group ID
+
+ @Input ui32Class : Trace item's class ID
+
+ @Input ui32Token : Trace item's ui32Token ID
+
+ @Input ui32Size : Trace item's data payload size
+
+ @Input ui32Type : Trace item's data type
+
+ @Input ui32Count : Trace item's data count
+
+ @Return Pointer to data payload space, or NULL if no data payload
+
+******************************************************************************/
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(PVRSRVTimeTraceWriteHeader)
+#endif
+static INLINE IMG_VOID *PVRSRVTimeTraceWriteHeader(IMG_UINT32 *pui32TraceItem, IMG_UINT32 ui32Group,
+ IMG_UINT32 ui32Class, IMG_UINT32 ui32Token,
+ IMG_UINT32 ui32Size, IMG_UINT32 ui32Type,
+ IMG_UINT32 ui32Count)
+{
+ /* Sanity check arg's */
+ CHECKSIZE(ui32Group, PVRSRV_TRACE_GROUP_MASK);
+ CHECKSIZE(ui32Class, PVRSRV_TRACE_CLASS_MASK);
+ CHECKSIZE(ui32Token, PVRSRV_TRACE_TOKEN_MASK);
+
+ CHECKSIZE(ui32Size, PVRSRV_TRACE_SIZE_MASK);
+ CHECKSIZE(ui32Type, PVRSRV_TRACE_TYPE_MASK);
+ CHECKSIZE(ui32Count, PVRSRV_TRACE_COUNT_MASK);
+
+ /* Trace header */
+ pui32TraceItem[PVRSRV_TRACE_HEADER] = WRITE_HEADER(GROUP, ui32Group);
+ pui32TraceItem[PVRSRV_TRACE_HEADER] |= WRITE_HEADER(CLASS, ui32Class);
+ pui32TraceItem[PVRSRV_TRACE_HEADER] |= WRITE_HEADER(TOKEN, ui32Token);
+
+ /* Data header */
+ pui32TraceItem[PVRSRV_TRACE_DATA_HEADER] = WRITE_HEADER(SIZE, ui32Size);
+ pui32TraceItem[PVRSRV_TRACE_DATA_HEADER] |= WRITE_HEADER(TYPE, ui32Type);
+ pui32TraceItem[PVRSRV_TRACE_DATA_HEADER] |= WRITE_HEADER(COUNT, ui32Count);
+
+ pui32TraceItem[PVRSRV_TRACE_TIMESTAMP] = OSFuncHighResTimerGetus(g_psTimer);
+ pui32TraceItem[PVRSRV_TRACE_HOSTUID] = g_ui32HostUID++;
+
+ return ui32Size?((IMG_VOID *) &pui32TraceItem[PVRSRV_TRACE_DATA_PAYLOAD]):NULL;
+}
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVTimeTraceArray
+
+ @Description
+
+ Write trace item with an array of data
+
+ @Input ui32Group : Trace item's group ID
+
+ @Input ui32Class : Trace item's class ID
+
+ @Input ui32Token : Trace item's ui32Token ID
+
+ @Input ui32Size : Trace item's data payload size
+
+ @Input ui32Type : Trace item's data type
+
+ @Input ui32Count : Trace item's data count
+
+ @Input pui8Data : Pointer to data array
+
+ @Return Pointer to data payload space, or NULL if no data payload
+
+******************************************************************************/
+IMG_VOID PVRSRVTimeTraceArray(IMG_UINT32 ui32Group, IMG_UINT32 ui32Class, IMG_UINT32 ui32Token,
+ IMG_UINT32 ui32Type, IMG_UINT32 ui32Count, IMG_UINT8 *pui8Data)
+{
+ IMG_UINT32 *pui32TraceItem;
+ IMG_UINT32 ui32Size, ui32TypeSize;
+ IMG_UINT8 *ui8Ptr;
+
+ /* Only the 1st 4 sizes are for ui types, others are "special" */
+ switch (ui32Type)
+ {
+ case PVRSRV_TRACE_TYPE_UI8: ui32TypeSize = 1;
+ break;
+ case PVRSRV_TRACE_TYPE_UI16: ui32TypeSize = 2;
+ break;
+ case PVRSRV_TRACE_TYPE_UI32: ui32TypeSize = 4;
+ break;
+ case PVRSRV_TRACE_TYPE_UI64: ui32TypeSize = 8;
+ break;
+ default:
+ PVR_DPF((PVR_DBG_ERROR, "Unsupported size\n"));
+ return;
+ }
+
+ ui32Size = ui32TypeSize * ui32Count;
+
+ /* Allocate space from the buffer */
+ PVRSRVTimeTraceAllocItem(&pui32TraceItem, ui32Size);
+
+ if (!pui32TraceItem)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "Can't find buffer\n"));
+ return;
+ }
+
+ ui8Ptr = PVRSRVTimeTraceWriteHeader(pui32TraceItem, ui32Group, ui32Class, ui32Token,
+ ui32Size, ui32Type, ui32Count);
+
+ if (ui8Ptr)
+ {
+ OSMemCopy(ui8Ptr, pui8Data, ui32Size);
+ }
+}
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVTimeTraceSyncObject
+
+ @Description
+
+ Write trace item with a sync object
+
+ @Input ui32Group : Trace item's group ID
+
+ @Input ui32Token : Trace item's ui32Token ID
+
+ @Input psSync : Sync object
+
+ @Input ui8SyncOpp : Sync object operation
+
+ @Return None
+
+******************************************************************************/
+IMG_VOID PVRSRVTimeTraceSyncObject(IMG_UINT32 ui32Group, IMG_UINT32 ui32Token,
+ PVRSRV_KERNEL_SYNC_INFO *psSync, IMG_UINT8 ui8SyncOp)
+{
+ IMG_UINT32 *pui32TraceItem;
+ IMG_UINT32 *ui32Ptr;
+ IMG_UINT32 ui32Size = PVRSRV_TRACE_TYPE_SYNC_SIZE;
+
+
+ PVRSRVTimeTraceAllocItem(&pui32TraceItem, ui32Size);
+
+ if (!pui32TraceItem)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "Can't find buffer\n"));
+ return;
+ }
+
+ ui32Ptr = PVRSRVTimeTraceWriteHeader(pui32TraceItem, ui32Group, PVRSRV_TRACE_CLASS_SYNC,
+ ui32Token, ui32Size, PVRSRV_TRACE_TYPE_SYNC, 1);
+
+ ui32Ptr[PVRSRV_TRACE_SYNC_UID] = psSync->ui32UID;
+ ui32Ptr[PVRSRV_TRACE_SYNC_WOP] = psSync->psSyncData->ui32WriteOpsPending;
+ ui32Ptr[PVRSRV_TRACE_SYNC_WOC] = psSync->psSyncData->ui32WriteOpsComplete;
+ ui32Ptr[PVRSRV_TRACE_SYNC_ROP] = psSync->psSyncData->ui32ReadOpsPending;
+ ui32Ptr[PVRSRV_TRACE_SYNC_ROC] = psSync->psSyncData->ui32ReadOpsComplete;
+ ui32Ptr[PVRSRV_TRACE_SYNC_RO2P] = psSync->psSyncData->ui32ReadOps2Pending;
+ ui32Ptr[PVRSRV_TRACE_SYNC_RO2C] = psSync->psSyncData->ui32ReadOps2Complete;
+ ui32Ptr[PVRSRV_TRACE_SYNC_WO_DEV_VADDR] = psSync->sWriteOpsCompleteDevVAddr.uiAddr;
+ ui32Ptr[PVRSRV_TRACE_SYNC_RO_DEV_VADDR] = psSync->sReadOpsCompleteDevVAddr.uiAddr;
+ ui32Ptr[PVRSRV_TRACE_SYNC_RO2_DEV_VADDR] = psSync->sReadOps2CompleteDevVAddr.uiAddr;
+ ui32Ptr[PVRSRV_TRACE_SYNC_OP] = ui8SyncOp;
+}
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVDumpTimeTraceBuffer
+
+ @Description
+
+ Dump the contents of the trace buffer.
+
+ @Input hKey : Trace item's group ID
+
+ @Input hData : Trace item's ui32Token ID
+
+ @Return Error
+
+******************************************************************************/
+static PVRSRV_ERROR PVRSRVDumpTimeTraceBuffer(IMG_UINTPTR_T hKey, IMG_UINTPTR_T hData)
+{
+ sTimeTraceBuffer *psBuffer = (sTimeTraceBuffer *) hData;
+ IMG_UINT32 ui32ByteCount = psBuffer->ui32ByteCount;
+ IMG_UINT32 ui32Walker = psBuffer->ui32Roff;
+ IMG_UINT32 ui32Read, ui32LineLen, ui32EOL, ui32MinLine;
+
+ PVR_DPF((PVR_DBG_ERROR, "TTB for PID %u:\n", (IMG_UINT32) hKey));
+
+ while (ui32ByteCount)
+ {
+ IMG_UINT32 *pui32Buffer = (IMG_UINT32 *) &psBuffer->ui8Data[ui32Walker];
+
+ ui32LineLen = (ui32ByteCount/sizeof(IMG_UINT32));
+ ui32EOL = (TIME_TRACE_BUFFER_SIZE - ui32Walker)/sizeof(IMG_UINT32);
+ ui32MinLine = (ui32LineLen < ui32EOL)?ui32LineLen:ui32EOL;
+
+ if (ui32MinLine >= 4)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "\t(TTB-%X) %08X %08X %08X %08X", ui32ByteCount,
+ pui32Buffer[0], pui32Buffer[1], pui32Buffer[2], pui32Buffer[3]));
+ ui32Read = 4 * sizeof(IMG_UINT32);
+ }
+ else if (ui32MinLine >= 3)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "\t(TTB-%X) %08X %08X %08X", ui32ByteCount,
+ pui32Buffer[0], pui32Buffer[1], pui32Buffer[2]));
+ ui32Read = 3 * sizeof(IMG_UINT32);
+ }
+ else if (ui32MinLine >= 2)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "\t(TTB-%X) %08X %08X", ui32ByteCount,
+ pui32Buffer[0], pui32Buffer[1]));
+ ui32Read = 2 * sizeof(IMG_UINT32);
+ }
+ else
+ {
+ PVR_DPF((PVR_DBG_ERROR, "\t(TTB-%X) %08X", ui32ByteCount,
+ pui32Buffer[0]));
+ ui32Read = sizeof(IMG_UINT32);
+ }
+
+ ui32Walker = (ui32Walker + ui32Read) & (TIME_TRACE_BUFFER_SIZE - 1);
+ ui32ByteCount -= ui32Read;
+ }
+
+ return PVRSRV_OK;
+}
+
+/*!
+******************************************************************************
+
+ @Function PVRSRVDumpTimeTraceBuffers
+
+ @Description
+
+ Dump the contents of all the trace buffers.
+
+ @Return None
+
+******************************************************************************/
+IMG_VOID PVRSRVDumpTimeTraceBuffers(IMG_VOID)
+{
+ HASH_Iterate(g_psBufferTable, PVRSRVDumpTimeTraceBuffer);
+}
+
+#endif /* TTRACE */
}
else
{
+ /*
+ We cannot use IMG_SYS_PHYADDR here, as that is 64-bit for 32-bit PAE builds.
+ The physical address in this call to RA_Alloc is specifically the SysPAddr
+ of local (card) space, and it is highly unlikely we would ever need to
+ support > 4GB of local (card) memory (this does assume that such local
+ memory will be mapped into System physical memory space at a low address so
+ that any and all local memory exists within the 4GB SYSPAddr range).
+ */
+ IMG_UINTPTR_T uiLocalPAddr;
IMG_SYS_PHYADDR sSysPAddr;
/*
0,
IMG_NULL,
0,
- &(sSysPAddr.uiAddr))!= IMG_TRUE)
+ &uiLocalPAddr)!= IMG_TRUE)
{
PVR_DPF((PVR_DBG_ERROR, "_AllocPageTableMemory: ERROR call to RA_Alloc failed"));
return IMG_FALSE;
}
+ /* Munge the local PAddr back into the SysPAddr */
+ sSysPAddr.uiAddr = uiLocalPAddr;
+
/* derive the CPU virtual address */
sCpuPAddr = SysSysPAddrToCpuPAddr(sSysPAddr);
/* note: actual ammount is pMMUHeap->ui32PTSize but must be a multiple of 4k pages */
/*
just free from the first local memory arena
(unlikely to be more than one local mem area(?))
+ Note that the cast to IMG_UINTPTR_T is ok as we're local mem.
*/
- RA_Free (pMMUHeap->psDevArena->psDeviceMemoryHeapInfo->psLocalDevMemArena, sSysPAddr.uiAddr, IMG_FALSE);
+ RA_Free (pMMUHeap->psDevArena->psDeviceMemoryHeapInfo->psLocalDevMemArena, (IMG_UINTPTR_T)sSysPAddr.uiAddr, IMG_FALSE);
}
}
if((UINT32_MAX_VALUE - DevVAddr.uiAddr)
< (ui32Size + pMMUHeap->ui32DataPageMask + pMMUHeap->ui32PTMask))
{
- /* detected overflow, clamp to highest address */
+ /* detected overflow, clamp to highest address, reserve all PDs */
sHighDevVAddr.uiAddr = UINT32_MAX_VALUE;
+ ui32PageTableCount = 1024;
}
else
{
+ ui32Size
+ pMMUHeap->ui32DataPageMask
+ pMMUHeap->ui32PTMask;
+
+ ui32PageTableCount = sHighDevVAddr.uiAddr >> pMMUHeap->ui32PDShift;
}
- ui32PageTableCount = sHighDevVAddr.uiAddr >> pMMUHeap->ui32PDShift;
/* Fix allocation of last 4MB */
if (ui32PageTableCount == 0)
DevVAddr.uiAddr = DevVAddr.uiAddr & (~BRN31620_PDE_CACHE_FILL_MASK);
/* Round the end address of the PD allocation to cacheline */
- sHighDevVAddr.uiAddr = ((sHighDevVAddr.uiAddr + (BRN31620_PDE_CACHE_FILL_SIZE - 1)) & (~BRN31620_PDE_CACHE_FILL_MASK));
+ if (UINT32_MAX_VALUE - sHighDevVAddr.uiAddr < (BRN31620_PDE_CACHE_FILL_SIZE - 1))
+ {
+ sHighDevVAddr.uiAddr = UINT32_MAX_VALUE;
+ ui32PageTableCount = 1024;
+ }
+ else
+ {
+ sHighDevVAddr.uiAddr = ((sHighDevVAddr.uiAddr + (BRN31620_PDE_CACHE_FILL_SIZE - 1)) & (~BRN31620_PDE_CACHE_FILL_MASK));
+ ui32PageTableCount = sHighDevVAddr.uiAddr >> pMMUHeap->ui32PDShift;
+ }
ui32PDIndex = DevVAddr.uiAddr >> pMMUHeap->ui32PDShift;
- ui32PageTableCount = sHighDevVAddr.uiAddr >> pMMUHeap->ui32PDShift;
/* Fix allocation of last 4MB */
if (ui32PageTableCount == 0)
{
ui32Flags |= PDUMP_FLAGS_CONTINUOUS;
}
- PDUMPCOMMENTWITHFLAGS(ui32Flags, "Alloc PTs (MMU Context ID == %u, PDBaseIndex == %u, Size == 0x%x)",
+ PDUMPCOMMENTWITHFLAGS(ui32Flags, "Alloc PTs (MMU Context ID == %u, PDBaseIndex == %u, Size == 0x%x, Shared = %s)",
pMMUHeap->psMMUContext->ui32PDumpMMUContextID,
pMMUHeap->ui32PDBaseIndex,
- ui32Size);
+ ui32Size,
+ MMU_IsHeapShared(pMMUHeap)?"True":"False");
PDUMPCOMMENTWITHFLAGS(ui32Flags, "Alloc page table (page count == %08X)", ui32PageTableCount);
PDUMPCOMMENTWITHFLAGS(ui32Flags, "Page directory mods (page count == %08X)", ui32PageTableCount);
}
if(ppsPTInfoList[i]->hPTPageOSMemHandle == IMG_NULL
&& ppsPTInfoList[i]->PTPageCpuVAddr == IMG_NULL)
{
- IMG_DEV_PHYADDR sDevPAddr;
+ IMG_DEV_PHYADDR sDevPAddr = { 0 };
#if defined(SUPPORT_SGX_MMU_DUMMY_PAGE)
IMG_UINT32 *pui32Tmp;
IMG_UINT32 j;
{
/* insert Page Table into all memory contexts */
MMU_CONTEXT *psMMUContext = (MMU_CONTEXT*)pMMUHeap->psMMUContext->psDevInfo->pvMMUContextList;
-
+#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
+ PVRSRV_SGXDEV_INFO *psDevInfo = psMMUContext->psDevInfo;
+#endif
while(psMMUContext)
{
MakeKernelPageReadWrite(psMMUContext->pvPDCpuVAddr);
pui32PDEntry += ui32PDIndex;
/* insert the page, specify the data page size and make the pde valid */
- pui32PDEntry[i] = (sDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT)
+ pui32PDEntry[i] = (IMG_UINT32)(sDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT)
| pMMUHeap->ui32PDEPageSizeCtrl
| SGX_MMU_PDE_VALID;
MakeKernelPageReadOnly(psMMUContext->pvPDCpuVAddr);
if(psMMUContext->bPDumpActive)
#endif
{
- //PDUMPCOMMENT("_DeferredAllocPTs: Dumping shared PDEs on context %d (%s)", psMMUContext->ui32PDumpMMUContextID, (psMMUContext->bPDumpActive) ? "active" : "");
- PDUMPPDENTRIES(&pMMUHeap->sMMUAttrib, psMMUContext->hPDOSMemHandle, (IMG_VOID*)&pui32PDEntry[i], sizeof(IMG_UINT32), 0, IMG_FALSE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
+#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
+ /*
+ Any modification of the uKernel memory context
+ needs to be PDumped when we're multi-process
+ */
+ IMG_UINT32 ui32HeapFlags = ( psMMUContext->sPDDevPAddr.uiAddr == psDevInfo->sKernelPDDevPAddr.uiAddr ) ? PDUMP_FLAGS_PERSISTENT : 0;
+#else
+ IMG_UINT32 ui32HeapFlags = 0;
+#endif
+ PDUMPPDENTRIES(&pMMUHeap->sMMUAttrib, psMMUContext->hPDOSMemHandle, (IMG_VOID*)&pui32PDEntry[i], sizeof(IMG_UINT32), ui32HeapFlags, IMG_FALSE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
}
#endif /* PDUMP */
/* advance to next context */
{
MakeKernelPageReadWrite(pMMUHeap->psMMUContext->pvPDCpuVAddr);
/* insert Page Table into only this memory context */
- pui32PDEntry[i] = (sDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT)
+ pui32PDEntry[i] = (IMG_UINT32)(sDevPAddr.uiAddr>>SGX_MMU_PDE_ADDR_ALIGNSHIFT)
| pMMUHeap->ui32PDEPageSizeCtrl
| SGX_MMU_PDE_VALID;
MakeKernelPageReadOnly(pMMUHeap->psMMUContext->pvPDCpuVAddr);
/* pdump the PD Page modifications */
- //PDUMPCOMMENT("_DeferredAllocPTs: Dumping kernel PDEs on context %d (%s)", pMMUHeap->psMMUContext->ui32PDumpMMUContextID, (pMMUHeap->psMMUContext->bPDumpActive) ? "active" : "");
PDUMPPDENTRIES(&pMMUHeap->sMMUAttrib, pMMUHeap->psMMUContext->hPDOSMemHandle, (IMG_VOID*)&pui32PDEntry[i], sizeof(IMG_UINT32), 0, IMG_FALSE, PDUMP_PD_UNIQUETAG, PDUMP_PT_UNIQUETAG);
break;
}
}
else
{
+ /*
+ We cannot use IMG_SYS_PHYADDR here, as that is 64-bit for 32-bit PAE builds.
+ The physical address in this call to RA_Alloc is specifically the SysPAddr
+ of local (card) space, and it is highly unlikely we would ever need to
+ support > 4GB of local (card) memory (this does assume that such local
+ memory will be mapped into System physical memory space at a low address so
+ that any and all local memory exists within the 4GB SYSPAddr range).
+ */
+ IMG_UINTPTR_T uiLocalPAddr;
IMG_SYS_PHYADDR sSysPAddr;
/* allocate from the device's local memory arena */
0,
IMG_NULL,
0,
- &(sSysPAddr.uiAddr))!= IMG_TRUE)
+ &uiLocalPAddr)!= IMG_TRUE)
{
PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR call to RA_Alloc failed"));
return PVRSRV_ERROR_FAILED_TO_ALLOC_VIRT_MEMORY;
}
+ /* Munge the local PAddr back into the SysPAddr */
+ sSysPAddr.uiAddr = uiLocalPAddr;
+
/* derive the CPU virtual address */
sCpuPAddr = SysSysPAddrToCpuPAddr(sSysPAddr);
sPDDevPAddr = SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE_SGX, sSysPAddr);
0,
IMG_NULL,
0,
- &(sSysPAddr.uiAddr))!= IMG_TRUE)
+ &uiLocalPAddr)!= IMG_TRUE)
{
PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR call to RA_Alloc failed"));
return PVRSRV_ERROR_FAILED_TO_ALLOC_VIRT_MEMORY;
}
+ /* Munge the local PAddr back into the SysPAddr */
+ sSysPAddr.uiAddr = uiLocalPAddr;
+
/* derive the CPU virtual address */
sCpuPAddr = SysSysPAddrToCpuPAddr(sSysPAddr);
psDevInfo->sDummyPTDevPAddr = SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE_SGX, sSysPAddr);
0,
IMG_NULL,
0,
- &(sSysPAddr.uiAddr))!= IMG_TRUE)
+ &uiLocalPAddr)!= IMG_TRUE)
{
PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR call to RA_Alloc failed"));
return PVRSRV_ERROR_FAILED_TO_ALLOC_VIRT_MEMORY;
}
+ /* Munge the local PAddr back into the SysPAddr */
+ sSysPAddr.uiAddr = uiLocalPAddr;
+
/* derive the CPU virtual address */
sCpuPAddr = SysSysPAddrToCpuPAddr(sSysPAddr);
psDevInfo->sDummyDataDevPAddr = SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE_SGX, sSysPAddr);
0,
IMG_NULL,
0,
- &(sSysPAddr.uiAddr))!= IMG_TRUE)
+ &uiLocalPAddr)!= IMG_TRUE)
{
PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR call to RA_Alloc failed"));
return PVRSRV_ERROR_FAILED_TO_ALLOC_VIRT_MEMORY;
}
+ /* Munge the local PAddr back into the SysPAddr */
+ sSysPAddr.uiAddr = uiLocalPAddr;
+
/* derive the CPU virtual address */
sCpuPAddr = SysSysPAddrToCpuPAddr(sSysPAddr);
psDevInfo->sBRN31620DummyPageDevPAddr = SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE_SGX, sSysPAddr);
0,
IMG_NULL,
0,
- &(sSysPAddr.uiAddr))!= IMG_TRUE)
+ &uiLocalPAddr)!= IMG_TRUE)
{
PVR_DPF((PVR_DBG_ERROR, "MMU_Initialise: ERROR call to RA_Alloc failed"));
return PVRSRV_ERROR_FAILED_TO_ALLOC_VIRT_MEMORY;
}
+ /* Munge the local PAddr back into the SysPAddr */
+ sSysPAddr.uiAddr = uiLocalPAddr;
+
/* derive the CPU virtual address */
sCpuPAddr = SysSysPAddrToCpuPAddr(sSysPAddr);
psDevInfo->sBRN31620DummyPTDevPAddr = SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE_SGX, sSysPAddr);
}
#endif /* SUPPORT_PDUMP_MULTI_PROCESS */
/* pdump the PD malloc */
-#if IMG_ADDRSPACE_PHYSADDR_BITS == 32
- PDUMPCOMMENT("Alloc page directory for new MMU context (PDDevPAddr == 0x%08x)",
- sPDDevPAddr.uiAddr);
-#else
- PDUMPCOMMENT("Alloc page directory for new MMU context, 64-bit arch detected (PDDevPAddr == 0x%08x%08x)",
- sPDDevPAddr.uiHighAddr, sPDDevPAddr.uiAddr);
-#endif
+ PDUMPCOMMENT("Alloc page directory for new MMU context (PDDevPAddr == 0x" DEVPADDR_FMT ")", sPDDevPAddr.uiAddr);
PDUMPMALLOCPAGETABLE(&psDeviceNode->sDevId, hPDOSMemHandle, 0, pvPDCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PD_UNIQUETAG);
#endif /* PDUMP */
PDUMPCLEARMMUCONTEXT(PVRSRV_DEVICE_TYPE_SGX, psMMUContext->psDeviceNode->sDevId.pszPDumpDevName, psMMUContext->ui32PDumpMMUContextID, 2);
/* pdump the PD free */
-#if IMG_ADDRSPACE_PHYSADDR_BITS == 32
- PDUMPCOMMENT("Free page directory (PDDevPAddr == 0x%08x)",
+ PDUMPCOMMENT("Free page directory (PDDevPAddr == 0x" DEVPADDR_FMT ")",
psMMUContext->sPDDevPAddr.uiAddr);
-#else
- PDUMPCOMMENT("Free page directory, 64-bit arch detected (PDDevPAddr == 0x%08x%08x)",
- psMMUContext->sPDDevPAddr.uiHighAddr, psMMUContext->sPDDevPAddr.uiAddr);
-#endif
#endif /* PDUMP */
PDUMPFREEPAGETABLE(&psMMUContext->psDeviceNode->sDevId, psMMUContext->hPDOSMemHandle, psMMUContext->pvPDCpuVAddr, SGX_MMU_PAGE_SIZE, 0, PDUMP_PT_UNIQUETAG);
SGX_MMU_PAGE_SIZE,
PVRSRV_HAP_WRITECOMBINE|PVRSRV_HAP_KERNEL_ONLY,
psMMUContext->hPDOSMemHandle);
- /* and free the memory */
- RA_Free (psMMUContext->psDeviceNode->psLocalDevMemArena, sSysPAddr.uiAddr, IMG_FALSE);
+ /* and free the memory, Note that the cast to IMG_UINTPTR_T is ok as we're local mem. */
+ RA_Free (psMMUContext->psDeviceNode->psLocalDevMemArena, (IMG_UINTPTR_T)sSysPAddr.uiAddr, IMG_FALSE);
#if defined(SUPPORT_SGX_MMU_DUMMY_PAGE)
/* if this is the last context free the dummy pages too */
RETURNS:
******************************************************************************/
static IMG_VOID MMU_FreePageTables(IMG_PVOID pvMMUHeap,
- IMG_SIZE_T ui32Start,
- IMG_SIZE_T ui32End,
+ IMG_SIZE_T uStart,
+ IMG_SIZE_T uEnd,
IMG_HANDLE hUniqueTag)
{
MMU_HEAP *pMMUHeap = (MMU_HEAP*)pvMMUHeap;
IMG_DEV_VIRTADDR Start;
- Start.uiAddr = (IMG_UINT32)ui32Start;
+ Start.uiAddr = (IMG_UINT32)uStart;
- MMU_UnmapPagesAndFreePTs(pMMUHeap, Start, (IMG_UINT32)((ui32End - ui32Start) >> pMMUHeap->ui32PTShift), hUniqueTag);
+ MMU_UnmapPagesAndFreePTs(pMMUHeap, Start, (IMG_UINT32)((uEnd - uStart) >> pMMUHeap->ui32PTShift), hUniqueTag);
}
/*!
IMG_BOOL bStatus;
PVR_DPF ((PVR_DBG_MESSAGE,
- "MMU_Alloc: uSize=0x%x, flags=0x%x, align=0x%x",
+ "MMU_Alloc: uSize=0x%" SIZE_T_FMT_LEN "x, flags=0x%x, align=0x%x",
uSize, uFlags, uDevVAddrAlignment));
/*
DevVAddr.uiAddr >> pMMUHeap->ui32PDShift,
ui32Index ));
PVR_DPF((PVR_DBG_ERROR, "MMU_MapPage: Page table entry value: 0x%08X", uTmp));
- PVR_DPF((PVR_DBG_ERROR, "MMU_MapPage: Physical page to map: 0x%08X", DevPAddr.uiAddr));
+
+ PVR_DPF((PVR_DBG_ERROR, "MMU_MapPage: Physical page to map: 0x" DEVPADDR_FMT,
+ DevPAddr.uiAddr));
+
#if PT_DUMP
DumpPT(ppsPTInfoList[0]);
#endif
MakeKernelPageReadWrite(ppsPTInfoList[0]->PTPageCpuVAddr);
/* map in the physical page */
- pui32Tmp[ui32Index] = ((DevPAddr.uiAddr>>SGX_MMU_PTE_ADDR_ALIGNSHIFT)
+ pui32Tmp[ui32Index] = ((IMG_UINT32)(DevPAddr.uiAddr>>SGX_MMU_PTE_ADDR_ALIGNSHIFT)
& ((~pMMUHeap->ui32DataPageMask)>>SGX_MMU_PTE_ADDR_ALIGNSHIFT))
| SGX_MMU_PTE_VALID
| ui32MMUFlags;
DevVAddr.uiAddr += pMMUHeap->ui32DataPageSize;
PVR_DPF ((PVR_DBG_MESSAGE,
- "MMU_MapScatter: devVAddr=%08X, SysAddr=%08X, size=0x%x/0x%x",
+ "MMU_MapScatter: devVAddr=%x, SysAddr=" SYSPADDR_FMT ", size=0x%x/0x%" SIZE_T_FMT_LEN "x",
DevVAddr.uiAddr, sSysAddr.uiAddr, uCount, uSize));
}
PVR_ASSERT (pMMUHeap != IMG_NULL);
- PVR_DPF ((PVR_DBG_MESSAGE, "MMU_MapPages: heap:%s, heap_id:%d devVAddr=%08X, SysPAddr=%08X, size=0x%x",
+ PVR_DPF ((PVR_DBG_MESSAGE, "MMU_MapPages: heap:%s, heap_id:%d devVAddr=%08X, SysPAddr=" SYSPADDR_FMT ", size=0x%" SIZE_T_FMT_LEN "x",
pMMUHeap->psDevArena->pszName,
pMMUHeap->psDevArena->ui32HeapID,
DevVAddr.uiAddr,
PVR_ASSERT (pMMUHeap != IMG_NULL);
- PVR_DPF ((PVR_DBG_MESSAGE, "MMU_MapPagesSparse: heap:%s, heap_id:%d devVAddr=%08X, SysPAddr=%08X, VM space=0x%x, PHYS space=0x%x",
+ PVR_DPF ((PVR_DBG_MESSAGE, "MMU_MapPagesSparse: heap:%s, heap_id:%d devVAddr=%08X, SysPAddr=" SYSPADDR_FMT ", VM space=0x%" SIZE_T_FMT_LEN "x, PHYS space=0x%x",
pMMUHeap->psDevArena->pszName,
pMMUHeap->psDevArena->ui32HeapID,
DevVAddr.uiAddr,
#endif
PVR_DPF ((PVR_DBG_MESSAGE,
- "MMU_MapShadow: DevVAddr:%08X, Bytes:0x%x, CPUVAddr:%08X",
+ "MMU_MapShadow: DevVAddr:%08X, Bytes:0x%" SIZE_T_FMT_LEN "x, CPUVAddr:%p",
MapBaseDevVAddr.uiAddr,
uByteSize,
- (IMG_UINTPTR_T)CpuVAddr));
+ CpuVAddr));
/* set the virtual and physical advance */
ui32VAdvance = pMMUHeap->ui32DataPageSize;
PVR_ASSERT((DevPAddr.uiAddr & pMMUHeap->ui32DataPageMask) == 0);
PVR_DPF ((PVR_DBG_MESSAGE,
- "Offset=0x%x: CpuVAddr=%08X, CpuPAddr=%08X, DevVAddr=%08X, DevPAddr=%08X",
+ "Offset=0x%x: CpuVAddr=%p, CpuPAddr=" CPUPADDR_FMT ", DevVAddr=%08X, DevPAddr=" DEVPADDR_FMT,
uOffset,
- (IMG_UINTPTR_T)CpuVAddr + uOffset,
+ (IMG_PVOID)((IMG_UINTPTR_T)CpuVAddr + uOffset),
CpuPAddr.uiAddr,
MapDevVAddr.uiAddr,
DevPAddr.uiAddr));
#endif
PVR_DPF ((PVR_DBG_MESSAGE,
- "MMU_MapShadowSparse: DevVAddr:%08X, VM space:0x%x, CPUVAddr:%08X PHYS space:0x%x",
+ "MMU_MapShadowSparse: DevVAddr:%08X, VM space:0x%" SIZE_T_FMT_LEN "x, CPUVAddr:%p PHYS space:0x%x",
MapBaseDevVAddr.uiAddr,
uiSizeVM,
- (IMG_UINTPTR_T)CpuVAddr,
+ CpuVAddr,
ui32ChunkSize * ui32NumPhysChunks));
/* set the virtual and physical advance */
PVR_ASSERT((DevPAddr.uiAddr & pMMUHeap->ui32DataPageMask) == 0);
PVR_DPF ((PVR_DBG_MESSAGE,
- "Offset=0x%x: CpuVAddr=%08X, CpuPAddr=%08X, DevVAddr=%08X, DevPAddr=%08X",
+ "Offset=0x%x: CpuVAddr=%p, CpuPAddr=" CPUPADDR_FMT ", DevVAddr=%08X, DevPAddr=" DEVPADDR_FMT,
uOffset,
- (IMG_UINTPTR_T)CpuVAddr + uOffset,
+ (void *)((IMG_UINTPTR_T)CpuVAddr + uOffset),
CpuPAddr.uiAddr,
MapDevVAddr.uiAddr,
DevPAddr.uiAddr));
{
/* non-UMA system */
+ /*
+ We cannot use IMG_SYS_PHYADDR here, as that is 64-bit for 32-bit PAE builds.
+ The physical address in this call to RA_Alloc is specifically the SysPAddr
+ of local (card) space, and it is highly unlikely we would ever need to
+ support > 4GB of local (card) memory (this does assume that such local
+ memory will be mapped into System physical memory space at a low address so
+ that any and all local memory exists within the 4GB SYSPAddr range).
+ */
+ IMG_UINTPTR_T uiLocalPAddr;
+
if(RA_Alloc(psLocalDevMemArena,
3 * SGX_MMU_PAGE_SIZE,
IMG_NULL,
0,
IMG_NULL,
0,
- &(sMemBlockSysPAddr.uiAddr)) != IMG_TRUE)
+ &uiLocalPAddr) != IMG_TRUE)
{
PVR_DPF((PVR_DBG_ERROR, "MMU_BIFResetPDAlloc: ERROR call to RA_Alloc failed"));
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
+ /* Munge the local PAddr back into the SysPAddr */
+ sMemBlockSysPAddr.uiAddr = uiLocalPAddr;
+
/* derive the CPU virtual address */
sMemBlockCpuPAddr = SysSysPAddrToCpuPAddr(sMemBlockSysPAddr);
pui8MemBlock = OSMapPhysToLin(sMemBlockCpuPAddr,
psDevInfo->hBIFResetPDOSMemHandle);
sPDSysPAddr = SysDevPAddrToSysPAddr(PVRSRV_DEVICE_TYPE_SGX, psDevInfo->sBIFResetPDDevPAddr);
- RA_Free(psLocalDevMemArena, sPDSysPAddr.uiAddr, IMG_FALSE);
+ /* Note that the cast to IMG_UINTPTR_T is ok as we're local mem. */
+ RA_Free(psLocalDevMemArena, (IMG_UINTPTR_T)sPDSysPAddr.uiAddr, IMG_FALSE);
}
}
{
IMG_CHAR szScript[128];
- sprintf(szScript, "MALLOC :EXTSYSCACHE:PA_%08X%08X %u %u 0x%08X\r\n", 0, psDevInfo->sExtSysCacheRegsDevPBase.uiAddr, SGX_MMU_PAGE_SIZE, SGX_MMU_PAGE_SIZE, psDevInfo->sExtSysCacheRegsDevPBase.uiAddr);
+ sprintf(szScript, "MALLOC :EXTSYSCACHE:PA_%08X%08X %u %u 0x%p\r\n", 0, psDevInfo->sExtSysCacheRegsDevPBase.uiAddr, SGX_MMU_PAGE_SIZE, SGX_MMU_PAGE_SIZE, psDevInfo->sExtSysCacheRegsDevPBase.uiAddr);
PDumpOSWriteString2(szScript, PDUMP_FLAGS_CONTINUOUS);
}
#endif
eErr = PDumpOSBufprintf(hScript,
ui32MaxLenScript,
- "WRW :%s:PA_%08X%08X:0x%08X :%s:PA_%08X%08X:0x%08X\r\n",
+ "WRW :%s:PA_%p%p:0x%08X :%s:PA_%p%08X:0x%08X\r\n",
sMMUAttrib.sDevId.pszPDumpDevName,
- (IMG_UINT32)(IMG_UINTPTR_T)PDUMP_PT_UNIQUETAG,
- (sDevPAddr.uiAddr) & ~ui32PageMask,
+ PDUMP_PT_UNIQUETAG,
+ (IMG_PVOID)((sDevPAddr.uiAddr) & ~ui32PageMask),
(sDevPAddr.uiAddr) & ui32PageMask,
"EXTSYSCACHE",
- (IMG_UINT32)(IMG_UINTPTR_T)PDUMP_PD_UNIQUETAG,
+ PDUMP_PD_UNIQUETAG,
(ui32PTE & sMMUAttrib.ui32PDEMask) << sMMUAttrib.ui32PTEAlignShift,
ui32PTE & ~sMMUAttrib.ui32PDEMask);
if(eErr != PVRSRV_OK)
if (ui32WriteData != ui32ReadData)
{
// Mem fault
- PVR_DPF ((PVR_DBG_ERROR, "Error - memory page test failed at device phys address 0x%08X", sDevPAddr.uiAddr + (n<<2) ));
+ PVR_DPF ((PVR_DBG_ERROR, "Error - memory page test failed at device phys address 0x" DEVPADDR_FMT, sDevPAddr.uiAddr + (n<<2) ));
PVR_DBG_BREAK;
bOK = IMG_FALSE;
}
if (ui32WriteData != ui32ReadData)
{
// Mem fault
- PVR_DPF ((PVR_DBG_ERROR, "Error - memory page test failed at device phys address 0x%08X", sDevPAddr.uiAddr + (n<<2) ));
+ PVR_DPF ((PVR_DBG_ERROR, "Error - memory page test failed at device phys address 0x" DEVPADDR_FMT, sDevPAddr.uiAddr + (n<<2)));
PVR_DBG_BREAK;
bOK = IMG_FALSE;
}
if (bOK)
{
- PVR_DPF ((PVR_DBG_VERBOSE, "MMU Page 0x%08X is OK", sDevPAddr.uiAddr));
+ PVR_DPF ((PVR_DBG_VERBOSE, "MMU Page 0x" DEVPADDR_FMT " is OK", sDevPAddr.uiAddr));
}
else
{
- PVR_DPF ((PVR_DBG_VERBOSE, "MMU Page 0x%08X *** FAILED ***", sDevPAddr.uiAddr));
+ PVR_DPF ((PVR_DBG_VERBOSE, "MMU Page 0x" DEVPADDR_FMT " *** FAILED ***", sDevPAddr.uiAddr));
}
}
#endif
#endif
IMG_IMPORT
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK_KM *psKick);
-#else
PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK *psKick);
-#endif
#if defined(SGX_FEATURE_2D_HARDWARE)
IMG_IMPORT
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK_KM *psKick);
-#else
PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK *psKick);
#endif
-#endif
IMG_IMPORT
PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle,
-#if defined (SUPPORT_SID_INTERFACE)
- SGX_CCB_KICK_KM *psCCBKick);
-#else
SGX_CCB_KICK *psCCBKick);
-#endif
IMG_IMPORT
PVRSRV_ERROR SGXGetPhysPageAddrKM(IMG_HANDLE hDevMemHeap,
IMG_IMPORT
PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle,
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_HEAP_INFO_KM *pasHeapInfo,
- IMG_DEV_PHYADDR *psPDDevPAddr);
-#else
SGX_BRIDGE_INFO_FOR_SRVINIT *psInitInfo);
-#endif
IMG_IMPORT
PVRSRV_ERROR DevInitSGXPart2KM(PVRSRV_PER_PROCESS_DATA *psPerProc,
IMG_HANDLE hDevHandle,
-#if defined (SUPPORT_SID_INTERFACE)
- SGX_BRIDGE_INIT_INFO_KM *psInitInfo);
-#else
SGX_BRIDGE_INIT_INFO *psInitInfo);
-#endif
/*!
* *****************************************************************************
********************************************************************************/
IMG_IMPORT PVRSRV_ERROR
SGXGetInternalDevInfoKM(IMG_HANDLE hDevCookie,
-#if defined (SUPPORT_SID_INTERFACE)
- SGX_INTERNAL_DEVINFO_KM *psSGXInternalDevInfo);
-#else
SGX_INTERNAL_DEVINFO *psSGXInternalDevInfo);
-#endif
#if defined (__cplusplus)
}
#define SGX_KERNEL_DATA_HEAP_OFFSET 0x00000000
#endif
-#if !defined(ION_HEAP_SIZE) && defined(SUPPORT_ION)
- /* Default the Ion heap to 16MB */
- #define ION_HEAP_SIZE 0x01000000
-#else
- #define ION_HEAP_SIZE 0
-#endif
-
#if SGX_FEATURE_ADDRESS_SPACE_SIZE == 32
#if defined(FIX_HW_BRN_31620)
* For hybrid PB we have to split virtual PB range between the shared
* PB and percontext PB due to the fact we only have one heap config
* per device.
- * If hybrid PB is enabled we split the space acording to HYBRID_SHARED_PB_SIZE.
+ * If hybrid PB is enabled we split the space according to HYBRID_SHARED_PB_SIZE.
* i.e. HYBRID_SHARED_PB_SIZE defines the size of the shared PB and the
* remainder is the size of the percontext PB.
* If hybrid PB is not enabled then we still create both heaps (helps keep
#endif
#define SGX_SHARED_3DPARAMETERS_HEAP_BASE 0xC0000000
- /* Size is defiend above */
+ /* Size is defined above */
#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_BASE (SGX_SHARED_3DPARAMETERS_HEAP_BASE + SGX_SHARED_3DPARAMETERS_SIZE)
- /* Size is defiend above */
+ /* Size is defined above */
#define SGX_TADATA_HEAP_BASE 0xD0000000
#define SGX_TADATA_HEAP_SIZE (0x0D000000-0x00001000)
#endif
#if !defined(SUPPORT_MEMORY_TILING)
- #if defined (SUPPORT_ION)
- #define SGX_GENERAL_HEAP_BASE 0x10000000
- #define SGX_GENERAL_HEAP_SIZE (0xC2000000-ION_HEAP_SIZE-0x00001000)
-
- #define SGX_ION_HEAP_BASE (SGX_GENERAL_HEAP_BASE+SGX_GENERAL_HEAP_SIZE+0x00001000)
- #define SGX_ION_HEAP_SIZE (ION_HEAP_SIZE-0x00001000)
- #else
- #define SGX_GENERAL_HEAP_BASE 0x10000000
- #define SGX_GENERAL_HEAP_SIZE (0xC2000000-0x00001000)
- #endif
+ #define SGX_GENERAL_HEAP_BASE 0x10000000
+ #define SGX_GENERAL_HEAP_SIZE (0xC2000000-0x00001000)
#else
#include <sgx_msvdx_defs.h>
/* Create heaps with memory tiling enabled.
* For hybrid PB we have to split virtual PB range between the shared
* PB and percontext PB due to the fact we only have one heap config
* per device.
- * If hybrid PB is enabled we split the space acording to HYBRID_SHARED_PB_SIZE.
+ * If hybrid PB is enabled we split the space according to HYBRID_SHARED_PB_SIZE.
* i.e. HYBRID_SHARED_PB_SIZE defines the size of the shared PB and the
* remainder is the size of the percontext PB.
* If hybrid PB is not enabled then we still create both heaps (helps keep
#endif
#define SGX_SHARED_3DPARAMETERS_HEAP_BASE 0xD2000000
- /* Size is defiend above */
+ /* Size is defined above */
#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_BASE (SGX_SHARED_3DPARAMETERS_HEAP_BASE + SGX_SHARED_3DPARAMETERS_SIZE)
- /* Size is defiend above */
+ /* Size is defined above */
#define SGX_TADATA_HEAP_BASE 0xE2000000
#define SGX_TADATA_HEAP_SIZE (0x0D000000-0x00001000)
#define SGX_GENERAL_MAPPING_HEAP_SIZE (0x01800000-0x00001000-0x00001000)
#define SGX_GENERAL_HEAP_BASE 0x01800000
- #define SGX_GENERAL_HEAP_SIZE (0x07000000-ION_HEAP_SIZE-0x00001000)
+ #define SGX_GENERAL_HEAP_SIZE (0x07000000-0x00001000)
#else
#define SGX_GENERAL_HEAP_BASE 0x00001000
#if defined(SUPPORT_LARGE_GENERAL_HEAP)
- #define SGX_GENERAL_HEAP_SIZE (0x0B800000-ION_HEAP_SIZE-0x00001000-0x00001000)
+ #define SGX_GENERAL_HEAP_SIZE (0x0B800000-0x00001000-0x00001000)
#else
- #define SGX_GENERAL_HEAP_SIZE (0x08800000-ION_HEAP_SIZE-0x00001000-0x00001000)
+ #define SGX_GENERAL_HEAP_SIZE (0x08800000-0x00001000-0x00001000)
#endif
#endif
-#if defined(SUPPORT_ION)
- #define SGX_ION_HEAP_BASE (SGX_GENERAL_HEAP_BASE+SGX_GENERAL_HEAP_SIZE+0x00001000)
- #define SGX_ION_HEAP_SIZE (ION_HEAP_SIZE-0x00001000)
-#endif
/*
* For hybrid PB we have to split virtual PB range between the shared
* PB and percontext PB due to the fact we only have one heap config
* per device.
- * If hybrid PB is enabled we split the space acording to HYBRID_SHARED_PB_SIZE.
+ * If hybrid PB is enabled we split the space according to HYBRID_SHARED_PB_SIZE.
* i.e. HYBRID_SHARED_PB_SIZE defines the size of the shared PB and the
* remainder is the size of the percontext PB.
* If hybrid PB is not enabled then we still create both heaps (helps keep
#error "sgxconfig.h: ERROR: SGX_VPB_TILED_HEAP overlaps SGX_3DPARAMETERS_HEAP"
#endif
#else
- #if defined(SUPPORT_ION)
- #if ((SGX_ION_HEAP_BASE + SGX_ION_HEAP_SIZE) >= SGX_SHARED_3DPARAMETERS_HEAP_BASE)
- #error "sgxconfig.h: ERROR: SGX_ION_HEAP overlaps SGX_3DPARAMETERS_HEAP"
- #endif
- #endif
#if ((SGX_GENERAL_HEAP_BASE + SGX_GENERAL_HEAP_SIZE) >= SGX_SHARED_3DPARAMETERS_HEAP_BASE)
#error "sgxconfig.h: ERROR: SGX_GENERAL_HEAP overlaps SGX_3DPARAMETERS_HEAP"
#endif
PPVRSRV_KERNEL_MEM_INFO psKernelHWPerfCBMemInfo; /*!< Meminfo for hardware performace circular buffer */
PPVRSRV_KERNEL_MEM_INFO psKernelTASigBufferMemInfo; /*!< Meminfo for TA signature buffer */
PPVRSRV_KERNEL_MEM_INFO psKernel3DSigBufferMemInfo; /*!< Meminfo for 3D signature buffer */
-#if defined(FIX_HW_BRN_29702)
- PPVRSRV_KERNEL_MEM_INFO psKernelCFIMemInfo; /*!< Meminfo for cfi */
-#endif
-#if defined(FIX_HW_BRN_29823)
- PPVRSRV_KERNEL_MEM_INFO psKernelDummyTermStreamMemInfo; /*!< Meminfo for dummy terminate stream */
-#endif
-#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31559)
- PPVRSRV_KERNEL_MEM_INFO psKernelVDMSnapShotBufferMemInfo; /*!< Meminfo for dummy snapshot buffer */
- PPVRSRV_KERNEL_MEM_INFO psKernelVDMCtrlStreamBufferMemInfo; /*!< Meminfo for dummy control stream */
-#endif
#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && \
defined(FIX_HW_BRN_33657) && defined(SUPPORT_SECURE_33657_FIX)
PPVRSRV_KERNEL_MEM_INFO psKernelVDMStateUpdateBufferMemInfo; /*!< Meminfo for state update buffer */
IMG_HANDLE hKernelTASigBufferMemInfo;
IMG_HANDLE hKernel3DSigBufferMemInfo;
-#if defined(FIX_HW_BRN_29702)
- IMG_HANDLE hKernelCFIMemInfo;
-#endif
-#if defined(FIX_HW_BRN_29823)
- IMG_HANDLE hKernelDummyTermStreamMemInfo;
-#endif
#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
IMG_HANDLE hKernelEDMStatusBufferMemInfo;
#endif
#include "srvkm.h"
#include "ttrace.h"
+IMG_UINT32 g_ui32HostIRQCountSample = 0;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(3,7,0))
+#include <soc.h>
+#endif
+
#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
static const IMG_CHAR *SGXUKernelStatusString(IMG_UINT32 code)
******************************************************************************/
static PVRSRV_ERROR InitDevInfo(PVRSRV_PER_PROCESS_DATA *psPerProc,
PVRSRV_DEVICE_NODE *psDeviceNode,
-#if defined (SUPPORT_SID_INTERFACE)
- SGX_BRIDGE_INIT_INFO_KM *psInitInfo)
-#else
SGX_BRIDGE_INIT_INFO *psInitInfo)
-#endif
{
PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice;
PVRSRV_ERROR eError;
#endif
psDevInfo->psKernelTASigBufferMemInfo = psInitInfo->hKernelTASigBufferMemInfo;
psDevInfo->psKernel3DSigBufferMemInfo = psInitInfo->hKernel3DSigBufferMemInfo;
-#if defined(FIX_HW_BRN_29702)
- psDevInfo->psKernelCFIMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelCFIMemInfo;
-#endif
-#if defined(FIX_HW_BRN_29823)
- psDevInfo->psKernelDummyTermStreamMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelDummyTermStreamMemInfo;
-#endif
-#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31559)
- psDevInfo->psKernelVDMSnapShotBufferMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelVDMSnapShotBufferMemInfo;
- psDevInfo->psKernelVDMCtrlStreamBufferMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelVDMCtrlStreamBufferMemInfo;
-#endif
#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && \
defined(FIX_HW_BRN_33657) && defined(SUPPORT_SECURE_33657_FIX)
psDevInfo->psKernelVDMStateUpdateBufferMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelVDMStateUpdateBufferMemInfo;
static PVRSRV_ERROR SGXRunScript(PVRSRV_SGXDEV_INFO *psDevInfo, SGX_INIT_COMMAND *psScript, IMG_UINT32 ui32NumInitCommands)
{
- IMG_UINT32 ui32PC;
+ IMG_UINT32 ui32PC, ui32RegVal;
SGX_INIT_COMMAND *psComm;
for (ui32PC = 0, psComm = psScript;
#endif
break;
}
+ case SGX_INIT_OP_PRINT_HW_REG:
+ {
+ ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, psComm->sReadHWReg.ui32Offset);
+ PVR_LOG((" (SGXREG) 0x%08X : 0x%08X", psComm->sReadHWReg.ui32Offset, ui32RegVal));
+
+ break;
+ }
+
#if defined(PDUMP)
case SGX_INIT_OP_PDUMP_HW_REG:
{
return eError;
}
PDUMPCOMMENTWITHFLAGS(PDUMP_FLAGS_CONTINUOUS, "End of SGX initialisation script part 2\n");
- if(!(cpu_is_omap3530() || cpu_is_omap3517()))
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0))
+ if(!(cpu_is_omap3530() || cpu_is_omap3517()))
+#else
+ if(!(cpu_is_omap3430() || soc_is_am35xx()))
+#endif
{
OSWriteHWReg(psDevInfo->pvRegsBaseKM, 0xFF08, 0x80000000);//OCP Bypass mode
}
+
/* Record the system timestamp for the microkernel */
psSGXHostCtl->ui32HostClock = OSClockus();
******************************************************************************/
IMG_EXPORT
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle, PVRSRV_HEAP_INFO_KM *pasHeapInfo, IMG_DEV_PHYADDR *psPDDevPAddr)
-#else
PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle, SGX_BRIDGE_INFO_FOR_SRVINIT *psInitInfo)
-#endif
{
PVRSRV_DEVICE_NODE *psDeviceNode;
PVRSRV_SGXDEV_INFO *psDevInfo;
psDeviceNode = (PVRSRV_DEVICE_NODE *)hDevHandle;
psDevInfo = (PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice;
-#if defined (SUPPORT_SID_INTERFACE)
- *psPDDevPAddr = psDevInfo->sKernelPDDevPAddr;
-
- eError = PVRSRVGetDeviceMemHeapsKM(hDevHandle, pasHeapInfo);
-#else
psInitInfo->sPDDevPAddr = psDevInfo->sKernelPDDevPAddr;
eError = PVRSRVGetDeviceMemHeapsKM(hDevHandle, &psInitInfo->asHeapInfo[0]);
-#endif
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SGXGetInfoForSrvinit: PVRSRVGetDeviceMemHeapsKM failed (%d)", eError));
IMG_EXPORT
PVRSRV_ERROR DevInitSGXPart2KM (PVRSRV_PER_PROCESS_DATA *psPerProc,
IMG_HANDLE hDevHandle,
-#if defined (SUPPORT_SID_INTERFACE)
- SGX_BRIDGE_INIT_INFO_KM *psInitInfo)
-#else
SGX_BRIDGE_INIT_INFO *psInitInfo)
-#endif
{
PVRSRV_DEVICE_NODE *psDeviceNode;
PVRSRV_SGXDEV_INFO *psDevInfo;
PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO*)psDeviceNode->pvDevice;
PVRSRV_ERROR eError;
IMG_UINT32 ui32Heap;
+ IMG_UINT32 ui32Count;
DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
SGX_DEVICE_MAP *psSGXDeviceMap;
}
}
#endif /* #ifdef SGX_FEATURE_HOST_PORT */
-
-
+
+ /* Deallocate KM mem allocated for debug script commands */
+ for (ui32Count = 0; ui32Count < SGX_FEATURE_MP_CORE_COUNT_3D; ui32Count++)
+ {
+ if(psDevInfo->sScripts.apsSGXREGDebugCommandsPart2[ui32Count])
+ {
+ OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
+ SGX_MAX_PRINT_COMMANDS * sizeof(SGX_INIT_COMMAND),
+ psDevInfo->sScripts.apsSGXREGDebugCommandsPart2[ui32Count],
+ 0);
+ }
+ }
+
/* DeAllocate devinfo */
OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
sizeof(PVRSRV_SGXDEV_INFO),
}
-#if defined(RESTRICTED_REGISTERS) && defined(SGX_FEATURE_MP)
-
-/*!
-*******************************************************************************
-
- @Function SGXDumpMasterDebugReg
-
- @Description
-
- Dump a single SGX debug register value
-
- @Input psDevInfo - SGX device info
- @Input pszName - string used for logging
- @Input ui32RegAddr - SGX register offset
-
- @Return IMG_VOID
-
-******************************************************************************/
-static IMG_VOID SGXDumpMasterDebugReg (PVRSRV_SGXDEV_INFO *psDevInfo,
- IMG_CHAR *pszName,
- IMG_UINT32 ui32RegAddr)
-{
- IMG_UINT32 ui32RegVal;
- ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, ui32RegAddr);
- PVR_LOG(("(HYD) %s%08X", pszName, ui32RegVal));
-}
-
-#endif /* defined(RESTRICTED_REGISTERS) */
-
/*!
*******************************************************************************
if (bDumpSGXRegs)
{
- PVR_DPF((PVR_DBG_ERROR,"SGX Register Base Address (Linear): 0x%08X", (IMG_UINTPTR_T)psDevInfo->pvRegsBaseKM));
- PVR_DPF((PVR_DBG_ERROR,"SGX Register Base Address (Physical): 0x%08X", psDevInfo->sRegsPhysBase.uiAddr));
+ PVR_DPF((PVR_DBG_ERROR,"SGX Register Base Address (Linear): 0x%p", psDevInfo->pvRegsBaseKM));
+ PVR_DPF((PVR_DBG_ERROR,"SGX Register Base Address (Physical): 0x" SYSPADDR_FMT, psDevInfo->sRegsPhysBase.uiAddr));
SGXDumpDebugReg(psDevInfo, 0, "EUR_CR_CORE_ID: ", EUR_CR_CORE_ID);
SGXDumpDebugReg(psDevInfo, 0, "EUR_CR_CORE_REVISION: ", EUR_CR_CORE_REVISION);
-#if defined(RESTRICTED_REGISTERS) && defined(SGX_FEATURE_MP)
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_BIF_INT_STAT: ", EUR_CR_MASTER_BIF_INT_STAT);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_BIF_FAULT: ",EUR_CR_MASTER_BIF_FAULT);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_CLKGATESTATUS2: ",EUR_CR_MASTER_CLKGATESTATUS2 );
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_VDM_PIM_STATUS: ",EUR_CR_MASTER_VDM_PIM_STATUS);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_BIF_BANK_SET: ",EUR_CR_MASTER_BIF_BANK_SET);
-
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_EVENT_STATUS: ",EUR_CR_MASTER_EVENT_STATUS);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_EVENT_STATUS2: ",EUR_CR_MASTER_EVENT_STATUS2);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_MP_PRIMITIVE: ",EUR_CR_MASTER_MP_PRIMITIVE);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_DPM_DPLIST_STATUS: ",EUR_CR_MASTER_DPM_DPLIST_STATUS);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC: ",EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_PAGE_MANAGEOP: ",EUR_CR_MASTER_DPM_PAGE_MANAGEOP);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_VDM_CONTEXT_STORE_SNAPSHOT: ",EUR_CR_MASTER_VDM_CONTEXT_STORE_SNAPSHOT);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_VDM_CONTEXT_LOAD_STATUS: ",EUR_CR_MASTER_VDM_CONTEXT_LOAD_STATUS);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_VDM_CONTEXT_STORE_STREAM: ",EUR_CR_MASTER_VDM_CONTEXT_STORE_STREAM);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_VDM_CONTEXT_STORE_STATUS: ",EUR_CR_MASTER_VDM_CONTEXT_STORE_STATUS);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_VDM_CONTEXT_STORE_STATE0: ",EUR_CR_MASTER_VDM_CONTEXT_STORE_STATE0);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_VDM_CONTEXT_STORE_STATE1: ",EUR_CR_MASTER_VDM_CONTEXT_STORE_STATE1);
- SGXDumpMasterDebugReg(psDevInfo, "EUR_CR_MASTER_VDM_WAIT_FOR_KICK: ",EUR_CR_MASTER_VDM_WAIT_FOR_KICK);
-#endif
for (ui32CoreNum = 0; ui32CoreNum < SGX_FEATURE_MP_CORE_COUNT_3D; ui32CoreNum++)
{
/* Dump HW event status */
#if defined(EUR_CR_PDS_PC_BASE)
SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_PDS_PC_BASE: ", EUR_CR_PDS_PC_BASE);
#endif
-#if defined(RESTRICTED_REGISTERS)
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_BIF_BANK_SET: ", EUR_CR_BIF_BANK_SET);
-
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_CLKGATECTL: ", EUR_CR_CLKGATECTL);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_CLKGATESTATUS: ", EUR_CR_CLKGATESTATUS);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_MTE_CTRL: ", EUR_CR_MTE_CTRL);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_EVENT_OTHER_PDS_EXEC: ", EUR_CR_EVENT_OTHER_PDS_EXEC);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_EVENT_OTHER_PDS_DATA: ", EUR_CR_EVENT_OTHER_PDS_DATA);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_EVENT_OTHER_PDS_INFO: ", EUR_CR_EVENT_OTHER_PDS_INFO);
-
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_ZLS_PAGE_THRESHOLD: ", EUR_CR_DPM_ZLS_PAGE_THRESHOLD);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_TA_GLOBAL_LIST: ", EUR_CR_DPM_TA_GLOBAL_LIST);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_STATE_CONTEXT_ID: ", EUR_CR_DPM_STATE_CONTEXT_ID);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_CONTEXT_PB_BASE: ", EUR_CR_DPM_CONTEXT_PB_BASE);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_TA_ALLOC_FREE_LIST_STATUS1: ", EUR_CR_DPM_TA_ALLOC_FREE_LIST_STATUS1);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_3D_FREE_LIST_STATUS1: ", EUR_CR_DPM_3D_FREE_LIST_STATUS1);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_TA_ALLOC_FREE_LIST_STATUS2: ", EUR_CR_DPM_TA_ALLOC_FREE_LIST_STATUS2);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_3D_FREE_LIST_STATUS2: ", EUR_CR_DPM_3D_FREE_LIST_STATUS2);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_ABORT_STATUS_MTILE: ", EUR_CR_DPM_ABORT_STATUS_MTILE);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_PAGE_STATUS: ", EUR_CR_DPM_PAGE_STATUS);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_PAGE: ", EUR_CR_DPM_PAGE);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_GLOBAL_PAGE_STATUS: ", EUR_CR_DPM_GLOBAL_PAGE_STATUS);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_VDM_CONTEXT_LOAD_STATUS: ", EUR_CR_VDM_CONTEXT_LOAD_STATUS);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_VDM_CONTEXT_STORE_STATUS: ", EUR_CR_VDM_CONTEXT_STORE_STATUS);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_VDM_TASK_KICK_STATUS: ", EUR_CR_VDM_TASK_KICK_STATUS);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_VDM_CONTEXT_STORE_STATE0: ", EUR_CR_VDM_CONTEXT_STORE_STATE0);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_VDM_CONTEXT_STORE_STATE1: ", EUR_CR_VDM_CONTEXT_STORE_STATE1);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_REQUESTING: ", EUR_CR_DPM_REQUESTING);
- SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_DPM_REQUESTING: ", EUR_CR_DPM_REQUESTING);
-
-#endif
}
#if !defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS) && !defined(FIX_HW_BRN_31620)
SGXMKIF_HOST_CTL *psSGXHostCtl = psDevInfo->psSGXHostCtl;
IMG_UINT32 *pui32HostCtlBuffer = (IMG_UINT32 *)psSGXHostCtl;
IMG_UINT32 ui32LoopCounter;
-
+
+ /* Report which defines are enabled that affect the HostCTL structure being dumped-out here */
+ {
+ IMG_UINT32 ui32CtlFlags = 0;
+ #if defined(PVRSRV_USSE_EDM_BREAKPOINTS)
+ ui32CtlFlags = ui32CtlFlags | 0x0001;
+ #endif
+ #if defined(FIX_HW_BRN_28889)
+ ui32CtlFlags = ui32CtlFlags | 0x0002;
+ #endif
+ #if defined(SUPPORT_HW_RECOVERY)
+ ui32CtlFlags = ui32CtlFlags | 0x0004;
+ #endif
+ #if defined(SGX_FEATURE_EXTENDED_PERF_COUNTERS)
+ ui32CtlFlags = ui32CtlFlags | 0x0008;
+ #endif
+ PVR_LOG((" Host Ctl flags= %08x", ui32CtlFlags));
+ }
+
if (psSGXHostCtl->ui32AssertFail != 0)
{
PVR_LOG(("SGX Microkernel assert fail: 0x%08X", psSGXHostCtl->ui32AssertFail));
ui32LoopCounter < sizeof(*psDevInfo->psSGXHostCtl) / sizeof(*pui32HostCtlBuffer);
ui32LoopCounter += 4)
{
- PVR_LOG(("\t(HC-%X) 0x%08X 0x%08X 0x%08X 0x%08X", ui32LoopCounter * sizeof(*pui32HostCtlBuffer),
+ PVR_LOG(("\t(HC-%" SIZE_T_FMT_LEN "X) 0x%08X 0x%08X 0x%08X 0x%08X",
+ ui32LoopCounter * sizeof(*pui32HostCtlBuffer),
pui32HostCtlBuffer[ui32LoopCounter + 0], pui32HostCtlBuffer[ui32LoopCounter + 1],
pui32HostCtlBuffer[ui32LoopCounter + 2], pui32HostCtlBuffer[ui32LoopCounter + 3]));
}
ui32LoopCounter < psDevInfo->psKernelSGXTA3DCtlMemInfo->uAllocSize / sizeof(*pui32TA3DCtlBuffer);
ui32LoopCounter += 4)
{
- PVR_LOG(("\t(T3C-%X) 0x%08X 0x%08X 0x%08X 0x%08X", ui32LoopCounter * sizeof(*pui32TA3DCtlBuffer),
+ PVR_LOG(("\t(T3C-%" SIZE_T_FMT_LEN "X) 0x%08X 0x%08X 0x%08X 0x%08X",
+ ui32LoopCounter * sizeof(*pui32TA3DCtlBuffer),
pui32TA3DCtlBuffer[ui32LoopCounter + 0], pui32TA3DCtlBuffer[ui32LoopCounter + 1],
pui32TA3DCtlBuffer[ui32LoopCounter + 2], pui32TA3DCtlBuffer[ui32LoopCounter + 3]));
}
IMG_UINT32 ui32CallerID)
{
PVRSRV_ERROR eError;
+ IMG_UINT32 ui32Count;
PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO*)psDeviceNode->pvDevice;
SGXMKIF_HOST_CTL *psSGXHostCtl = (SGXMKIF_HOST_CTL *)psDevInfo->psSGXHostCtl;
psSGXHostCtl->ui32InterruptClearFlags |= PVRSRV_USSE_EDM_INTERRUPT_HWR;
PVR_LOG(("HWRecoveryResetSGX: SGX Hardware Recovery triggered"));
+
+ /* Run SGXREGDebug scripts */
+#if defined(SGX_FEATURE_MP)
+ PVR_LOG(("(HYD)"));
+ eError = SGXRunScript(psDevInfo, psDevInfo->sScripts.asSGXREGDebugCommandsPart1, SGX_MAX_PRINT_COMMANDS);
+ if (eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"HWRecoveryResetSGX: SGXREGDebugCommandsPart1 SGXRunScript failed (%d)", eError));
+ }
+#endif
+
+ for (ui32Count = 0; ui32Count < SGX_FEATURE_MP_CORE_COUNT_3D; ui32Count++)
+ {
+ PVR_LOG(("(P%u)",ui32Count));
+ eError = SGXRunScript(psDevInfo, psDevInfo->sScripts.apsSGXREGDebugCommandsPart2[ui32Count], SGX_MAX_PRINT_COMMANDS);
+ if (eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"HWRecoveryResetSGX: SGXREGDebugCommandsPart2 SGXRunScript failed (%d)", eError));
+ }
+ }
+ /* Scripts end */
#if defined(SUPPORT_HWRECOVERY_TRACE_LIMIT)
/*
/* clear the events */
OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR, ui32EventClear);
OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR2, ui32EventClear2);
+
+ /*
+ Sample the current count from the uKernel _after_ we've cleared the
+ interrupt.
+ */
+ g_ui32HostIRQCountSample = psDevInfo->psSGXHostCtl->ui32InterruptCount;
}
}
psDeviceMemoryHeap++;/* advance to the next heap */
#endif
-#if defined(SUPPORT_ION)
- /************* Ion Heap ***************/
- psDeviceMemoryHeap->ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_ION_HEAP_ID);
- psDeviceMemoryHeap->sDevVAddrBase.uiAddr = SGX_ION_HEAP_BASE;
- psDeviceMemoryHeap->ui32HeapSize = SGX_ION_HEAP_SIZE;
- psDeviceMemoryHeap->ui32Attribs = PVRSRV_HAP_WRITECOMBINE
- | PVRSRV_HAP_SINGLE_PROCESS;
- psDeviceMemoryHeap->pszName = "Ion";
- psDeviceMemoryHeap->pszBSName = "Ion BS";
- psDeviceMemoryHeap->DevMemHeapType = DEVICE_MEMORY_HEAP_PERCONTEXT;
- /* specify the ion heap ID for this device */
- psDevMemoryInfo->ui32IonHeapID = SGX_ION_HEAP_ID;
- /* set the default (4k). System can override these as required */
- psDeviceMemoryHeap->ui32DataPageSize = SGX_MMU_PAGE_SIZE;
- psDeviceMemoryHeap++;/* advance to the next heap */
-#endif
-
/************* TA data ***************/
psDeviceMemoryHeap->ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_TADATA_HEAP_ID);
psDeviceMemoryHeap->sDevVAddrBase.uiAddr = SGX_TADATA_HEAP_BASE;
psSGXFeatures = &((PVRSRV_SGX_MISCINFO_INFO*)(psMemInfo->pvLinAddrKM))->sSGXFeatures;
if( (psSGXFeatures->ui32DDKVersion !=
((PVRVERSION_MAJ << 16) |
- (PVRVERSION_MIN << 8) |
- PVRVERSION_BRANCH) ) ||
+ (PVRVERSION_MIN << 8))) ||
(psSGXFeatures->ui32DDKBuild != PVRVERSION_BUILD) )
{
PVR_LOG(("(FAIL) SGXInit: Incompatible driver DDK revision (%d)/device DDK revision (%d).",
return PVRSRV_OK;
}
+ case SGX_MISC_INFO_REQUEST_CLOCKSPEED_SLCSIZE:
+ {
+ psMiscInfo->uData.sQueryClockSpeedSLCSize.ui32SGXClockSpeed = SYS_SGX_CLOCK_SPEED;
+#if defined(SGX_FEATURE_SYSTEM_CACHE) && defined(SYS_SGX_SLC_SIZE)
+ psMiscInfo->uData.sQueryClockSpeedSLCSize.ui32SGXSLCSize = SYS_SGX_SLC_SIZE;
+#else
+ psMiscInfo->uData.sQueryClockSpeedSLCSize.ui32SGXSLCSize = 0;
+#endif /* defined(SGX_FEATURE_SYSTEM_CACHE) && defined(SYS_SGX_SLC_SIZE) */
+ return PVRSRV_OK;
+ }
+
case SGX_MISC_INFO_REQUEST_ACTIVEPOWER:
{
psMiscInfo->uData.sActivePower.ui32NumActivePowerEvents = psDevInfo->psSGXHostCtl->ui32NumActivePowerEvents;
psSGXFeatures->ui32DDKVersion =
(PVRVERSION_MAJ << 16) |
- (PVRVERSION_MIN << 8) |
- PVRVERSION_BRANCH;
+ (PVRVERSION_MIN << 8);
psSGXFeatures->ui32DDKBuild = PVRVERSION_BUILD;
/* Also report the kernel module build options -- used in SGXConnectionCheck() */
psSGXFeatures->ui32BuildOptions = (SGX_BUILD_OPTIONS);
-#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
- /* Report the EDM status buffer location in memory */
- psSGXFeatures->sDevVAEDMStatusBuffer = psDevInfo->psKernelEDMStatusBufferMemInfo->sDevVAddr;
- psSGXFeatures->pvEDMStatusBuffer = psDevInfo->psKernelEDMStatusBufferMemInfo->pvLinAddrKM;
-#endif
-
/* Copy SGX features into misc info struct, to return to client */
psMiscInfo->uData.sSGXFeatures = *psSGXFeatures;
return PVRSRV_OK;
}
+#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
+ case SGX_MISC_INFO_REQUEST_EDM_STATUS_BUFFER_INFO:
+ {
+ /* Report the EDM status buffer location in memory */
+ psMiscInfo->uData.sEDMStatusBufferInfo.sDevVAEDMStatusBuffer = psDevInfo->psKernelEDMStatusBufferMemInfo->sDevVAddr;
+ psMiscInfo->uData.sEDMStatusBufferInfo.pvEDMStatusBuffer = psDevInfo->psKernelEDMStatusBufferMemInfo->pvLinAddrKM;
+ return PVRSRV_OK;
+ }
+#endif
+
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
case SGX_MISC_INFO_REQUEST_MEMREAD:
case SGX_MISC_INFO_REQUEST_MEMCOPY:
case SGX_MISC_INFO_DUMP_DEBUG_INFO_FORCE_REGS:
{
+ if(!OSProcHasPrivSrvInit())
+ {
+ PVR_DPF((PVR_DBG_ERROR, "Insufficient privileges to dump SGX "
+ "debug info with registers"));
+
+ return PVRSRV_ERROR_INVALID_MISCINFO;
+ }
+
PVR_LOG(("User requested SGX debug info"));
/* Dump SGX debug data to the kernel log. */
#include "sgxutils.h"
#include "ttrace.h"
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+#include "pvr_sync.h"
+#endif
+
/*!
******************************************************************************
******************************************************************************/
IMG_EXPORT
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK_KM *psCCBKick)
-#else
PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
-#endif
{
PVRSRV_ERROR eError;
PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
}
#else /* SUPPORT_SGX_GENERALISED_SYNCOBJECTS */
/* texture dependencies */
- psTACmd->ui32NumSrcSyncs = psCCBKick->ui32NumSrcSyncs;
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ eError = PVRSyncPatchCCBKickSyncInfos(psCCBKick->ahSrcKernelSyncInfo,
+ psTACmd->asSrcSyncs,
+ &psCCBKick->ui32NumSrcSyncs);
+ if(eError != PVRSRV_OK)
+ {
+ /* We didn't kick yet, or perform PDUMP processing, so we should
+ * be able to trivially roll back any changes made to the sync
+ * data. If we don't do this, we'll wedge services cleanup.
+ */
+
+ if (psCCBKick->h3DSyncInfo != IMG_NULL)
+ {
+ psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->h3DSyncInfo;
+ psSyncInfo->psSyncData->ui32ReadOpsPending--;
+ }
+
+ if (psCCBKick->hTASyncInfo != IMG_NULL)
+ {
+ psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTASyncInfo;
+ psSyncInfo->psSyncData->ui32ReadOpsPending--;
+ }
+
+ if (psCCBKick->hTA3DSyncInfo && psCCBKick->bTADependency)
+ {
+ psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTA3DSyncInfo;
+ psSyncInfo->psSyncData->ui32WriteOpsPending--;
+ }
+
+ PVR_DPF((PVR_DBG_ERROR, "SGXDoKickKM: PVRSyncPatchCCBKickSyncInfos failed."));
+ PVR_TTRACE(PVRSRV_TRACE_GROUP_KICK, PVRSRV_TRACE_CLASS_FUNCTION_EXIT,
+ KICK_TOKEN_DOKICK);
+ return eError;
+ }
+#else /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
for (i=0; i<psCCBKick->ui32NumSrcSyncs; i++)
{
psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahSrcKernelSyncInfo[i];
/* Copy ui32WriteOpsPending snapshot into the CCB. */
psTACmd->asSrcSyncs[i].ui32WriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
}
-#endif/* SUPPORT_SGX_GENERALISED_SYNCOBJECTS */
+#endif /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
+ psTACmd->ui32NumSrcSyncs = psCCBKick->ui32NumSrcSyncs;
+#endif /* defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS) */
if (psCCBKick->bFirstKickOrResume && psCCBKick->ui32NumDstSyncObjects > 0)
{
0,
MAKEUNIQUETAG(psHWDstSyncListMemInfo));
- if ((psSyncInfo->psSyncData->ui32LastOpDumpVal == 0) &&
- (psSyncInfo->psSyncData->ui32LastReadOpDumpVal == 0))
- {
- /*
- * Init the ROpsComplete value to 0.
- */
- PDUMPCOMMENT("Init RT ROpsComplete\r\n");
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete),
- sizeof(psSyncInfo->psSyncData->ui32ReadOpsComplete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- /*
- * Init the WOpsComplete value to 0.
- */
- PDUMPCOMMENT("Init RT WOpsComplete\r\n");
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
- sizeof(psSyncInfo->psSyncData->ui32WriteOpsComplete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- }
-
psSyncInfo->psSyncData->ui32LastOpDumpVal++;
ui32ModifiedValue = psSyncInfo->psSyncData->ui32LastOpDumpVal - 1;
IMG_UINT32 ui32ModifiedValue;
psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahTASrcKernelSyncInfo[i];
- if ((psSyncInfo->psSyncData->ui32LastOpDumpVal == 0) &&
- (psSyncInfo->psSyncData->ui32LastReadOpDumpVal == 0))
- {
- /*
- * Init the ROpsComplete value to 0.
- */
- PDUMPCOMMENT("Init RT TA-SRC ROpsComplete\r\n", i);
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete),
- sizeof(psSyncInfo->psSyncData->ui32ReadOpsComplete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- /*
- * Init the WOpsComplete value to 0.
- */
- PDUMPCOMMENT("Init RT TA-SRC WOpsComplete\r\n");
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
- sizeof(psSyncInfo->psSyncData->ui32WriteOpsComplete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- }
-
psSyncInfo->psSyncData->ui32LastReadOpDumpVal++;
ui32ModifiedValue = psSyncInfo->psSyncData->ui32LastReadOpDumpVal - 1;
IMG_UINT32 ui32ModifiedValue;
psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahTADstKernelSyncInfo[i];
- if ((psSyncInfo->psSyncData->ui32LastOpDumpVal == 0) &&
- (psSyncInfo->psSyncData->ui32LastReadOpDumpVal == 0))
- {
- /*
- * Init the ROpsComplete value to 0.
- */
- PDUMPCOMMENT("Init RT TA-DST ROpsComplete\r\n", i);
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete),
- sizeof(psSyncInfo->psSyncData->ui32ReadOpsComplete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- /*
- * Init the WOpsComplete value to 0.
- */
- PDUMPCOMMENT("Init RT TA-DST WOpsComplete\r\n");
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
- sizeof(psSyncInfo->psSyncData->ui32WriteOpsComplete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- }
-
psSyncInfo->psSyncData->ui32LastOpDumpVal++;
ui32ModifiedValue = psSyncInfo->psSyncData->ui32LastOpDumpVal - 1;
IMG_UINT32 ui32ModifiedValue;
psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ah3DSrcKernelSyncInfo[i];
- if ((psSyncInfo->psSyncData->ui32LastOpDumpVal == 0) &&
- (psSyncInfo->psSyncData->ui32LastReadOpDumpVal == 0))
- {
- /*
- * Init the ROpsComplete value to 0.
- */
- PDUMPCOMMENT("Init RT 3D-SRC ROpsComplete\r\n", i);
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete),
- sizeof(psSyncInfo->psSyncData->ui32ReadOpsComplete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- /*
- * Init the WOpsComplete value to 0.
- */
- PDUMPCOMMENT("Init RT 3D-SRC WOpsComplete\r\n");
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
- sizeof(psSyncInfo->psSyncData->ui32WriteOpsComplete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- }
-
psSyncInfo->psSyncData->ui32LastReadOpDumpVal++;
ui32ModifiedValue = psSyncInfo->psSyncData->ui32LastReadOpDumpVal - 1;
IMG_UINT32 ui32ModifiedValue;
psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahSrcKernelSyncInfo[i];
- if ((psSyncInfo->psSyncData->ui32LastOpDumpVal == 0) &&
- (psSyncInfo->psSyncData->ui32LastReadOpDumpVal == 0))
- {
- /*
- * Init the ROpsComplete value to 0.
- */
- PDUMPCOMMENT("Init RT ROpsComplete\r\n");
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32ReadOpsComplete),
- sizeof(psSyncInfo->psSyncData->ui32ReadOpsComplete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- /*
- * Init the WOpsComplete value to 0.
- */
- PDUMPCOMMENT("Init RT WOpsComplete\r\n");
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
- sizeof(psSyncInfo->psSyncData->ui32WriteOpsComplete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- /*
- * Init the ROps2Complete value to 0.
- */
- PDUMPCOMMENT("Init RT WOpsComplete\r\n");
- PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
- psSyncInfo->psSyncDataMemInfoKM,
- offsetof(PVRSRV_SYNC_DATA, ui32ReadOps2Complete),
- sizeof(psSyncInfo->psSyncData->ui32ReadOps2Complete),
- 0,
- MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
- }
-
psSyncInfo->psSyncData->ui32LastReadOpDumpVal++;
ui32ModifiedValue = psSyncInfo->psSyncData->ui32LastReadOpDumpVal - 1;
MAKEUNIQUETAG(psCCBMemInfo));
}
+ if (psCCBKick->hTA3DSyncInfo != IMG_NULL)
+ {
+ psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTA3DSyncInfo;
+
+ PDUMPCOMMENT("Modify TA/3D dependency WOpPendingVal\r\n");
+
+ PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
+ psCCBMemInfo,
+ psCCBKick->ui32CCBDumpWOff + offsetof(SGXMKIF_CMDTA_SHARED, sTA3DDependency.ui32WriteOpsPendingVal),
+ sizeof(IMG_UINT32),
+ 0,
+ MAKEUNIQUETAG(psCCBMemInfo));
+
+ if (psCCBKick->bTADependency)
+ {
+ psSyncInfo->psSyncData->ui32LastOpDumpVal++;
+ }
+ }
+
if (psCCBKick->hTASyncInfo != IMG_NULL)
{
psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTASyncInfo;
sizeof(IMG_UINT32),
0,
MAKEUNIQUETAG(psCCBMemInfo));
+
+ PDUMPCOMMENT("Modify TA/TQ WOpPendingVal\r\n");
+
+ PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
+ psCCBMemInfo,
+ psCCBKick->ui32CCBDumpWOff + offsetof(SGXMKIF_CMDTA_SHARED, ui32TATQSyncWriteOpsPendingVal),
+ sizeof(IMG_UINT32),
+ 0,
+ MAKEUNIQUETAG(psCCBMemInfo));
+
psSyncInfo->psSyncData->ui32LastReadOpDumpVal++;
}
sizeof(IMG_UINT32),
0,
MAKEUNIQUETAG(psCCBMemInfo));
+
+ PDUMPCOMMENT("Modify 3D/TQ WOpPendingVal\r\n");
+
+ PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
+ psCCBMemInfo,
+ psCCBKick->ui32CCBDumpWOff + offsetof(SGXMKIF_CMDTA_SHARED, ui323DTQSyncWriteOpsPendingVal),
+ sizeof(IMG_UINT32),
+ 0,
+ MAKEUNIQUETAG(psCCBMemInfo));
+
psSyncInfo->psSyncData->ui32LastReadOpDumpVal++;
}
#include "sgxutils.h"
#include "pdump_km.h"
+extern IMG_UINT32 g_ui32HostIRQCountSample;
#if defined(SUPPORT_HW_RECOVERY)
static PVRSRV_ERROR SGXAddTimer(PVRSRV_DEVICE_NODE *psDeviceNode,
MAKEUNIQUETAG(psDevInfo->psKernelSGXHostCtlMemInfo));
#endif /* PDUMP */
+ /* Wait for the pending ukernel to host interrupts to come back. */
+ #if !defined(NO_HARDWARE)
+// if (PollForValueKM(&g_ui32HostIRQCountSample,
+// psDevInfo->psSGXHostCtl->ui32InterruptCount,
+// 0xffffffff,
+// MAX_HW_TIME_US,
+// MAX_HW_TIME_US/WAIT_TRY_COUNT,
+// IMG_FALSE) != PVRSRV_OK)
+// {
+// PVR_DPF((PVR_DBG_ERROR,"SGXPrePowerState: Wait for pending interrupts failed."));
+// SGXDumpDebugInfo(psDevInfo, IMG_FALSE);
+// PVR_DBG_BREAK;
+// }
+ #endif /* NO_HARDWARE */
#if defined(SGX_FEATURE_MP)
ui32CoresEnabled = ((OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_MASTER_CORE) & EUR_CR_MASTER_CORE_ENABLE_MASK) >> EUR_CR_MASTER_CORE_ENABLE_SHIFT) + 1;
#else
return eError;
}
}
+ else
+ {
+ #if defined(SUPPORT_HW_RECOVERY)
+ PVRSRV_ERROR eError;
+
+ eError = OSDisableTimer(psDevInfo->hTimer);
+ if (eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"SGXStartTimer : Failed to enable host timer"));
+ }
+ #endif /* SUPPORT_HW_RECOVERY */
+ }
}
PVR_DPF((PVR_DBG_MESSAGE,"SGXPreClockSpeedChange: SGX clock speed was %uHz",
ui32EDMDirListReg = EUR_CR_BIF_DIR_LIST_BASE1 + 4 * (SGX_BIF_DIR_LIST_INDEX_EDM - 1);
#endif /* SGX_BIF_DIR_LIST_INDEX_EDM */
- ui32RegVal = psDevInfo->sKernelPDDevPAddr.uiAddr >> SGX_MMU_PDE_ADDR_ALIGNSHIFT;
+ ui32RegVal = (IMG_UINT32)(psDevInfo->sKernelPDDevPAddr.uiAddr >> SGX_MMU_PDE_ADDR_ALIGNSHIFT);
#if defined(FIX_HW_BRN_28011)
OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal);
/* enable 36bit addressing mode if the MMU supports it*/
OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_36BIT_ADDRESSING, EUR_CR_BIF_36BIT_ADDRESSING_ENABLE_MASK);
PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_36BIT_ADDRESSING, EUR_CR_BIF_36BIT_ADDRESSING_ENABLE_MASK, ui32PDUMPFlags);
+#else
+ #if defined(EUR_CR_BIF_36BIT_ADDRESSING)
+ OSWriteHWReg(psDevInfo->pvRegsBaseKM,
+ EUR_CR_BIF_36BIT_ADDRESSING,
+ 0);
+ PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME,
+ EUR_CR_BIF_36BIT_ADDRESSING,
+ 0,
+ ui32PDUMPFlags);
+ #endif
#endif
SGXResetInitBIFContexts(psDevInfo, ui32PDUMPFlags);
SGXResetSoftReset(psDevInfo, IMG_TRUE, ui32PDUMPFlags, IMG_FALSE);
/* Map in the dummy page. */
- psDevInfo->pui32BIFResetPD[ui32PDIndex] = (psDevInfo->sBIFResetPTDevPAddr.uiAddr
+ psDevInfo->pui32BIFResetPD[ui32PDIndex] = (IMG_UINT32)(psDevInfo->sBIFResetPTDevPAddr.uiAddr
>>SGX_MMU_PDE_ADDR_ALIGNSHIFT)
| SGX_MMU_PDE_PAGE_SIZE_4K
| SGX_MMU_PDE_VALID;
- psDevInfo->pui32BIFResetPT[ui32PTIndex] = (psDevInfo->sBIFResetPageDevPAddr.uiAddr
+ psDevInfo->pui32BIFResetPT[ui32PTIndex] = (IMG_UINT32)(psDevInfo->sBIFResetPageDevPAddr.uiAddr
>>SGX_MMU_PTE_ADDR_ALIGNSHIFT)
| SGX_MMU_PTE_VALID;
#include "sgxutils.h"
#include "ttrace.h"
-#if defined (SUPPORT_SID_INTERFACE)
-IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK_KM *psKick)
-#else
-IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK *psKick)
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+#include "pvr_sync.h"
#endif
+
+IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK *psKick)
{
PVRSRV_KERNEL_MEM_INFO *psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psKick->hCCBMemInfo;
SGXMKIF_COMMAND sCommand = {0};
}
}
- psSharedTransferCmd->ui32NumSrcSyncs = ui32RealSrcSyncNum;
- psSharedTransferCmd->ui32NumDstSyncs = ui32RealDstSyncNum;
-
if ((psKick->ui32Flags & SGXMKIF_TQFLAGS_KEEPPENDING) == 0UL)
{
IMG_UINT32 i = 0;
psSyncInfo->psSyncData->ui32WriteOpsPending++;
}
}
+
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ if (ui32RealDstSyncNum < SGX_MAX_TRANSFER_SYNC_OPS - 2 && psKick->iFenceFd > 0)
+ {
+ IMG_HANDLE ahSyncInfo[SGX_MAX_SRC_SYNCS_TA];
+ PVRSRV_DEVICE_SYNC_OBJECT *apsDevSyncs = &psSharedTransferCmd->asDstSyncs[ui32RealDstSyncNum];
+ IMG_UINT32 ui32NumSrcSyncs = 1;
+ IMG_UINT32 i;
+ ahSyncInfo[0] = (IMG_HANDLE)(psKick->iFenceFd - 1);
+
+ eError = PVRSyncPatchTransferSyncInfos(ahSyncInfo, apsDevSyncs, &ui32NumSrcSyncs);
+ if (eError != PVRSRV_OK)
+ {
+ /* We didn't kick yet, or perform PDUMP processing, so we should
+ * be able to trivially roll back any changes made to the sync
+ * data. If we don't do this, we'll wedge services cleanup.
+ */
+
+ for (loop = 0; loop < psKick->ui32NumDstSync; loop++)
+ {
+ if (abDstSyncEnable[loop])
+ {
+ psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahDstSyncInfo[loop];
+ psSyncInfo->psSyncData->ui32WriteOpsPending--;
+ }
+ }
+
+ for (loop = 0; loop < psKick->ui32NumSrcSync; loop++)
+ {
+ if (abSrcSyncEnable[loop])
+ {
+ psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[loop];
+ psSyncInfo->psSyncData->ui32ReadOpsPending--;
+ }
+ }
+
+ if (psKick->h3DSyncInfo != IMG_NULL)
+ {
+ psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
+ psSyncInfo->psSyncData->ui32WriteOpsPending++;
+ }
+
+ if (psKick->hTASyncInfo != IMG_NULL)
+ {
+ psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
+ psSyncInfo->psSyncData->ui32WriteOpsPending--;
+ }
+
+ PVR_DPF((PVR_DBG_ERROR, "SGXSubmitTransferKM: PVRSyncPatchCCBKickSyncInfos failed."));
+ PVR_TTRACE(PVRSRV_TRACE_GROUP_TRANSFER, PVRSRV_TRACE_CLASS_FUNCTION_EXIT,
+ TRANSFER_TOKEN_SUBMIT);
+ return eError;
+ }
+
+ /* Find a free dst sync to slot in our extra sync */
+ for (loop = 0; loop < psKick->ui32NumDstSync; loop++)
+ {
+ if (abDstSyncEnable[loop])
+ break;
+ }
+
+ /* We shouldn't be in this code path if ui32RealDstSyncNum
+ * didn't allow for at least two free synchronization slots.
+ */
+ PVR_ASSERT(loop + ui32NumSrcSyncs <= SGX_MAX_TRANSFER_SYNC_OPS);
+
+ /* Slot in the extra dst syncs */
+ for (i = 0; i < ui32NumSrcSyncs; i++)
+ {
+ psKick->ahDstSyncInfo[loop + i] = ahSyncInfo[i];
+ abDstSyncEnable[loop + i] = IMG_TRUE;
+ psKick->ui32NumDstSync++;
+ ui32RealDstSyncNum++;
+ }
+ }
+#endif /* defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC) */
}
+ psSharedTransferCmd->ui32NumSrcSyncs = ui32RealSrcSyncNum;
+ psSharedTransferCmd->ui32NumDstSyncs = ui32RealDstSyncNum;
+
#if defined(PDUMP)
- if ((PDumpIsCaptureFrameKM()
- || ((psKick->ui32PDumpFlags & PDUMP_FLAGS_CONTINUOUS) != 0))
- && (bPersistentProcess == IMG_FALSE) )
+ if (PDumpIsCaptureFrameKM()
+ || ((psKick->ui32PDumpFlags & PDUMP_FLAGS_CONTINUOUS) != 0))
{
PDUMPCOMMENT("Shared part of transfer command\r\n");
PDUMPMEM(psSharedTransferCmd,
psKick->ui32PDumpFlags,
MAKEUNIQUETAG(psCCBMemInfo));
+ PDUMPCOMMENT("Tweak TA/TQ surface read op in transfer cmd\r\n");
+ PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
+ psCCBMemInfo,
+ psKick->ui32CCBDumpWOff + (IMG_UINT32)(offsetof(SGXMKIF_TRANSFERCMD_SHARED, ui32TASyncReadOpsPendingVal)),
+ sizeof(psSyncInfo->psSyncData->ui32LastReadOpDumpVal),
+ psKick->ui32PDumpFlags,
+ MAKEUNIQUETAG(psCCBMemInfo));
+
psSyncInfo->psSyncData->ui32LastOpDumpVal++;
}
psKick->ui32PDumpFlags,
MAKEUNIQUETAG(psCCBMemInfo));
+ PDUMPCOMMENT("Tweak 3D/TQ surface read op in transfer cmd\r\n");
+ PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
+ psCCBMemInfo,
+ psKick->ui32CCBDumpWOff + (IMG_UINT32)(offsetof(SGXMKIF_TRANSFERCMD_SHARED, ui323DSyncReadOpsPendingVal)),
+ sizeof(psSyncInfo->psSyncData->ui32LastReadOpDumpVal),
+ psKick->ui32PDumpFlags,
+ MAKEUNIQUETAG(psCCBMemInfo));
+
psSyncInfo->psSyncData->ui32LastOpDumpVal++;
}
}
}
#if defined(SGX_FEATURE_2D_HARDWARE)
-#if defined (SUPPORT_SID_INTERFACE)
-IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK_KM *psKick)
-#else
IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK *psKick)
-#endif
{
PVRSRV_KERNEL_MEM_INFO *psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psKick->hCCBMemInfo;
PVRSRV_ERROR eError;
IMG_UINT32 i;
IMG_HANDLE hDevMemContext = IMG_NULL;
-#if defined(PDUMP)
- IMG_BOOL bPersistentProcess = IMG_FALSE;
- /*
- * For persistent processes, the HW kicks should not go into the
- * extended init phase; only keep memory transactions from the
- * window system which are necessary to run the client app.
- */
- {
- PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData();
- if(psPerProc != IMG_NULL)
- {
- bPersistentProcess = psPerProc->bPDumpPersistent;
- }
- }
-#endif /* PDUMP */
#if defined(FIX_HW_BRN_31620)
hDevMemContext = psKick->hDevMemContext;
#endif
/* PRQA S 3305 1 */
ps2DCmd = CCB_DATA_FROM_OFFSET(SGXMKIF_2DCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset);
- OSMemSet(ps2DCmd, 0, sizeof(*ps2DCmd));
-
/* Command needs to be synchronised with the TA? */
if (psKick->hTASyncInfo != IMG_NULL)
{
ps2DCmd->sTASyncData.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
ps2DCmd->sTASyncData.sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
}
+ else
+ {
+ ps2DCmd->sTASyncData.sWriteOpsCompleteDevVAddr.uiAddr = 0;
+ ps2DCmd->sTASyncData.sReadOpsCompleteDevVAddr.uiAddr = 0;
+ }
/* Command needs to be synchronised with the 3D? */
if (psKick->h3DSyncInfo != IMG_NULL)
ps2DCmd->s3DSyncData.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
ps2DCmd->s3DSyncData.sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
}
+ else
+ {
+ ps2DCmd->s3DSyncData.sWriteOpsCompleteDevVAddr.uiAddr = 0;
+ ps2DCmd->s3DSyncData.sReadOpsCompleteDevVAddr.uiAddr = 0;
+ }
/*
* We allow the first source and destination sync objects to be the
* values from the objects.
*/
ps2DCmd->ui32NumSrcSync = psKick->ui32NumSrcSync;
+
for (i = 0; i < psKick->ui32NumSrcSync; i++)
{
psSyncInfo = psKick->ahSrcSyncInfo[i];
ps2DCmd->sDstSyncData.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
ps2DCmd->sDstSyncData.sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
ps2DCmd->sDstSyncData.sReadOps2CompleteDevVAddr = psSyncInfo->sReadOps2CompleteDevVAddr;
+
+ /* We can do this immediately as we only have one */
+ psSyncInfo->psSyncData->ui32WriteOpsPending++;
+ }
+ else
+ {
+ ps2DCmd->sDstSyncData.sWriteOpsCompleteDevVAddr.uiAddr = 0;
+ ps2DCmd->sDstSyncData.sReadOpsCompleteDevVAddr.uiAddr = 0;
+ ps2DCmd->sDstSyncData.sReadOps2CompleteDevVAddr.uiAddr = 0;
}
/* Read/Write ops pending updates, delayed from above */
psSyncInfo->psSyncData->ui32ReadOpsPending++;
}
- if (psKick->hDstSyncInfo != IMG_NULL)
- {
- psSyncInfo = psKick->hDstSyncInfo;
- psSyncInfo->psSyncData->ui32WriteOpsPending++;
- }
-
#if defined(PDUMP)
if ((PDumpIsCaptureFrameKM()
- || ((psKick->ui32PDumpFlags & PDUMP_FLAGS_CONTINUOUS) != 0))
- && (bPersistentProcess == IMG_FALSE) )
+ || ((psKick->ui32PDumpFlags & PDUMP_FLAGS_CONTINUOUS) != 0)))
{
/* Pdump the command from the per context CCB */
PDUMPCOMMENT("Shared part of 2D command\r\n");
#include "pvr_debug.h"
#include "sgxutils.h"
#include "ttrace.h"
+#include "sgxmmu.h"
#ifdef __linux__
#include <linux/kernel.h> // sprintf
#if defined(PDUMP)
IMG_VOID *pvDumpCommand;
IMG_BOOL bPDumpIsSuspended = PDumpIsSuspended();
- IMG_BOOL bPersistentProcess = IMG_FALSE;
+#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
+ IMG_BOOL bPDumpActive = _PDumpIsProcessActive();
+#else
+ IMG_BOOL bPDumpActive = IMG_TRUE;
+#endif
#else
PVR_UNREFERENCED_PARAMETER(ui32CallerID);
PVR_UNREFERENCED_PARAMETER(ui32PDumpFlags);
}
}
#endif
-#if defined(PDUMP)
- /*
- * For persistent processes, the HW kicks should not go into the
- * extended init phase; only keep memory transactions from the
- * window system which are necessary to run the client app.
- */
- {
- PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData();
- if(psPerProc != IMG_NULL)
- {
- bPersistentProcess = psPerProc->bPDumpPersistent;
- }
- }
-#endif /* PDUMP */
psKernelCCB = psDevInfo->psKernelCCBInfo;
psSGXCommand = SGXAcquireKernelCCBSlot(psKernelCCB);
#if defined(PDUMP)
if ((ui32CallerID != ISR_ID) && (bPDumpIsSuspended == IMG_FALSE) &&
- (bPersistentProcess == IMG_FALSE) )
+ (bPDumpActive == IMG_TRUE) )
{
/* Poll for space in the CCB. */
PDUMPCOMMENTWITHFLAGS(ui32PDumpFlags, "Poll for space in the Kernel CCB\r\n");
#if defined(PDUMP)
if ((ui32CallerID != ISR_ID) && (bPDumpIsSuspended == IMG_FALSE) &&
- (bPersistentProcess == IMG_FALSE) )
+ (bPDumpActive == IMG_TRUE) )
{
#if defined(FIX_HW_BRN_26620) && defined(SGX_FEATURE_SYSTEM_CACHE) && !defined(SGX_BYPASS_SYSTEM_CACHE)
PDUMPCOMMENTWITHFLAGS(ui32PDumpFlags, "Poll for previous Kernel CCB CMD to be read\r\n");
******************************************************************************/
IMG_EXPORT
PVRSRV_ERROR SGXGetInternalDevInfoKM(IMG_HANDLE hDevCookie,
-#if defined (SUPPORT_SID_INTERFACE)
- SGX_INTERNAL_DEVINFO_KM *psSGXInternalDevInfo)
-#else
SGX_INTERNAL_DEVINFO *psSGXInternalDevInfo)
-#endif
{
PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookie)->pvDevice;
IMG_UINT8 *pSrc;
IMG_UINT8 *pDst;
PRESMAN_ITEM psResItem;
+ IMG_UINT32 ui32PDDevPAddrInDirListFormat;
eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
sizeof(SGX_HW_RENDER_CONTEXT_CLEANUP),
psMMUContext = BM_GetMMUContextFromMemContext(hDevMemContextInt);
sPDDevPAddr = psDeviceNode->pfnMMUGetPDDevPAddr(psMMUContext);
+ /*
+ The PDDevPAddr needs to be shifted-down, as the uKernel expects it in the
+ format it will be inserted into the DirList registers in.
+ */
+ ui32PDDevPAddrInDirListFormat = (IMG_UINT32)(sPDDevPAddr.uiAddr >> SGX_MMU_PTE_ADDR_ALIGNSHIFT);
+
/*
patch-in the Page-Directory Device-Physical address. Note that this is
copied-in one byte at a time, as we have no guarantee that the usermode-
provided ui32OffsetToPDDevPAddr is a validly-aligned address for the
current CPU architecture.
*/
- pSrc = (IMG_UINT8 *)&sPDDevPAddr;
+ pSrc = (IMG_UINT8 *)&ui32PDDevPAddrInDirListFormat;
pDst = (IMG_UINT8 *)psCleanup->psHWRenderContextMemInfo->pvLinAddrKM;
pDst += ui32OffsetToPDDevPAddr;
- for (iPtrByte = 0; iPtrByte < sizeof(IMG_DEV_PHYADDR); iPtrByte++)
+ for (iPtrByte = 0; iPtrByte < sizeof(ui32PDDevPAddrInDirListFormat); iPtrByte++)
{
pDst[iPtrByte] = pSrc[iPtrByte];
}
IMG_UINT8 *pSrc;
IMG_UINT8 *pDst;
PRESMAN_ITEM psResItem;
+ IMG_UINT32 ui32PDDevPAddrInDirListFormat;
eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
sizeof(SGX_HW_TRANSFER_CONTEXT_CLEANUP),
psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo;
psHeapInfo = &psDevMemoryInfo->psDeviceMemoryHeap[SGX_KERNEL_DATA_HEAP_ID];
+ PDUMPCOMMENTWITHFLAGS(PDUMP_FLAGS_CONTINUOUS, "Allocate HW Transfer context");
eError = PVRSRVAllocDeviceMemKM(hDeviceNode,
psPerProc,
psHeapInfo->hDevMemHeap,
psMMUContext = BM_GetMMUContextFromMemContext(hDevMemContextInt);
sPDDevPAddr = psDeviceNode->pfnMMUGetPDDevPAddr(psMMUContext);
+ /*
+ The PDDevPAddr needs to be shifted-down, as the uKernel expects it in the
+ format it will be inserted into the DirList registers in.
+ */
+ ui32PDDevPAddrInDirListFormat = (IMG_UINT32)(sPDDevPAddr.uiAddr >> SGX_MMU_PTE_ADDR_ALIGNSHIFT);
+
/*
patch-in the Page-Directory Device-Physical address. Note that this is
copied-in one byte at a time, as we have no guarantee that the usermode-
provided ui32OffsetToPDDevPAddr is a validly-aligned address for the
current CPU architecture.
*/
- pSrc = (IMG_UINT8 *)&sPDDevPAddr;
+ pSrc = (IMG_UINT8 *)&ui32PDDevPAddrInDirListFormat;
pDst = (IMG_UINT8 *)psCleanup->psHWTransferContextMemInfo->pvLinAddrKM;
pDst += ui32OffsetToPDDevPAddr;
- for (iPtrByte = 0; iPtrByte < sizeof(IMG_DEV_PHYADDR); iPtrByte++)
+ for (iPtrByte = 0; iPtrByte < sizeof(ui32PDDevPAddrInDirListFormat); iPtrByte++)
{
pDst[iPtrByte] = pSrc[iPtrByte];
}
IMG_UINT8 *pSrc;
IMG_UINT8 *pDst;
PRESMAN_ITEM psResItem;
+ IMG_UINT32 ui32PDDevPAddrInDirListFormat;
eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
sizeof(SGX_HW_2D_CONTEXT_CLEANUP),
psMMUContext = BM_GetMMUContextFromMemContext(hDevMemContextInt);
sPDDevPAddr = psDeviceNode->pfnMMUGetPDDevPAddr(psMMUContext);
+ /*
+ The PDDevPAddr needs to be shifted-down, as the uKernel expects it in the
+ format it will be inserted into the DirList registers in.
+ */
+ ui32PDDevPAddrInDirListFormat = sPDDevPAddr.uiAddr >> SGX_MMU_PTE_ADDR_ALIGNSHIFT;
+
/*
patch-in the Page-Directory Device-Physical address. Note that this is
copied-in one byte at a time, as we have no guarantee that the usermode-
provided ui32OffsetToPDDevPAddr is a validly-aligned address for the
current CPU architecture.
*/
- pSrc = (IMG_UINT8 *)&sPDDevPAddr;
+ pSrc = (IMG_UINT8 *)&ui32PDDevPAddrInDirListFormat;
pDst = (IMG_UINT8 *)psCleanup->psHW2DContextMemInfo->pvLinAddrKM;
pDst += ui32OffsetToPDDevPAddr;
- for (iPtrByte = 0; iPtrByte < sizeof(IMG_DEV_PHYADDR); iPtrByte++)
+ for (iPtrByte = 0; iPtrByte < sizeof(ui32PDDevPAddrInDirListFormat); iPtrByte++)
{
pDst[iPtrByte] = pSrc[iPtrByte];
}
{
PVRSRV_SYNC_DATA *psSyncData = psSyncInfo->psSyncData;
- PVR_TRACE(("SGX2DQueryBlitsCompleteKM: Syncinfo: 0x%x, Syncdata: 0x%x",
- (IMG_UINTPTR_T)psSyncInfo, (IMG_UINTPTR_T)psSyncData));
+ PVR_TRACE(("SGX2DQueryBlitsCompleteKM: Syncinfo: 0x%p, Syncdata: 0x%p",
+ psSyncInfo, psSyncData));
PVR_TRACE(("SGX2DQueryBlitsCompleteKM: Read ops complete: %d, Read ops pending: %d", psSyncData->ui32ReadOpsComplete, psSyncData->ui32ReadOpsPending));
PVR_TRACE(("SGX2DQueryBlitsCompleteKM: Write ops complete: %d, Write ops pending: %d", psSyncData->ui32WriteOpsComplete, psSyncData->ui32WriteOpsPending));
services4/srvkm/env/linux/ion.o
endif
+ifeq ($(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC),1)
+pvrsrvkm-y += \
+ services4/srvkm/env/linux/pvr_sync.o
+endif
+
ifeq ($(TTRACE),1)
pvrsrvkm-y += \
services4/srvkm/common/ttrace.o
services4/srvkm/env/linux/pvr_drm.o
ccflags-y += \
- -I$(KERNELDIR)/include/drm \
+ -Iinclude/drm \
-I$(TOP)/services4/include/env/linux \
ifeq ($(PVR_DRI_DRM_NOT_PCI),1)
#if defined(SUPPORT_DRI_DRM) && defined(PVR_SECURE_DRM_AUTH_EXPORT)
struct list_head sDRMAuthListHead;
#endif
-#if defined (SUPPORT_ION)
+#if defined(SUPPORT_ION)
struct ion_client *psIONClient;
IMG_CHAR azIonClientName[ION_CLIENT_NAME_SIZE];
#endif
#include <asm/io.h>
#include <asm/page.h>
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
#include <asm/system.h>
#endif
#include <linux/mm.h>
ui32TimeOutJiffies = (IMG_UINT32)schedule_timeout((IMG_INT32)ui32TimeOutJiffies);
- LinuxLockMutex(&gPVRSRVLock);
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
#if defined(DEBUG)
psLinuxEventObject->ui32Stats++;
#endif
--- /dev/null
+/*************************************************************************/ /*!
+@Title Ion driver inter-operability code.
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+#include "ion.h"
+
+/* Three possible configurations:
+ *
+ * - !SUPPORT_ION && CONFIG_ION_OMAP
+ * This is ion inter-op, not real ion support.
+ *
+ * - SUPPORT_ION && CONFIG_ION_OMAP
+ * Real ion support, but sharing with an SOC ion device. We need
+ * to co-share the heaps too.
+ *
+ * - SUPPORT_ION && !CONFIG_ION_OMAP
+ * "Reference" ion implementation. Creates its own ion device
+ * and heaps for the driver to use.
+ */
+
+#if !defined(SUPPORT_ION) && defined(CONFIG_ION_OMAP)
+
+/* Legacy ion inter-op mode */
+
+#include "services.h"
+#include "servicesint.h"
+#include "mutex.h"
+#include "lock.h"
+#include "mm.h"
+#include "handle.h"
+#include "perproc.h"
+#include "env_perproc.h"
+#include "private_data.h"
+#include "pvr_debug.h"
+
+#include <linux/module.h>
+#include <linux/file.h>
+#include <linux/fs.h>
+
+extern struct ion_client *gpsIONClient;
+
+void PVRSRVExportFDToIONHandles(int fd, struct ion_client **client,
+ struct ion_handle *handles[2])
+{
+ PVRSRV_FILE_PRIVATE_DATA *psPrivateData;
+ PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
+ LinuxMemArea *psLinuxMemArea;
+ PVRSRV_ERROR eError;
+ struct file *psFile;
+
+ /* Take the bridge mutex so the handle won't be freed underneath us */
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
+
+ psFile = fget(fd);
+ if(!psFile)
+ goto err_unlock;
+
+ psPrivateData = psFile->private_data;
+ if(!psPrivateData)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "%s: struct file* has no private_data; "
+ "invalid export handle", __func__));
+ goto err_fput;
+ }
+
+ eError = PVRSRVLookupHandle(KERNEL_HANDLE_BASE,
+ (IMG_PVOID *)&psKernelMemInfo,
+ psPrivateData->hKernelMemInfo,
+ PVRSRV_HANDLE_TYPE_MEM_INFO);
+ if(eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "%s: Failed to look up MEM_INFO handle",
+ __func__));
+ goto err_fput;
+ }
+
+ psLinuxMemArea = (LinuxMemArea *)psKernelMemInfo->sMemBlk.hOSMemHandle;
+ BUG_ON(psLinuxMemArea == IMG_NULL);
+
+ if(psLinuxMemArea->eAreaType != LINUX_MEM_AREA_ION)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "%s: Valid handle, but not an ION buffer",
+ __func__));
+ goto err_fput;
+ }
+
+ handles[0] = psLinuxMemArea->uData.sIONTilerAlloc.psIONHandle[0];
+ handles[1] = psLinuxMemArea->uData.sIONTilerAlloc.psIONHandle[1];
+ if(client)
+ *client = gpsIONClient;
+
+err_fput:
+ fput(psFile);
+err_unlock:
+ /* Allow PVRSRV clients to communicate with srvkm again */
+ LinuxUnLockMutex(&gPVRSRVLock);
+}
+
+struct ion_handle *
+PVRSRVExportFDToIONHandle(int fd, struct ion_client **client)
+{
+ struct ion_handle *psHandles[2] = { IMG_NULL, IMG_NULL };
+ PVRSRVExportFDToIONHandles(fd, client, psHandles);
+ return psHandles[0];
+}
+
+EXPORT_SYMBOL(PVRSRVExportFDToIONHandles);
+EXPORT_SYMBOL(PVRSRVExportFDToIONHandle);
+
+#endif /* !defined(SUPPORT_ION) && defined(CONFIG_ION_OMAP) */
+
+#if defined(SUPPORT_ION)
+
+#include <linux/scatterlist.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+
+#if defined(CONFIG_ION_OMAP)
+
+/* Real ion with sharing */
+
+extern struct ion_device *omap_ion_device;
+struct ion_device *gpsIonDev;
+
+PVRSRV_ERROR IonInit(IMG_VOID)
+{
+ gpsIonDev = omap_ion_device;
+ return PVRSRV_OK;
+}
+
+IMG_VOID IonDeinit(IMG_VOID)
+{
+ gpsIonDev = IMG_NULL;
+}
+
+#else /* defined(CONFIG_ION_OMAP) */
+
+/* "Reference" ion implementation */
+
+#include "../drivers/gpu/ion/ion_priv.h"
+
+static struct ion_heap **gapsIonHeaps;
+struct ion_device *gpsIonDev;
+
+static struct ion_platform_data gsGenericConfig =
+{
+ .nr = 2,
+ .heaps =
+ {
+ {
+ .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
+ .name = "System contig",
+ .id = ION_HEAP_TYPE_SYSTEM_CONTIG,
+ },
+ {
+ .type = ION_HEAP_TYPE_SYSTEM,
+ .name = "System",
+ .id = ION_HEAP_TYPE_SYSTEM,
+ }
+ }
+};
+
+PVRSRV_ERROR IonInit(IMG_VOID)
+{
+ int uiHeapCount = gsGenericConfig.nr;
+ int uiError;
+ int i;
+
+ gapsIonHeaps = kzalloc(sizeof(struct ion_heap *) * uiHeapCount, GFP_KERNEL);
+ /* Create the ion devicenode */
+ gpsIonDev = ion_device_create(NULL);
+ if (IS_ERR_OR_NULL(gpsIonDev)) {
+ kfree(gapsIonHeaps);
+ return PVRSRV_ERROR_OUT_OF_MEMORY;
+ }
+
+ /* Register all the heaps */
+ for (i = 0; i < gsGenericConfig.nr; i++)
+ {
+ struct ion_platform_heap *psPlatHeapData = &gsGenericConfig.heaps[i];
+
+ gapsIonHeaps[i] = ion_heap_create(psPlatHeapData);
+ if (IS_ERR_OR_NULL(gapsIonHeaps[i]))
+ {
+ uiError = PTR_ERR(gapsIonHeaps[i]);
+ goto failHeapCreate;
+ }
+ ion_device_add_heap(gpsIonDev, gapsIonHeaps[i]);
+ }
+
+ return PVRSRV_OK;
+failHeapCreate:
+ for (i = 0; i < uiHeapCount; i++)
+ {
+ if (gapsIonHeaps[i])
+ {
+ ion_heap_destroy(gapsIonHeaps[i]);
+ }
+ }
+ kfree(gapsIonHeaps);
+ return PVRSRV_ERROR_OUT_OF_MEMORY;
+}
+
+IMG_VOID IonDeinit(IMG_VOID)
+{
+ int uiHeapCount = gsGenericConfig.nr;
+ int i;
+
+ for (i = 0; i < uiHeapCount; i++)
+ {
+ if (gapsIonHeaps[i])
+ {
+ ion_heap_destroy(gapsIonHeaps[i]);
+ }
+ }
+ kfree(gapsIonHeaps);
+ ion_device_destroy(gpsIonDev);
+}
+
+#endif /* defined(CONFIG_ION_OMAP) */
+
+#define MAX_IMPORT_ION_FDS 3
+
+typedef struct _ION_IMPORT_DATA_
+{
+ /* ion client handles are imported into */
+ struct ion_client *psIonClient;
+
+ /* Number of ion handles represented by this import */
+ IMG_UINT32 ui32NumIonHandles;
+
+ /* Array of ion handles in use by services */
+ struct ion_handle *apsIonHandle[MAX_IMPORT_ION_FDS];
+
+ /* Array of physical addresses represented by these buffers */
+ IMG_SYS_PHYADDR *psSysPhysAddr;
+
+ /* If ui32NumBuffers is 1 and ion_map_kernel() is implemented by the
+ * allocator, this may be non-NULL. Otherwise it will be NULL.
+ */
+ IMG_PVOID pvKernAddr0;
+}
+ION_IMPORT_DATA;
+
+PVRSRV_ERROR IonImportBufferAndAcquirePhysAddr(IMG_HANDLE hIonDev,
+ IMG_UINT32 ui32NumFDs,
+ IMG_INT32 *pai32BufferFDs,
+ IMG_UINT32 *pui32PageCount,
+ IMG_SYS_PHYADDR **ppsSysPhysAddr,
+ IMG_PVOID *ppvKernAddr0,
+ IMG_HANDLE *phPriv,
+ IMG_HANDLE *phUnique)
+{
+ struct scatterlist *psTemp, *psScatterList[MAX_IMPORT_ION_FDS] = {};
+ PVRSRV_ERROR eError = PVRSRV_ERROR_OUT_OF_MEMORY;
+ struct ion_client *psIonClient = hIonDev;
+ IMG_UINT32 i, k, ui32PageCount = 0;
+ ION_IMPORT_DATA *psImportData;
+
+ if(ui32NumFDs > MAX_IMPORT_ION_FDS)
+ {
+ printk(KERN_ERR "%s: More ion export fds passed in than supported "
+ "(%d provided, %d max)", __func__, ui32NumFDs,
+ MAX_IMPORT_ION_FDS);
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psImportData = kzalloc(sizeof(ION_IMPORT_DATA), GFP_KERNEL);
+ if (psImportData == NULL)
+ {
+ goto exitFailKMallocImportData;
+ }
+
+ /* Set up import data for free call */
+ psImportData->psIonClient = psIonClient;
+ psImportData->ui32NumIonHandles = ui32NumFDs;
+
+ for(i = 0; i < ui32NumFDs; i++)
+ {
+ int fd = (int)pai32BufferFDs[i];
+
+ psImportData->apsIonHandle[i] = ion_import_fd(psIonClient, fd);
+ if (psImportData->apsIonHandle[i] == IMG_NULL)
+ {
+ eError = PVRSRV_ERROR_BAD_MAPPING;
+ goto exitFailImport;
+ }
+
+ psScatterList[i] = ion_map_dma(psIonClient, psImportData->apsIonHandle[i]);
+ if (psScatterList[i] == NULL)
+ {
+ eError = PVRSRV_ERROR_INVALID_PARAMS;
+ goto exitFailImport;
+ }
+
+ for(psTemp = psScatterList[i]; psTemp; psTemp = sg_next(psTemp))
+ {
+ IMG_UINT32 j;
+ for (j = 0; j < psTemp->length; j += PAGE_SIZE)
+ {
+ ui32PageCount++;
+ }
+ }
+ }
+
+ BUG_ON(ui32PageCount == 0);
+
+ psImportData->psSysPhysAddr = kmalloc(sizeof(IMG_SYS_PHYADDR) * ui32PageCount, GFP_KERNEL);
+ if (psImportData->psSysPhysAddr == NULL)
+ {
+ goto exitFailImport;
+ }
+
+ for(i = 0, k = 0; i < ui32NumFDs; i++)
+ {
+ for(psTemp = psScatterList[i]; psTemp; psTemp = sg_next(psTemp))
+ {
+ IMG_UINT32 j;
+ for (j = 0; j < psTemp->length; j += PAGE_SIZE)
+ {
+ psImportData->psSysPhysAddr[k].uiAddr = sg_phys(psTemp) + j;
+ k++;
+ }
+ }
+ }
+
+ *pui32PageCount = ui32PageCount;
+ *ppsSysPhysAddr = psImportData->psSysPhysAddr;
+
+ if(ui32NumFDs == 1)
+ {
+ IMG_PVOID pvKernAddr0;
+
+ pvKernAddr0 = ion_map_kernel(psIonClient, psImportData->apsIonHandle[0]);
+ if (IS_ERR(pvKernAddr0))
+ {
+ pvKernAddr0 = IMG_NULL;
+ }
+
+ psImportData->pvKernAddr0 = pvKernAddr0;
+ *ppvKernAddr0 = pvKernAddr0;
+ }
+ else
+ {
+ *ppvKernAddr0 = NULL;
+ }
+
+ *phPriv = psImportData;
+ *phUnique = (IMG_HANDLE)psImportData->psSysPhysAddr[0].uiAddr;
+
+ return PVRSRV_OK;
+
+exitFailImport:
+ for(i = 0; psImportData->apsIonHandle[i] != NULL; i++)
+ {
+ if(psScatterList[i])
+ ion_unmap_dma(psIonClient, psImportData->apsIonHandle[i]);
+ ion_free(psIonClient, psImportData->apsIonHandle[i]);
+ }
+ kfree(psImportData);
+exitFailKMallocImportData:
+ return eError;
+}
+
+IMG_VOID IonUnimportBufferAndReleasePhysAddr(IMG_HANDLE hPriv)
+{
+ ION_IMPORT_DATA *psImportData = hPriv;
+ IMG_UINT32 i;
+
+ if (psImportData->pvKernAddr0)
+ {
+ ion_unmap_kernel(psImportData->psIonClient, psImportData->apsIonHandle[0]);
+ }
+
+ for(i = 0; i < psImportData->ui32NumIonHandles; i++)
+ {
+ ion_unmap_dma(psImportData->psIonClient, psImportData->apsIonHandle[i]);
+ ion_free(psImportData->psIonClient, psImportData->apsIonHandle[i]);
+ }
+
+ kfree(psImportData->psSysPhysAddr);
+ kfree(psImportData);
+}
+
+#endif /* defined(SUPPORT_ION) */
--- /dev/null
+/*************************************************************************/ /*!
+@Title Ion driver inter-operability code.
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+#ifndef __IMG_LINUX_ION_H__
+#define __IMG_LINUX_ION_H__
+
+#include <linux/ion.h>
+#if defined (CONFIG_ION_OMAP)
+#include <linux/omap_ion.h>
+#endif
+#if defined (SUPPORT_ION)
+#include "img_types.h"
+#include "servicesext.h"
+#endif
+
+#if !defined(SUPPORT_ION) && defined(CONFIG_ION_OMAP)
+
+void PVRSRVExportFDToIONHandles(int fd, struct ion_client **client,
+ struct ion_handle *handles[2]);
+
+struct ion_handle *PVRSRVExportFDToIONHandle(int fd,
+ struct ion_client **client);
+
+#endif /* !defined(SUPPORT_ION) && defined(CONFIG_ION_OMAP) */
+
+#if defined(SUPPORT_ION)
+
+PVRSRV_ERROR IonInit(IMG_VOID);
+
+IMG_VOID IonDeinit(IMG_VOID);
+
+PVRSRV_ERROR IonImportBufferAndAcquirePhysAddr(IMG_HANDLE hIonDev,
+ IMG_UINT32 ui32NumFDs,
+ IMG_INT32 *pi32BufferFDs,
+ IMG_UINT32 *pui32PageCount,
+ IMG_SYS_PHYADDR **ppsSysPhysAddr,
+ IMG_PVOID *ppvKernAddr0,
+ IMG_HANDLE *phPriv,
+ IMG_HANDLE *phUnique);
+
+IMG_VOID IonUnimportBufferAndReleasePhysAddr(IMG_HANDLE hPriv);
+
+#endif /* defined(SUPPORT_ION) */
+
+#endif /* __IMG_LINUX_ION_H__ */
#include "lists.h"
#endif
+/* Decide whether or not DevMem allocs need __GFP_DMA32 */
+#ifndef SGX_FEATURE_36BIT_MMU
+# ifdef CONFIG_ZONE_DMA32
+# if defined CONFIG_X86_PAE || defined CONFIG_ARM_LPAE || defined CONFIG_64BIT
+# define PVR_USE_DMA32_FOR_DEVMEM_ALLOCS
+# endif
+# endif
+#endif
+
/*
* The page pool entry count is an atomic int so that the shrinker function
* can return it even when we can't take the lock that protects the page pool
typedef struct _DEBUG_MEM_ALLOC_REC
{
DEBUG_MEM_ALLOC_TYPE eAllocType;
- IMG_VOID *pvKey; /* Some unique value (private to the eAllocType) */
+ IMG_UINTPTR_T uiKey; /* Some unique value (private to the eAllocType) */
IMG_VOID *pvCpuVAddr;
- IMG_UINT32 ulCpuPAddr;
+ IMG_CPU_PHYADDR sCpuPAddr;
IMG_VOID *pvPrivateData;
- IMG_UINT32 ui32Bytes;
+ IMG_SIZE_T uiBytes;
pid_t pid;
IMG_CHAR *pszFileName;
IMG_UINT32 ui32Line;
static IMG_UINT32 g_IOMemHighWaterMark;
static IMG_VOID DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE eAllocType,
- IMG_VOID *pvKey,
+ IMG_UINTPTR_T uiKey,
IMG_VOID *pvCpuVAddr,
- IMG_UINT32 ulCpuPAddr,
+ IMG_CPU_PHYADDR sCpuPAddr,
IMG_VOID *pvPrivateData,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uiBytes,
IMG_CHAR *pszFileName,
IMG_UINT32 ui32Line);
-static IMG_VOID DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE eAllocType, IMG_VOID *pvKey, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line);
+static IMG_VOID DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE eAllocType, IMG_UINTPTR_T uiKey, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line);
static IMG_CHAR *DebugMemAllocRecordTypeToString(DEBUG_MEM_ALLOC_TYPE eAllocType);
static int g_iPagePoolMaxEntries;
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15))
-static IMG_VOID ReservePages(IMG_VOID *pvAddress, IMG_UINT32 ui32Length);
-static IMG_VOID UnreservePages(IMG_VOID *pvAddress, IMG_UINT32 ui32Length);
+static IMG_VOID ReservePages(IMG_VOID *pvAddress, IMG_SIZE_T uiLength);
+static IMG_VOID UnreservePages(IMG_VOID *pvAddress, IMG_SIZE_T uiLength);
#endif
static LinuxMemArea *LinuxMemAreaStructAlloc(IMG_VOID);
}
IMG_VOID *
-_KMallocWrapper(IMG_UINT32 ui32ByteSize, gfp_t uFlags, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
+_KMallocWrapper(IMG_SIZE_T uiByteSize, gfp_t uFlags, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
{
IMG_VOID *pvRet;
- pvRet = kmalloc(ui32ByteSize, uFlags);
+ pvRet = kmalloc(uiByteSize, uFlags);
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
if (pvRet)
{
+ IMG_CPU_PHYADDR sCpuPAddr;
+ sCpuPAddr.uiAddr = 0;
+
DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE_KMALLOC,
+ (IMG_UINTPTR_T)pvRet,
pvRet,
- pvRet,
- 0,
+ sCpuPAddr,
NULL,
- ui32ByteSize,
+ uiByteSize,
pszFileName,
ui32Line
);
_KFreeWrapper(IMG_VOID *pvCpuVAddr, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
{
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
- DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_KMALLOC, pvCpuVAddr, pszFileName, ui32Line);
+ DebugMemAllocRecordRemove(
+ DEBUG_MEM_ALLOC_TYPE_KMALLOC,
+ (IMG_UINTPTR_T)pvCpuVAddr,
+ pszFileName,
+ ui32Line);
#else
PVR_UNREFERENCED_PARAMETER(pszFileName);
PVR_UNREFERENCED_PARAMETER(ui32Line);
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
static IMG_VOID
DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE eAllocType,
- IMG_VOID *pvKey,
+ IMG_UINTPTR_T uiKey,
IMG_VOID *pvCpuVAddr,
- IMG_UINT32 ulCpuPAddr,
+ IMG_CPU_PHYADDR sCpuPAddr,
IMG_VOID *pvPrivateData,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uiBytes,
IMG_CHAR *pszFileName,
IMG_UINT32 ui32Line)
{
psRecord = kmalloc(sizeof(DEBUG_MEM_ALLOC_REC), GFP_KERNEL);
psRecord->eAllocType = eAllocType;
- psRecord->pvKey = pvKey;
+ psRecord->uiKey = uiKey;
psRecord->pvCpuVAddr = pvCpuVAddr;
- psRecord->ulCpuPAddr = ulCpuPAddr;
+ psRecord->sCpuPAddr.uiAddr = sCpuPAddr.uiAddr;
psRecord->pvPrivateData = pvPrivateData;
psRecord->pid = OSGetCurrentProcessIDKM();
- psRecord->ui32Bytes = ui32Bytes;
+ psRecord->uiBytes = uiBytes;
psRecord->pszFileName = pszFileName;
psRecord->ui32Line = ui32Line;
List_DEBUG_MEM_ALLOC_REC_Insert(&g_MemoryRecords, psRecord);
- g_WaterMarkData[eAllocType] += ui32Bytes;
+ g_WaterMarkData[eAllocType] += uiBytes;
if (g_WaterMarkData[eAllocType] > g_HighWaterMarkData[eAllocType])
{
g_HighWaterMarkData[eAllocType] = g_WaterMarkData[eAllocType];
|| eAllocType == DEBUG_MEM_ALLOC_TYPE_ALLOC_PAGES
|| eAllocType == DEBUG_MEM_ALLOC_TYPE_KMEM_CACHE)
{
- IMG_UINT32 ui32SysRAMTrueWaterMark;
+ IMG_SIZE_T uSysRAMTrueWaterMark;
- g_SysRAMWaterMark += ui32Bytes;
- ui32SysRAMTrueWaterMark = SysRAMTrueWaterMark();
+ g_SysRAMWaterMark += uiBytes;
+ uSysRAMTrueWaterMark = SysRAMTrueWaterMark();
- if (ui32SysRAMTrueWaterMark > g_SysRAMHighWaterMark)
+ if (uSysRAMTrueWaterMark > g_SysRAMHighWaterMark)
{
- g_SysRAMHighWaterMark = ui32SysRAMTrueWaterMark;
+ g_SysRAMHighWaterMark = uSysRAMTrueWaterMark;
}
}
else if (eAllocType == DEBUG_MEM_ALLOC_TYPE_IOREMAP
|| eAllocType == DEBUG_MEM_ALLOC_TYPE_IO)
{
- g_IOMemWaterMark += ui32Bytes;
+ g_IOMemWaterMark += uiBytes;
if (g_IOMemWaterMark > g_IOMemHighWaterMark)
{
g_IOMemHighWaterMark = g_IOMemWaterMark;
static IMG_BOOL DebugMemAllocRecordRemove_AnyVaCb(DEBUG_MEM_ALLOC_REC *psCurrentRecord, va_list va)
{
DEBUG_MEM_ALLOC_TYPE eAllocType;
- IMG_VOID *pvKey;
+ IMG_UINTPTR_T uiKey;
eAllocType = va_arg(va, DEBUG_MEM_ALLOC_TYPE);
- pvKey = va_arg(va, IMG_VOID*);
+ uiKey = va_arg(va, IMG_UINTPTR_T);
if (psCurrentRecord->eAllocType == eAllocType
- && psCurrentRecord->pvKey == pvKey)
+ && psCurrentRecord->uiKey == uiKey)
{
eAllocType = psCurrentRecord->eAllocType;
- g_WaterMarkData[eAllocType] -= psCurrentRecord->ui32Bytes;
+ g_WaterMarkData[eAllocType] -= psCurrentRecord->uiBytes;
if (eAllocType == DEBUG_MEM_ALLOC_TYPE_KMALLOC
|| eAllocType == DEBUG_MEM_ALLOC_TYPE_VMALLOC
|| eAllocType == DEBUG_MEM_ALLOC_TYPE_ALLOC_PAGES
|| eAllocType == DEBUG_MEM_ALLOC_TYPE_KMEM_CACHE)
{
- g_SysRAMWaterMark -= psCurrentRecord->ui32Bytes;
+ g_SysRAMWaterMark -= psCurrentRecord->uiBytes;
}
else if (eAllocType == DEBUG_MEM_ALLOC_TYPE_IOREMAP
|| eAllocType == DEBUG_MEM_ALLOC_TYPE_IO)
{
- g_IOMemWaterMark -= psCurrentRecord->ui32Bytes;
+ g_IOMemWaterMark -= psCurrentRecord->uiBytes;
}
List_DEBUG_MEM_ALLOC_REC_Remove(psCurrentRecord);
static IMG_VOID
-DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE eAllocType, IMG_VOID *pvKey, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
+DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE eAllocType, IMG_UINTPTR_T uiKey, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
{
/* DEBUG_MEM_ALLOC_REC **ppsCurrentRecord;*/
if (!List_DEBUG_MEM_ALLOC_REC_IMG_BOOL_Any_va(g_MemoryRecords,
DebugMemAllocRecordRemove_AnyVaCb,
eAllocType,
- pvKey))
+ uiKey))
{
- PVR_DPF((PVR_DBG_ERROR, "%s: couldn't find an entry for type=%s with pvKey=%p (called from %s, line %d\n",
- __FUNCTION__, DebugMemAllocRecordTypeToString(eAllocType), pvKey,
+ PVR_DPF((PVR_DBG_ERROR, "%s: couldn't find an entry for type=%s with uiKey=" UINTPTR_FMT " (called from %s, line %d\n",
+ __FUNCTION__, DebugMemAllocRecordTypeToString(eAllocType), uiKey,
pszFileName, ui32Line));
}
}
IMG_VOID *
-_VMallocWrapper(IMG_UINT32 ui32Bytes,
+_VMallocWrapper(IMG_SIZE_T uiBytes,
IMG_UINT32 ui32AllocFlags,
IMG_CHAR *pszFileName,
IMG_UINT32 ui32Line)
{
pgprot_t PGProtFlags;
IMG_VOID *pvRet;
+ gfp_t gfp_mask;
if (!AllocFlagsToPGProt(&PGProtFlags, ui32AllocFlags))
{
return NULL;
}
+ gfp_mask = GFP_KERNEL;
+
+#if defined(PVR_USE_DMA32_FOR_DEVMEM_ALLOCS)
+ gfp_mask |= __GFP_DMA32;
+#else
+ gfp_mask |= __GFP_HIGHMEM;
+#endif
+
/* Allocate virtually contiguous pages */
- pvRet = __vmalloc(ui32Bytes, GFP_KERNEL | __GFP_HIGHMEM, PGProtFlags);
+ pvRet = __vmalloc(uiBytes, gfp_mask, PGProtFlags);
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
if (pvRet)
{
+ IMG_CPU_PHYADDR sCpuPAddr;
+ sCpuPAddr.uiAddr = 0;
+
DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE_VMALLOC,
+ (IMG_UINTPTR_T)pvRet,
pvRet,
- pvRet,
- 0,
+ sCpuPAddr,
NULL,
- PAGE_ALIGN(ui32Bytes),
+ PAGE_ALIGN(uiBytes),
pszFileName,
ui32Line
);
_VFreeWrapper(IMG_VOID *pvCpuVAddr, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
{
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
- DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_VMALLOC, pvCpuVAddr, pszFileName, ui32Line);
+ DebugMemAllocRecordRemove(
+ DEBUG_MEM_ALLOC_TYPE_VMALLOC,
+ (IMG_UINTPTR_T)pvCpuVAddr,
+ pszFileName,
+ ui32Line);
#else
PVR_UNREFERENCED_PARAMETER(pszFileName);
PVR_UNREFERENCED_PARAMETER(ui32Line);
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
if (pvRet)
{
+ IMG_CPU_PHYADDR sCpuPAddr;
+ sCpuPAddr.uiAddr = 0;
+
DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE_VMAP,
+ (IMG_UINTPTR_T)pvRet,
pvRet,
- pvRet,
- 0,
+ sCpuPAddr,
NULL,
PAGES_TO_BYTES(ui32NumPages),
pszFileName,
}
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-#define VMapWrapper(ppsPageList, ui32Bytes, ui32AllocFlags) _VMapWrapper(ppsPageList, ui32Bytes, ui32AllocFlags, __FILE__, __LINE__)
+#define VMapWrapper(ppsPageList, uBytes, ui32AllocFlags) _VMapWrapper(ppsPageList, uBytes, ui32AllocFlags, __FILE__, __LINE__)
#else
-#define VMapWrapper(ppsPageList, ui32Bytes, ui32AllocFlags) _VMapWrapper(ppsPageList, ui32Bytes, ui32AllocFlags, NULL, 0)
+#define VMapWrapper(ppsPageList, uBytes, ui32AllocFlags) _VMapWrapper(ppsPageList, uBytes, ui32AllocFlags, NULL, 0)
#endif
_VUnmapWrapper(IMG_VOID *pvCpuVAddr, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
{
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
- DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_VMAP, pvCpuVAddr, pszFileName, ui32Line);
+ DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_VMAP,
+ (IMG_UINTPTR_T)pvCpuVAddr, pszFileName, ui32Line);
#else
PVR_UNREFERENCED_PARAMETER(pszFileName);
PVR_UNREFERENCED_PARAMETER(ui32Line);
_KMemCacheFreeWrapper(LinuxKMemCache *psCache, IMG_VOID *pvObject, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
{
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
- DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_KMEM_CACHE, pvObject, pszFileName, ui32Line);
+ DebugMemAllocRecordRemove(
+ DEBUG_MEM_ALLOC_TYPE_KMEM_CACHE,
+ (IMG_UINTPTR_T)pvObject,
+ pszFileName,
+ ui32Line);
#else
PVR_UNREFERENCED_PARAMETER(pszFileName);
PVR_UNREFERENCED_PARAMETER(ui32Line);
AllocPageFromLinux(void)
{
struct page *psPage;
+ gfp_t gfp_mask;
- psPage = alloc_pages(GFP_KERNEL | __GFP_HIGHMEM, 0);
- if (!psPage)
- {
- return NULL;
+ gfp_mask = GFP_KERNEL;
- }
+#if defined(PVR_USE_DMA32_FOR_DEVMEM_ALLOCS)
+ gfp_mask |= __GFP_DMA32;
+#else
+ gfp_mask |= __GFP_HIGHMEM;
+#endif
+
+ psPage = alloc_pages(gfp_mask, 0);
+ if (!psPage)
+ {
+ return NULL;
+
+ }
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15))
/* Reserve those pages to allow them to be re-mapped to user space */
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0))
PVRSRV_ERROR eError;
IMG_BOOL bFromPagePool = IMG_FALSE;
+#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
+ IMG_CPU_PHYADDR sCpuPAddr;
+#endif
+
eError = OSAllocMem(0, sizeof(*ppsPageList) * ui32NumPages, (IMG_VOID **)&ppsPageList, &hBlockPageList,
"Array of pages");
if (eError != PVRSRV_OK)
*phBlockPageList = hBlockPageList;
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
+ sCpuPAddr.uiAddr = 0;
+
DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE_ALLOC_PAGES,
- ppsPageList,
- 0,
+ (IMG_UINTPTR_T)ppsPageList,
0,
+ sCpuPAddr,
NULL,
PAGES_TO_BYTES(ui32NumPages),
"unknown",
}
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
- DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_ALLOC_PAGES, ppsPageList, __FILE__, __LINE__);
+ DebugMemAllocRecordRemove(
+ DEBUG_MEM_ALLOC_TYPE_ALLOC_PAGES,
+ (IMG_UINTPTR_T)ppsPageList,
+ __FILE__,
+ __LINE__);
#endif
(IMG_VOID) OSFreeMem(0, sizeof(*ppsPageList) * ui32NumPages, ppsPageList, hBlockPageList);
LinuxMemArea *
-NewVMallocLinuxMemArea(IMG_UINT32 ui32Bytes, IMG_UINT32 ui32AreaFlags)
+NewVMallocLinuxMemArea(IMG_SIZE_T uBytes, IMG_UINT32 ui32AreaFlags)
{
LinuxMemArea *psLinuxMemArea = NULL;
IMG_VOID *pvCpuVAddr;
}
#if defined(PVR_LINUX_MEM_AREA_USE_VMAP)
- ui32NumPages = RANGE_TO_PAGES(ui32Bytes);
+ ui32NumPages = RANGE_TO_PAGES(uBytes);
if (!AllocPages(ui32AreaFlags, &ppsPageList, &hBlockPageList, ui32NumPages, &bFromPagePool))
{
pvCpuVAddr = VMapWrapper(ppsPageList, ui32NumPages, ui32AreaFlags);
#else /* defined(PVR_LINUX_MEM_AREA_USE_VMAP) */
- pvCpuVAddr = VMallocWrapper(ui32Bytes, ui32AreaFlags);
+ pvCpuVAddr = VMallocWrapper(uBytes, ui32AreaFlags);
if (!pvCpuVAddr)
{
goto failed;
/* PG_reserved was deprecated in linux-2.6.15 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15))
/* Reserve those pages to allow them to be re-mapped to user space */
- ReservePages(pvCpuVAddr, ui32Bytes);
+ ReservePages(pvCpuVAddr, uBytes);
#endif
#endif /* defined(PVR_LINUX_MEM_AREA_USE_VMAP) */
psLinuxMemArea->uData.sVmalloc.ppsPageList = ppsPageList;
psLinuxMemArea->uData.sVmalloc.hBlockPageList = hBlockPageList;
#endif
- psLinuxMemArea->ui32ByteSize = ui32Bytes;
+ psLinuxMemArea->uiByteSize = uBytes;
psLinuxMemArea->ui32AreaFlags = ui32AreaFlags;
INIT_LIST_HEAD(&psLinuxMemArea->sMMapOffsetStructList);
*/
if (AreaIsUncached(ui32AreaFlags) && !bFromPagePool)
{
- OSInvalidateCPUCacheRangeKM(psLinuxMemArea, 0, pvCpuVAddr, ui32Bytes);
+ OSInvalidateCPUCacheRangeKM(psLinuxMemArea, 0, pvCpuVAddr, uBytes);
}
return psLinuxMemArea;
#if defined(PVR_LINUX_MEM_AREA_USE_VMAP)
VUnmapWrapper(psLinuxMemArea->uData.sVmalloc.pvVmallocAddress);
- ui32NumPages = RANGE_TO_PAGES(psLinuxMemArea->ui32ByteSize);
+ ui32NumPages = RANGE_TO_PAGES(psLinuxMemArea->uiByteSize);
ppsPageList = psLinuxMemArea->uData.sVmalloc.ppsPageList;
hBlockPageList = psLinuxMemArea->uData.sVmalloc.hBlockPageList;
/* PG_reserved was deprecated in linux-2.6.15 */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15))
UnreservePages(psLinuxMemArea->uData.sVmalloc.pvVmallocAddress,
- psLinuxMemArea->ui32ByteSize);
+ psLinuxMemArea->uiByteSize);
#endif
VFreeWrapper(psLinuxMemArea->uData.sVmalloc.pvVmallocAddress);
/* Reserve pages of memory in order that they're not automatically
deallocated after the last user reference dies. */
static IMG_VOID
-ReservePages(IMG_VOID *pvAddress, IMG_UINT32 ui32Length)
+ReservePages(IMG_VOID *pvAddress, IMG_SIZE_T uLength)
{
IMG_VOID *pvPage;
- IMG_VOID *pvEnd = pvAddress + ui32Length;
+ IMG_VOID *pvEnd = pvAddress + uLength;
for(pvPage = pvAddress; pvPage < pvEnd; pvPage += PAGE_SIZE)
{
/* Un-reserve pages of memory in order that they can be freed. */
static IMG_VOID
-UnreservePages(IMG_VOID *pvAddress, IMG_UINT32 ui32Length)
+UnreservePages(IMG_VOID *pvAddress, IMG_SIZE_T uLength)
{
IMG_VOID *pvPage;
- IMG_VOID *pvEnd = pvAddress + ui32Length;
+ IMG_VOID *pvEnd = pvAddress + uLength;
for(pvPage = pvAddress; pvPage < pvEnd; pvPage += PAGE_SIZE)
{
IMG_VOID *
_IORemapWrapper(IMG_CPU_PHYADDR BasePAddr,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32MappingFlags,
IMG_CHAR *pszFileName,
IMG_UINT32 ui32Line)
switch (ui32MappingFlags & PVRSRV_HAP_CACHETYPE_MASK)
{
case PVRSRV_HAP_CACHED:
- pvIORemapCookie = (IMG_VOID *)IOREMAP(BasePAddr.uiAddr, ui32Bytes);
+ pvIORemapCookie = (IMG_VOID *)IOREMAP(BasePAddr.uiAddr, uBytes);
break;
case PVRSRV_HAP_WRITECOMBINE:
- pvIORemapCookie = (IMG_VOID *)IOREMAP_WC(BasePAddr.uiAddr, ui32Bytes);
+ pvIORemapCookie = (IMG_VOID *)IOREMAP_WC(BasePAddr.uiAddr, uBytes);
break;
case PVRSRV_HAP_UNCACHED:
- pvIORemapCookie = (IMG_VOID *)IOREMAP_UC(BasePAddr.uiAddr, ui32Bytes);
+ pvIORemapCookie = (IMG_VOID *)IOREMAP_UC(BasePAddr.uiAddr, uBytes);
break;
default:
PVR_DPF((PVR_DBG_ERROR, "IORemapWrapper: unknown mapping flags"));
if (pvIORemapCookie)
{
DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE_IOREMAP,
+ (IMG_UINTPTR_T)pvIORemapCookie,
pvIORemapCookie,
- pvIORemapCookie,
- BasePAddr.uiAddr,
+ BasePAddr,
NULL,
- ui32Bytes,
+ uBytes,
pszFileName,
ui32Line
);
_IOUnmapWrapper(IMG_VOID *pvIORemapCookie, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line)
{
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
- DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_IOREMAP, pvIORemapCookie, pszFileName, ui32Line);
+ DebugMemAllocRecordRemove(
+ DEBUG_MEM_ALLOC_TYPE_IOREMAP,
+ (IMG_UINTPTR_T)pvIORemapCookie,
+ pszFileName,
+ ui32Line);
#else
PVR_UNREFERENCED_PARAMETER(pszFileName);
PVR_UNREFERENCED_PARAMETER(ui32Line);
LinuxMemArea *
NewIORemapLinuxMemArea(IMG_CPU_PHYADDR BasePAddr,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32AreaFlags)
{
LinuxMemArea *psLinuxMemArea;
return NULL;
}
- pvIORemapCookie = IORemapWrapper(BasePAddr, ui32Bytes, ui32AreaFlags);
+ pvIORemapCookie = IORemapWrapper(BasePAddr, uBytes, ui32AreaFlags);
if (!pvIORemapCookie)
{
LinuxMemAreaStructFree(psLinuxMemArea);
psLinuxMemArea->eAreaType = LINUX_MEM_AREA_IOREMAP;
psLinuxMemArea->uData.sIORemap.pvIORemapCookie = pvIORemapCookie;
psLinuxMemArea->uData.sIORemap.CPUPhysAddr = BasePAddr;
- psLinuxMemArea->ui32ByteSize = ui32Bytes;
+ psLinuxMemArea->uiByteSize = uBytes;
psLinuxMemArea->ui32AreaFlags = ui32AreaFlags;
INIT_LIST_HEAD(&psLinuxMemArea->sMMapOffsetStructList);
* using memory wrapping, which ends up creating an external KV memory area.
*/
static IMG_BOOL
-TreatExternalPagesAsContiguous(IMG_SYS_PHYADDR *psSysPhysAddr, IMG_UINT32 ui32Bytes, IMG_BOOL bPhysContig)
+TreatExternalPagesAsContiguous(IMG_SYS_PHYADDR *psSysPhysAddr, IMG_SIZE_T uBytes, IMG_BOOL bPhysContig)
{
IMG_UINT32 ui32;
IMG_UINT32 ui32AddrChk;
- IMG_UINT32 ui32NumPages = RANGE_TO_PAGES(ui32Bytes);
+ IMG_UINT32 ui32NumPages = RANGE_TO_PAGES(uBytes);
/*
* If bPhysContig is IMG_TRUE, we must assume psSysPhysAddr points
}
#endif
-LinuxMemArea *NewExternalKVLinuxMemArea(IMG_SYS_PHYADDR *pBasePAddr, IMG_VOID *pvCPUVAddr, IMG_UINT32 ui32Bytes, IMG_BOOL bPhysContig, IMG_UINT32 ui32AreaFlags)
+LinuxMemArea *NewExternalKVLinuxMemArea(IMG_SYS_PHYADDR *pBasePAddr, IMG_VOID *pvCPUVAddr, IMG_SIZE_T uBytes, IMG_BOOL bPhysContig, IMG_UINT32 ui32AreaFlags)
{
LinuxMemArea *psLinuxMemArea;
psLinuxMemArea->uData.sExternalKV.pvExternalKV = pvCPUVAddr;
psLinuxMemArea->uData.sExternalKV.bPhysContig =
#if !defined(PVR_MAKE_ALL_PFNS_SPECIAL)
- (bPhysContig || TreatExternalPagesAsContiguous(pBasePAddr, ui32Bytes, bPhysContig))
+ (bPhysContig || TreatExternalPagesAsContiguous(pBasePAddr, uiBytes, bPhysContig))
? IMG_TRUE : IMG_FALSE;
#else
bPhysContig;
{
psLinuxMemArea->uData.sExternalKV.uPhysAddr.pSysPhysAddr = pBasePAddr;
}
- psLinuxMemArea->ui32ByteSize = ui32Bytes;
+ psLinuxMemArea->uiByteSize = uBytes;
psLinuxMemArea->ui32AreaFlags = ui32AreaFlags;
INIT_LIST_HEAD(&psLinuxMemArea->sMMapOffsetStructList);
LinuxMemArea *
NewIOLinuxMemArea(IMG_CPU_PHYADDR BasePAddr,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32AreaFlags)
{
LinuxMemArea *psLinuxMemArea = LinuxMemAreaStructAlloc();
/* Nothing to activly do. We just keep a record of the physical range. */
psLinuxMemArea->eAreaType = LINUX_MEM_AREA_IO;
psLinuxMemArea->uData.sIO.CPUPhysAddr.uiAddr = BasePAddr.uiAddr;
- psLinuxMemArea->ui32ByteSize = ui32Bytes;
+ psLinuxMemArea->uiByteSize = uBytes;
psLinuxMemArea->ui32AreaFlags = ui32AreaFlags;
INIT_LIST_HEAD(&psLinuxMemArea->sMMapOffsetStructList);
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE_IO,
- (IMG_VOID *)BasePAddr.uiAddr,
- 0,
BasePAddr.uiAddr,
+ 0,
+ BasePAddr,
NULL,
- ui32Bytes,
+ uBytes,
"unknown",
0
);
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_IO,
- (IMG_VOID *)psLinuxMemArea->uData.sIO.CPUPhysAddr.uiAddr, __FILE__, __LINE__);
+ psLinuxMemArea->uData.sIO.CPUPhysAddr.uiAddr,
+ __FILE__,
+ __LINE__);
#endif
/* Nothing more to do than free the LinuxMemArea struct */
LinuxMemArea *
-NewAllocPagesLinuxMemArea(IMG_UINT32 ui32Bytes, IMG_UINT32 ui32AreaFlags)
+NewAllocPagesLinuxMemArea(IMG_SIZE_T uBytes, IMG_UINT32 ui32AreaFlags)
{
LinuxMemArea *psLinuxMemArea;
IMG_UINT32 ui32NumPages;
goto failed_area_alloc;
}
- ui32NumPages = RANGE_TO_PAGES(ui32Bytes);
+ ui32NumPages = RANGE_TO_PAGES(uBytes);
if (!AllocPages(ui32AreaFlags, &ppsPageList, &hBlockPageList, ui32NumPages, &bFromPagePool))
{
psLinuxMemArea->eAreaType = LINUX_MEM_AREA_ALLOC_PAGES;
psLinuxMemArea->uData.sPageList.ppsPageList = ppsPageList;
psLinuxMemArea->uData.sPageList.hBlockPageList = hBlockPageList;
- psLinuxMemArea->ui32ByteSize = ui32Bytes;
+ psLinuxMemArea->uiByteSize = uBytes;
psLinuxMemArea->ui32AreaFlags = ui32AreaFlags;
INIT_LIST_HEAD(&psLinuxMemArea->sMMapOffsetStructList);
DebugLinuxMemAreaRecordRemove(psLinuxMemArea);
#endif
- ui32NumPages = RANGE_TO_PAGES(psLinuxMemArea->ui32ByteSize);
+ ui32NumPages = RANGE_TO_PAGES(psLinuxMemArea->uiByteSize);
ppsPageList = psLinuxMemArea->uData.sPageList.ppsPageList;
hBlockPageList = psLinuxMemArea->uData.sPageList.hBlockPageList;
extern struct ion_client *gpsIONClient;
LinuxMemArea *
-NewIONLinuxMemArea(IMG_UINT32 ui32Bytes, IMG_UINT32 ui32AreaFlags,
- IMG_PVOID pvPrivData, IMG_UINT32 ui32PrivDataLength)
+NewIONLinuxMemArea(IMG_SIZE_T uBytes, IMG_UINT32 ui32AreaFlags,
+ IMG_PVOID pvPrivData, IMG_SIZE_T uiPrivDataLength)
{
- const IMG_UINT32 ui32AllocDataLen =
+ const IMG_SIZE_T uiAllocDataLen =
offsetof(struct omap_ion_tiler_alloc_data, handle);
struct omap_ion_tiler_alloc_data asAllocData[2] = {};
u32 *pu32PageAddrs[2] = { NULL, NULL };
* were given by this ui32AllocDataLen, and check it's 1 or 2.
* Otherwise abort.
*/
- BUG_ON(ui32PrivDataLength != ui32AllocDataLen &&
- ui32PrivDataLength != ui32AllocDataLen * 2);
- ui32NumHandlesPerFd = ui32PrivDataLength / ui32AllocDataLen;
+ BUG_ON(uiPrivDataLength != uiAllocDataLen &&
+ uiPrivDataLength != uiAllocDataLen * 2);
+ ui32NumHandlesPerFd = uiPrivDataLength / uiAllocDataLen;
/* Shuffle the alloc data into separate Y & UV bits and
* make two separate allocations via the tiler.
*/
for(i = 0; i < ui32NumHandlesPerFd; i++)
{
- memcpy(&asAllocData[i], &pbPrivData[i * ui32AllocDataLen], ui32AllocDataLen);
+ memcpy(&asAllocData[i], &pbPrivData[i * uiAllocDataLen], uiAllocDataLen);
if (omap_ion_tiler_alloc(gpsIONClient, &asAllocData[i]) < 0)
{
/* Assume the user-allocator has already done the tiler math and that the
* number of tiler pages allocated matches any other allocation type.
*/
- BUG_ON(ui32Bytes != (iNumPages[0] + iNumPages[1]) * PAGE_SIZE);
+ BUG_ON(uBytes != (iNumPages[0] + iNumPages[1]) * PAGE_SIZE);
BUG_ON(sizeof(IMG_CPU_PHYADDR) != sizeof(int));
/* Glue the page lists together */
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE_ION,
- asAllocData[0].handle,
- 0,
+ (IMG_UINTPTR_T)asAllocData[0].handle,
0,
+ (IMG_CPU_PHYADDR){0},
NULL,
- PAGE_ALIGN(ui32Bytes),
+ PAGE_ALIGN(uBytes),
"unknown",
0
);
psLinuxMemArea->eAreaType = LINUX_MEM_AREA_ION;
psLinuxMemArea->uData.sIONTilerAlloc.pCPUPhysAddrs = pCPUPhysAddrs;
- psLinuxMemArea->ui32ByteSize = ui32Bytes;
+ psLinuxMemArea->uiByteSize = uBytes;
psLinuxMemArea->ui32AreaFlags = ui32AreaFlags;
INIT_LIST_HEAD(&psLinuxMemArea->sMMapOffsetStructList);
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_ION,
- psLinuxMemArea->uData.sIONTilerAlloc.psIONHandle[0],
+ (IMG_UINTPTR_T)psLinuxMemArea->uData.sIONTilerAlloc.psIONHandle[0],
__FILE__, __LINE__);
#endif
struct page*
LinuxMemAreaOffsetToPage(LinuxMemArea *psLinuxMemArea,
- IMG_UINT32 ui32ByteOffset)
+ IMG_UINTPTR_T uByteOffset)
{
- IMG_UINT32 ui32PageIndex;
+ IMG_UINTPTR_T uPageIndex;
IMG_CHAR *pui8Addr;
switch (psLinuxMemArea->eAreaType)
{
case LINUX_MEM_AREA_ALLOC_PAGES:
- ui32PageIndex = PHYS_TO_PFN(ui32ByteOffset);
- return psLinuxMemArea->uData.sPageList.ppsPageList[ui32PageIndex];
+ uPageIndex = PHYS_TO_PFN(uByteOffset);
+ return psLinuxMemArea->uData.sPageList.ppsPageList[uPageIndex];
case LINUX_MEM_AREA_VMALLOC:
pui8Addr = psLinuxMemArea->uData.sVmalloc.pvVmallocAddress;
- pui8Addr += ui32ByteOffset;
+ pui8Addr += uByteOffset;
return vmalloc_to_page(pui8Addr);
case LINUX_MEM_AREA_SUB_ALLOC:
/* PRQA S 3670 3 */ /* ignore recursive warning */
return LinuxMemAreaOffsetToPage(psLinuxMemArea->uData.sSubAlloc.psParentLinuxMemArea,
- psLinuxMemArea->uData.sSubAlloc.ui32ByteOffset
- + ui32ByteOffset);
+ psLinuxMemArea->uData.sSubAlloc.uiByteOffset
+ + uByteOffset);
default:
PVR_DPF((PVR_DBG_ERROR,
"%s: Unsupported request for struct page from LinuxMemArea with type=%s",
IMG_UINT32 ui32Line)
{
IMG_VOID *pvRet;
-
+
+#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
+ IMG_CPU_PHYADDR sCpuPAddr;
+#endif
+
pvRet = kmem_cache_zalloc(psCache, Flags);
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
+ sCpuPAddr.uiAddr = 0;
DebugMemAllocRecordAdd(DEBUG_MEM_ALLOC_TYPE_KMEM_CACHE,
+ (IMG_UINTPTR_T)pvRet,
pvRet,
- pvRet,
- 0,
+ sCpuPAddr,
psCache,
kmem_cache_size(psCache),
pszFileName,
LinuxMemArea *
NewSubLinuxMemArea(LinuxMemArea *psParentLinuxMemArea,
- IMG_UINT32 ui32ByteOffset,
- IMG_UINT32 ui32Bytes)
+ IMG_UINTPTR_T uiByteOffset,
+ IMG_SIZE_T uBytes)
{
LinuxMemArea *psLinuxMemArea;
- PVR_ASSERT((ui32ByteOffset+ui32Bytes) <= psParentLinuxMemArea->ui32ByteSize);
+ PVR_ASSERT((uiByteOffset + uBytes) <= psParentLinuxMemArea->uiByteSize);
psLinuxMemArea = LinuxMemAreaStructAlloc();
if (!psLinuxMemArea)
psLinuxMemArea->eAreaType = LINUX_MEM_AREA_SUB_ALLOC;
psLinuxMemArea->uData.sSubAlloc.psParentLinuxMemArea = psParentLinuxMemArea;
- psLinuxMemArea->uData.sSubAlloc.ui32ByteOffset = ui32ByteOffset;
- psLinuxMemArea->ui32ByteSize = ui32Bytes;
+ psLinuxMemArea->uData.sSubAlloc.uiByteOffset = uiByteOffset;
+ psLinuxMemArea->uiByteSize = uBytes;
psLinuxMemArea->ui32AreaFlags = psParentLinuxMemArea->ui32AreaFlags;
psLinuxMemArea->bNeedsCacheInvalidate = psParentLinuxMemArea->bNeedsCacheInvalidate;
INIT_LIST_HEAD(&psLinuxMemArea->sMMapOffsetStructList);
if (psLinuxMemArea->eAreaType != LINUX_MEM_AREA_SUB_ALLOC)
{
- g_LinuxMemAreaWaterMark += psLinuxMemArea->ui32ByteSize;
+ g_LinuxMemAreaWaterMark += psLinuxMemArea->uiByteSize;
if (g_LinuxMemAreaWaterMark > g_LinuxMemAreaHighWaterMark)
{
g_LinuxMemAreaHighWaterMark = g_LinuxMemAreaWaterMark;
if (psLinuxMemArea->eAreaType != LINUX_MEM_AREA_SUB_ALLOC)
{
- g_LinuxMemAreaWaterMark -= psLinuxMemArea->ui32ByteSize;
+ g_LinuxMemAreaWaterMark -= psLinuxMemArea->uiByteSize;
}
g_LinuxMemAreaCount--;
{
return NULL;
}
- return pAddr + psLinuxMemArea->uData.sSubAlloc.ui32ByteOffset;
+ return pAddr + psLinuxMemArea->uData.sSubAlloc.uiByteOffset;
}
default:
return NULL;
IMG_CPU_PHYADDR
-LinuxMemAreaToCpuPAddr(LinuxMemArea *psLinuxMemArea, IMG_UINT32 ui32ByteOffset)
+LinuxMemAreaToCpuPAddr(LinuxMemArea *psLinuxMemArea, IMG_UINTPTR_T uiByteOffset)
{
IMG_CPU_PHYADDR CpuPAddr;
case LINUX_MEM_AREA_IOREMAP:
{
CpuPAddr = psLinuxMemArea->uData.sIORemap.CPUPhysAddr;
- CpuPAddr.uiAddr += ui32ByteOffset;
+ CpuPAddr.uiAddr += uiByteOffset;
break;
}
case LINUX_MEM_AREA_EXTERNAL_KV:
if (psLinuxMemArea->uData.sExternalKV.bPhysContig)
{
CpuPAddr = SysSysPAddrToCpuPAddr(psLinuxMemArea->uData.sExternalKV.uPhysAddr.SysPhysAddr);
- CpuPAddr.uiAddr += ui32ByteOffset;
+ CpuPAddr.uiAddr += uiByteOffset;
}
else
{
- IMG_UINT32 ui32PageIndex = PHYS_TO_PFN(ui32ByteOffset);
- IMG_SYS_PHYADDR SysPAddr = psLinuxMemArea->uData.sExternalKV.uPhysAddr.pSysPhysAddr[ui32PageIndex];
+ IMG_UINTPTR_T uiPageIndex = PHYS_TO_PFN(uiByteOffset);
+ IMG_SYS_PHYADDR SysPAddr = psLinuxMemArea->uData.sExternalKV.uPhysAddr.pSysPhysAddr[uiPageIndex];
CpuPAddr = SysSysPAddrToCpuPAddr(SysPAddr);
- CpuPAddr.uiAddr += ADDR_TO_PAGE_OFFSET(ui32ByteOffset);
+ CpuPAddr.uiAddr += ADDR_TO_PAGE_OFFSET(uiByteOffset);
}
break;
}
case LINUX_MEM_AREA_IO:
{
CpuPAddr = psLinuxMemArea->uData.sIO.CPUPhysAddr;
- CpuPAddr.uiAddr += ui32ByteOffset;
+ CpuPAddr.uiAddr += uiByteOffset;
break;
}
case LINUX_MEM_AREA_VMALLOC:
IMG_CHAR *pCpuVAddr;
pCpuVAddr =
(IMG_CHAR *)psLinuxMemArea->uData.sVmalloc.pvVmallocAddress;
- pCpuVAddr += ui32ByteOffset;
+ pCpuVAddr += uiByteOffset;
CpuPAddr.uiAddr = VMallocToPhys(pCpuVAddr);
break;
}
case LINUX_MEM_AREA_ION:
{
- IMG_UINT32 ui32PageIndex = PHYS_TO_PFN(ui32ByteOffset);
- CpuPAddr = psLinuxMemArea->uData.sIONTilerAlloc.pCPUPhysAddrs[ui32PageIndex];
- CpuPAddr.uiAddr += ADDR_TO_PAGE_OFFSET(ui32ByteOffset);
+ IMG_UINTPTR_T uiPageIndex = PHYS_TO_PFN(uiByteOffset);
+ CpuPAddr = psLinuxMemArea->uData.sIONTilerAlloc.pCPUPhysAddrs[uiPageIndex];
+ CpuPAddr.uiAddr += ADDR_TO_PAGE_OFFSET(uiByteOffset);
break;
}
case LINUX_MEM_AREA_ALLOC_PAGES:
{
struct page *page;
- IMG_UINT32 ui32PageIndex = PHYS_TO_PFN(ui32ByteOffset);
- page = psLinuxMemArea->uData.sPageList.ppsPageList[ui32PageIndex];
+ IMG_UINTPTR_T uiPageIndex = PHYS_TO_PFN(uiByteOffset);
+ page = psLinuxMemArea->uData.sPageList.ppsPageList[uiPageIndex];
CpuPAddr.uiAddr = page_to_phys(page);
- CpuPAddr.uiAddr += ADDR_TO_PAGE_OFFSET(ui32ByteOffset);
+ CpuPAddr.uiAddr += ADDR_TO_PAGE_OFFSET(uiByteOffset);
break;
}
case LINUX_MEM_AREA_SUB_ALLOC:
{
CpuPAddr =
OSMemHandleToCpuPAddr(psLinuxMemArea->uData.sSubAlloc.psParentLinuxMemArea,
- psLinuxMemArea->uData.sSubAlloc.ui32ByteOffset
- + ui32ByteOffset);
+ psLinuxMemArea->uData.sSubAlloc.uiByteOffset
+ + uiByteOffset);
break;
}
default:
seq_printf(sfile,
#if !defined(DEBUG_LINUX_XML_PROC_FILES)
- "%8p %-24s %8p %08x %-8d %-5u %08x=(%s)\n",
+ "%p %-24s %p " CPUPADDR_FMT " %" SIZE_T_FMT_LEN "u %-5u %08x=(%s)\n",
#else
"<linux_mem_area>\n"
- "\t<pointer>%8p</pointer>\n"
+ "\t<pointer>%p</pointer>\n"
"\t<type>%s</type>\n"
- "\t<cpu_virtual>%8p</cpu_virtual>\n"
- "\t<cpu_physical>%08x</cpu_physical>\n"
- "\t<bytes>%d</bytes>\n"
+ "\t<cpu_virtual>%p</cpu_virtual>\n"
+ "\t<cpu_physical>" CPUPADDR_FMT "</cpu_physical>\n"
+ "\t<bytes>%" SIZE_T_FMT_LEN "d</bytes>\n"
"\t<pid>%u</pid>\n"
"\t<flags>%08x</flags>\n"
"\t<flags_string>%s</flags_string>\n"
LinuxMemAreaTypeToString(psRecord->psLinuxMemArea->eAreaType),
LinuxMemAreaToCpuVAddr(psRecord->psLinuxMemArea),
LinuxMemAreaToCpuPAddr(psRecord->psLinuxMemArea,0).uiAddr,
- psRecord->psLinuxMemArea->ui32ByteSize,
+ psRecord->psLinuxMemArea->uiByteSize,
psRecord->pid,
psRecord->ui32Flags,
HAPFlagsToString(psRecord->ui32Flags)
{
seq_printf(sfile,
#if !defined(DEBUG_LINUX_XML_PROC_FILES)
- "%-16s %-8p %08x %-10d %-5d %-10s %s:%d\n",
+ "%-16s %p " CPUPADDR_FMT " %" SIZE_T_FMT_LEN "u %-5d %-10s %s:%d\n",
#else
"<allocation>\n"
"\t<type>%s</type>\n"
- "\t<cpu_virtual>%-8p</cpu_virtual>\n"
- "\t<cpu_physical>%08x</cpu_physical>\n"
- "\t<bytes>%d</bytes>\n"
+ "\t<cpu_virtual>%p</cpu_virtual>\n"
+ "\t<cpu_physical>" CPUPADDR_FMT "</cpu_physical>\n"
+ "\t<bytes>%" SIZE_T_FMT_LEN "u</bytes>\n"
"\t<pid>%d</pid>\n"
"\t<private>%s</private>\n"
"\t<filename>%s</filename>\n"
#endif
DebugMemAllocRecordTypeToString(psRecord->eAllocType),
psRecord->pvCpuVAddr,
- psRecord->ulCpuPAddr,
- psRecord->ui32Bytes,
+ psRecord->sCpuPAddr.uiAddr,
+ psRecord->uiBytes,
psRecord->pid,
"NULL",
psRecord->pszFileName,
{
seq_printf(sfile,
#if !defined(DEBUG_LINUX_XML_PROC_FILES)
- "%-16s %-8p %08x %-10d %-5d %-10s %s:%d\n",
+ "%-16s %p " CPUPADDR_FMT " %" SIZE_T_FMT_LEN "u %-5d %-10s %s:%d\n",
#else
"<allocation>\n"
"\t<type>%s</type>\n"
- "\t<cpu_virtual>%-8p</cpu_virtual>\n"
- "\t<cpu_physical>%08x</cpu_physical>\n"
- "\t<bytes>%d</bytes>\n"
+ "\t<cpu_virtual>%p</cpu_virtual>\n"
+ "\t<cpu_physical>" CPUPADDR_FMT "</cpu_physical>\n"
+ "\t<bytes>%" SIZE_T_FMT_LEN "u</bytes>\n"
"\t<pid>%d</pid>\n"
"\t<private>%s</private>\n"
"\t<filename>%s</filename>\n"
#endif
DebugMemAllocRecordTypeToString(psRecord->eAllocType),
psRecord->pvCpuVAddr,
- psRecord->ulCpuPAddr,
- psRecord->ui32Bytes,
+ psRecord->sCpuPAddr.uiAddr,
+ psRecord->uiBytes,
psRecord->pid,
KMemCacheNameWrapper(psRecord->pvPrivateData),
psRecord->pszFileName,
LinuxMemArea *psLinuxMemArea;
psLinuxMemArea = psCurrentRecord->psLinuxMemArea;
- PVR_DPF((PVR_DBG_ERROR, "%s: BUG!: Cleaning up Linux memory area (%p), type=%s, size=%d bytes",
+ PVR_DPF((PVR_DBG_ERROR, "%s: BUG!: Cleaning up Linux memory area (%p), type=%s, size=%"SIZE_T_FMT_LEN"d bytes",
__FUNCTION__,
psCurrentRecord->psLinuxMemArea,
LinuxMemAreaTypeToString(psCurrentRecord->psLinuxMemArea->eAreaType),
- psCurrentRecord->psLinuxMemArea->ui32ByteSize));
+ psCurrentRecord->psLinuxMemArea->uiByteSize));
/* Note this will also remove psCurrentRecord from g_LinuxMemAreaRecords
* but that's ok since we have already got a pointer to the next area. */
LinuxMemAreaDeepFree(psLinuxMemArea);
PVR_DPF((PVR_DBG_ERROR, "%s: BUG!: Cleaning up memory: "
"type=%s "
"CpuVAddr=%p "
- "CpuPAddr=0x%08x, "
+ "CpuPAddr=0x" CPUPADDR_FMT ", "
"allocated @ file=%s,line=%d",
__FUNCTION__,
DebugMemAllocRecordTypeToString(psCurrentRecord->eAllocType),
psCurrentRecord->pvCpuVAddr,
- psCurrentRecord->ulCpuPAddr,
+ psCurrentRecord->sCpuPAddr.uiAddr,
psCurrentRecord->pszFileName,
psCurrentRecord->ui32Line));
switch (psCurrentRecord->eAllocType)
break;
case DEBUG_MEM_ALLOC_TYPE_IO:
/* Nothing needed except to free the record */
- DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_IO, psCurrentRecord->pvKey, __FILE__, __LINE__);
+ DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_IO, psCurrentRecord->uiKey, __FILE__, __LINE__);
break;
case DEBUG_MEM_ALLOC_TYPE_VMALLOC:
VFreeWrapper(psCurrentRecord->pvCpuVAddr);
break;
case DEBUG_MEM_ALLOC_TYPE_ALLOC_PAGES:
- DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_ALLOC_PAGES, psCurrentRecord->pvKey, __FILE__, __LINE__);
+ DebugMemAllocRecordRemove(DEBUG_MEM_ALLOC_TYPE_ALLOC_PAGES, psCurrentRecord->uiKey, __FILE__, __LINE__);
break;
case DEBUG_MEM_ALLOC_TYPE_KMEM_CACHE:
KMemCacheFreeWrapper(psCurrentRecord->pvPrivateData, psCurrentRecord->pvCpuVAddr);
#endif
#endif
-static inline IMG_UINT32 VMallocToPhys(IMG_VOID *pCpuVAddr)
+static inline IMG_UINTPTR_T VMallocToPhys(IMG_VOID *pCpuVAddr)
{
return (page_to_phys(vmalloc_to_page(pCpuVAddr)) + ADDR_TO_PAGE_OFFSET(pCpuVAddr));
/* Note: The memory this represents is _not_ implicitly
* page aligned, neither is its size */
LinuxMemArea *psParentLinuxMemArea;
- IMG_UINT32 ui32ByteOffset;
+ IMG_UINTPTR_T uiByteOffset;
}sSubAlloc;
}uData;
- IMG_UINT32 ui32ByteSize; /* Size of memory area */
+ IMG_SIZE_T uiByteSize; /* Size of memory area */
IMG_UINT32 ui32AreaFlags; /* Flags passed at creation time */
* They can also be used as more concise replacements for OSAllocMem
* in Linux specific code.
*
- * @param ui32ByteSize
+ * @param uByteSize
*
* @return
******************************************************************************/
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-#define KMallocWrapper(ui32ByteSize, uFlags) _KMallocWrapper(ui32ByteSize, uFlags, __FILE__, __LINE__)
+#define KMallocWrapper(uByteSize, uFlags) _KMallocWrapper(uByteSize, uFlags, __FILE__, __LINE__)
#else
-#define KMallocWrapper(ui32ByteSize, uFlags) _KMallocWrapper(ui32ByteSize, uFlags, NULL, 0)
+#define KMallocWrapper(uByteSize, uFlags) _KMallocWrapper(uByteSize, uFlags, NULL, 0)
#endif
-IMG_VOID *_KMallocWrapper(IMG_UINT32 ui32ByteSize, gfp_t uFlags, IMG_CHAR *szFileName, IMG_UINT32 ui32Line);
+IMG_VOID *_KMallocWrapper(IMG_SIZE_T uByteSize, gfp_t uFlags, IMG_CHAR *szFileName, IMG_UINT32 ui32Line);
/*!
*******************************************************************************
* @brief
*
- * @param ui32Bytes
+ * @param uBytes
* @param ui32AllocFlags
*
* @return
******************************************************************************/
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-#define VMallocWrapper(ui32Bytes, ui32AllocFlags) _VMallocWrapper(ui32Bytes, ui32AllocFlags, __FILE__, __LINE__)
+#define VMallocWrapper(uiBytes, ui32AllocFlags) _VMallocWrapper(uiBytes, ui32AllocFlags, __FILE__, __LINE__)
#else
-#define VMallocWrapper(ui32Bytes, ui32AllocFlags) _VMallocWrapper(ui32Bytes, ui32AllocFlags, NULL, 0)
+#define VMallocWrapper(uiBytes, ui32AllocFlags) _VMallocWrapper(uiBytes, ui32AllocFlags, NULL, 0)
#endif
-IMG_VOID *_VMallocWrapper(IMG_UINT32 ui32Bytes, IMG_UINT32 ui32AllocFlags, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line);
+IMG_VOID *_VMallocWrapper(IMG_SIZE_T uiBytes, IMG_UINT32 ui32AllocFlags, IMG_CHAR *pszFileName, IMG_UINT32 ui32Line);
/*!
*******************************************************************************
* @brief Allocates virtually contiguous pages
*
- * @param ui32Bytes number of bytes to reserve
+ * @param uBytes number of bytes to reserve
* @param ui32AreaFlags Heap caching and mapping Flags
*
* @return Page-aligned address of virtual allocation or NULL on error
******************************************************************************/
-LinuxMemArea *NewVMallocLinuxMemArea(IMG_UINT32 ui32Bytes, IMG_UINT32 ui32AreaFlags);
+LinuxMemArea *NewVMallocLinuxMemArea(IMG_SIZE_T uBytes, IMG_UINT32 ui32AreaFlags);
/*!
* @brief Reserve physical IO memory and create a CPU virtual mapping for it
*
* @param BasePAddr
- * @param ui32Bytes
+ * @param uiBytes
* @param ui32MappingFlags
*
* @return
******************************************************************************/
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-#define IORemapWrapper(BasePAddr, ui32Bytes, ui32MappingFlags) \
- _IORemapWrapper(BasePAddr, ui32Bytes, ui32MappingFlags, __FILE__, __LINE__)
+#define IORemapWrapper(BasePAddr, uiBytes, ui32MappingFlags) \
+ _IORemapWrapper(BasePAddr, uiBytes, ui32MappingFlags, __FILE__, __LINE__)
#else
-#define IORemapWrapper(BasePAddr, ui32Bytes, ui32MappingFlags) \
- _IORemapWrapper(BasePAddr, ui32Bytes, ui32MappingFlags, NULL, 0)
+#define IORemapWrapper(BasePAddr, uiBytes, ui32MappingFlags) \
+ _IORemapWrapper(BasePAddr, uiBytes, ui32MappingFlags, NULL, 0)
#endif
IMG_VOID *_IORemapWrapper(IMG_CPU_PHYADDR BasePAddr,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uiBytes,
IMG_UINT32 ui32MappingFlags,
IMG_CHAR *pszFileName,
IMG_UINT32 ui32Line);
* @brief Reserve physical IO memory and create a CPU virtual mapping for it
*
* @param BasePAddr
- * @param ui32Bytes
+ * @param uiBytes
* @param ui32AreaFlags Heap caching and mapping Flags
*
* @return
******************************************************************************/
-LinuxMemArea *NewIORemapLinuxMemArea(IMG_CPU_PHYADDR BasePAddr, IMG_UINT32 ui32Bytes, IMG_UINT32 ui32AreaFlags);
+LinuxMemArea *NewIORemapLinuxMemArea(IMG_CPU_PHYADDR BasePAddr, IMG_SIZE_T uiBytes, IMG_UINT32 ui32AreaFlags);
/*!
* @param pBasePAddr
* @param pvCPUVAddr
* @param bPhysContig
- * @param ui32Bytes
+ * @param uBytes
* @param ui32AreaFlags Heap caching and mapping Flags
*
* @return
******************************************************************************/
-LinuxMemArea *NewExternalKVLinuxMemArea(IMG_SYS_PHYADDR *pBasePAddr, IMG_VOID *pvCPUVAddr, IMG_UINT32 ui32Bytes, IMG_BOOL bPhysContig, IMG_UINT32 ui32AreaFlags);
+LinuxMemArea *NewExternalKVLinuxMemArea(IMG_SYS_PHYADDR *pBasePAddr, IMG_VOID *pvCPUVAddr, IMG_SIZE_T uBytes, IMG_BOOL bPhysContig, IMG_UINT32 ui32AreaFlags);
/*!
* @brief
*
* @param psLinuxMemArea
- * @param ui32ByteOffset
+ * @param uByteOffset
*
* @return
******************************************************************************/
-struct page *LinuxMemAreaOffsetToPage(LinuxMemArea *psLinuxMemArea, IMG_UINT32 ui32ByteOffset);
+struct page *LinuxMemAreaOffsetToPage(LinuxMemArea *psLinuxMemArea, IMG_UINTPTR_T uByteOffset);
/*!
* @brief
*
* @param BasePAddr
- * @param ui32Bytes
+ * @param uiBytes
* @param ui32AreaFlags Heap caching and mapping Flags
*
* @return
******************************************************************************/
-LinuxMemArea *NewIOLinuxMemArea(IMG_CPU_PHYADDR BasePAddr, IMG_UINT32 ui32Bytes, IMG_UINT32 ui32AreaFlags);
+LinuxMemArea *NewIOLinuxMemArea(IMG_CPU_PHYADDR BasePAddr, IMG_SIZE_T uiBytes, IMG_UINT32 ui32AreaFlags);
/*!
*******************************************************************************
* @brief
*
- * @param ui32Bytes
+ * @param uiBytes
* @param ui32AreaFlags E.g Heap caching and mapping Flags
*
* @return
******************************************************************************/
-LinuxMemArea *NewAllocPagesLinuxMemArea(IMG_UINT32 ui32Bytes, IMG_UINT32 ui32AreaFlags);
+LinuxMemArea *NewAllocPagesLinuxMemArea(IMG_SIZE_T uiBytes, IMG_UINT32 ui32AreaFlags);
/*!
*******************************************************************************
* @brief
*
- * @param ui32Bytes
+ * @param uiBytes
* @param ui32AreaFlags E.g Heap caching and mapping Flags
*
* @return
******************************************************************************/
LinuxMemArea *
-NewIONLinuxMemArea(IMG_UINT32 ui32Bytes, IMG_UINT32 ui32AreaFlags,
- IMG_PVOID pvPrivData, IMG_UINT32 ui32PrivDataLength);
+NewIONLinuxMemArea(IMG_SIZE_T uiBytes, IMG_UINT32 ui32AreaFlags,
+ IMG_PVOID pvPrivData, IMG_SIZE_T uiPrivDataLength);
/*!
#else /* defined(CONFIG_ION_OMAP) */
static inline LinuxMemArea *
-NewIONLinuxMemArea(IMG_UINT32 ui32Bytes, IMG_UINT32 ui32AreaFlags,
- IMG_PVOID pvPrivData, IMG_UINT32 ui32PrivDataLength)
+NewIONLinuxMemArea(IMG_SIZE_T uBytes, IMG_UINT32 ui32AreaFlags,
+ IMG_PVOID pvPrivData, IMG_SIZE_T uPrivDataLength)
{
- PVR_UNREFERENCED_PARAMETER(ui32Bytes);
+ PVR_UNREFERENCED_PARAMETER(uBytes);
PVR_UNREFERENCED_PARAMETER(ui32AreaFlags);
PVR_UNREFERENCED_PARAMETER(pvPrivData);
- PVR_UNREFERENCED_PARAMETER(ui32PrivDataLength);
+ PVR_UNREFERENCED_PARAMETER(uPrivDataLength);
BUG();
return IMG_NULL;
}
* @brief
*
* @param psParentLinuxMemArea
- * @param ui32ByteOffset
- * @param ui32Bytes
+ * @param uByteOffset
+ * @param uBytes
*
* @return
******************************************************************************/
LinuxMemArea *NewSubLinuxMemArea(LinuxMemArea *psParentLinuxMemArea,
- IMG_UINT32 ui32ByteOffset,
- IMG_UINT32 ui32Bytes);
+ IMG_UINTPTR_T uByteOffset,
+ IMG_SIZE_T uBytes);
/*!
* @brief
*
* @param psLinuxMemArea
- * @param ui32ByteOffset
+ * @param uByteOffset
*
* @return
******************************************************************************/
-IMG_CPU_PHYADDR LinuxMemAreaToCpuPAddr(LinuxMemArea *psLinuxMemArea, IMG_UINT32 ui32ByteOffset);
+IMG_CPU_PHYADDR LinuxMemAreaToCpuPAddr(LinuxMemArea *psLinuxMemArea, IMG_UINTPTR_T uByteOffset);
-#define LinuxMemAreaToCpuPFN(psLinuxMemArea, ui32ByteOffset) PHYS_TO_PFN(LinuxMemAreaToCpuPAddr(psLinuxMemArea, ui32ByteOffset).uiAddr)
+#define LinuxMemAreaToCpuPFN(psLinuxMemArea, uByteOffset) PHYS_TO_PFN(LinuxMemAreaToCpuPAddr(psLinuxMemArea, uByteOffset).uiAddr)
/*!
*******************************************************************************
#include <drm/drmP.h>
#endif
+#ifdef CONFIG_ARCH_OMAP5
+#ifdef CONFIG_DSSCOMP
+#include <../drivers/staging/omapdrm/omap_dmm_tiler.h>
+#endif
+#endif
+
#include "services_headers.h"
#include "pvrmmap.h"
#include "pvr_drm.h"
#endif
-#if !defined(PVR_SECURE_HANDLES) && !defined (SUPPORT_SID_INTERFACE)
+#if !defined(PVR_SECURE_HANDLES)
#error "The mmap code requires PVR_SECURE_HANDLES"
#endif
static LIST_HEAD(g_sMMapOffsetStructList);
#if defined(DEBUG_LINUX_MMAP_AREAS)
static IMG_UINT32 g_ui32RegisteredAreas = 0;
-static IMG_UINT32 g_ui32TotalByteSize = 0;
+static IMG_SIZE_T g_uiTotalByteSize = 0;
#endif
}
#endif
-static inline IMG_UINT32
-#if defined (SUPPORT_SID_INTERFACE)
-HandleToMMapOffset(IMG_SID hHandle)
-#else
+static inline IMG_UINTPTR_T
HandleToMMapOffset(IMG_HANDLE hHandle)
-#endif
{
- IMG_UINT32 ulHandle = (IMG_UINT32)hHandle;
+ IMG_UINTPTR_T ulHandle = (IMG_UINTPTR_T)hHandle;
#if !defined(PVR_MAKE_ALL_PFNS_SPECIAL)
if (PFNIsSpecial(ulHandle))
* mmap data.
*/
static PKV_OFFSET_STRUCT
-CreateOffsetStruct(LinuxMemArea *psLinuxMemArea, IMG_UINT32 ui32Offset, IMG_UINT32 ui32RealByteSize)
+CreateOffsetStruct(LinuxMemArea *psLinuxMemArea, IMG_UINTPTR_T uiOffset, IMG_SIZE_T uiRealByteSize)
{
PKV_OFFSET_STRUCT psOffsetStruct;
#if defined(DEBUG) || defined(DEBUG_LINUX_MMAP_AREAS)
return IMG_NULL;
}
- psOffsetStruct->ui32MMapOffset = ui32Offset;
+ psOffsetStruct->uiMMapOffset = uiOffset;
psOffsetStruct->psLinuxMemArea = psLinuxMemArea;
- psOffsetStruct->ui32RealByteSize = ui32RealByteSize;
+ psOffsetStruct->uiRealByteSize = uiRealByteSize;
/*
* We store the TID in case two threads within a process
#ifdef DEBUG
PVR_DPF((PVR_DBG_MESSAGE, "%s: Table entry: "
- "psLinuxMemArea=%p, CpuPAddr=0x%08X", __FUNCTION__,
+ "psLinuxMemArea=%p, CpuPAddr=0x" CPUPADDR_FMT,
+ __FUNCTION__,
psOffsetStruct->psLinuxMemArea,
CpuPAddr.uiAddr));
#endif
*/
static inline IMG_VOID
DetermineUsersSizeAndByteOffset(LinuxMemArea *psLinuxMemArea,
- IMG_UINT32 *pui32RealByteSize,
- IMG_UINT32 *pui32ByteOffset)
+ IMG_SIZE_T *puiRealByteSize,
+ IMG_UINTPTR_T *puiByteOffset)
{
- IMG_UINT32 ui32PageAlignmentOffset;
+ IMG_UINTPTR_T uiPageAlignmentOffset;
IMG_CPU_PHYADDR CpuPAddr;
CpuPAddr = LinuxMemAreaToCpuPAddr(psLinuxMemArea, 0);
- ui32PageAlignmentOffset = ADDR_TO_PAGE_OFFSET(CpuPAddr.uiAddr);
+ uiPageAlignmentOffset = ADDR_TO_PAGE_OFFSET(CpuPAddr.uiAddr);
- *pui32ByteOffset = ui32PageAlignmentOffset;
+ *puiByteOffset = uiPageAlignmentOffset;
- *pui32RealByteSize = PAGE_ALIGN(psLinuxMemArea->ui32ByteSize + ui32PageAlignmentOffset);
+ *puiRealByteSize = PAGE_ALIGN(psLinuxMemArea->uiByteSize + uiPageAlignmentOffset);
}
@input psPerProc : Per-process data.
@input hMHandle : Memory handle.
- @input pui32MMapOffset : pointer to location for returned mmap offset.
- @input pui32ByteOffset : pointer to location for returned byte offset.
- @input pui32RealByteSize : pointer to location for returned real byte size.
- @input pui32UserVaddr : pointer to location for returned user mode address.
+ @input puiMMapOffset : pointer to location for returned mmap offset.
+ @input puiByteOffset : pointer to location for returned byte offset.
+ @input puiRealByteSize : pointer to location for returned real byte size.
+ @input puiUserVaddr : pointer to location for returned user mode address.
- @output pui32MMapOffset : points to mmap offset to be used in mmap2 sys call.
- @output pui32ByteOffset : points to byte offset of start of memory
+ @output puiMMapOffset : points to mmap offset to be used in mmap2 sys call.
+ @output puiByteOffset : points to byte offset of start of memory
within mapped area returned by mmap2.
- @output pui32RealByteSize : points to size of area to be mapped.
- @output pui32UserVAddr : points to user mode address of start of
+ @output puiRealByteSize : points to size of area to be mapped.
+ @output puiUserVAddr : points to user mode address of start of
mapping, or 0 if it hasn't been mapped yet.
@Return PVRSRV_ERROR : PVRSRV_OK, or error code.
******************************************************************************/
PVRSRV_ERROR
PVRMMapOSMemHandleToMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMHandle,
-#else
IMG_HANDLE hMHandle,
-#endif
- IMG_UINT32 *pui32MMapOffset,
- IMG_UINT32 *pui32ByteOffset,
- IMG_UINT32 *pui32RealByteSize,
- IMG_UINT32 *pui32UserVAddr)
+ IMG_UINTPTR_T *puiMMapOffset,
+ IMG_UINTPTR_T *puiByteOffset,
+ IMG_SIZE_T *puiRealByteSize,
+ IMG_UINTPTR_T *puiUserVAddr)
{
LinuxMemArea *psLinuxMemArea;
PKV_OFFSET_STRUCT psOffsetStruct;
IMG_HANDLE hOSMemHandle;
PVRSRV_ERROR eError;
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
PVR_ASSERT(PVRSRVGetMaxHandle(psPerProc->psHandleBase) <= MAX_MMAP_HANDLE);
eError = PVRSRVLookupOSMemHandle(psPerProc->psHandleBase, &hOSMemHandle, hMHandle);
if (eError != PVRSRV_OK)
{
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DPF((PVR_DBG_ERROR, "%s: Lookup of handle %x failed", __FUNCTION__, hMHandle));
-#else
PVR_DPF((PVR_DBG_ERROR, "%s: Lookup of handle %p failed", __FUNCTION__, hMHandle));
-#endif
goto exit_unlock;
}
/* Sparse mappings have to ask the BM for the virtual size */
if (psLinuxMemArea->hBMHandle)
{
- *pui32RealByteSize = BM_GetVirtualSize(psLinuxMemArea->hBMHandle);
- *pui32ByteOffset = 0;
+ *puiRealByteSize = BM_GetVirtualSize(psLinuxMemArea->hBMHandle);
+ *puiByteOffset = 0;
}
else
{
DetermineUsersSizeAndByteOffset(psLinuxMemArea,
- pui32RealByteSize,
- pui32ByteOffset);
+ puiRealByteSize,
+ puiByteOffset);
}
/* Check whether this memory area has already been mapped */
{
if (!psLinuxMemArea->hBMHandle)
{
- PVR_ASSERT(*pui32RealByteSize == psOffsetStruct->ui32RealByteSize);
+ PVR_ASSERT(*puiRealByteSize == psOffsetStruct->uiRealByteSize);
}
/*
* User mode locking is required to stop two threads racing to
* Without locking, both threads may attempt the mmap,
* and one of them will fail.
*/
- *pui32MMapOffset = psOffsetStruct->ui32MMapOffset;
- *pui32UserVAddr = psOffsetStruct->ui32UserVAddr;
+ *puiMMapOffset = psOffsetStruct->uiMMapOffset;
+ *puiUserVAddr = psOffsetStruct->uiUserVAddr;
PVRSRVOffsetStructIncRef(psOffsetStruct);
eError = PVRSRV_OK;
}
/* Memory area won't have been mapped yet */
- *pui32UserVAddr = 0;
+ *puiUserVAddr = 0;
#if !defined(PVR_MAKE_ALL_PFNS_SPECIAL)
if (LinuxMemAreaUsesPhysicalMap(psLinuxMemArea))
{
- *pui32MMapOffset = LinuxMemAreaToCpuPFN(psLinuxMemArea, 0);
- PVR_ASSERT(PFNIsPhysical(*pui32MMapOffset));
+ *puiMMapOffset = LinuxMemAreaToCpuPFN(psLinuxMemArea, 0);
+ PVR_ASSERT(PFNIsPhysical(*puiMMapOffset));
}
else
#endif
{
- *pui32MMapOffset = HandleToMMapOffset(hMHandle);
+ *puiMMapOffset = HandleToMMapOffset(hMHandle);
#if !defined(PVR_MAKE_ALL_PFNS_SPECIAL)
- PVR_ASSERT(PFNIsSpecial(*pui32MMapOffset));
+ PVR_ASSERT(PFNIsSpecial(*puiMMapOffset));
#endif
}
- psOffsetStruct = CreateOffsetStruct(psLinuxMemArea, *pui32MMapOffset, *pui32RealByteSize);
+ psOffsetStruct = CreateOffsetStruct(psLinuxMemArea, *puiMMapOffset, *puiRealByteSize);
if (psOffsetStruct == IMG_NULL)
{
eError = PVRSRV_ERROR_OUT_OF_MEMORY;
is done in the mmap2() syscall, as it expects the pgoff
argument to be in units of 4,096 bytes irrespective of
page size */
- *pui32MMapOffset = *pui32MMapOffset << (PAGE_SHIFT - 12);
+ *puiMMapOffset = *puiMMapOffset << (PAGE_SHIFT - 12);
exit_unlock:
LinuxUnLockMutex(&g_sMMapMutex);
@input psPerProc : Per-process data.
@input hMHandle : Memory handle.
@input pbMUnmap : pointer to location for munmap flag.
- @input pui32UserVAddr : pointer to location for user mode address of mapping.
- @input pui32ByteSize : pointer to location for size of mapping.
+ @input puiUserVAddr : pointer to location for user mode address of mapping.
+ @input puiByteSize : pointer to location for size of mapping.
@Output pbMUnmap : points to flag that indicates whether an munmap is
required.
- @output pui32UserVAddr : points to user mode address to munmap.
+ @output puiUserVAddr : points to user mode address to munmap.
@Return PVRSRV_ERROR : PVRSRV_OK, or error code.
******************************************************************************/
PVRSRV_ERROR
PVRMMapReleaseMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMHandle,
-#else
IMG_HANDLE hMHandle,
-#endif
IMG_BOOL *pbMUnmap,
- IMG_UINT32 *pui32RealByteSize,
- IMG_UINT32 *pui32UserVAddr)
+ IMG_SIZE_T *puiRealByteSize,
+ IMG_UINTPTR_T *puiUserVAddr)
{
LinuxMemArea *psLinuxMemArea;
PKV_OFFSET_STRUCT psOffsetStruct;
PVRSRV_ERROR eError;
IMG_UINT32 ui32PID = OSGetCurrentProcessIDKM();
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
PVR_ASSERT(PVRSRVGetMaxHandle(psPerProc->psHandleBase) <= MAX_MMAP_HANDLE);
eError = PVRSRVLookupOSMemHandle(psPerProc->psHandleBase, &hOSMemHandle, hMHandle);
if (eError != PVRSRV_OK)
{
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DPF((PVR_DBG_ERROR, "%s: Lookup of handle %x failed", __FUNCTION__, hMHandle));
-#else
PVR_DPF((PVR_DBG_ERROR, "%s: Lookup of handle %p failed", __FUNCTION__, hMHandle));
-#endif
goto exit_unlock;
}
PVRSRVOffsetStructDecRef(psOffsetStruct);
- *pbMUnmap = (IMG_BOOL)((psOffsetStruct->ui32RefCount == 0) && (psOffsetStruct->ui32UserVAddr != 0));
+ *pbMUnmap = (IMG_BOOL)((psOffsetStruct->ui32RefCount == 0) && (psOffsetStruct->uiUserVAddr != 0));
- *pui32UserVAddr = (*pbMUnmap) ? psOffsetStruct->ui32UserVAddr : 0;
- *pui32RealByteSize = (*pbMUnmap) ? psOffsetStruct->ui32RealByteSize : 0;
+ *puiUserVAddr = (*pbMUnmap) ? psOffsetStruct->uiUserVAddr : 0;
+ *puiRealByteSize = (*pbMUnmap) ? psOffsetStruct->uiRealByteSize : 0;
eError = PVRSRV_OK;
goto exit_unlock;
}
/* MMap data not found */
-#if defined (SUPPORT_SID_INTERFACE)
- PVR_DPF((PVR_DBG_ERROR, "%s: Mapping data not found for handle %x (memory area %p)", __FUNCTION__, hMHandle, psLinuxMemArea));
-#else
PVR_DPF((PVR_DBG_ERROR, "%s: Mapping data not found for handle %p (memory area %p)", __FUNCTION__, hMHandle, psLinuxMemArea));
-#endif
eError = PVRSRV_ERROR_MAPPING_NOT_FOUND;
}
static inline PKV_OFFSET_STRUCT
-FindOffsetStructByOffset(IMG_UINT32 ui32Offset, IMG_UINT32 ui32RealByteSize)
+FindOffsetStructByOffset(IMG_UINTPTR_T uiOffset, IMG_SIZE_T uiRealByteSize)
{
PKV_OFFSET_STRUCT psOffsetStruct;
#if !defined(PVR_MAKE_ALL_PFNS_SPECIAL)
list_for_each_entry(psOffsetStruct, &g_sMMapOffsetStructList, sMMapItem)
{
- if (ui32Offset == psOffsetStruct->ui32MMapOffset && ui32RealByteSize == psOffsetStruct->ui32RealByteSize && psOffsetStruct->ui32PID == ui32PID)
+ if (uiOffset == psOffsetStruct->uiMMapOffset && uiRealByteSize == psOffsetStruct->uiRealByteSize && psOffsetStruct->ui32PID == ui32PID)
{
#if !defined(PVR_MAKE_ALL_PFNS_SPECIAL)
/*
* as different threads may be mapping different memory areas
* with the same offset.
*/
- if (!PFNIsPhysical(ui32Offset) || psOffsetStruct->ui32TID == ui32TID)
+ if (!PFNIsPhysical(uiOffset) || psOffsetStruct->ui32TID == ui32TID)
#endif
{
return psOffsetStruct;
static IMG_BOOL
DoMapToUser(LinuxMemArea *psLinuxMemArea,
struct vm_area_struct* ps_vma,
- IMG_UINT32 ui32ByteOffset)
+ IMG_UINTPTR_T uiByteOffset)
{
- IMG_UINT32 ui32ByteSize;
+ IMG_SIZE_T uiByteSize;
- if ((psLinuxMemArea->hBMHandle) && (ui32ByteOffset != 0))
+ if ((psLinuxMemArea->hBMHandle) && (uiByteOffset != 0))
{
/* Partial mapping of sparse allocations should never happen */
return IMG_FALSE;
{
return DoMapToUser(LinuxMemAreaRoot(psLinuxMemArea), /* PRQA S 3670 */ /* allow recursion */
ps_vma,
- psLinuxMemArea->uData.sSubAlloc.ui32ByteOffset + ui32ByteOffset);
+ psLinuxMemArea->uData.sSubAlloc.uiByteOffset + uiByteOffset);
}
/*
* Note that ui32ByteSize may be larger than the size of the memory
* area being mapped, as the former is a multiple of the page size.
*/
- ui32ByteSize = ps_vma->vm_end - ps_vma->vm_start;
- PVR_ASSERT(ADDR_TO_PAGE_OFFSET(ui32ByteSize) == 0);
+ uiByteSize = ps_vma->vm_end - ps_vma->vm_start;
+ PVR_ASSERT(ADDR_TO_PAGE_OFFSET(uiByteSize) == 0);
#if defined (__sparc__)
/*
#if !defined(PVR_MAKE_ALL_PFNS_SPECIAL)
if (PFNIsPhysical(ps_vma->vm_pgoff))
{
- IMG_INT result;
+ IMG_INT result;
- PVR_ASSERT(LinuxMemAreaPhysIsContig(psLinuxMemArea));
- PVR_ASSERT(LinuxMemAreaToCpuPFN(psLinuxMemArea, ui32ByteOffset) == ps_vma->vm_pgoff);
+ PVR_ASSERT(LinuxMemAreaPhysIsContig(psLinuxMemArea));
+ PVR_ASSERT(LinuxMemAreaToCpuPFN(psLinuxMemArea, ui32ByteOffset) == ps_vma->vm_pgoff);
/*
* Since the memory is contiguous, we can map the whole range in one
* go .
PVR_ASSERT(psLinuxMemArea->hBMHandle == IMG_NULL);
- result = IO_REMAP_PFN_RANGE(ps_vma, ps_vma->vm_start, ps_vma->vm_pgoff, ui32ByteSize, ps_vma->vm_page_prot);
+ result = IO_REMAP_PFN_RANGE(ps_vma, ps_vma->vm_start, ps_vma->vm_pgoff, uiByteSize, ps_vma->vm_page_prot);
if(result == 0)
{
#endif
{
- /*
+ /*
* Memory may be non-contiguous, so we map the range page,
* by page. Since VM_PFNMAP mappings are assumed to be physically
* contiguous, we can't legally use REMAP_PFN_RANGE (that is, we
* finding the page structure corresponding to each page, or
* if mixed maps are supported (VM_MIXEDMAP), vm_insert_mixed.
*/
- IMG_UINT32 ulVMAPos;
- IMG_UINT32 ui32ByteEnd = ui32ByteOffset + ui32ByteSize;
- IMG_UINT32 ui32PA;
- IMG_UINT32 ui32AdjustedPA = ui32ByteOffset;
+ IMG_UINTPTR_T ulVMAPos;
+ IMG_UINTPTR_T uiByteEnd = uiByteOffset + uiByteSize;
+ IMG_UINTPTR_T uiPA;
+ IMG_UINTPTR_T uiAdjustedPA = uiByteOffset;
#if defined(PVR_MAKE_ALL_PFNS_SPECIAL)
- IMG_BOOL bMixedMap = IMG_FALSE;
+ IMG_BOOL bMixedMap = IMG_FALSE;
#endif
/* First pass, validate the page frame numbers */
- for(ui32PA = ui32ByteOffset; ui32PA < ui32ByteEnd; ui32PA += PAGE_SIZE)
+ for(uiPA = uiByteOffset; uiPA < uiByteEnd; uiPA += PAGE_SIZE)
{
- IMG_UINT32 pfn;
+ IMG_UINTPTR_T pfn;
IMG_BOOL bMapPage = IMG_TRUE;
if (psLinuxMemArea->hBMHandle)
{
- if (!BM_MapPageAtOffset(psLinuxMemArea->hBMHandle, ui32PA))
+ if (!BM_MapPageAtOffset(psLinuxMemArea->hBMHandle, uiPA))
{
bMapPage = IMG_FALSE;
}
if (bMapPage)
{
- pfn = LinuxMemAreaToCpuPFN(psLinuxMemArea, ui32AdjustedPA);
+ pfn = LinuxMemAreaToCpuPFN(psLinuxMemArea, uiAdjustedPA);
if (!pfn_valid(pfn))
{
#if !defined(PVR_MAKE_ALL_PFNS_SPECIAL)
- PVR_DPF((PVR_DBG_ERROR,"%s: Error - PFN invalid: 0x%x", __FUNCTION__, pfn));
+ PVR_DPF((PVR_DBG_ERROR,"%s: Error - PFN invalid: 0x" UINTPTR_FMT, __FUNCTION__, pfn));
return IMG_FALSE;
#else
bMixedMap = IMG_TRUE;
#endif
}
- ui32AdjustedPA += PAGE_SIZE;
+ else if (0 == page_count(pfn_to_page(pfn)))
+ {
+ bMixedMap = IMG_TRUE;
+ }
+ uiAdjustedPA += PAGE_SIZE;
}
}
#if defined(PVR_MAKE_ALL_PFNS_SPECIAL)
- if (bMixedMap)
- {
- ps_vma->vm_flags |= VM_MIXEDMAP;
- }
+ if (bMixedMap)
+ {
+ ps_vma->vm_flags |= VM_MIXEDMAP;
+ }
#endif
/* Second pass, get the page structures and insert the pages */
ulVMAPos = ps_vma->vm_start;
- ui32AdjustedPA = ui32ByteOffset;
- for(ui32PA = ui32ByteOffset; ui32PA < ui32ByteEnd; ui32PA += PAGE_SIZE)
+ uiAdjustedPA = uiByteOffset;
+ for(uiPA = uiByteOffset; uiPA < uiByteEnd; uiPA += PAGE_SIZE)
{
- IMG_UINT32 pfn;
+ IMG_UINTPTR_T pfn;
IMG_INT result;
IMG_BOOL bMapPage = IMG_TRUE;
if (psLinuxMemArea->hBMHandle)
{
/* We have a sparse allocation, check if this page should be mapped */
- if (!BM_MapPageAtOffset(psLinuxMemArea->hBMHandle, ui32PA))
+ if (!BM_MapPageAtOffset(psLinuxMemArea->hBMHandle, uiPA))
{
bMapPage = IMG_FALSE;
}
if (bMapPage)
{
- pfn = LinuxMemAreaToCpuPFN(psLinuxMemArea, ui32AdjustedPA);
+ pfn = LinuxMemAreaToCpuPFN(psLinuxMemArea, uiAdjustedPA);
#if defined(PVR_MAKE_ALL_PFNS_SPECIAL)
if (bMixedMap)
else
#endif
{
- struct page *psPage;
+ struct page *psPage;
PVR_ASSERT(pfn_valid(pfn));
return IMG_FALSE;
}
}
- ui32AdjustedPA += PAGE_SIZE;
+ uiAdjustedPA += PAGE_SIZE;
+ }
+ ulVMAPos += PAGE_SIZE;
}
- ulVMAPos += PAGE_SIZE;
- }
- }
+ }
return IMG_TRUE;
}
#if defined(DEBUG_LINUX_MMAP_AREAS)
PVR_DPF((PVR_DBG_MESSAGE,
- "%s: psLinuxMemArea 0x%p, KVAddress 0x%p MMapOffset %d, ui32Mapped %d",
+ "%s: psLinuxMemArea 0x%p, KVAddress 0x%p MMapOffset " UINTPTR_FMT ", ui32Mapped %d",
__FUNCTION__,
psOffsetStruct->psLinuxMemArea,
LinuxMemAreaToCpuVAddr(psOffsetStruct->psLinuxMemArea),
- psOffsetStruct->ui32MMapOffset,
+ psOffsetStruct->uiMMapOffset,
psOffsetStruct->ui32Mapped));
#endif
}
static void
MMapVOpen(struct vm_area_struct* ps_vma)
{
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
MMapVOpenNoLock(ps_vma);
#if defined(DEBUG_LINUX_MMAP_AREAS)
PVR_DPF((PVR_DBG_MESSAGE,
- "%s: psLinuxMemArea %p, CpuVAddr %p ui32MMapOffset %d, ui32Mapped %d",
+ "%s: psLinuxMemArea %p, CpuVAddr %p uiMMapOffset " UINTPTR_FMT ", ui32Mapped %d",
__FUNCTION__,
psOffsetStruct->psLinuxMemArea,
LinuxMemAreaToCpuVAddr(psOffsetStruct->psLinuxMemArea),
- psOffsetStruct->ui32MMapOffset,
+ psOffsetStruct->uiMMapOffset,
psOffsetStruct->ui32Mapped));
#endif
{
if (psOffsetStruct->ui32RefCount != 0)
{
- PVR_DPF((PVR_DBG_MESSAGE, "%s: psOffsetStruct %p has non-zero reference count (ui32RefCount = %u). User mode address of start of mapping: 0x%x", __FUNCTION__, psOffsetStruct, psOffsetStruct->ui32RefCount, psOffsetStruct->ui32UserVAddr));
+ PVR_DPF((
+ PVR_DBG_MESSAGE,
+ "%s: psOffsetStruct %p has non-zero reference count (ui32RefCount = %u). User mode address of start of mapping: 0x" UINTPTR_FMT,
+ __FUNCTION__,
+ psOffsetStruct,
+ psOffsetStruct->ui32RefCount,
+ psOffsetStruct->uiUserVAddr));
}
DestroyOffsetStruct(psOffsetStruct);
static void
MMapVClose(struct vm_area_struct* ps_vma)
{
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
MMapVCloseNoLock(ps_vma);
int iRetVal = -EINVAL;
IMG_VOID *pvKernelAddr;
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
psOffsetStruct = (PKV_OFFSET_STRUCT)ps_vma->vm_private_data;
psLinuxMemArea = psOffsetStruct->psLinuxMemArea;
ulOffset = addr - ps_vma->vm_start;
- if (ulOffset+len > psLinuxMemArea->ui32ByteSize)
+ if (ulOffset+len > psLinuxMemArea->uiByteSize)
/* Out of range. We shouldn't get here, because the kernel will do
the necessary checks before calling access_process_vm. */
goto exit_unlock;
}
else
{
- IMG_UINT32 pfn, ui32OffsetInPage;
+ IMG_UINTPTR_T pfn, uiOffsetInPage;
struct page *page;
pfn = LinuxMemAreaToCpuPFN(psLinuxMemArea, ulOffset);
goto exit_unlock;
page = pfn_to_page(pfn);
- ui32OffsetInPage = ADDR_TO_PAGE_OFFSET(ulOffset);
+ uiOffsetInPage = ADDR_TO_PAGE_OFFSET(ulOffset);
- if (ui32OffsetInPage+len > PAGE_SIZE)
+ if (uiOffsetInPage + len > PAGE_SIZE)
/* The region crosses a page boundary */
goto exit_unlock;
pvKernelAddr = kmap(page);
- memcpy(buf, pvKernelAddr+ui32OffsetInPage, len);
+ memcpy(buf, pvKernelAddr + uiOffsetInPage, len);
kunmap(page);
iRetVal = len;
{
LinuxMemArea *psFlushMemArea = IMG_NULL;
PKV_OFFSET_STRUCT psOffsetStruct;
- IMG_UINT32 ui32ByteSize;
+ IMG_SIZE_T uiByteSize;
IMG_VOID *pvBase = IMG_NULL;
int iRetVal = 0;
- IMG_UINT32 ui32ByteOffset = 0; /* Keep compiler happy */
- IMG_UINT32 ui32FlushSize = 0;
+ IMG_UINTPTR_T uiByteOffset = 0; /* Keep compiler happy */
+ IMG_SIZE_T uiFlushSize = 0;
PVR_UNREFERENCED_PARAMETER(pFile);
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
- ui32ByteSize = ps_vma->vm_end - ps_vma->vm_start;
+ uiByteSize = ps_vma->vm_end - ps_vma->vm_start;
- PVR_DPF((PVR_DBG_MESSAGE, "%s: Received mmap(2) request with ui32MMapOffset 0x%08lx,"
- " and ui32ByteSize %d(0x%08x)",
+ PVR_DPF((PVR_DBG_MESSAGE, "%s: Received mmap(2) request with ui32MMapOffset 0x" UINTPTR_FMT ","
+ " and uiByteSize %" SIZE_T_FMT_LEN "u(0x%" SIZE_T_FMT_LEN "x)",
__FUNCTION__,
ps_vma->vm_pgoff,
- ui32ByteSize, ui32ByteSize));
+ uiByteSize,
+ uiByteSize));
- psOffsetStruct = FindOffsetStructByOffset(ps_vma->vm_pgoff, ui32ByteSize);
+ psOffsetStruct = FindOffsetStructByOffset(ps_vma->vm_pgoff, uiByteSize);
if (psOffsetStruct == IMG_NULL)
{
#if defined(SUPPORT_DRI_DRM)
- LinuxUnLockMutex(&g_sMMapMutex);
+ LinuxUnLockMutex(&g_sMMapMutex);
#if !defined(SUPPORT_DRI_DRM_EXT)
- /* Pass unknown requests onto the DRM module */
- return drm_mmap(pFile, ps_vma);
+ /* Pass unknown requests onto the DRM module */
+ return drm_mmap(pFile, ps_vma);
#else
/*
* Indicate to caller that the request is not for us.
PVR_DPF((PVR_DBG_MESSAGE, "%s: Mapped psLinuxMemArea 0x%p\n",
__FUNCTION__, psOffsetStruct->psLinuxMemArea));
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0))
ps_vma->vm_flags |= VM_RESERVED;
+#else
+ ps_vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP; /* Don't swap */
+#endif
+
ps_vma->vm_flags |= VM_IO;
/*
iRetVal = -EINVAL;
goto unlock_and_return;
}
-
+
+#ifdef CONFIG_ARCH_OMAP5
+ {
+ IMG_BOOL bModPageProt = IMG_FALSE;
+
+ /* In OMAP5, the Cortex A15 no longer masks an issue with the L2
+ * interconnect. Write-combined access to the TILER aperture will
+ * generate SIGBUS / "non-line fetch abort" errors due to L2
+ * interconnect bus accesses. The workaround is to use a shared
+ * device access.
+ */
+
+ bModPageProt |= (psOffsetStruct->psLinuxMemArea->eAreaType == LINUX_MEM_AREA_ION);
+
+#ifdef CONFIG_DSSCOMP
+ bModPageProt |= is_tiler_addr(LinuxMemAreaToCpuPAddr(psOffsetStruct->psLinuxMemArea, 0).uiAddr);
+#endif /* CONFIG_DSSCOMP */
+
+ if (bModPageProt)
+ {
+ ps_vma->vm_page_prot = __pgprot_modify(ps_vma->vm_page_prot,
+ L_PTE_MT_MASK,
+ L_PTE_MT_DEV_SHARED);
+ }
+ }
+#endif /* CONFIG_ARCH_OMAP5 */
+
/* Install open and close handlers for ref-counting */
ps_vma->vm_ops = &MMapIOOps;
goto unlock_and_return;
}
- PVR_ASSERT(psOffsetStruct->ui32UserVAddr == 0);
+ PVR_ASSERT(psOffsetStruct->uiUserVAddr == 0);
- psOffsetStruct->ui32UserVAddr = ps_vma->vm_start;
+ psOffsetStruct->uiUserVAddr = ps_vma->vm_start;
/* Compute the flush region (if necessary) inside the mmap mutex */
if(psOffsetStruct->psLinuxMemArea->bNeedsCacheInvalidate)
if (psFlushMemArea->hBMHandle)
{
pvBase = (IMG_VOID *)ps_vma->vm_start;
- ui32ByteOffset = 0;
- ui32FlushSize = BM_GetVirtualSize(psFlushMemArea->hBMHandle);
+ uiByteOffset = 0;
+ uiFlushSize = BM_GetVirtualSize(psFlushMemArea->hBMHandle);
}
else
{
- IMG_UINT32 ui32DummyByteSize;
+ IMG_SIZE_T uiDummyByteSize;
DetermineUsersSizeAndByteOffset(psFlushMemArea,
- &ui32DummyByteSize,
- &ui32ByteOffset);
+ &uiDummyByteSize,
+ &uiByteOffset);
- pvBase = (IMG_VOID *)ps_vma->vm_start + ui32ByteOffset;
- ui32FlushSize = psFlushMemArea->ui32ByteSize;
+ pvBase = (IMG_VOID *)ps_vma->vm_start + uiByteOffset;
+ uiFlushSize = psFlushMemArea->uiByteSize;
}
psFlushMemArea->bNeedsCacheInvalidate = IMG_FALSE;
/* Call the open routine to increment the usage count */
MMapVOpenNoLock(ps_vma);
- PVR_DPF((PVR_DBG_MESSAGE, "%s: Mapped area at offset 0x%08lx\n",
- __FUNCTION__, ps_vma->vm_pgoff));
+ PVR_DPF((PVR_DBG_MESSAGE, "%s: Mapped area at offset 0x" UINTPTR_FMT "\n",
+ __FUNCTION__, (IMG_UINTPTR_T)ps_vma->vm_pgoff));
unlock_and_return:
if (iRetVal != 0 && psOffsetStruct != IMG_NULL)
if(psFlushMemArea)
{
- OSInvalidateCPUCacheRangeKM(psFlushMemArea, ui32ByteOffset, pvBase,
- ui32FlushSize);
+ OSInvalidateCPUCacheRangeKM(psFlushMemArea, uiByteOffset, pvBase,
+ uiFlushSize);
}
return iRetVal;
{
if(start)
{
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
}
else
{
{
KV_OFFSET_STRUCT *psOffsetStruct = (KV_OFFSET_STRUCT*)el;
LinuxMemArea *psLinuxMemArea;
- IMG_UINT32 ui32RealByteSize;
- IMG_UINT32 ui32ByteOffset;
+ IMG_SIZE_T uiRealByteSize;
+ IMG_UINTPTR_T uiByteOffset;
if(el == PVR_PROC_SEQ_START_TOKEN)
{
seq_printf( sfile,
#if !defined(DEBUG_LINUX_XML_PROC_FILES)
"Allocations registered for mmap: %u\n"
- "In total these areas correspond to %u bytes\n"
+ "In total these areas correspond to %" SIZE_T_FMT_LEN "u bytes\n"
"psLinuxMemArea "
"UserVAddr "
"KernelVAddr "
#else
"<mmap_header>\n"
"\t<count>%u</count>\n"
- "\t<bytes>%u</bytes>\n"
+ "\t<bytes>%" SIZE_T_FMT_LEN "u</bytes>\n"
"</mmap_header>\n",
#endif
g_ui32RegisteredAreas,
- g_ui32TotalByteSize
+ g_uiTotalByteSize
);
return;
}
psLinuxMemArea = psOffsetStruct->psLinuxMemArea;
DetermineUsersSizeAndByteOffset(psLinuxMemArea,
- &ui32RealByteSize,
- &ui32ByteOffset);
+ &uiRealByteSize,
+ &uiByteOffset);
seq_printf( sfile,
#if !defined(DEBUG_LINUX_XML_PROC_FILES)
- "%-8p %08x %-8p %08x %08x %-8d %-24s %-5u %-8s %08x(%s)\n",
+ "%p %p %p " CPUPADDR_FMT " " UINTPTR_FMT " %" SIZE_T_FMT_LEN "u %-24s %-5u %-8s %08x(%s)\n",
#else
"<mmap_record>\n"
- "\t<pointer>%-8p</pointer>\n"
- "\t<user_virtual>%-8x</user_virtual>\n"
- "\t<kernel_virtual>%-8p</kernel_virtual>\n"
- "\t<cpu_physical>%08x</cpu_physical>\n"
- "\t<mmap_offset>%08x</mmap_offset>\n"
- "\t<bytes>%-8d</bytes>\n"
+ "\t<pointer>%p</pointer>\n"
+ "\t<user_virtual>%p</user_virtual>\n"
+ "\t<kernel_virtual>%p</kernel_virtual>\n"
+ "\t<cpu_physical>" CPUPADDR_FMT "</cpu_physical>\n"
+ "\t<mmap_offset>" UINTPTR_FMT "</mmap_offset>\n"
+ "\t<bytes>%" SIZE_T_FMT_LEN "u</bytes>\n"
"\t<linux_mem_area_type>%-24s</linux_mem_area_type>\n"
"\t<pid>%-5u</pid>\n"
"\t<name>%-8s</name>\n"
"</mmap_record>\n",
#endif
psLinuxMemArea,
- psOffsetStruct->ui32UserVAddr + ui32ByteOffset,
+ (IMG_PVOID)(psOffsetStruct->uiUserVAddr + uiByteOffset),
LinuxMemAreaToCpuVAddr(psLinuxMemArea),
LinuxMemAreaToCpuPAddr(psLinuxMemArea,0).uiAddr,
- psOffsetStruct->ui32MMapOffset,
- psLinuxMemArea->ui32ByteSize,
+ (IMG_UINTPTR_T)psOffsetStruct->uiMMapOffset,
+ psLinuxMemArea->uiByteSize,
LinuxMemAreaTypeToString(psLinuxMemArea->eAreaType),
psOffsetStruct->ui32PID,
psOffsetStruct->pszName,
const IMG_CHAR *pszName = LinuxMemAreaTypeToString(LinuxMemAreaRootType(psLinuxMemArea));
#endif
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
#if defined(DEBUG) || defined(DEBUG_LINUX_MMAP_AREAS)
PVR_DPF((PVR_DBG_MESSAGE,
*/
if (psLinuxMemArea->eAreaType != LINUX_MEM_AREA_SUB_ALLOC)
{
- g_ui32TotalByteSize += psLinuxMemArea->ui32ByteSize;
+ g_uiTotalByteSize += psLinuxMemArea->uiByteSize;
}
#endif
PVRSRV_ERROR eError;
PKV_OFFSET_STRUCT psOffsetStruct, psTmpOffsetStruct;
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
PVR_ASSERT(psLinuxMemArea->bMMapRegistered);
g_ui32RegisteredAreas--;
if (psLinuxMemArea->eAreaType != LINUX_MEM_AREA_SUB_ALLOC)
{
- g_ui32TotalByteSize -= psLinuxMemArea->ui32ByteSize;
+ g_uiTotalByteSize -= psLinuxMemArea->uiByteSize;
}
#endif
PVR_UNREFERENCED_PARAMETER(psEnvPerProc);
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
list_for_each_entry_safe(psOffsetStruct, psTmpOffsetStruct, &g_sMMapOffsetStructList, sMMapItem)
{
* contiguous), or it may represent the secure handle associated
* with the area.
*/
- IMG_UINT32 ui32MMapOffset;
-
- IMG_UINT32 ui32RealByteSize;
+ IMG_UINTPTR_T uiMMapOffset;
+
+ IMG_SIZE_T uiRealByteSize;
/* Memory area associated with this offset structure */
LinuxMemArea *psLinuxMemArea;
* User mode address of start of mapping. This is not necessarily the
* first user mode address of the memory area.
*/
- IMG_UINT32 ui32UserVAddr;
+ IMG_UINTPTR_T uiUserVAddr;
/* Extra entries to support proc filesystem debug info */
#if defined(DEBUG_LINUX_MMAP_AREAS)
* @Return PVRSRV_ERROR
******************************************************************************/
PVRSRV_ERROR PVRMMapOSMemHandleToMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMHandle,
-#else
IMG_HANDLE hMHandle,
-#endif
- IMG_UINT32 *pui32MMapOffset,
- IMG_UINT32 *pui32ByteOffset,
- IMG_UINT32 *pui32RealByteSize,
- IMG_UINT32 *pui32UserVAddr);
+ IMG_UINTPTR_T *puiMMapOffset,
+ IMG_UINTPTR_T *puiByteOffset,
+ IMG_SIZE_T *puiRealByteSize,
+ IMG_UINTPTR_T *puiUserVAddr);
/*!
*******************************************************************************
******************************************************************************/
PVRSRV_ERROR
PVRMMapReleaseMMapData(PVRSRV_PER_PROCESS_DATA *psPerProc,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMHandle,
-#else
IMG_HANDLE hMHandle,
-#endif
IMG_BOOL *pbMUnmap,
- IMG_UINT32 *pui32RealByteSize,
- IMG_UINT32 *pui32UserVAddr);
+ IMG_SIZE_T *puiRealByteSize,
+ IMG_UINTPTR_T *puiUserVAddr);
/*!
*******************************************************************************
#include "lock.h"
#include "linkage.h"
#include "buffer_manager.h"
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+#include "pvr_sync.h"
+#endif
#if defined(SUPPORT_DRI_DRM)
#include "pvr_drm.h"
*/
#if defined(PVR_LDM_MODULE)
//#define DRVNAME PVR_LDM_DRIVER_REGISTRATION_NAME
-#define DRVNAME PVRSRV_MODNAME
+#define DRVNAME PVRSRV_MODNAME
#endif
#define DEVNAME PVRSRV_MODNAME
#include <linux/omap_ion.h>
extern struct ion_device *omap_ion_device;
struct ion_client *gpsIONClient;
-EXPORT_SYMBOL(gpsIONClient);
#endif /* defined(CONFIG_ION_OMAP) */
/* PRQA S 3207 2 */ /* ignore 'not used' warning */
static IMG_UINT32 gPVRPowerLevel;
#endif
+static int PVRSRVIONClientCreate(void)
+{
+#if defined(CONFIG_ION_OMAP)
+ gpsIONClient = ion_client_create(omap_ion_device,
+ 1 << OMAP_ION_HEAP_TYPE_TILER,
+ "pvr");
+ if (IS_ERR_OR_NULL(gpsIONClient))
+ {
+ int err;
+
+ PVR_DPF((PVR_DBG_ERROR, "PVRSRVDriverProbe: Couldn't create ion client"));
+
+ err = PTR_ERR(gpsIONClient);
+ gpsIONClient = IMG_NULL;
+
+ return err;
+ }
+#endif /* defined(CONFIG_ION_OMAP) */
+
+ return 0;
+}
+
+static void PVRSRVIONClientDestroy(void)
+{
+#if defined(CONFIG_ION_OMAP)
+ if (gpsIONClient != NULL)
+ {
+ ion_client_destroy(gpsIONClient);
+ gpsIONClient = IMG_NULL;
+ }
+#endif
+}
+
#if defined(PVR_LDM_MODULE)
#if defined(PVR_LDM_PLATFORM_MODULE)
#if defined(MODULE) && defined(PVR_LDM_PLATFORM_MODULE) && \
!defined(PVR_USE_PRE_REGISTERED_PLATFORM_DEV)
+#if !defined(PM_RUNTIME_SUPPORT)
static void PVRSRVDeviceRelease(struct device unref__ *pDevice)
{
}
-
static struct platform_device powervr_device = {
.name = DEVNAME,
.id = -1,
}
};
#endif
+#endif
/*!
******************************************************************************
}
}
-#if defined(CONFIG_ION_OMAP)
- gpsIONClient = ion_client_create(omap_ion_device,
- 1 << ION_HEAP_TYPE_CARVEOUT |
- 1 << OMAP_ION_HEAP_TYPE_TILER,
- "pvr");
- if (IS_ERR_OR_NULL(gpsIONClient))
- {
- PVR_DPF((PVR_DBG_ERROR, "PVRSRVDriverProbe: Couldn't create ion client"));
- return PTR_ERR(gpsIONClient);
- }
-#endif /* defined(CONFIG_ION_OMAP) */
-
- return 0;
+ return PVRSRVIONClientCreate();
}
PVR_TRACE(("PVRSRVDriverRemove(pDevice=%p)", pDevice));
-#if defined(CONFIG_ION_OMAP)
- ion_client_destroy(gpsIONClient);
- gpsIONClient = IMG_NULL;
-#endif
+ PVRSRVIONClientDestroy();
SysAcquireData(&psSysData);
* processes trying to use the driver after it has been
* shutdown.
*/
- LinuxLockMutex(&gPVRSRVLock);
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
(void) PVRSRVSetPowerStateKM(PVRSRV_SYS_POWER_STATE_D3);
}
if (!bDriverIsSuspended && !bDriverIsShutdown)
{
- LinuxLockMutex(&gPVRSRVLock);
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
if (PVRSRVSetPowerStateKM(PVRSRV_SYS_POWER_STATE_D3) == PVRSRV_OK)
{
PVRSRV_ENV_PER_PROCESS_DATA *psEnvPerProc;
#endif
- LinuxLockMutex(&gPVRSRVLock);
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
ui32PID = OSGetCurrentProcessIDKM();
if(eError != PVRSRV_OK)
goto err_unlock;
-#if defined (SUPPORT_SID_INTERFACE)
- psPrivateData->hKernelMemInfo = 0;
-#else
psPrivateData->hKernelMemInfo = NULL;
-#endif
#if defined(SUPPORT_DRI_DRM) && defined(PVR_SECURE_DRM_AUTH_EXPORT)
psPrivateData->psDRMFile = pFile;
PVRSRV_FILE_PRIVATE_DATA *psPrivateData;
int err = 0;
- LinuxLockMutex(&gPVRSRVLock);
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
#if defined(SUPPORT_DRI_DRM)
psPrivateData = (PVRSRV_FILE_PRIVATE_DATA *)pvPrivData;
struct device *psDev;
#endif
+
+
#if !defined(SUPPORT_DRI_DRM)
/*
* Must come before attempting to print anything via Services.
}
LinuxBridgeInit();
+
PVRMMapInit();
}
#if defined(MODULE) && !defined(PVR_USE_PRE_REGISTERED_PLATFORM_DEV)
+#if !defined(PM_RUNTIME_SUPPORT)
if ((error = platform_device_register(&powervr_device)) != 0)
{
platform_driver_unregister(&powervr_driver);
goto init_failed;
}
#endif
+#endif
#endif /* PVR_LDM_PLATFORM_MODULE */
#if defined(PVR_LDM_PCI_MODULE)
#endif
goto init_failed;
}
+
+ error = PVRSRVIONClientCreate();
+ if (error != 0)
+ {
+ goto sys_deinit;
+ }
#endif /* !defined(PVR_LDM_MODULE) */
#if !defined(SUPPORT_DRI_DRM)
#endif /* defined(PVR_LDM_DEVICE_CLASS) */
#endif /* !defined(SUPPORT_DRI_DRM) */
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ PVRSyncDeviceInit();
+#endif
return 0;
#if !defined(SUPPORT_DRI_DRM)
unregister_device:
unregister_chrdev((IMG_UINT)AssignedMajorNumber, DEVNAME);
#endif
+#endif
+#if !defined(PVR_LDM_MODULE) || !defined(SUPPORT_DRI_DRM)
sys_deinit:
#endif
#if defined(PVR_LDM_MODULE)
#if defined (PVR_LDM_PLATFORM_MODULE)
#if defined(MODULE) && !defined(PVR_USE_PRE_REGISTERED_PLATFORM_DEV)
+#if !defined(PM_RUNTIME_SUPPORT)
platform_device_unregister(&powervr_device);
+#endif
#endif
platform_driver_unregister(&powervr_driver);
#endif
#else /* defined(PVR_LDM_MODULE) */
+ PVRSRVIONClientDestroy();
+
/* LDM drivers call SysDeinitialise during PVRSRVDriverRemove */
{
SYS_DATA *psSysData;
SysAcquireData(&psSysData);
#endif
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ PVRSyncDeviceDeInit();
+#endif
+
#if !defined(SUPPORT_DRI_DRM)
#if defined(PVR_LDM_DEVICE_CLASS)
#if defined (PVR_LDM_PLATFORM_MODULE)
#if defined(MODULE) && !defined(PVR_USE_PRE_REGISTERED_PLATFORM_DEV)
+#if !defined(PM_RUNTIME_SUPPORT)
platform_device_unregister(&powervr_device);
+#endif
#endif
platform_driver_unregister(&powervr_driver);
#endif
}
}
#endif
+ PVRSRVIONClientDestroy();
+
/* LDM drivers call SysDeinitialise during PVRSRVDriverRemove */
(void) SysDeinitialise(psSysData);
#endif /* defined(PVR_LDM_MODULE) */
mutex_lock(psPVRSRVMutex);
}
+IMG_VOID LinuxLockMutexNested(PVRSRV_LINUX_MUTEX *psPVRSRVMutex, unsigned int uiLockClass)
+{
+ mutex_lock_nested(psPVRSRVMutex, uiLockClass);
+}
+
PVRSRV_ERROR LinuxLockMutexInterruptible(PVRSRV_LINUX_MUTEX *psPVRSRVMutex)
{
if(mutex_lock_interruptible(psPVRSRVMutex) == -EINTR)
atomic_dec(&psPVRSRVMutex->Count);
}
+IMG_VOID LinuxLockMutexNested(PVRSRV_LINUX_MUTEX *psPVRSRVMutex, unsigned int uiLockClass)
+{
+ LinuxLockMutex(psPVRSRVMutex);
+}
+
PVRSRV_ERROR LinuxLockMutexInterruptible(PVRSRV_LINUX_MUTEX *psPVRSRVMutex)
{
if(down_interruptible(&psPVRSRVMutex->sSemaphore) == -EINTR)
atomic_dec(&psPVRSRVMutex->Count);
}
- return Status;
+ return Status == 0;
}
IMG_VOID LinuxUnLockMutex(PVRSRV_LINUX_MUTEX *psPVRSRVMutex)
#endif
+enum PVRSRV_MUTEX_LOCK_CLASS
+{
+ PVRSRV_LOCK_CLASS_BRIDGE,
+ PVRSRV_LOCK_CLASS_MMAP,
+};
extern IMG_VOID LinuxInitMutex(PVRSRV_LINUX_MUTEX *psPVRSRVMutex);
extern IMG_VOID LinuxLockMutex(PVRSRV_LINUX_MUTEX *psPVRSRVMutex);
+extern IMG_VOID LinuxLockMutexNested(PVRSRV_LINUX_MUTEX *psPVRSRVMutex, unsigned int uiLockClass);
+
extern PVRSRV_ERROR LinuxLockMutexInterruptible(PVRSRV_LINUX_MUTEX *psPVRSRVMutex);
extern IMG_INT32 LinuxTryLockMutex(PVRSRV_LINUX_MUTEX *psPVRSRVMutex);
#if defined(__arm__) || defined(__sh__)
#define PGPROT_WC(pv) pgprot_writecombine(pv)
#else
- #if defined(__i386__) || defined(__mips__)
+ #if defined(__i386__) || defined(__x86_64) || defined(__mips__)
#define PGPROT_WC(pv) pgprot_noncached(pv)
#else
#define PGPROT_WC(pv) pgprot_noncached(pv)
#include <asm/io.h>
#include <asm/page.h>
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
#include <asm/system.h>
#endif
#include <asm/cacheflush.h>
#include "linkage.h"
#include "pvr_uaccess.h"
#include "lock.h"
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+#include "pvr_sync.h"
+#endif
#if defined (SUPPORT_ION)
#include "ion.h"
#endif
-#if defined (CONFIG_X86_PAE)
-#error Physical Address Extension not supported with the driver
-#endif
-
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))
#define ON_EACH_CPU(func, info, wait) on_each_cpu(func, info, wait)
#else
#define ON_EACH_CPU(func, info, wait) on_each_cpu(func, info, 0, wait)
#endif
-#if 0
-#if defined(PVR_LINUX_USING_WORKQUEUES) && !defined(CONFIG_PREEMPT)
+//#if defined(PVR_LINUX_USING_WORKQUEUES) && !defined(CONFIG_PREEMPT)
/*
* Services spins at certain points waiting for events (e.g. swap
* chain destrucion). If those events rely on workqueues running,
* Removing the need for CONFIG_PREEMPT will require adding preemption
* points at various points in Services.
*/
-#error "A preemptible Linux kernel is required when using workqueues"
-#endif
-#endif
+//#error "A preemptible Linux kernel is required when using workqueues"
+//#endif
#if defined(EMULATOR)
#define EVENT_OBJECT_TIMEOUT_MS (2000)
#endif /* EMULATOR */
#if !defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-PVRSRV_ERROR OSAllocMem_Impl(IMG_UINT32 ui32Flags, IMG_UINT32 ui32Size, IMG_PVOID *ppvCpuVAddr, IMG_HANDLE *phBlockAlloc)
+PVRSRV_ERROR OSAllocMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T uiSize, IMG_PVOID *ppvCpuVAddr, IMG_HANDLE *phBlockAlloc)
#else
-PVRSRV_ERROR OSAllocMem_Impl(IMG_UINT32 ui32Flags, IMG_UINT32 ui32Size, IMG_PVOID *ppvCpuVAddr, IMG_HANDLE *phBlockAlloc, IMG_CHAR *pszFilename, IMG_UINT32 ui32Line)
+PVRSRV_ERROR OSAllocMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T uiSize, IMG_PVOID *ppvCpuVAddr, IMG_HANDLE *phBlockAlloc, IMG_CHAR *pszFilename, IMG_UINT32 ui32Line)
#endif
{
PVR_UNREFERENCED_PARAMETER(ui32Flags);
PVR_UNREFERENCED_PARAMETER(phBlockAlloc);
- if (ui32Size > PAGE_SIZE)
+ if (uiSize > PAGE_SIZE)
{
/* Try to allocate the memory using vmalloc */
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
- *ppvCpuVAddr = _VMallocWrapper(ui32Size, PVRSRV_HAP_CACHED, pszFilename, ui32Line);
+ *ppvCpuVAddr = _VMallocWrapper(uiSize, PVRSRV_HAP_CACHED, pszFilename, ui32Line);
#else
- *ppvCpuVAddr = VMallocWrapper(ui32Size, PVRSRV_HAP_CACHED);
+ *ppvCpuVAddr = VMallocWrapper(uiSize, PVRSRV_HAP_CACHED);
#endif
if (*ppvCpuVAddr)
{
}
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
- *ppvCpuVAddr = _KMallocWrapper(ui32Size, GFP_KERNEL | __GFP_NOWARN, pszFilename, ui32Line);
+ *ppvCpuVAddr = _KMallocWrapper(uiSize, GFP_KERNEL | __GFP_NOWARN, pszFilename, ui32Line);
#else
- *ppvCpuVAddr = KMallocWrapper(ui32Size, GFP_KERNEL | __GFP_NOWARN);
+ *ppvCpuVAddr = KMallocWrapper(uiSize, GFP_KERNEL | __GFP_NOWARN);
#endif
if (!*ppvCpuVAddr)
{
#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)) */
#if !defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
-PVRSRV_ERROR OSFreeMem_Impl(IMG_UINT32 ui32Flags, IMG_UINT32 ui32Size, IMG_PVOID pvCpuVAddr, IMG_HANDLE hBlockAlloc)
+PVRSRV_ERROR OSFreeMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T uiSize, IMG_PVOID pvCpuVAddr, IMG_HANDLE hBlockAlloc)
#else
-PVRSRV_ERROR OSFreeMem_Impl(IMG_UINT32 ui32Flags, IMG_UINT32 ui32Size, IMG_PVOID pvCpuVAddr, IMG_HANDLE hBlockAlloc, IMG_CHAR *pszFilename, IMG_UINT32 ui32Line)
+PVRSRV_ERROR OSFreeMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T uiSize, IMG_PVOID pvCpuVAddr, IMG_HANDLE hBlockAlloc, IMG_CHAR *pszFilename, IMG_UINT32 ui32Line)
#endif
{
PVR_UNREFERENCED_PARAMETER(ui32Flags);
- PVR_UNREFERENCED_PARAMETER(ui32Size);
+ PVR_UNREFERENCED_PARAMETER(uiSize);
PVR_UNREFERENCED_PARAMETER(hBlockAlloc);
if (is_vmalloc_addr(pvCpuVAddr))
PVRSRV_ERROR
OSAllocPages_Impl(IMG_UINT32 ui32AllocFlags,
- IMG_UINT32 ui32Size,
+ IMG_SIZE_T uiSize,
IMG_UINT32 ui32PageSize,
IMG_PVOID pvPrivData,
IMG_UINT32 ui32PrivDataLength,
/* We'll only see HAP_SINGLE_PROCESS with MEM_ION */
BUG_ON((ui32AllocFlags & PVRSRV_HAP_MAPTYPE_MASK) != PVRSRV_HAP_SINGLE_PROCESS);
- psLinuxMemArea = NewIONLinuxMemArea(ui32Size, ui32AllocFlags,
+ psLinuxMemArea = NewIONLinuxMemArea(uiSize, ui32AllocFlags,
pvPrivData, ui32PrivDataLength);
if(!psLinuxMemArea)
{
{
case PVRSRV_HAP_KERNEL_ONLY:
{
- psLinuxMemArea = NewVMallocLinuxMemArea(ui32Size, ui32AllocFlags);
+ psLinuxMemArea = NewVMallocLinuxMemArea(uiSize, ui32AllocFlags);
if(!psLinuxMemArea)
{
return PVRSRV_ERROR_OUT_OF_MEMORY;
/* Currently PVRSRV_HAP_SINGLE_PROCESS implies that we dont need a
* kernel virtual mapping, but will need a user space virtual mapping */
- psLinuxMemArea = NewAllocPagesLinuxMemArea(ui32Size, ui32AllocFlags);
+ psLinuxMemArea = NewAllocPagesLinuxMemArea(uiSize, ui32AllocFlags);
if(!psLinuxMemArea)
{
return PVRSRV_ERROR_OUT_OF_MEMORY;
* VIPT architectures. */
ui32AllocFlags &= ~PVRSRV_HAP_CACHED;
#endif
- psLinuxMemArea = NewVMallocLinuxMemArea(ui32Size, ui32AllocFlags);
+ psLinuxMemArea = NewVMallocLinuxMemArea(uiSize, ui32AllocFlags);
if(!psLinuxMemArea)
{
return PVRSRV_ERROR_OUT_OF_MEMORY;
PVRSRV_ERROR
-OSFreePages(IMG_UINT32 ui32AllocFlags, IMG_UINT32 ui32Bytes, IMG_VOID *pvCpuVAddr, IMG_HANDLE hOSMemHandle)
+OSFreePages(IMG_UINT32 ui32AllocFlags, IMG_SIZE_T uiBytes, IMG_VOID *pvCpuVAddr, IMG_HANDLE hOSMemHandle)
{
LinuxMemArea *psLinuxMemArea;
PVRSRV_ERROR eError;
- PVR_UNREFERENCED_PARAMETER(ui32Bytes);
+ PVR_UNREFERENCED_PARAMETER(uiBytes);
PVR_UNREFERENCED_PARAMETER(pvCpuVAddr);
psLinuxMemArea = (LinuxMemArea *)hOSMemHandle;
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
- "OSFreePages(ui32AllocFlags=0x%08X, ui32Bytes=%d, "
+ "OSFreePages(ui32AllocFlags=0x%08X, ui32Bytes=%" SIZE_T_FMT_LEN "u, "
"pvCpuVAddr=%p, hOSMemHandle=%p) FAILED!",
- ui32AllocFlags, ui32Bytes, pvCpuVAddr, hOSMemHandle));
+ ui32AllocFlags, uiBytes, pvCpuVAddr, hOSMemHandle));
return eError;
}
break;
PVRSRV_ERROR
OSGetSubMemHandle(IMG_HANDLE hOSMemHandle,
- IMG_UINT32 ui32ByteOffset,
- IMG_UINT32 ui32Bytes,
+ IMG_UINTPTR_T uiByteOffset,
+ IMG_SIZE_T uiBytes,
IMG_UINT32 ui32Flags,
IMG_HANDLE *phOSMemHandleRet)
{
psParentLinuxMemArea = (LinuxMemArea *)hOSMemHandle;
- psLinuxMemArea = NewSubLinuxMemArea(psParentLinuxMemArea, ui32ByteOffset, ui32Bytes);
+ psLinuxMemArea = NewSubLinuxMemArea(psParentLinuxMemArea, uiByteOffset, uiBytes);
if(!psLinuxMemArea)
{
*phOSMemHandleRet = NULL;
IMG_CPU_PHYADDR
-OSMemHandleToCpuPAddr(IMG_VOID *hOSMemHandle, IMG_UINT32 ui32ByteOffset)
+OSMemHandleToCpuPAddr(IMG_VOID *hOSMemHandle, IMG_UINTPTR_T uiByteOffset)
{
PVR_ASSERT(hOSMemHandle);
- return LinuxMemAreaToCpuPAddr(hOSMemHandle, ui32ByteOffset);
+ return LinuxMemAreaToCpuPAddr(hOSMemHandle, uiByteOffset);
}
@Return none
******************************************************************************/
-IMG_VOID OSMemCopy(IMG_VOID *pvDst, IMG_VOID *pvSrc, IMG_UINT32 ui32Size)
+IMG_VOID OSMemCopy(IMG_VOID *pvDst, IMG_VOID *pvSrc, IMG_SIZE_T uiSize)
{
#if defined(USE_UNOPTIMISED_MEMCPY)
IMG_UINT8 *Src,*Dst;
Src=(IMG_UINT8 *)pvSrc;
Dst=(IMG_UINT8 *)pvDst;
- for(i=0;i<ui32Size;i++)
+ for(i=0;i<uiSize;i++)
{
Dst[i]=Src[i];
}
#else
- memcpy(pvDst, pvSrc, ui32Size);
+ memcpy(pvDst, pvSrc, uiSize);
#endif
}
@Return IMG_VOID
******************************************************************************/
-IMG_VOID OSMemSet(IMG_VOID *pvDest, IMG_UINT8 ui8Value, IMG_UINT32 ui32Size)
+IMG_VOID OSMemSet(IMG_VOID *pvDest, IMG_UINT8 ui8Value, IMG_SIZE_T uiSize)
{
#if defined(USE_UNOPTIMISED_MEMSET)
IMG_UINT8 *Buff;
IMG_INT i;
Buff=(IMG_UINT8 *)pvDest;
- for(i=0;i<ui32Size;i++)
+ for(i=0;i<uiSize;i++)
{
Buff[i]=ui8Value;
}
#else
- memset(pvDest, (IMG_INT) ui8Value, (size_t) ui32Size);
+ memset(pvDest, (IMG_INT) ui8Value, (size_t) uiSize);
#endif
}
@Function OSSNPrintf
@Description snprintf
******************************************************************************/
-IMG_INT32 OSSNPrintf(IMG_CHAR *pStr, IMG_UINT32 ui32Size, const IMG_CHAR *pszFormat, ...)
+IMG_INT32 OSSNPrintf(IMG_CHAR *pStr, IMG_SIZE_T uiSize, const IMG_CHAR *pszFormat, ...)
{
va_list argList;
IMG_INT32 iCount;
va_start(argList, pszFormat);
- iCount = vsnprintf(pStr, (size_t)ui32Size, pszFormat, argList);
+ iCount = vsnprintf(pStr, (size_t)uiSize, pszFormat, argList);
va_end(argList);
return iCount;
SYS_DATA *psSysData = (SYS_DATA *)psEnvData->pvMISRData;
PVRSRVMISR(psSysData);
+
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ PVRSyncUpdateAllSyncs();
+#endif
}
******************************************************************************/
IMG_VOID *
OSMapPhysToLin(IMG_CPU_PHYADDR BasePAddr,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uiBytes,
IMG_UINT32 ui32MappingFlags,
IMG_HANDLE *phOSMemHandle)
{
if(phOSMemHandle == IMG_NULL)
{
IMG_VOID *pvIORemapCookie;
- pvIORemapCookie = IORemapWrapper(BasePAddr, ui32Bytes, ui32MappingFlags);
+ pvIORemapCookie = IORemapWrapper(BasePAddr, uiBytes, ui32MappingFlags);
if(pvIORemapCookie == IMG_NULL)
{
return IMG_NULL;
}
else
{
- LinuxMemArea *psLinuxMemArea = NewIORemapLinuxMemArea(BasePAddr, ui32Bytes, ui32MappingFlags);
+ LinuxMemArea *psLinuxMemArea = NewIORemapLinuxMemArea(BasePAddr, uiBytes, ui32MappingFlags);
if(psLinuxMemArea == IMG_NULL)
{
@Return TRUE on success, else FALSE
******************************************************************************/
IMG_BOOL
-OSUnMapPhysToLin(IMG_VOID *pvLinAddr, IMG_UINT32 ui32Bytes, IMG_UINT32 ui32MappingFlags, IMG_HANDLE hOSMemHandle)
+OSUnMapPhysToLin(IMG_VOID *pvLinAddr, IMG_SIZE_T uiBytes, IMG_UINT32 ui32MappingFlags, IMG_HANDLE hOSMemHandle)
{
- PVR_UNREFERENCED_PARAMETER(ui32Bytes);
+ PVR_UNREFERENCED_PARAMETER(uiBytes);
if(ui32MappingFlags & PVRSRV_HAP_KERNEL_ONLY)
{
PVRSRV_ERROR
OSRegisterMem(IMG_CPU_PHYADDR BasePAddr,
IMG_VOID *pvCPUVAddr,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uiBytes,
IMG_UINT32 ui32MappingFlags,
IMG_HANDLE *phOSMemHandle)
{
IMG_SYS_PHYADDR SysPAddr = SysCpuPAddrToSysPAddr(BasePAddr);
- return RegisterExternalMem(&SysPAddr, pvCPUVAddr, ui32Bytes, IMG_TRUE, ui32MappingFlags, phOSMemHandle);
+ return RegisterExternalMem(&SysPAddr, pvCPUVAddr, uiBytes, IMG_TRUE, ui32MappingFlags, phOSMemHandle);
}
-PVRSRV_ERROR OSRegisterDiscontigMem(IMG_SYS_PHYADDR *pBasePAddr, IMG_VOID *pvCPUVAddr, IMG_UINT32 ui32Bytes, IMG_UINT32 ui32MappingFlags, IMG_HANDLE *phOSMemHandle)
+PVRSRV_ERROR OSRegisterDiscontigMem(IMG_SYS_PHYADDR *pBasePAddr, IMG_VOID *pvCPUVAddr, IMG_SIZE_T uiBytes, IMG_UINT32 ui32MappingFlags, IMG_HANDLE *phOSMemHandle)
{
- return RegisterExternalMem(pBasePAddr, pvCPUVAddr, ui32Bytes, IMG_FALSE, ui32MappingFlags, phOSMemHandle);
+ return RegisterExternalMem(pBasePAddr, pvCPUVAddr, uiBytes, IMG_FALSE, ui32MappingFlags, phOSMemHandle);
}
******************************************************************************/
PVRSRV_ERROR
OSUnRegisterMem (IMG_VOID *pvCpuVAddr,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uiBytes,
IMG_UINT32 ui32MappingFlags,
IMG_HANDLE hOSMemHandle)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(pvCpuVAddr);
- PVR_UNREFERENCED_PARAMETER(ui32Bytes);
+ PVR_UNREFERENCED_PARAMETER(uiBytes);
switch(ui32MappingFlags & PVRSRV_HAP_MAPTYPE_MASK)
{
eError = PVRMMapRemoveRegisteredArea(psLinuxMemArea);
if (eError != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR, "%s(%p, %d, 0x%08X, %p) FAILED!",
- __FUNCTION__, pvCpuVAddr, ui32Bytes,
+ PVR_DPF((PVR_DBG_ERROR, "%s(%p, %" SIZE_T_FMT_LEN "u, 0x%08X, %p) FAILED!",
+ __FUNCTION__, pvCpuVAddr, uiBytes,
ui32MappingFlags, hOSMemHandle));
return eError;
}
return PVRSRV_OK;
}
-PVRSRV_ERROR OSUnRegisterDiscontigMem(IMG_VOID *pvCpuVAddr, IMG_UINT32 ui32Bytes, IMG_UINT32 ui32Flags, IMG_HANDLE hOSMemHandle)
+PVRSRV_ERROR OSUnRegisterDiscontigMem(IMG_VOID *pvCpuVAddr, IMG_SIZE_T uiBytes, IMG_UINT32 ui32Flags, IMG_HANDLE hOSMemHandle)
{
- return OSUnRegisterMem(pvCpuVAddr, ui32Bytes, ui32Flags, hOSMemHandle);
+ return OSUnRegisterMem(pvCpuVAddr, uiBytes, ui32Flags, hOSMemHandle);
}
/*!
******************************************************************************/
PVRSRV_ERROR
OSReservePhys(IMG_CPU_PHYADDR BasePAddr,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uiBytes,
IMG_UINT32 ui32MappingFlags,
IMG_HANDLE hBMHandle,
IMG_VOID **ppvCpuVAddr,
* mapping is required for the allocation and no user virtual
* mappings are allowed: Note these eat into our limited kernel
* virtual address space */
- psLinuxMemArea = NewIORemapLinuxMemArea(BasePAddr, ui32Bytes, ui32MappingFlags);
+ psLinuxMemArea = NewIORemapLinuxMemArea(BasePAddr, uiBytes, ui32MappingFlags);
if(!psLinuxMemArea)
{
return PVRSRV_ERROR_BAD_MAPPING;
{
/* Currently this implies that we dont need a kernel virtual
* mapping, but will need a user space virtual mapping */
- psLinuxMemArea = NewIOLinuxMemArea(BasePAddr, ui32Bytes, ui32MappingFlags);
+ psLinuxMemArea = NewIOLinuxMemArea(BasePAddr, uiBytes, ui32MappingFlags);
if(!psLinuxMemArea)
{
return PVRSRV_ERROR_BAD_MAPPING;
*/
ui32MappingFlags &= ~PVRSRV_HAP_CACHED;
#endif
- psLinuxMemArea = NewIORemapLinuxMemArea(BasePAddr, ui32Bytes, ui32MappingFlags);
+ psLinuxMemArea = NewIORemapLinuxMemArea(BasePAddr, uiBytes, ui32MappingFlags);
if(!psLinuxMemArea)
{
return PVRSRV_ERROR_BAD_MAPPING;
******************************************************************************/
PVRSRV_ERROR
OSUnReservePhys(IMG_VOID *pvCpuVAddr,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uiBytes,
IMG_UINT32 ui32MappingFlags,
IMG_HANDLE hOSMemHandle)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(pvCpuVAddr);
- PVR_UNREFERENCED_PARAMETER(ui32Bytes);
+ PVR_UNREFERENCED_PARAMETER(uiBytes);
psLinuxMemArea = (LinuxMemArea *)hOSMemHandle;
eError = PVRMMapRemoveRegisteredArea(psLinuxMemArea);
if (eError != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR, "%s(%p, %d, 0x%08X, %p) FAILED!",
- __FUNCTION__, pvCpuVAddr, ui32Bytes,
+ PVR_DPF((PVR_DBG_ERROR, "%s(%p, %" SIZE_T_FMT_LEN "u, 0x%08X, %p) FAILED!",
+ __FUNCTION__, pvCpuVAddr, uiBytes,
ui32MappingFlags, hOSMemHandle));
return eError;
}
@Output ppvLinAddr - pointer to variable that will receive the linear address of buffer
@Return PVRSRV_OK if allocation successed else returns PVRSRV_ERROR_OUT_OF_MEMORY
**************************************************************************/
-PVRSRV_ERROR OSBaseAllocContigMemory(IMG_UINT32 ui32Size, IMG_CPU_VIRTADDR *pvLinAddr, IMG_CPU_PHYADDR *psPhysAddr)
+PVRSRV_ERROR OSBaseAllocContigMemory(IMG_SIZE_T uiSize, IMG_CPU_VIRTADDR *pvLinAddr, IMG_CPU_PHYADDR *psPhysAddr)
{
#if !defined(NO_HARDWARE)
- PVR_UNREFERENCED_PARAMETER(ui32Size);
+ PVR_UNREFERENCED_PARAMETER(uiSize);
PVR_UNREFERENCED_PARAMETER(pvLinAddr);
PVR_UNREFERENCED_PARAMETER(psPhysAddr);
PVR_DPF((PVR_DBG_ERROR, "%s: Not available", __FUNCTION__));
IMG_VOID *pvKernLinAddr;
#if defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
- pvKernLinAddr = _KMallocWrapper(ui32Size, GFP_KERNEL, __FILE__, __LINE__);
+ pvKernLinAddr = _KMallocWrapper(uiSize, GFP_KERNEL, __FILE__, __LINE__);
#else
- pvKernLinAddr = KMallocWrapper(ui32Size, GFP_KERNEL);
+ pvKernLinAddr = KMallocWrapper(uiSize, GFP_KERNEL);
#endif
if (!pvKernLinAddr)
{
@Description Frees memory allocated with OSBaseAllocContigMemory
@Input LinAddr - pointer to buffer allocated with OSBaseAllocContigMemory
**************************************************************************/
-PVRSRV_ERROR OSBaseFreeContigMemory(IMG_UINT32 ui32Size, IMG_CPU_VIRTADDR pvLinAddr, IMG_CPU_PHYADDR psPhysAddr)
+PVRSRV_ERROR OSBaseFreeContigMemory(IMG_SIZE_T uiSize, IMG_CPU_VIRTADDR pvLinAddr, IMG_CPU_PHYADDR psPhysAddr)
{
#if !defined(NO_HARDWARE)
- PVR_UNREFERENCED_PARAMETER(ui32Size);
+ PVR_UNREFERENCED_PARAMETER(uiSize);
PVR_UNREFERENCED_PARAMETER(pvLinAddr);
PVR_UNREFERENCED_PARAMETER(psPhysAddr.uiAddr);
PVR_DPF((PVR_DBG_WARNING, "%s: Not available", __FUNCTION__));
#else
- PVR_UNREFERENCED_PARAMETER(ui32Size);
+ PVR_UNREFERENCED_PARAMETER(uiSize);
PVR_UNREFERENCED_PARAMETER(psPhysAddr.uiAddr);
KFreeWrapper(pvLinAddr);
@Return NONE
******************************************************************************/
-static IMG_VOID OSTimerCallbackWrapper(IMG_UINT32 ui32Data)
+static IMG_VOID OSTimerCallbackWrapper(IMG_UINTPTR_T uiData)
{
- TIMER_CALLBACK_DATA *psTimerCBData = (TIMER_CALLBACK_DATA*)ui32Data;
+ TIMER_CALLBACK_DATA *psTimerCBData = (TIMER_CALLBACK_DATA*)uiData;
#if defined(PVR_LINUX_TIMERS_USING_WORKQUEUES) || defined(PVR_LINUX_TIMERS_USING_SHARED_WORKQUEUE)
int res;
IMG_HANDLE OSAddTimer(PFN_TIMER_FUNC pfnTimerFunc, IMG_VOID *pvData, IMG_UINT32 ui32MsTimeout)
{
TIMER_CALLBACK_DATA *psTimerCBData;
- IMG_UINT32 ui32i;
+ IMG_UINTPTR_T ui;
#if !(defined(PVR_LINUX_TIMERS_USING_WORKQUEUES) || defined(PVR_LINUX_TIMERS_USING_SHARED_WORKQUEUE))
unsigned long ulLockFlags;
#endif
#else
spin_lock_irqsave(&sTimerStructLock, ulLockFlags);
#endif
- for (ui32i = 0; ui32i < OS_MAX_TIMERS; ui32i++)
+ for (ui = 0; ui < OS_MAX_TIMERS; ui++)
{
- psTimerCBData = &sTimers[ui32i];
+ psTimerCBData = &sTimers[ui];
if (!psTimerCBData->bInUse)
{
psTimerCBData->bInUse = IMG_TRUE;
#else
spin_unlock_irqrestore(&sTimerStructLock, ulLockFlags);
#endif
- if (ui32i >= OS_MAX_TIMERS)
+ if (ui >= OS_MAX_TIMERS)
{
PVR_DPF((PVR_DBG_ERROR, "OSAddTimer: all timers are in use"));
return IMG_NULL;
/* setup timer object */
/* PRQA S 0307,0563 1 */ /* ignore warning about inconpartible ptr casting */
psTimerCBData->sTimer.function = (IMG_VOID *)OSTimerCallbackWrapper;
- psTimerCBData->sTimer.data = (IMG_UINT32)psTimerCBData;
+ psTimerCBData->sTimer.data = (IMG_UINTPTR_T)psTimerCBData;
- return (IMG_HANDLE)(ui32i + 1);
+ return (IMG_HANDLE)(ui + 1);
}
static inline TIMER_CALLBACK_DATA *GetTimerStructure(IMG_HANDLE hTimer)
{
- IMG_UINT32 ui32i = ((IMG_UINT32)hTimer) - 1;
+ IMG_UINTPTR_T ui = ((IMG_UINTPTR_T)hTimer) - 1;
- PVR_ASSERT(ui32i < OS_MAX_TIMERS);
+ PVR_ASSERT(ui < OS_MAX_TIMERS);
- return &sTimers[ui32i];
+ return &sTimers[ui];
}
/*!
@Return PVRSRV_ERROR :
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR OSEventObjectCreateKM(const IMG_CHAR *pszName, PVRSRV_EVENTOBJECT_KM *psEventObject)
-#else
PVRSRV_ERROR OSEventObjectCreateKM(const IMG_CHAR *pszName, PVRSRV_EVENTOBJECT *psEventObject)
-#endif
{
PVRSRV_ERROR eError = PVRSRV_OK;
{
/* autogenerate a name */
static IMG_UINT16 ui16NameIndex = 0;
-#if defined (SUPPORT_SID_INTERFACE)
- snprintf(psEventObject->szName, EVENTOBJNAME_MAXLENGTH, "PVRSRV_EVENTOBJECT_KM_%d", ui16NameIndex++);
-#else
snprintf(psEventObject->szName, EVENTOBJNAME_MAXLENGTH, "PVRSRV_EVENTOBJECT_%d", ui16NameIndex++);
-#endif
}
if(LinuxEventObjectListCreate(&psEventObject->hOSEventKM) != PVRSRV_OK)
@Return PVRSRV_ERROR :
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR OSEventObjectDestroyKM(PVRSRV_EVENTOBJECT_KM *psEventObject)
-#else
PVRSRV_ERROR OSEventObjectDestroyKM(PVRSRV_EVENTOBJECT *psEventObject)
-#endif
{
PVRSRV_ERROR eError = PVRSRV_OK;
@Return PVRSRV_ERROR :
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR OSEventObjectOpenKM(PVRSRV_EVENTOBJECT_KM *psEventObject,
-#else
PVRSRV_ERROR OSEventObjectOpenKM(PVRSRV_EVENTOBJECT *psEventObject,
-#endif
IMG_HANDLE *phOSEvent)
{
PVRSRV_ERROR eError = PVRSRV_OK;
@Return PVRSRV_ERROR :
******************************************************************************/
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR OSEventObjectCloseKM(PVRSRV_EVENTOBJECT_KM *psEventObject,
-#else
PVRSRV_ERROR OSEventObjectCloseKM(PVRSRV_EVENTOBJECT *psEventObject,
-#endif
IMG_HANDLE hOSEventKM)
{
PVRSRV_ERROR eError = PVRSRV_OK;
PVRSRV_ERROR OSCopyToUser(IMG_PVOID pvProcess,
IMG_VOID *pvDest,
IMG_VOID *pvSrc,
- IMG_UINT32 ui32Bytes)
+ IMG_SIZE_T uiBytes)
{
PVR_UNREFERENCED_PARAMETER(pvProcess);
- if(pvr_copy_to_user(pvDest, pvSrc, ui32Bytes)==0)
+ if(pvr_copy_to_user(pvDest, pvSrc, uiBytes)==0)
return PVRSRV_OK;
else
return PVRSRV_ERROR_FAILED_TO_COPY_VIRT_MEMORY;
PVRSRV_ERROR OSCopyFromUser( IMG_PVOID pvProcess,
IMG_VOID *pvDest,
IMG_VOID *pvSrc,
- IMG_UINT32 ui32Bytes)
+ IMG_SIZE_T uiBytes)
{
PVR_UNREFERENCED_PARAMETER(pvProcess);
- if(pvr_copy_from_user(pvDest, pvSrc, ui32Bytes)==0)
+ if(pvr_copy_from_user(pvDest, pvSrc, uiBytes)==0)
return PVRSRV_OK;
else
return PVRSRV_ERROR_FAILED_TO_COPY_VIRT_MEMORY;
@Return IMG_BOOL :
******************************************************************************/
-IMG_BOOL OSAccessOK(IMG_VERIFY_TEST eVerification, IMG_VOID *pvUserPtr, IMG_UINT32 ui32Bytes)
+IMG_BOOL OSAccessOK(IMG_VERIFY_TEST eVerification, IMG_VOID *pvUserPtr, IMG_SIZE_T uiBytes)
{
IMG_INT linuxType;
linuxType = VERIFY_WRITE;
}
- return access_ok(linuxType, pvUserPtr, ui32Bytes);
+ return access_ok(linuxType, pvUserPtr, uiBytes);
}
typedef enum _eWrapMemType_
IMG_SYS_PHYADDR *psPhysAddr;
IMG_INT iPageOffset;
#if defined(DEBUG)
- IMG_UINT32 ulStartAddr;
- IMG_UINT32 ulBeyondEndAddr;
+ IMG_UINTPTR_T uStartAddr;
+ IMG_UINTPTR_T uBeyondEndAddr;
struct vm_area_struct *psVMArea;
#endif
} sWrapMemInfo;
and must be writable. A get_page is done on the returned page structure.
@Input psVMArea - pointer to VM area structure
- ulCPUVAddr - CPU virtual address
- pulPFN - Pointer to returned PFN.
+ uCPUVAddr - CPU virtual address
+ pui32PFN - Pointer to returned PFN.
ppsPAge - Pointer to returned page structure pointer.
- @Output *pulPFN - Set to PFN
+ @Output *pui32PFN - Set to PFN
*ppsPage - Pointer to the page structure if present, else NULL.
@Return IMG_TRUE if PFN lookup was succesful.
******************************************************************************/
-static IMG_BOOL CPUVAddrToPFN(struct vm_area_struct *psVMArea, IMG_UINT32 ulCPUVAddr, IMG_UINT32 *pulPFN, struct page **ppsPage)
+static IMG_BOOL CPUVAddrToPFN(struct vm_area_struct *psVMArea, IMG_UINTPTR_T uCPUVAddr, IMG_UINT32 *pui32PFN, struct page **ppsPage)
{
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
pgd_t *psPGD;
spinlock_t *psPTLock;
IMG_BOOL bRet = IMG_FALSE;
- *pulPFN = 0;
+ *pui32PFN = 0;
*ppsPage = NULL;
- psPGD = pgd_offset(psMM, ulCPUVAddr);
+ psPGD = pgd_offset(psMM, uCPUVAddr);
if (pgd_none(*psPGD) || pgd_bad(*psPGD))
return bRet;
- psPUD = pud_offset(psPGD, ulCPUVAddr);
+ psPUD = pud_offset(psPGD, uCPUVAddr);
if (pud_none(*psPUD) || pud_bad(*psPUD))
return bRet;
- psPMD = pmd_offset(psPUD, ulCPUVAddr);
+ psPMD = pmd_offset(psPUD, uCPUVAddr);
if (pmd_none(*psPMD) || pmd_bad(*psPMD))
return bRet;
- psPTE = (pte_t *)pte_offset_map_lock(psMM, psPMD, ulCPUVAddr, &psPTLock);
+ psPTE = (pte_t *)pte_offset_map_lock(psMM, psPMD, uCPUVAddr, &psPTLock);
if ((pte_none(*psPTE) == 0) && (pte_present(*psPTE) != 0) && (pte_write(*psPTE) != 0))
{
- *pulPFN = pte_pfn(*psPTE);
+ *pui32PFN = pte_pfn(*psPTE);
bRet = IMG_TRUE;
- if (pfn_valid(*pulPFN))
+ if (pfn_valid(*pui32PFN))
{
- *ppsPage = pfn_to_page(*pulPFN);
+ *ppsPage = pfn_to_page(*pui32PFN);
get_page(*ppsPage);
}
return PVRSRV_OK;
}
-#if defined(CONFIG_TI_TILER)
+#if defined(CONFIG_TI_TILER) || defined(CONFIG_DRM_OMAP_DMM_TILER)
static IMG_UINT32 CPUAddrToTilerPhy(IMG_UINT32 uiAddr)
{
pte_t *ptep, pte;
pgd_t *pgd;
pmd_t *pmd;
+ pud_t *pud;
pgd = pgd_offset(current->mm, uiAddr);
if (pgd_none(*pgd) || pgd_bad(*pgd))
goto err_out;
- pmd = pmd_offset(pgd, uiAddr);
+ pud = pud_offset(pgd, uiAddr);
+ if (pud_none(*pud) || pud_bad(*pud))
+ goto err_out;
+
+ pmd = pmd_offset(pud, uiAddr);
if (pmd_none(*pmd) || pmd_bad(*pmd))
goto err_out;
return ui32PhysAddr;
}
-#endif /* defined(CONFIG_TI_TILER) */
+#endif /* defined(CONFIG_TI_TILER) && defined(CONFIG_DRM_OMAP_DMM_TILER) */
/*!
******************************************************************************
******************************************************************************/
PVRSRV_ERROR OSAcquirePhysPageAddr(IMG_VOID *pvCPUVAddr,
- IMG_UINT32 ui32Bytes,
+ IMG_SIZE_T uiBytes,
IMG_SYS_PHYADDR *psSysPAddr,
IMG_HANDLE *phOSWrapMem)
{
- IMG_UINT32 ulStartAddrOrig = (IMG_UINT32) pvCPUVAddr;
- IMG_UINT32 ulAddrRangeOrig = (IMG_UINT32) ui32Bytes;
- IMG_UINT32 ulBeyondEndAddrOrig = ulStartAddrOrig + ulAddrRangeOrig;
- IMG_UINT32 ulStartAddr;
- IMG_UINT32 ulAddrRange;
- IMG_UINT32 ulBeyondEndAddr;
- IMG_UINT32 ulAddr;
+ IMG_UINTPTR_T uStartAddrOrig = (IMG_UINTPTR_T) pvCPUVAddr;
+ IMG_SIZE_T uAddrRangeOrig = uiBytes;
+ IMG_UINTPTR_T uBeyondEndAddrOrig = uStartAddrOrig + uAddrRangeOrig;
+ IMG_UINTPTR_T uStartAddr;
+ IMG_SIZE_T uAddrRange;
+ IMG_UINTPTR_T uBeyondEndAddr;
+ IMG_UINTPTR_T uAddr;
IMG_INT i;
struct vm_area_struct *psVMArea;
sWrapMemInfo *psInfo = NULL;
PVRSRV_ERROR eError = PVRSRV_ERROR_OUT_OF_MEMORY;
/* Align start and end addresses to page boundaries */
- ulStartAddr = ulStartAddrOrig & PAGE_MASK;
- ulBeyondEndAddr = PAGE_ALIGN(ulBeyondEndAddrOrig);
- ulAddrRange = ulBeyondEndAddr - ulStartAddr;
+ uStartAddr = uStartAddrOrig & PAGE_MASK;
+ uBeyondEndAddr = PAGE_ALIGN(uBeyondEndAddrOrig);
+ uAddrRange = uBeyondEndAddr - uStartAddr;
/*
* Check for address range calculation overflow, and attempts to wrap
* zero bytes.
*/
- if (ulBeyondEndAddr <= ulStartAddr)
+ if (uBeyondEndAddr <= uStartAddr)
{
PVR_DPF((PVR_DBG_ERROR,
- "OSAcquirePhysPageAddr: Invalid address range (start %x, length %x)",
- ulStartAddrOrig, ulAddrRangeOrig));
+ "OSAcquirePhysPageAddr: Invalid address range (start " UINTPTR_FMT ", length %" SIZE_T_FMT_LEN "x)",
+ uStartAddrOrig, uAddrRangeOrig));
goto error;
}
memset(psInfo, 0, sizeof(*psInfo));
#if defined(DEBUG)
- psInfo->ulStartAddr = ulStartAddrOrig;
- psInfo->ulBeyondEndAddr = ulBeyondEndAddrOrig;
+ psInfo->uStartAddr = uStartAddrOrig;
+ psInfo->uBeyondEndAddr = uBeyondEndAddrOrig;
#endif
- psInfo->iNumPages = (IMG_INT)(ulAddrRange >> PAGE_SHIFT);
- psInfo->iPageOffset = (IMG_INT)(ulStartAddrOrig & ~PAGE_MASK);
+ psInfo->iNumPages = (IMG_INT)(uAddrRange >> PAGE_SHIFT);
+ psInfo->iPageOffset = (IMG_INT)(uStartAddrOrig & ~PAGE_MASK);
/* Allocate physical address array */
psInfo->psPhysAddr = kmalloc((size_t)psInfo->iNumPages * sizeof(*psInfo->psPhysAddr), GFP_KERNEL);
bMMapSemHeld = IMG_TRUE;
/* Get page list */
- psInfo->iNumPagesMapped = get_user_pages(current, current->mm, ulStartAddr, psInfo->iNumPages, 1, 0, psInfo->ppsPages, NULL);
+ psInfo->iNumPagesMapped = get_user_pages(current, current->mm, uStartAddr, psInfo->iNumPages, 1, 0, psInfo->ppsPages, NULL);
if (psInfo->iNumPagesMapped >= 0)
{
for (i = 0; i < psInfo->iNumPages; i++)
{
IMG_CPU_PHYADDR CPUPhysAddr;
- IMG_UINT32 ulPFN;
+ IMG_UINT32 ui32PFN;
- ulPFN = page_to_pfn(psInfo->ppsPages[i]);
- CPUPhysAddr.uiAddr = ulPFN << PAGE_SHIFT;
- if ((CPUPhysAddr.uiAddr >> PAGE_SHIFT) != ulPFN)
+ ui32PFN = page_to_pfn(psInfo->ppsPages[i]);
+ CPUPhysAddr.uiAddr = ui32PFN << PAGE_SHIFT;
+ if ((CPUPhysAddr.uiAddr >> PAGE_SHIFT) != ui32PFN)
{
PVR_DPF((PVR_DBG_ERROR,
- "OSAcquirePhysPageAddr: Page frame number out of range (%x)", ulPFN));
+ "OSAcquirePhysPageAddr: Page frame number out of range (%x)", ui32PFN));
goto error;
}
/* Set the mapping type to aid clean up */
psInfo->eType = WRAP_TYPE_FIND_VMA;
- psVMArea = find_vma(current->mm, ulStartAddrOrig);
+ psVMArea = find_vma(current->mm, uStartAddrOrig);
if (psVMArea == NULL)
{
PVR_DPF((PVR_DBG_ERROR,
- "OSAcquirePhysPageAddr: Couldn't find memory region containing start address %x", ulStartAddrOrig));
+ "OSAcquirePhysPageAddr: Couldn't find memory region containing start address " UINTPTR_FMT,
+ uStartAddrOrig));
goto error;
}
* find_vma locates a region with an end point past a given
* virtual address. So check the address is actually in the region.
*/
- if (ulStartAddrOrig < psVMArea->vm_start)
+ if (uStartAddrOrig < psVMArea->vm_start)
{
PVR_DPF((PVR_DBG_ERROR,
- "OSAcquirePhysPageAddr: Start address %x is outside of the region returned by find_vma", ulStartAddrOrig));
+ "OSAcquirePhysPageAddr: Start address " UINTPTR_FMT " is outside of the region returned by find_vma",
+ uStartAddrOrig));
goto error;
}
/* Now check the end address is in range */
- if (ulBeyondEndAddrOrig > psVMArea->vm_end)
+ if (uBeyondEndAddrOrig > psVMArea->vm_end)
{
PVR_DPF((PVR_DBG_ERROR,
- "OSAcquirePhysPageAddr: End address %x is outside of the region returned by find_vma", ulBeyondEndAddrOrig));
+ "OSAcquirePhysPageAddr: End address " UINTPTR_FMT " is outside of the region returned by find_vma", uBeyondEndAddrOrig));
goto error;
}
/* Does the region represent memory mapped I/O? */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0))
if ((psVMArea->vm_flags & (VM_IO | VM_RESERVED)) != (VM_IO | VM_RESERVED))
+#else
+ if ((psVMArea->vm_flags & (VM_IO | VM_DONTEXPAND | VM_DONTDUMP)) != (VM_IO | VM_DONTEXPAND | VM_DONTDUMP))
+#endif
+
{
PVR_DPF((PVR_DBG_ERROR,
"OSAcquirePhysPageAddr: Memory region does not represent memory mapped I/O (VMA flags: 0x%lx)", psVMArea->vm_flags));
goto error;
}
- for (ulAddr = ulStartAddrOrig, i = 0; ulAddr < ulBeyondEndAddrOrig; ulAddr += PAGE_SIZE, i++)
+ for (uAddr = uStartAddrOrig, i = 0; uAddr < uBeyondEndAddrOrig; uAddr += PAGE_SIZE, i++)
{
IMG_CPU_PHYADDR CPUPhysAddr;
- IMG_UINT32 ulPFN = 0;
+ IMG_UINT32 ui32PFN = 0;
PVR_ASSERT(i < psInfo->iNumPages);
- if (!CPUVAddrToPFN(psVMArea, ulAddr, &ulPFN, &psInfo->ppsPages[i]))
+ if (!CPUVAddrToPFN(psVMArea, uAddr, &ui32PFN, &psInfo->ppsPages[i]))
{
PVR_DPF((PVR_DBG_ERROR,
"OSAcquirePhysPageAddr: Invalid CPU virtual address"));
}
if (psInfo->ppsPages[i] == NULL)
{
-#if defined(CONFIG_TI_TILER)
+#if defined(CONFIG_TI_TILER) || defined(CONFIG_DRM_OMAP_DMM_TILER)
/* This could be tiler memory.*/
- IMG_UINT32 ui32TilerAddr = CPUAddrToTilerPhy(ulAddr);
+ IMG_UINT32 ui32TilerAddr = CPUAddrToTilerPhy(uAddr);
if (ui32TilerAddr)
{
bHavePageStructs = IMG_TRUE;
psSysPAddr[i].uiAddr = ui32TilerAddr;
continue;
}
-#endif /* defined(CONFIG_TI_TILER) */
+#endif /* defined(CONFIG_TI_TILER) || defined(CONFIG_DRM_OMAP_DMM_TILER) */
bHaveNoPageStructs = IMG_TRUE;
}
psInfo->iNumPagesMapped++;
- PVR_ASSERT(ulPFN == page_to_pfn(psInfo->ppsPages[i]));
+ PVR_ASSERT(ui32PFN == page_to_pfn(psInfo->ppsPages[i]));
}
- CPUPhysAddr.uiAddr = ulPFN << PAGE_SHIFT;
- if ((CPUPhysAddr.uiAddr >> PAGE_SHIFT) != ulPFN)
+ CPUPhysAddr.uiAddr = ui32PFN << PAGE_SHIFT;
+ if ((CPUPhysAddr.uiAddr >> PAGE_SHIFT) != ui32PFN)
{
PVR_DPF((PVR_DBG_ERROR,
- "OSAcquirePhysPageAddr: Page frame number out of range (%x)", ulPFN));
+ "OSAcquirePhysPageAddr: Page frame number out of range (%x)", ui32PFN));
goto error;
}
#if defined(CONFIG_OUTER_CACHE)
+/*
+ Note: use IMG_CPU_PHYADDR to return CPU Phys Addresses, and not just 'unsigned long',
+ as this is not big enough to hold physical addresses on 32-bit PAE devices.
+*/
typedef IMG_BOOL (*MemAreaToPhys_t)(LinuxMemArea *psLinuxMemArea,
IMG_VOID *pvRangeAddrStart,
IMG_UINT32 ui32PageNumOffset,
IMG_UINT32 ui32PageNum,
- unsigned long *pulStart);
+ IMG_CPU_PHYADDR *psStart);
static IMG_BOOL VMallocAreaToPhys(LinuxMemArea *psLinuxMemArea,
IMG_VOID *pvRangeAddrStart,
IMG_UINT32 ui32PageNumOffset,
IMG_UINT32 ui32PageNum,
- unsigned long *pulStart)
+ IMG_CPU_PHYADDR *psStart)
{
- *pulStart = vmalloc_to_pfn(pvRangeAddrStart + ui32PageNum * PAGE_SIZE) << PAGE_SHIFT;
+ psStart->uiAddr = vmalloc_to_pfn(pvRangeAddrStart + ui32PageNum * PAGE_SIZE) << PAGE_SHIFT;
return IMG_TRUE;
}
IMG_VOID *pvRangeAddrStart,
IMG_UINT32 ui32PageNumOffset,
IMG_UINT32 ui32PageNum,
- unsigned long *pulStart)
+ IMG_CPU_PHYADDR *psStart)
{
IMG_SYS_PHYADDR SysPAddr;
- IMG_CPU_PHYADDR CpuPAddr;
SysPAddr = psLinuxMemArea->uData.sExternalKV.uPhysAddr.pSysPhysAddr[ui32PageNumOffset + ui32PageNum];
- CpuPAddr = SysSysPAddrToCpuPAddr(SysPAddr);
- *pulStart = CpuPAddr.uiAddr;
+ *psStart = SysSysPAddrToCpuPAddr(SysPAddr);
return IMG_TRUE;
}
IMG_VOID *pvRangeAddrStart,
IMG_UINT32 ui32PageNumOffset,
IMG_UINT32 ui32PageNum,
- unsigned long *pulStart)
+ IMG_CPU_PHYADDR *psStart)
{
struct page *pPage;
pPage = psLinuxMemArea->uData.sPageList.ppsPageList[ui32PageNumOffset + ui32PageNum];
- *pulStart = page_to_pfn(pPage) << PAGE_SHIFT;
+ psStart->uiAddr = page_to_pfn(pPage) << PAGE_SHIFT;
return IMG_TRUE;
}
IMG_VOID *pvRangeAddrStart,
IMG_UINT32 ui32PageNumOffset,
IMG_UINT32 ui32PageNum,
- unsigned long *pulStart)
+ IMG_CPU_PHYADDR *psStart)
{
IMG_UINT32 ui32VirtOffset = (ui32PageNumOffset + ui32PageNum) << PAGE_SHIFT;
IMG_UINT32 ui32PhysOffset;
{
PVR_ASSERT(ui32PhysOffset <= ui32VirtOffset);
pPage = psLinuxMemArea->uData.sPageList.ppsPageList[ui32PhysOffset >> PAGE_SHIFT];
- *pulStart = page_to_pfn(pPage) << PAGE_SHIFT;
+ psStart->uiAddr = page_to_pfn(pPage) << PAGE_SHIFT;
return IMG_TRUE;
}
IMG_VOID *pvRangeAddrStart,
IMG_UINT32 ui32PageNumOffset,
IMG_UINT32 ui32PageNum,
- unsigned long *pulStart)
+ IMG_CPU_PHYADDR *psStart)
{
- IMG_CPU_PHYADDR CpuPAddr;
- CpuPAddr = psLinuxMemArea->uData.sIONTilerAlloc.pCPUPhysAddrs[ui32PageNumOffset + ui32PageNum];
- *pulStart = CpuPAddr.uiAddr;
+ *psStart = psLinuxMemArea->uData.sIONTilerAlloc.pCPUPhysAddrs[ui32PageNumOffset + ui32PageNum];;
return IMG_TRUE;
}
if(OSGetCurrentProcessIDKM() != psOffsetStruct->ui32PID)
continue;
- pvMinVAddr = (IMG_VOID *)psOffsetStruct->ui32UserVAddr;
+ pvMinVAddr = (IMG_VOID *)psOffsetStruct->uiUserVAddr;
/* Within permissible range */
if(pvRangeAddrStart >= pvMinVAddr &&
- ui32Length <= psOffsetStruct->ui32RealByteSize)
+ ui32Length <= psOffsetStruct->uiRealByteSize)
return pvMinVAddr;
}
else
{
IMG_UINT32 ui32ByteRemain = ui32Length;
- IMG_UINT32 ui32BytesToDo = PAGE_SIZE - (((IMG_UINT32) pvRangeAddrStart) & (~PAGE_MASK));
+ IMG_UINT32 ui32BytesToDo = PAGE_SIZE - (((IMG_UINTPTR_T) pvRangeAddrStart) & (~PAGE_MASK));
IMG_UINT8 *pbDo = (IMG_UINT8 *) pvRangeAddrStart;
while(ui32ByteRemain)
IMG_BOOL CheckExecuteCacheOp(IMG_HANDLE hOSMemHandle,
IMG_UINT32 ui32ByteOffset,
IMG_VOID *pvRangeAddrStart,
- IMG_UINT32 ui32Length,
+ IMG_SIZE_T uiLength,
InnerCacheOp_t pfnInnerCacheOp,
OuterCacheOp_t pfnOuterCacheOp)
{
LinuxMemArea *psLinuxMemArea = (LinuxMemArea *)hOSMemHandle;
- IMG_UINT32 ui32AreaLength, ui32AreaOffset = 0;
+ IMG_SIZE_T uiAreaLength = 0;
+ IMG_UINTPTR_T uiAreaOffset = 0;
struct list_head *psMMapOffsetStructList;
IMG_VOID *pvMinVAddr;
#if defined(CONFIG_OUTER_CACHE)
MemAreaToPhys_t pfnMemAreaToPhys = IMG_NULL;
- IMG_UINT32 ui32PageNumOffset = 0;
+ IMG_UINTPTR_T uPageNumOffset = 0;
#endif
PVR_ASSERT(psLinuxMemArea != IMG_NULL);
- LinuxLockMutex(&g_sMMapMutex);
+ LinuxLockMutexNested(&g_sMMapMutex, PVRSRV_LOCK_CLASS_MMAP);
psMMapOffsetStructList = &psLinuxMemArea->sMMapOffsetStructList;
- ui32AreaLength = psLinuxMemArea->ui32ByteSize;
+ uiAreaLength = psLinuxMemArea->uiByteSize;
/*
Don't check the length in the case of sparse mappings as
*/
if (!psLinuxMemArea->hBMHandle)
{
- PVR_ASSERT(ui32Length <= ui32AreaLength);
+ PVR_ASSERT(uiLength <= uiAreaLength);
}
if(psLinuxMemArea->eAreaType == LINUX_MEM_AREA_SUB_ALLOC)
{
- ui32AreaOffset = psLinuxMemArea->uData.sSubAlloc.ui32ByteOffset;
+ uiAreaOffset = psLinuxMemArea->uData.sSubAlloc.uiByteOffset;
psLinuxMemArea = psLinuxMemArea->uData.sSubAlloc.psParentLinuxMemArea;
}
{
if(is_vmalloc_addr(pvRangeAddrStart))
{
- pvMinVAddr = psLinuxMemArea->uData.sVmalloc.pvVmallocAddress + ui32AreaOffset;
+ pvMinVAddr = psLinuxMemArea->uData.sVmalloc.pvVmallocAddress + uiAreaOffset;
/* Outside permissible range */
if(pvRangeAddrStart < pvMinVAddr)
DoInnerCacheOp(hOSMemHandle,
ui32ByteOffset,
pvRangeAddrStart,
- ui32Length,
+ uiLength,
pfnInnerCacheOp);
}
else
*/
pvMinVAddr = FindMMapBaseVAddr(psMMapOffsetStructList,
- pvRangeAddrStart, ui32Length);
+ pvRangeAddrStart, uiLength);
if(!pvMinVAddr)
goto err_blocked;
DoInnerCacheOp(hOSMemHandle,
ui32ByteOffset,
pvRangeAddrStart,
- ui32Length,
+ uiLength,
pfnInnerCacheOp);
#if defined(CONFIG_OUTER_CACHE)
* affected physical pages for outer cache flushing.
*/
pvRangeAddrStart = psLinuxMemArea->uData.sVmalloc.pvVmallocAddress +
- (ui32AreaOffset & PAGE_MASK) + (pvRangeAddrStart - pvMinVAddr);
+ (uiAreaOffset & PAGE_MASK) + (pvRangeAddrStart - pvMinVAddr);
}
pfnMemAreaToPhys = VMallocAreaToPhys;
}
pvMinVAddr = FindMMapBaseVAddr(psMMapOffsetStructList,
- pvRangeAddrStart, ui32Length);
+ pvRangeAddrStart, uiLength);
if(!pvMinVAddr)
goto err_blocked;
DoInnerCacheOp(hOSMemHandle,
ui32ByteOffset,
pvRangeAddrStart,
- ui32Length,
+ uiLength,
pfnInnerCacheOp);
#if defined(CONFIG_OUTER_CACHE)
- ui32PageNumOffset = ((ui32AreaOffset & PAGE_MASK) + (pvRangeAddrStart - pvMinVAddr)) >> PAGE_SHIFT;
+ uPageNumOffset = ((uiAreaOffset & PAGE_MASK) + (pvRangeAddrStart - pvMinVAddr)) >> PAGE_SHIFT;
pfnMemAreaToPhys = ExternalKVAreaToPhys;
#endif
break;
case LINUX_MEM_AREA_ION:
{
pvMinVAddr = FindMMapBaseVAddr(psMMapOffsetStructList,
- pvRangeAddrStart, ui32Length);
+ pvRangeAddrStart, uiLength);
if(!pvMinVAddr)
goto err_blocked;
DoInnerCacheOp(hOSMemHandle,
ui32ByteOffset,
pvRangeAddrStart,
- ui32Length,
+ uiLength,
pfnInnerCacheOp);
#if defined(CONFIG_OUTER_CACHE)
- ui32PageNumOffset = ((ui32AreaOffset & PAGE_MASK) + (pvRangeAddrStart - pvMinVAddr)) >> PAGE_SHIFT;
+ uPageNumOffset = ((uiAreaOffset & PAGE_MASK) + (pvRangeAddrStart - pvMinVAddr)) >> PAGE_SHIFT;
pfnMemAreaToPhys = IONAreaToPhys;
#endif
break;
case LINUX_MEM_AREA_ALLOC_PAGES:
{
pvMinVAddr = FindMMapBaseVAddr(psMMapOffsetStructList,
- pvRangeAddrStart, ui32Length);
+ pvRangeAddrStart, uiLength);
if(!pvMinVAddr)
goto err_blocked;
DoInnerCacheOp(hOSMemHandle,
ui32ByteOffset,
pvRangeAddrStart,
- ui32Length,
+ uiLength,
pfnInnerCacheOp);
#if defined(CONFIG_OUTER_CACHE)
- ui32PageNumOffset = ((ui32AreaOffset & PAGE_MASK) + (pvRangeAddrStart - pvMinVAddr)) >> PAGE_SHIFT;
+ uPageNumOffset = ((uiAreaOffset & PAGE_MASK) + (pvRangeAddrStart - pvMinVAddr)) >> PAGE_SHIFT;
if (psLinuxMemArea->hBMHandle)
{
pfnMemAreaToPhys = AllocPagesSparseAreaToPhys;
/* Outer caches need some more work, to get a list of physical addresses */
{
- unsigned long ulStart, ulEnd, ulLength, ulStartOffset, ulEndOffset;
+ IMG_CPU_PHYADDR sStart, sEnd;
+ unsigned long ulLength, ulStartOffset, ulEndOffset;
IMG_UINT32 i, ui32NumPages;
IMG_BOOL bValidPage;
/* Length and offsets of flush region WRT page alignment */
- ulLength = (unsigned long)ui32Length;
+ ulLength = (unsigned long)uiLength;
ulStartOffset = ((unsigned long)pvRangeAddrStart) & (PAGE_SIZE - 1);
ulEndOffset = ((unsigned long)pvRangeAddrStart + ulLength) & (PAGE_SIZE - 1);
for(i = 0; i < ui32NumPages; i++)
{
bValidPage = pfnMemAreaToPhys(psLinuxMemArea, pvRangeAddrStart,
- ui32PageNumOffset, i, &ulStart);
+ uPageNumOffset, i, &sStart);
if (bValidPage)
{
- ulEnd = ulStart + PAGE_SIZE;
+ sEnd.uiAddr = sStart.uiAddr + PAGE_SIZE;
if(i == ui32NumPages - 1 && ulEndOffset != 0)
- ulEnd = ulStart + ulEndOffset;
+ sEnd.uiAddr = sStart.uiAddr + ulEndOffset;
if(i == 0)
- ulStart += ulStartOffset;
+ sStart.uiAddr += ulStartOffset;
- pfnOuterCacheOp(ulStart, ulEnd);
+ pfnOuterCacheOp(sStart.uiAddr, sEnd.uiAddr);
}
}
}
err_blocked:
PVR_DPF((PVR_DBG_WARNING, "%s: Blocked cache op on virtual range "
"%p-%p (type %d)", __func__,
- pvRangeAddrStart, pvRangeAddrStart + ui32Length,
+ pvRangeAddrStart, pvRangeAddrStart + uiLength,
psLinuxMemArea->eAreaType));
LinuxUnLockMutex(&g_sMMapMutex);
return IMG_FALSE;
}
-#if defined(__i386__)
+#if defined(__i386__) || defined (__x86_64__)
#define ROUND_UP(x,a) (((x) + (a) - 1) & ~((a) - 1))
x86_flush_cache_range, IMG_NULL);
}
-#else /* defined(__i386__) */
+#else /* defined(__i386__) || defined(__x86_64__) */
#if defined(__arm__)
IMG_VOID OSReacquireBridgeLock(IMG_VOID)
{
- LinuxLockMutex(&gPVRSRVLock);
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
}
typedef struct _OSTime
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
- psOSTime->ulTime = usecs_to_jiffies(jiffies_to_usecs(jiffies) + ui32USOffset);
+ psOSTime->ulTime = jiffies + usecs_to_jiffies(ui32USOffset);
*pvRet = psOSTime;
return PVRSRV_OK;
}
#include "env_perproc.h"
#include "proc.h"
-#if defined (SUPPORT_ION)
-#include "linux/ion.h"
-extern struct ion_device *psIonDev;
+#if defined (SUPPORT_ION)
+#include "ion.h"
+extern struct ion_device *gpsIonDev;
#endif
+
extern IMG_UINT32 gui32ReleasePID;
PVRSRV_ERROR OSPerProcessPrivateDataInit(IMG_HANDLE *phOsPrivateData)
/* Linked list of PVRSRV_FILE_PRIVATE_DATA structures */
INIT_LIST_HEAD(&psEnvPerProc->sDRMAuthListHead);
#endif
+
#if defined(SUPPORT_ION)
OSSNPrintf(psEnvPerProc->azIonClientName, ION_CLIENT_NAME_SIZE, "pvr_ion_client-%d", OSGetCurrentProcessIDKM());
psEnvPerProc->psIONClient =
- ion_client_create(psIonDev,
- 1 << ION_HEAP_TYPE_SYSTEM_CONTIG |
- 1 << ION_HEAP_TYPE_SYSTEM,
- psEnvPerProc->azIonClientName);
+ ion_client_create(gpsIonDev,
+#if defined(CONFIG_ION_OMAP)
+ /*1 << ION_HEAP_TYPE_SYSTEM_CONTIG |*/
+ 1 << ION_HEAP_TYPE_SYSTEM
+ | 1 << OMAP_ION_HEAP_TYPE_TILER
+#else /* defined(CONFIG_ION_OMAP) */
+ -1
+#endif /* defined(CONFIG_ION_OMAP) */
+ , psEnvPerProc->azIonClientName);
if (IS_ERR_OR_NULL(psEnvPerProc->psIONClient))
{
"ion client for per process data"));
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
-#endif /* SUPPORT_ION */
+#endif /* defined(SUPPORT_ION) */
+
return PVRSRV_OK;
}
#include <linux/kernel.h> // sprintf
#include <linux/string.h> // strncpy, strlen
+#include <linux/mutex.h>
static IMG_BOOL PDumpWriteString2 (IMG_CHAR * pszString, IMG_UINT32 ui32Flags);
static IMG_BOOL PDumpWriteILock (PDBG_STREAM psStream, IMG_UINT8 *pui8Data, IMG_UINT32 ui32Count, IMG_UINT32 ui32Flags);
static PDBGKM_SERVICE_TABLE gpfnDbgDrv = IMG_NULL;
-
+DEFINE_MUTEX(sPDumpLock);
+DEFINE_MUTEX(sPDumpMsgLock);
IMG_CHAR *pszStreamName[PDUMP_NUM_STREAMS] = { "ParamStream2",
"ScriptStream2",
IMG_VOID PDumpOSCPUVAddrToPhysPages(IMG_HANDLE hOSMemHandle,
IMG_UINT32 ui32Offset,
IMG_PUINT8 pui8LinAddr,
- IMG_UINT32 ui32DataPageMask,
+ IMG_UINTPTR_T ui32DataPageMask,
IMG_UINT32 *pui32PageOffset)
{
if(hOSMemHandle)
PVR_UNREFERENCED_PARAMETER(hOSMemHandle);
PVR_UNREFERENCED_PARAMETER(ui32Offset);
- *pui32PageOffset = ((IMG_UINT32)pui8LinAddr & ui32DataPageMask);
+ *pui32PageOffset = ((IMG_UINTPTR_T)pui8LinAddr & ui32DataPageMask);
}
}
IMG_UINT32 ui32Written = 0;
if ((psStream == IMG_NULL) || PDumpSuspended() || ((ui32Flags & PDUMP_FLAGS_NEVER) != 0))
{
- PVR_DPF((PVR_DBG_MESSAGE, "PDumpWriteILock: Failed to write 0x%x bytes to stream 0x%x", ui32Count, (IMG_UINT32)psStream));
+ PVR_DPF((PVR_DBG_MESSAGE, "PDumpWriteILock: Failed to write 0x%x bytes to stream 0x%p", ui32Count, psStream));
return IMG_TRUE;
}
atomic_dec(&gsPDumpSuspended);
}
+/* Set to 1 if you want to debug PDump locking issues */
+#define DEBUG_PDUMP_LOCKS 0
+
+#if DEBUG_PDUMP_LOCKS
+static IMG_UINT32 ui32Count=0;
+static IMG_UINT32 aui32LockLine[2] = {0};
+static IMG_UINT32 aui32UnlockLine[2] = {0};
+static IMG_UINT32 ui32LockLineCount = 0;
+static IMG_UINT32 ui32UnlockLineCount = 0;
+#endif
+
+IMG_VOID PDumpOSLock(IMG_UINT32 ui32Line)
+{
+#if DEBUG_PDUMP_LOCKS
+ aui32LockLine[ui32LockLineCount++ % 2] = ui32Line;
+ ui32Count++;
+ if (ui32Count == 2)
+ {
+ IMG_UINT32 i;
+ printk(KERN_ERR "Double lock\n");
+ dump_stack();
+ for (i=0;i<2;i++)
+ {
+ printk(KERN_ERR "Lock[%d] = %d, Unlock[%d] = %d\n", i, aui32LockLine[i],i, aui32UnlockLine[i]);
+ }
+ }
+#endif
+ mutex_lock(&sPDumpLock);
+}
+
+IMG_VOID PDumpOSUnlock(IMG_UINT32 ui32Line)
+{
+ mutex_unlock(&sPDumpLock);
+#if DEBUG_PDUMP_LOCKS
+ aui32UnlockLine[ui32UnlockLineCount++ % 2] = ui32Line;
+ ui32Count--;
+#endif
+}
+
+IMG_VOID PDumpOSLockMessageBuffer(IMG_VOID)
+{
+ mutex_lock(&sPDumpMsgLock);
+}
+
+IMG_VOID PDumpOSUnlockMessageBuffer(IMG_VOID)
+{
+ mutex_unlock(&sPDumpMsgLock);
+}
+
#endif /* #if defined (PDUMP) */
#endif /* #if defined (SUPPORT_SGX) */
/*****************************************************************************
IMG_UINT32 ui32OpenPID;
/* Global kernel MemInfo handle */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
IMG_HANDLE hKernelMemInfo;
-#endif
#if defined(SUPPORT_DRI_DRM) && defined(PVR_SECURE_DRM_AUTH_EXPORT)
/* The private data is on a list in the per-process data structure */
#ifndef __SERVICES_PROC_H__
#define __SERVICES_PROC_H__
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
#include <asm/system.h> // va_list etc
+#endif
#include <linux/proc_fs.h> // read_proc_t etc
#include <linux/seq_file.h> // seq_file
extern PVRSRV_LINUX_MUTEX gPVRSRVLock;
#if defined(SUPPORT_MEMINFO_IDS)
-static IMG_UINT64 ui64Stamp;
+IMG_UINT64 g_ui64MemInfoID;
#endif /* defined(SUPPORT_MEMINFO_IDS) */
PVRSRV_ERROR
{
if(start)
{
- LinuxLockMutex(&gPVRSRVLock);
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
}
else
{
PVRSRV_PER_PROCESS_DATA *psPerProc;
IMG_INT err = -EFAULT;
- LinuxLockMutex(&gPVRSRVLock);
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
#if defined(SUPPORT_DRI_DRM)
psBridgePackageKM = (PVRSRV_BRIDGE_PACKAGE *)arg;
psPrivateData->hKernelMemInfo = hMemInfo;
#if defined(SUPPORT_MEMINFO_IDS)
- psPrivateData->ui64Stamp = ++ui64Stamp;
+ psPrivateData->ui64Stamp = ++g_ui64MemInfoID;
psKernelMemInfo->ui64Stamp = psPrivateData->ui64Stamp;
if (pvr_put_user(psPrivateData->ui64Stamp, &psExportDeviceMemOUT->ui64Stamp) != 0)
{
PVRSRV_BRIDGE_OUT_MAP_DEVICECLASS_MEMORY *psDeviceClassMemoryOUT =
(PVRSRV_BRIDGE_OUT_MAP_DEVICECLASS_MEMORY *)psBridgePackageKM->pvParamOut;
- if (pvr_put_user(++ui64Stamp, &psDeviceClassMemoryOUT->sClientMemInfo.ui64Stamp) != 0)
+ if (pvr_put_user(++g_ui64MemInfoID, &psDeviceClassMemoryOUT->sClientMemInfo.ui64Stamp) != 0)
{
err = -EFAULT;
goto unlock_and_return;
{
int ret = 0;
- LinuxLockMutex(&gPVRSRVLock);
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
if (arg == NULL)
{
{
int res;
- LinuxLockMutex(&gPVRSRVLock);
+ LinuxLockMutexNested(&gPVRSRVLock, PVRSRV_LOCK_CLASS_BRIDGE);
res = PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Ioctl)(dev, arg, pFile);
{
PVR_TRACE(("PVRSRVPciProbe"));
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36))
+ return drm_get_pci_dev(dev, id, &sPVRDrmDriver);
+#else
return drm_get_dev(dev, id, &sPVRDrmDriver);
+#endif
}
static void
.ioctl_start = 0
};
#else /* defined(SUPPORT_DRI_DRM_PLUGIN) */
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0))
+static const struct file_operations sPVRFileOps =
+{
+ .owner = THIS_MODULE,
+ .open = drm_open,
+#if defined(PVR_DRI_DRM_USE_POST_CLOSE)
+ .release = drm_release,
+#else
+ .release = PVRSRVDrmRelease,
+#endif
+ PVR_DRM_FOPS_IOCTL = drm_ioctl,
+ .mmap = PVRMMap,
+ .poll = drm_poll,
+ .fasync = drm_fasync,
+};
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) */
+
static struct drm_driver sPVRDrmDriver =
{
#if defined(PVR_OLD_STYLE_DRM_PLATFORM_DEV)
.get_reg_ofs = drm_core_get_reg_ofs,
#endif
.ioctls = sPVRDrmIoctls,
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0))
+ .fops = &sPVRFileOps,
+#else
.fops =
{
.owner = THIS_MODULE,
.poll = drm_poll,
.fasync = drm_fasync,
},
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39))
#if defined(PVR_OLD_STYLE_DRM_PLATFORM_DEV)
.platform_driver =
#if defined(SUPPORT_DRM_MODESET)
.probe = PVRSRVPciProbe,
.remove = PVRSRVPciRemove,
+ .suspend = PVRSRVDriverSuspend,
+ .resume = PVRSRVDriverResume,
#endif
};
#endif
#define SGX_CORE_REV SGX_CORE_REV_HEAD
#endif
- #if SGX_CORE_REV == 101
- #define FIX_HW_BRN_25499/* Workaround in sgx featuredefs */
- #define FIX_HW_BRN_25503/* Workaround in code (services) */
- #define FIX_HW_BRN_26620/* Workaround in services (srvkm) */
- #define FIX_HW_BRN_28011/* Workaround in services (srvkm) */
- #define FIX_HW_BRN_34028/* Workaround in services (srvkm) */
- #else
#if SGX_CORE_REV == 110
#define FIX_HW_BRN_25503/* Workaround in code (services) */
#define FIX_HW_BRN_26620/* Workaround in services (srvkm) */
#endif
#endif
#endif
- #endif
/* signal that the Core Version has a valid definition */
#define SGX_CORE_DEFINED
#endif
#define FIX_HW_BRN_31272/* workaround in services (srvclient) and uKernel */
#define FIX_HW_BRN_31278/* disabled prefetching in MMU */
#define FIX_HW_BRN_31542/* workaround in uKernel and Services */
- #if defined(SGX_FEATURE_MP)
- #define FIX_HW_BRN_31559/* workaround in services and uKernel */
- #endif
#define FIX_HW_BRN_31620/* workaround in services */
#define FIX_HW_BRN_31780/* workaround in uKernel */
#define FIX_HW_BRN_32044 /* workaround in uKernel, services and client drivers */
#define FIX_HW_BRN_31195/* workaround in services */
#define FIX_HW_BRN_31272/* workaround in services (srvclient) and uKernel */
#define FIX_HW_BRN_31278/* disabled prefetching in MMU */
- #if defined(SGX_FEATURE_MP)
- #define FIX_HW_BRN_31559/* workaround in services and uKernel */
- #endif
#define FIX_HW_BRN_31542/* workaround in uKernel and Services */
#define FIX_HW_BRN_31671/* workaround in uKernel */
#define FIX_HW_BRN_31780/* workaround in uKernel */
#else
#if SGX_CORE_REV == 141
#define FIX_HW_BRN_29954/* turns off regbank split feature */
- #if defined(SGX_FEATURE_MP)
- #define FIX_HW_BRN_31559/* workaround in services and uKernel */
- #endif
#define FIX_HW_BRN_31671 /* workaround in uKernel */
#define FIX_HW_BRN_31780/* workaround in uKernel */
#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING) && defined(SGX_FEATURE_MP)
#else
#if SGX_CORE_REV == 142
#define FIX_HW_BRN_29954/* turns off regbank split feature */
- #if defined(SGX_FEATURE_MP)
- #define FIX_HW_BRN_31559/* workaround in services and uKernel */
- #endif
#define FIX_HW_BRN_31671 /* workaround in uKernel */
#define FIX_HW_BRN_31780/* workaround in uKernel */
#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING) && defined(SGX_FEATURE_MP)
#define FIX_HW_BRN_31272/* workaround in services (srvclient) and uKernel */
#define FIX_HW_BRN_31278/* disabled prefetching in MMU */
#define FIX_HW_BRN_31542/* workaround in uKernel and Services */
- #if defined(SGX_FEATURE_MP)
- #define FIX_HW_BRN_31559/* workaround in services and uKernel */
- #endif
#define FIX_HW_BRN_31620/* workaround in services */
#define FIX_HW_BRN_31780/* workaround in uKernel */
#define FIX_HW_BRN_32044 /* workaround in uKernel, services and client drivers */
#else
#if SGX_CORE_REV == 213
#define FIX_HW_BRN_31272/* workaround in services (srvclient) and uKernel */
- #if defined(SGX_FEATURE_MP)
- #define FIX_HW_BRN_31559/* workaround in services and uKernel */
- #endif
#define FIX_HW_BRN_31671 /* workaround in uKernel */
#define FIX_HW_BRN_31780/* workaround in uKernel */
#define FIX_HW_BRN_32085 /* workaround in services: prefetch fix applied, investigating PT based fix */
#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING) && defined(SGX_FEATURE_MP)
#define FIX_HW_BRN_33657/* workaround in ukernel*/
#endif
- #define FIX_HW_BRN_36513 /* workaround in uKernel and Services */
+ #define FIX_HW_BRN_36513 /* workaround in uKernel and Services */
#else
#if SGX_CORE_REV == 303
#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING) && defined(SGX_FEATURE_MP)
#define FIX_HW_BRN_33657/* workaround in ukernel*/
#endif
- #define FIX_HW_BRN_36513 /* workaround in uKernel and Services */
+ #define FIX_HW_BRN_36513 /* workaround in uKernel and Services */
#else
#if SGX_CORE_REV == SGX_CORE_REV_HEAD
#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING) && defined(SGX_FEATURE_MP)
#define FIX_HW_BRN_31195/* workaround in services */
#define FIX_HW_BRN_31272/* workaround in services (srvclient) and uKernel */
#define FIX_HW_BRN_31278/* disabled prefetching in MMU */
- #if defined(SGX_FEATURE_MP)
- #define FIX_HW_BRN_31559/* workaround in services and uKernel */
- #endif
#define FIX_HW_BRN_31542 /* workaround in uKernel and Services */
#define FIX_HW_BRN_31620/* workaround in services */
#define FIX_HW_BRN_31671 /* workaround in uKernel */
#define FIX_HW_BRN_36513 /* workaround in uKernel and Services */
#else
#if SGX_CORE_REV == 105
- #if defined(SGX_FEATURE_MP)
- #define FIX_HW_BRN_31559/* workaround in services and uKernel */
- #endif
#define FIX_HW_BRN_31780/* workaround in uKernel */
#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING) && defined(SGX_FEATURE_MP)
#define FIX_HW_BRN_33657/* workaround in ukernel*/
#define SGX_CORE_REV SGX_CORE_REV_HEAD
#endif
- #if SGX_CORE_REV == 109
- #define FIX_HW_BRN_29702/* Workaround in services */
- #define FIX_HW_BRN_29823/* Workaround in services */
- #define FIX_HW_BRN_31939/* workaround in uKernel */
- #else
#if SGX_CORE_REV == 10131
#else
#if SGX_CORE_REV == 1014
#endif
#endif
#endif
- #endif
/* signal that the Core Version has a valid definition */
#define SGX_CORE_DEFINED
#endif
#define SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH
#endif
#define SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH
- #define SGX_FEATURE_SW_ISP_CONTEXT_SWITCH
#endif
#else
#if defined(SGX544)
// #define SGX_FEATURE_DATA_BREAKPOINTS
// #define SGX_FEATURE_PERPIPE_BKPT_REGS
// #define SGX_FEATURE_PERPIPE_BKPT_REGS_NUMPIPES (2)
-// #define SGX_FEATURE_2D_HARDWARE
-// #define SGX_FEATURE_PTLA
+ #if defined(SGX_FEATURE_MP)
+ #define SGX_FEATURE_2D_HARDWARE
+ #define SGX_FEATURE_PTLA
+ #endif
#define SGX_FEATURE_EXTENDED_PERF_COUNTERS
#define SGX_FEATURE_EDM_VERTEX_PDSADDR_FULL_RANGE
#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING)
#define SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH
#define SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH
#endif
- #define SGX_FEATURE_SW_ISP_CONTEXT_SWITCH
#endif
#else
#if defined(SGX545)
#define SGX_FEATURE_BIF_WIDE_TILING_AND_4K_ADDRESS
#define SGX_FEATURE_MULTI_EVENT_KICK
#define SGX_FEATURE_EDM_VERTEX_PDSADDR_FULL_RANGE
- #if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING)
- #define SGX_FEATURE_SW_ISP_CONTEXT_SWITCH
- #endif
#else
#if defined(SGX554)
#define SGX_CORE_FRIENDLY_NAME "SGX554"
#define SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH
#endif
#define SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH
- #define SGX_FEATURE_SW_ISP_CONTEXT_SWITCH
#endif
#endif
#endif
*/
IMG_BOOL
BM_Wrap ( IMG_HANDLE hDevMemHeap,
- IMG_SIZE_T ui32Size,
- IMG_SIZE_T ui32Offset,
+ IMG_SIZE_T uSize,
+ IMG_SIZE_T uOffset,
IMG_BOOL bPhysContig,
IMG_SYS_PHYADDR *psSysAddr,
IMG_VOID *pvCPUVAddr,
IMG_VOID _BM_XProcIndexAcquire(IMG_UINT32 ui32Index);
IMG_VOID _BM_XProcIndexRelease(IMG_UINT32 ui32Index);
+
#define BM_XProcIndexAcquire(x) \
_BM_XProcIndexAcquire( x)
#define BM_XProcIndexRelease(x) \
--- /dev/null
+/*************************************************************************/ /*!
+@Title KM internal device memory functions
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+#include "img_defs.h"
+#include "img_types.h"
+#include "servicesext.h"
+
+#ifndef __DEVICEMEM_H__
+#define __DEVICEMEM_H__
+
+PVRSRV_ERROR IMG_CALLCONV PVRSRVInitDeviceMem(IMG_VOID);
+IMG_VOID IMG_CALLCONV PVRSRVDeInitDeviceMem(IMG_VOID);
+
+#endif /* __DEVICEMEM_H__ */
struct _PVRSRV_HANDLE_BASE_;
typedef struct _PVRSRV_HANDLE_BASE_ PVRSRV_HANDLE_BASE;
-#if defined (PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)
+#if defined(PVR_SECURE_HANDLES)
extern PVRSRV_HANDLE_BASE *gpsKernelHandleBase;
#define KERNEL_HANDLE_BASE (gpsKernelHandleBase)
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR PVRSRVAllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag);
-
-PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_SID hParent);
-
-PVRSRV_ERROR PVRSRVFindHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType);
-
-PVRSRV_ERROR PVRSRVLookupHandleAnyType(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, PVRSRV_HANDLE_TYPE *peType, IMG_SID hHandle);
-
-PVRSRV_ERROR PVRSRVLookupHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType);
-
-PVRSRV_ERROR PVRSRVLookupSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType, IMG_SID hAncestor);
-
-PVRSRV_ERROR PVRSRVGetParentHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID *phParent, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType);
-
-PVRSRV_ERROR PVRSRVLookupAndReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType);
-
-PVRSRV_ERROR PVRSRVReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_SID hHandle, PVRSRV_HANDLE_TYPE eType);
-#else
PVRSRV_ERROR PVRSRVAllocHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag);
PVRSRV_ERROR PVRSRVAllocSubHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE *phHandle, IMG_VOID *pvData, PVRSRV_HANDLE_TYPE eType, PVRSRV_HANDLE_ALLOC_FLAG eFlag, IMG_HANDLE hParent);
PVRSRV_ERROR PVRSRVLookupAndReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_PVOID *ppvData, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType);
PVRSRV_ERROR PVRSRVReleaseHandle(PVRSRV_HANDLE_BASE *psBase, IMG_HANDLE hHandle, PVRSRV_HANDLE_TYPE eType);
-#endif /* #if defined (SUPPORT_SID_INTERFACE) */
PVRSRV_ERROR PVRSRVNewHandleBatch(PVRSRV_HANDLE_BASE *psBase, IMG_UINT32 ui32BatchSize);
PVRSRV_ERROR PVRSRVHandleDeInit(IMG_VOID);
-#else /* #if defined (PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)*/
+#else /* #if defined (PVR_SECURE_HANDLES) */
#define KERNEL_HANDLE_BASE IMG_NULL
return PVRSRV_OK;
}
-#endif /* #if defined (PVR_SECURE_HANDLES) || defined (SUPPORT_SID_INTERFACE)*/
+#endif /* #if defined (PVR_SECURE_HANDLES) */
/*
* Versions of PVRSRVAllocHandle and PVRSRVAllocSubHandle with no return
#if defined(__linux__) && defined(__KERNEL__)
#include <linux/hardirq.h>
#include <linux/string.h>
-#include <asm/system.h>
#if defined(__arm__)
#include <asm/memory.h>
#endif
IMG_UINT32 OSClockus(IMG_VOID);
-IMG_SIZE_T OSGetPageSize(IMG_VOID);
+IMG_UINT32 OSGetPageSize(IMG_VOID);
PVRSRV_ERROR OSInstallDeviceLISR(IMG_VOID *pvSysData,
IMG_UINT32 ui32Irq,
IMG_CHAR *pszISRName,
PVRSRV_ERROR OSInstallMISR(IMG_VOID *pvSysData);
PVRSRV_ERROR OSUninstallMISR(IMG_VOID *pvSysData);
IMG_CPU_PHYADDR OSMapLinToCPUPhys(IMG_HANDLE, IMG_VOID* pvLinAddr);
-IMG_VOID OSMemCopy(IMG_VOID *pvDst, IMG_VOID *pvSrc, IMG_SIZE_T ui32Size);
-IMG_VOID *OSMapPhysToLin(IMG_CPU_PHYADDR BasePAddr, IMG_SIZE_T ui32Bytes, IMG_UINT32 ui32Flags, IMG_HANDLE *phOSMemHandle);
-IMG_BOOL OSUnMapPhysToLin(IMG_VOID *pvLinAddr, IMG_SIZE_T ui32Bytes, IMG_UINT32 ui32Flags, IMG_HANDLE hOSMemHandle);
+IMG_VOID OSMemCopy(IMG_VOID *pvDst, IMG_VOID *pvSrc, IMG_SIZE_T uiSize);
+IMG_VOID *OSMapPhysToLin(IMG_CPU_PHYADDR BasePAddr, IMG_SIZE_T uBytes, IMG_UINT32 ui32Flags, IMG_HANDLE *phOSMemHandle);
+IMG_BOOL OSUnMapPhysToLin(IMG_VOID *pvLinAddr, IMG_SIZE_T uBytes, IMG_UINT32 ui32Flags, IMG_HANDLE hOSMemHandle);
-PVRSRV_ERROR OSReservePhys(IMG_CPU_PHYADDR BasePAddr, IMG_SIZE_T ui32Bytes, IMG_UINT32 ui32Flags, IMG_HANDLE hBMHandle, IMG_VOID **ppvCpuVAddr, IMG_HANDLE *phOSMemHandle);
-PVRSRV_ERROR OSUnReservePhys(IMG_VOID *pvCpuVAddr, IMG_SIZE_T ui32Bytes, IMG_UINT32 ui32Flags, IMG_HANDLE hOSMemHandle);
+PVRSRV_ERROR OSReservePhys(IMG_CPU_PHYADDR BasePAddr, IMG_SIZE_T uBytes, IMG_UINT32 ui32Flags, IMG_HANDLE hBMHandle, IMG_VOID **ppvCpuVAddr, IMG_HANDLE *phOSMemHandle);
+PVRSRV_ERROR OSUnReservePhys(IMG_VOID *pvCpuVAddr, IMG_SIZE_T uBytes, IMG_UINT32 ui32Flags, IMG_HANDLE hOSMemHandle);
/* Some terminology:
*
#if defined(__linux__) || defined(__QNXNTO__)
PVRSRV_ERROR OSRegisterDiscontigMem(IMG_SYS_PHYADDR *pBasePAddr,
IMG_VOID *pvCpuVAddr,
- IMG_SIZE_T ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32Flags,
IMG_HANDLE *phOSMemHandle);
PVRSRV_ERROR OSUnRegisterDiscontigMem(IMG_VOID *pvCpuVAddr,
- IMG_SIZE_T ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32Flags,
IMG_HANDLE hOSMemHandle);
#else /* defined(__linux__) */
#endif
static INLINE PVRSRV_ERROR OSRegisterDiscontigMem(IMG_SYS_PHYADDR *pBasePAddr,
IMG_VOID *pvCpuVAddr,
- IMG_SIZE_T ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32Flags,
IMG_HANDLE *phOSMemHandle)
{
#pragma inline(OSUnRegisterDiscontigMem)
#endif
static INLINE PVRSRV_ERROR OSUnRegisterDiscontigMem(IMG_VOID *pvCpuVAddr,
- IMG_SIZE_T ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32Flags,
IMG_HANDLE hOSMemHandle)
{
#ifdef INLINE_IS_PRAGMA
#pragma inline(OSReserveDiscontigPhys)
#endif
-static INLINE PVRSRV_ERROR OSReserveDiscontigPhys(IMG_SYS_PHYADDR *pBasePAddr, IMG_SIZE_T ui32Bytes, IMG_UINT32 ui32Flags, IMG_VOID **ppvCpuVAddr, IMG_HANDLE *phOSMemHandle)
+static INLINE PVRSRV_ERROR OSReserveDiscontigPhys(IMG_SYS_PHYADDR *pBasePAddr, IMG_SIZE_T uBytes, IMG_UINT32 ui32Flags, IMG_VOID **ppvCpuVAddr, IMG_HANDLE *phOSMemHandle)
{
#if defined(__linux__) || defined(__QNXNTO__)
*ppvCpuVAddr = IMG_NULL;
- return OSRegisterDiscontigMem(pBasePAddr, *ppvCpuVAddr, ui32Bytes, ui32Flags, phOSMemHandle);
+ return OSRegisterDiscontigMem(pBasePAddr, *ppvCpuVAddr, uBytes, ui32Flags, phOSMemHandle);
#else
extern IMG_CPU_PHYADDR SysSysPAddrToCpuPAddr(IMG_SYS_PHYADDR SysPAddr);
* 4. We don't need to unmap
*/
- return OSReservePhys(SysSysPAddrToCpuPAddr(pBasePAddr[0]), ui32Bytes, ui32Flags, IMG_NULL, ppvCpuVAddr, phOSMemHandle);
+ return OSReservePhys(SysSysPAddrToCpuPAddr(pBasePAddr[0]), uBytes, ui32Flags, IMG_NULL, ppvCpuVAddr, phOSMemHandle);
#endif
}
-static INLINE PVRSRV_ERROR OSUnReserveDiscontigPhys(IMG_VOID *pvCpuVAddr, IMG_SIZE_T ui32Bytes, IMG_UINT32 ui32Flags, IMG_HANDLE hOSMemHandle)
+static INLINE PVRSRV_ERROR OSUnReserveDiscontigPhys(IMG_VOID *pvCpuVAddr, IMG_SIZE_T uBytes, IMG_UINT32 ui32Flags, IMG_HANDLE hOSMemHandle)
{
#if defined(__linux__) || defined(__QNXNTO__)
- OSUnRegisterDiscontigMem(pvCpuVAddr, ui32Bytes, ui32Flags, hOSMemHandle);
+ OSUnRegisterDiscontigMem(pvCpuVAddr, uBytes, ui32Flags, hOSMemHandle);
#endif
/* We don't need to unmap */
return PVRSRV_OK;
#ifdef INLINE_IS_PRAGMA
#pragma inline(OSReserveDiscontigPhys)
#endif
-static INLINE PVRSRV_ERROR OSReserveDiscontigPhys(IMG_SYS_PHYADDR *pBasePAddr, IMG_SIZE_T ui32Bytes, IMG_UINT32 ui32Flags, IMG_VOID **ppvCpuVAddr, IMG_HANDLE *phOSMemHandle)
+static INLINE PVRSRV_ERROR OSReserveDiscontigPhys(IMG_SYS_PHYADDR *pBasePAddr, IMG_SIZE_T uBytes, IMG_UINT32 ui32Flags, IMG_VOID **ppvCpuVAddr, IMG_HANDLE *phOSMemHandle)
{
PVR_UNREFERENCED_PARAMETER(pBasePAddr);
- PVR_UNREFERENCED_PARAMETER(ui32Bytes);
+ PVR_UNREFERENCED_PARAMETER(uBytes);
PVR_UNREFERENCED_PARAMETER(ui32Flags);
PVR_UNREFERENCED_PARAMETER(ppvCpuVAddr);
PVR_UNREFERENCED_PARAMETER(phOSMemHandle);
#ifdef INLINE_IS_PRAGMA
#pragma inline(OSUnReserveDiscontigPhys)
#endif
-static INLINE PVRSRV_ERROR OSUnReserveDiscontigPhys(IMG_VOID *pvCpuVAddr, IMG_SIZE_T ui32Bytes, IMG_UINT32 ui32Flags, IMG_HANDLE hOSMemHandle)
+static INLINE PVRSRV_ERROR OSUnReserveDiscontigPhys(IMG_VOID *pvCpuVAddr, IMG_SIZE_T uBytes, IMG_UINT32 ui32Flags, IMG_HANDLE hOSMemHandle)
{
PVR_UNREFERENCED_PARAMETER(pvCpuVAddr);
- PVR_UNREFERENCED_PARAMETER(ui32Bytes);
+ PVR_UNREFERENCED_PARAMETER(uBytes);
PVR_UNREFERENCED_PARAMETER(ui32Flags);
PVR_UNREFERENCED_PARAMETER(hOSMemHandle);
PVRSRV_ERROR OSRegisterMem(IMG_CPU_PHYADDR BasePAddr,
IMG_VOID *pvCpuVAddr,
- IMG_SIZE_T ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32Flags,
IMG_HANDLE *phOSMemHandle);
PVRSRV_ERROR OSUnRegisterMem(IMG_VOID *pvCpuVAddr,
- IMG_SIZE_T ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32Flags,
IMG_HANDLE hOSMemHandle);
#if defined(__linux__) || defined(__QNXNTO__)
PVRSRV_ERROR OSGetSubMemHandle(IMG_HANDLE hOSMemHandle,
- IMG_UINTPTR_T ui32ByteOffset,
- IMG_SIZE_T ui32Bytes,
+ IMG_UINTPTR_T uByteOffset,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32Flags,
IMG_HANDLE *phOSMemHandleRet);
PVRSRV_ERROR OSReleaseSubMemHandle(IMG_HANDLE hOSMemHandle, IMG_UINT32 ui32Flags);
#pragma inline(OSGetSubMemHandle)
#endif
static INLINE PVRSRV_ERROR OSGetSubMemHandle(IMG_HANDLE hOSMemHandle,
- IMG_UINTPTR_T ui32ByteOffset,
- IMG_SIZE_T ui32Bytes,
+ IMG_UINTPTR_T uByteOffset,
+ IMG_SIZE_T uBytes,
IMG_UINT32 ui32Flags,
IMG_HANDLE *phOSMemHandleRet)
{
- PVR_UNREFERENCED_PARAMETER(ui32ByteOffset);
- PVR_UNREFERENCED_PARAMETER(ui32Bytes);
+ PVR_UNREFERENCED_PARAMETER(uByteOffset);
+ PVR_UNREFERENCED_PARAMETER(uBytes);
PVR_UNREFERENCED_PARAMETER(ui32Flags);
*phOSMemHandleRet = hOSMemHandle;
IMG_UINT32 OSGetCurrentProcessIDKM(IMG_VOID);
IMG_UINTPTR_T OSGetCurrentThreadID( IMG_VOID );
-IMG_VOID OSMemSet(IMG_VOID *pvDest, IMG_UINT8 ui8Value, IMG_SIZE_T ui32Size);
+IMG_VOID OSMemSet(IMG_VOID *pvDest, IMG_UINT8 ui8Value, IMG_SIZE_T uSize);
-PVRSRV_ERROR OSAllocPages_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T ui32Size, IMG_UINT32 ui32PageSize,
+PVRSRV_ERROR OSAllocPages_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T uSize, IMG_UINT32 ui32PageSize,
IMG_PVOID pvPrivData, IMG_UINT32 ui32PrivDataLength, IMG_HANDLE hBMHandle, IMG_PVOID *ppvLinAddr, IMG_HANDLE *phPageAlloc);
-PVRSRV_ERROR OSFreePages(IMG_UINT32 ui32Flags, IMG_SIZE_T ui32Size, IMG_PVOID pvLinAddr, IMG_HANDLE hPageAlloc);
+PVRSRV_ERROR OSFreePages(IMG_UINT32 ui32Flags, IMG_SIZE_T uSize, IMG_PVOID pvLinAddr, IMG_HANDLE hPageAlloc);
/*---------------------
/*If level 1 wrapper is enabled declare the functions with extra parameters
else alias to level 0 and declare the functions without the extra debugging parameters*/
#if (defined(__linux__) || defined(__QNXNTO__)) && defined(DEBUG_LINUX_MEMORY_ALLOCATIONS)
- PVRSRV_ERROR OSAllocMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T ui32Size, IMG_PVOID *ppvLinAddr, IMG_HANDLE *phBlockAlloc, IMG_CHAR *pszFilename, IMG_UINT32 ui32Line);
- PVRSRV_ERROR OSFreeMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T ui32Size, IMG_PVOID pvLinAddr, IMG_HANDLE hBlockAlloc, IMG_CHAR *pszFilename, IMG_UINT32 ui32Line);
+ PVRSRV_ERROR OSAllocMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T uSize, IMG_PVOID *ppvLinAddr, IMG_HANDLE *phBlockAlloc, IMG_CHAR *pszFilename, IMG_UINT32 ui32Line);
+ PVRSRV_ERROR OSFreeMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T uSize, IMG_PVOID pvLinAddr, IMG_HANDLE hBlockAlloc, IMG_CHAR *pszFilename, IMG_UINT32 ui32Line);
#define OSAllocMem_Debug_Linux_Memory_Allocations OSAllocMem_Impl
#define OSFreeMem_Debug_Linux_Memory_Allocations OSFreeMem_Impl
#else
- PVRSRV_ERROR OSAllocMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T ui32Size, IMG_PVOID *ppvLinAddr, IMG_HANDLE *phBlockAlloc);
- PVRSRV_ERROR OSFreeMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T ui32Size, IMG_PVOID pvLinAddr, IMG_HANDLE hBlockAlloc);
+ PVRSRV_ERROR OSAllocMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T uSize, IMG_PVOID *ppvLinAddr, IMG_HANDLE *phBlockAlloc);
+ PVRSRV_ERROR OSFreeMem_Impl(IMG_UINT32 ui32Flags, IMG_SIZE_T uSize, IMG_PVOID pvLinAddr, IMG_HANDLE hBlockAlloc);
#define OSAllocMem_Debug_Linux_Memory_Allocations(flags, size, addr, blockAlloc, file, line) \
OSAllocMem_Impl(flags, size, addr, blockAlloc)
#if defined(__linux__) || defined(__QNXNTO__)
-IMG_CPU_PHYADDR OSMemHandleToCpuPAddr(IMG_VOID *hOSMemHandle, IMG_SIZE_T ui32ByteOffset);
+IMG_CPU_PHYADDR OSMemHandleToCpuPAddr(IMG_VOID *hOSMemHandle, IMG_UINTPTR_T uiByteOffset);
#else
#ifdef INLINE_IS_PRAGMA
#pragma inline(OSMemHandleToCpuPAddr)
#endif
-static INLINE IMG_CPU_PHYADDR OSMemHandleToCpuPAddr(IMG_HANDLE hOSMemHandle, IMG_SIZE_T ui32ByteOffset)
+static INLINE IMG_CPU_PHYADDR OSMemHandleToCpuPAddr(IMG_HANDLE hOSMemHandle, IMG_UINTPTR_T uiByteOffset)
{
IMG_CPU_PHYADDR sCpuPAddr;
PVR_UNREFERENCED_PARAMETER(hOSMemHandle);
- PVR_UNREFERENCED_PARAMETER(ui32ByteOffset);
+ PVR_UNREFERENCED_PARAMETER(uiByteOffset);
sCpuPAddr.uiAddr = 0;
return sCpuPAddr;
}
PVRSRV_ERROR OSInitEnvData(IMG_PVOID *ppvEnvSpecificData);
PVRSRV_ERROR OSDeInitEnvData(IMG_PVOID pvEnvSpecificData);
IMG_CHAR* OSStringCopy(IMG_CHAR *pszDest, const IMG_CHAR *pszSrc);
-IMG_INT32 OSSNPrintf(IMG_CHAR *pStr, IMG_SIZE_T ui32Size, const IMG_CHAR *pszFormat, ...) IMG_FORMAT_PRINTF(3, 4);
+IMG_INT32 OSSNPrintf(IMG_CHAR *pStr, IMG_SIZE_T uSize, const IMG_CHAR *pszFormat, ...) IMG_FORMAT_PRINTF(3, 4);
#define OSStringLength(pszString) strlen(pszString)
-#if defined (SUPPORT_SID_INTERFACE)
-PVRSRV_ERROR OSEventObjectCreateKM(const IMG_CHAR *pszName,
- PVRSRV_EVENTOBJECT_KM *psEventObject);
-PVRSRV_ERROR OSEventObjectDestroyKM(PVRSRV_EVENTOBJECT_KM *psEventObject);
-PVRSRV_ERROR OSEventObjectSignalKM(IMG_HANDLE hOSEventKM);
-PVRSRV_ERROR OSEventObjectWaitKM(IMG_HANDLE hOSEventKM);
-PVRSRV_ERROR OSEventObjectOpenKM(PVRSRV_EVENTOBJECT_KM *psEventObject,
- IMG_HANDLE *phOSEvent);
-PVRSRV_ERROR OSEventObjectCloseKM(PVRSRV_EVENTOBJECT_KM *psEventObject,
- IMG_HANDLE hOSEventKM);
-#else
PVRSRV_ERROR OSEventObjectCreateKM(const IMG_CHAR *pszName,
PVRSRV_EVENTOBJECT *psEventObject);
PVRSRV_ERROR OSEventObjectDestroyKM(PVRSRV_EVENTOBJECT *psEventObject);
IMG_HANDLE *phOSEvent);
PVRSRV_ERROR OSEventObjectCloseKM(PVRSRV_EVENTOBJECT *psEventObject,
IMG_HANDLE hOSEventKM);
-#endif /* #if defined (SUPPORT_SID_INTERFACE) */
-PVRSRV_ERROR OSBaseAllocContigMemory(IMG_SIZE_T ui32Size, IMG_CPU_VIRTADDR *pLinAddr, IMG_CPU_PHYADDR *pPhysAddr);
-PVRSRV_ERROR OSBaseFreeContigMemory(IMG_SIZE_T ui32Size, IMG_CPU_VIRTADDR LinAddr, IMG_CPU_PHYADDR PhysAddr);
+PVRSRV_ERROR OSBaseAllocContigMemory(IMG_SIZE_T uSize, IMG_CPU_VIRTADDR *pLinAddr, IMG_CPU_PHYADDR *pPhysAddr);
+PVRSRV_ERROR OSBaseFreeContigMemory(IMG_SIZE_T uSize, IMG_CPU_VIRTADDR LinAddr, IMG_CPU_PHYADDR PhysAddr);
-IMG_PVOID MapUserFromKernel(IMG_PVOID pvLinAddrKM,IMG_SIZE_T ui32Size,IMG_HANDLE *phMemBlock);
+IMG_PVOID MapUserFromKernel(IMG_PVOID pvLinAddrKM,IMG_SIZE_T uSize,IMG_HANDLE *phMemBlock);
IMG_PVOID OSMapHWRegsIntoUserSpace(IMG_HANDLE hDevCookie, IMG_SYS_PHYADDR sRegAddr, IMG_UINT32 ulSize, IMG_PVOID *ppvProcess);
IMG_VOID OSUnmapHWRegsFromUserSpace(IMG_HANDLE hDevCookie, IMG_PVOID pvUserAddr, IMG_PVOID pvProcess);
-IMG_VOID UnmapUserFromKernel(IMG_PVOID pvLinAddrUM, IMG_SIZE_T ui32Size, IMG_HANDLE hMemBlock);
+IMG_VOID UnmapUserFromKernel(IMG_PVOID pvLinAddrUM, IMG_SIZE_T uSize, IMG_HANDLE hMemBlock);
PVRSRV_ERROR OSMapPhysToUserSpace(IMG_HANDLE hDevCookie,
IMG_SYS_PHYADDR sCPUPhysAddr,
PVRSRV_ERROR OSEnableTimer (IMG_HANDLE hTimer);
PVRSRV_ERROR OSDisableTimer (IMG_HANDLE hTimer);
-PVRSRV_ERROR OSGetSysMemSize(IMG_SIZE_T *pui32Bytes);
+PVRSRV_ERROR OSGetSysMemSize(IMG_SIZE_T *puBytes);
typedef enum _HOST_PCI_INIT_FLAGS_
{
PVR_VERIFY_READ
} IMG_VERIFY_TEST;
-IMG_BOOL OSAccessOK(IMG_VERIFY_TEST eVerification, IMG_VOID *pvUserPtr, IMG_SIZE_T ui32Bytes);
+IMG_BOOL OSAccessOK(IMG_VERIFY_TEST eVerification, IMG_VOID *pvUserPtr, IMG_SIZE_T uBytes);
-PVRSRV_ERROR OSCopyToUser(IMG_PVOID pvProcess, IMG_VOID *pvDest, IMG_VOID *pvSrc, IMG_SIZE_T ui32Bytes);
-PVRSRV_ERROR OSCopyFromUser(IMG_PVOID pvProcess, IMG_VOID *pvDest, IMG_VOID *pvSrc, IMG_SIZE_T ui32Bytes);
+PVRSRV_ERROR OSCopyToUser(IMG_PVOID pvProcess, IMG_VOID *pvDest, IMG_VOID *pvSrc, IMG_SIZE_T uBytes);
+PVRSRV_ERROR OSCopyFromUser(IMG_PVOID pvProcess, IMG_VOID *pvDest, IMG_VOID *pvSrc, IMG_SIZE_T uBytes);
#if defined(__linux__) || defined(__QNXNTO__)
PVRSRV_ERROR OSAcquirePhysPageAddr(IMG_VOID* pvCPUVAddr,
- IMG_SIZE_T ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_SYS_PHYADDR *psSysPAddr,
IMG_HANDLE *phOSWrapMem);
PVRSRV_ERROR OSReleasePhysPageAddr(IMG_HANDLE hOSWrapMem);
#pragma inline(OSAcquirePhysPageAddr)
#endif
static INLINE PVRSRV_ERROR OSAcquirePhysPageAddr(IMG_VOID* pvCPUVAddr,
- IMG_SIZE_T ui32Bytes,
+ IMG_SIZE_T uBytes,
IMG_SYS_PHYADDR *psSysPAddr,
IMG_HANDLE *phOSWrapMem)
{
PVR_UNREFERENCED_PARAMETER(pvCPUVAddr);
- PVR_UNREFERENCED_PARAMETER(ui32Bytes);
+ PVR_UNREFERENCED_PARAMETER(uBytes);
PVR_UNREFERENCED_PARAMETER(psSysPAddr);
PVR_UNREFERENCED_PARAMETER(phOSWrapMem);
return PVRSRV_OK;
#endif
+#if defined(__linux__) && defined(DEBUG)
+#define OSDumpStack dump_stack
+#else
+#define OSDumpStack()
+#endif
+
#if defined (__cplusplus)
}
#endif
#define MAKEUNIQUETAG(hMemInfo) (0)
#endif
+IMG_BOOL _PDumpIsProcessActive(IMG_VOID);
+
#ifdef PDUMP
#define MAKEUNIQUETAG(hMemInfo) (((BM_BUF *)(((PVRSRV_KERNEL_MEM_INFO *)(hMemInfo))->sMemBlk.hBuffer))->pMapping)
IMG_HANDLE hOSMemHandle,
IMG_UINT32 ui32NumBytes,
IMG_UINT32 ui32PageSize,
- IMG_BOOL bShared,
- IMG_HANDLE hUniqueTag);
+ IMG_HANDLE hUniqueTag,
+ IMG_UINT32 ui32Flags);
PVRSRV_ERROR PDumpMallocPageTable(PVRSRV_DEVICE_IDENTIFIER *psDevId,
IMG_HANDLE hOSMemHandle,
IMG_UINT32 ui32Offset,
IMG_UINT32 ui32PageSize,
IMG_HANDLE hUniqueTag,
IMG_BOOL bInterleaved,
- IMG_BOOL bSparse);
+ IMG_BOOL bSparse,
+ IMG_UINT32 ui32Flags);
PVRSRV_ERROR PDumpFreePageTable(PVRSRV_DEVICE_IDENTIFIER *psDevID,
IMG_HANDLE hOSMemHandle,
IMG_CPU_VIRTADDR pvLinAddr,
* supported (e.g. Linux).
*/
#define MAX_PDUMP_STRING_LENGTH (256)
-#if defined(__QNXNTO__)
+
+
+#if defined(__QNXNTO__)
+
#define PDUMP_GET_SCRIPT_STRING() \
IMG_CHAR pszScript[MAX_PDUMP_STRING_LENGTH]; \
IMG_UINT32 ui32MaxLen = MAX_PDUMP_STRING_LENGTH-1; \
IMG_UINT32 ui32MaxLenFileName = MAX_PDUMP_STRING_LENGTH-1; \
IMG_HANDLE hScript = (IMG_HANDLE)pszScript;
-#else /* WIN32 or QNX */
+#define PDUMP_LOCK(args...)
+#define PDUMP_UNLOCK(args...)
+#define PDUMP_LOCK_MSG(args...)
+#define PDUMP_UNLOCK_MSG(args...)
+
+#else /* __QNXNTO__ */
/*
eError = PDumpOSGetFilenameString(&pszFileName, &ui32MaxLenFileName);\
if(eError != PVRSRV_OK) return eError;
+#define PDUMP_LOCK() \
+ PDumpOSLock(__LINE__);
+
+#define PDUMP_UNLOCK() \
+ PDumpOSUnlock(__LINE__);
+
+#define PDUMP_LOCK_MSG() \
+ PDumpOSLockMessageBuffer();
+
+#define PDUMP_UNLOCK_MSG() \
+ PDumpOSUnlockMessageBuffer();
+
+ /*!
+ * @name PDumpOSLock
+ * @brief Lock the PDump streams
+ * @return error none
+ */
+ IMG_VOID PDumpOSLock(IMG_UINT32 ui32Line);
+
+ /*!
+ * @name PDumpOSUnlock
+ * @brief Lock the PDump streams
+ * @return error none
+ */
+ IMG_VOID PDumpOSUnlock(IMG_UINT32 ui32Line);
+
+ /*!
+ * @name PDumpOSLockMessageBuffer
+ * @brief Lock the PDump message buffer
+ * @return error none
+ */
+ IMG_VOID PDumpOSLockMessageBuffer(IMG_VOID);
+
+ /*!
+ * @name PDumpOSUnlockMessageBuffer
+ * @brief Lock the PDump message buffer
+ * @return error none
+ */
+ IMG_VOID PDumpOSUnlockMessageBuffer(IMG_VOID);
+
+#endif /* __QNXNTO__ */
+
/*!
* @name PDumpOSGetScriptString
* @brief Get the "script" buffer
*/
PVRSRV_ERROR PDumpOSGetFilenameString(IMG_CHAR **ppszFile, IMG_UINT32 *pui32MaxLen);
-#endif /* WIN32 or QNX */
-
/*
* Define macro for processing variable args list in OS-independent
* @param hOSMemHandle mem allocation handle (used if kernel virtual mem space is limited, e.g. linux)
* @param ui32Offset offset within mem allocation block
* @param pui8LinAddr CPU linear addr
- * @param ui32DataPageMask mask for data page (= data page size -1)
+ * @param uiDataPageMask mask for data page (= data page size -1)
* @return pui32PageOffset CPU page offset (same as device page offset if page sizes equal)
*/
IMG_VOID PDumpOSCPUVAddrToPhysPages(IMG_HANDLE hOSMemHandle,
IMG_UINT32 ui32Offset,
IMG_PUINT8 pui8LinAddr,
- IMG_UINT32 ui32DataPageMask,
+ IMG_UINTPTR_T uiDataPageMask,
IMG_UINT32 *pui32PageOffset);
/*!
IMG_UINT32 ui32PID;
IMG_HANDLE hBlockAlloc;
PRESMAN_CONTEXT hResManContext;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hPerProcData;
-#else
IMG_HANDLE hPerProcData;
-#endif
PVRSRV_HANDLE_BASE *psHandleBase;
-#if defined (SUPPORT_SID_INTERFACE)
- /* Handles are being allocated in batches */
- IMG_BOOL bHandlesBatched;
-#else
#if defined (PVR_SECURE_HANDLES)
/* Handles are being allocated in batches */
IMG_BOOL bHandlesBatched;
#endif /* PVR_SECURE_HANDLES */
-#endif /* SUPPORT_SID_INTERFACE */
IMG_UINT32 ui32RefCount;
/* True if the process is the initialisation server. */
/*!
* Macro to Read Offset in given command queue
*/
-#define UPDATE_QUEUE_ROFF(psQueue, ui32Size) \
- (psQueue)->ui32ReadOffset = ((psQueue)->ui32ReadOffset + (ui32Size)) \
- & ((psQueue)->ui32QueueSize - 1);
+#define UPDATE_QUEUE_ROFF(psQueue, uSize) \
+ (psQueue)->uReadOffset = ((psQueue)->uReadOffset + (uSize)) \
+ & ((psQueue)->uQueueSize - 1);
/*!
generic cmd complete structure.
IMG_UINT32 ui32AllocSize; /*!< allocated size*/
PFN_QUEUE_COMMAND_COMPLETE pfnCommandComplete; /*!< Command complete callback */
IMG_HANDLE hCallbackData; /*!< Command complete callback data */
+
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ IMG_VOID *pvCleanupFence; /*!< Sync fence to 'put' after timeline inc() */
+ IMG_VOID *pvTimeline; /*!< Android sync timeline to inc() */
+#endif
}COMMAND_COMPLETE_DATA, *PCOMMAND_COMPLETE_DATA;
#if !defined(USE_CODE)
IMG_IMPORT
-PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateCommandQueueKM(IMG_SIZE_T ui32QueueSize,
+PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateCommandQueueKM(IMG_SIZE_T uQueueSize,
PVRSRV_QUEUE_INFO **ppsQueueInfo);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroyCommandQueueKM(PVRSRV_QUEUE_INFO *psQueueInfo);
PVRSRV_KERNEL_SYNC_INFO *apsSrcSync[],
IMG_SIZE_T ui32DataByteSize,
PFN_QUEUE_COMMAND_COMPLETE pfnCommandComplete,
- IMG_HANDLE hCallbackData);
+ IMG_HANDLE hCallbackData,
+ IMG_HANDLE *phFence);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetQueueSpaceKM(PVRSRV_QUEUE_INFO *psQueue,
- IMG_SIZE_T ui32ParamSize,
+ IMG_SIZE_T uParamSize,
IMG_VOID **ppvSpace);
IMG_IMPORT
#define __REFCOUNT_H__
#include "pvr_bridge_km.h"
+#if defined(SUPPORT_ION)
+#include "ion_sync.h"
+#endif /* defined(SUPPORT_ION) */
#if defined(PVRSRV_REFCOUNT_DEBUG)
void PVRSRVOffsetStructDecMapped2(const IMG_CHAR *pszFile, IMG_INT iLine,
PKV_OFFSET_STRUCT psOffsetStruct);
+#if defined(SUPPORT_ION)
+#define PVRSRVIonBufferSyncInfoIncRef(x...) \
+ PVRSRVIonBufferSyncInfoIncRef2(__FILE__, __LINE__, x)
+#define PVRSRVIonBufferSyncInfoDecRef(x...) \
+ PVRSRVIonBufferSyncInfoDecRef2(__FILE__, __LINE__, x)
+
+PVRSRV_ERROR PVRSRVIonBufferSyncInfoIncRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
+ IMG_HANDLE hUnique,
+ IMG_HANDLE hDevCookie,
+ IMG_HANDLE hDevMemContext,
+ PVRSRV_ION_SYNC_INFO **ppsIonSyncInfo,
+ PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo);
+void PVRSRVIonBufferSyncInfoDecRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
+ PVRSRV_ION_SYNC_INFO *psIonSyncInfo,
+ PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo);
+#endif /* defined (SUPPORT_ION) */
+
#endif /* defined(__linux__) */
#else /* defined(PVRSRV_REFCOUNT_DEBUG) */
psOffsetStruct->ui32Mapped--;
}
+#if defined(SUPPORT_ION)
+static INLINE PVRSRV_ERROR PVRSRVIonBufferSyncInfoIncRef(IMG_HANDLE hUnique,
+ IMG_HANDLE hDevCookie,
+ IMG_HANDLE hDevMemContext,
+ PVRSRV_ION_SYNC_INFO **ppsIonSyncInfo,
+ PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo)
+{
+ PVR_UNREFERENCED_PARAMETER(psKernelMemInfo);
+
+ return PVRSRVIonBufferSyncAcquire(hUnique,
+ hDevCookie,
+ hDevMemContext,
+ ppsIonSyncInfo);
+}
+
+static INLINE void PVRSRVIonBufferSyncInfoDecRef(PVRSRV_ION_SYNC_INFO *psIonSyncInfo,
+ PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo)
+{
+ PVR_UNREFERENCED_PARAMETER(psKernelMemInfo);
+ PVRSRVIonBufferSyncRelease(psIonSyncInfo);
+}
+#endif /* defined (SUPPORT_ION) */
+
#endif /* defined(__linux__) */
#endif /* defined(PVRSRV_REFCOUNT_DEBUG) */
RA_ARENA *apsLocalDevMemArena[SYS_MAX_LOCAL_DEVMEM_ARENAS]; /*!< RA Arenas for local device memory heap management */
IMG_CHAR *pszVersionString; /*!< Human readable string showing relevent system version info */
-#if defined (SUPPORT_SID_INTERFACE)
- PVRSRV_EVENTOBJECT_KM *psGlobalEventObject; /*!< OS Global Event Object */
-#else
PVRSRV_EVENTOBJECT *psGlobalEventObject; /*!< OS Global Event Object */
-#endif
PVRSRV_MISC_INFO_CPUCACHEOP_TYPE ePendingCacheOpType; /*!< Deferred CPU cache op control */
*/
/* Registers */
- gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE;
+ gsSGXDeviceMap.ui32RegsSize = SYS_OMAP_SGX_REGS_SIZE;
eError = OSBaseAllocContigMemory(gsSGXDeviceMap.ui32RegsSize,
&gsSGXRegsCPUVAddr,
SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
PVR_TRACE(("SGX register base: 0x%lx", (unsigned long)gsSGXDeviceMap.sRegsCpuPBase.uiAddr));
+#if defined(SGX544) && defined(SGX_FEATURE_MP)
+ /* FIXME: Workaround due to HWMOD change. Otherwise this region is too small. */
+ gsSGXDeviceMap.ui32RegsSize = SYS_OMAP_SGX_REGS_SIZE;
+#else
gsSGXDeviceMap.ui32RegsSize = (unsigned int)(dev_res->end - dev_res->start);
+#endif
PVR_TRACE(("SGX register size: %d",gsSGXDeviceMap.ui32RegsSize));
gsSGXDeviceMap.ui32IRQ = dev_irq;
PVR_TRACE(("SGX IRQ: %d", gsSGXDeviceMap.ui32IRQ));
#else /* defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO) */
- gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE;
+ gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP_SGX_REGS_SYS_PHYS_BASE;
gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
- gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE;
+ gsSGXDeviceMap.ui32RegsSize = SYS_OMAP_SGX_REGS_SIZE;
- gsSGXDeviceMap.ui32IRQ = SYS_OMAP4430_SGX_IRQ;
+ gsSGXDeviceMap.ui32IRQ = SYS_OMAP_SGX_IRQ;
#endif /* defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO) */
#if defined(SGX_OCP_REGS_ENABLED)
static IMG_CHAR *SysCreateVersionString(void)
{
static IMG_CHAR aszVersionString[100];
+ IMG_UINT32 ui32MaxStrLen;
SYS_DATA *psSysData;
IMG_UINT32 ui32SGXRevision;
IMG_INT32 i32Count;
-#if !defined(NO_HARDWARE)
- IMG_VOID *pvRegsLinAddr;
-
- pvRegsLinAddr = OSMapPhysToLin(gsSGXDeviceMap.sRegsCpuPBase,
- gsSGXDeviceMap.ui32RegsSize,
- PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
- IMG_NULL);
- if(!pvRegsLinAddr)
- {
- return IMG_NULL;
- }
-
- ui32SGXRevision = OSReadHWReg((IMG_PVOID)((IMG_PBYTE)pvRegsLinAddr),
- EUR_CR_CORE_REVISION);
-#else
- ui32SGXRevision = 0;
-#endif
SysAcquireData(&psSysData);
- i32Count = OSSNPrintf(aszVersionString, 100,
- "SGX revision = %u.%u.%u",
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAJOR_MASK)
- >> EUR_CR_CORE_REVISION_MAJOR_SHIFT),
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MINOR_MASK)
- >> EUR_CR_CORE_REVISION_MINOR_SHIFT),
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAINTENANCE_MASK)
- >> EUR_CR_CORE_REVISION_MAINTENANCE_SHIFT)
- );
-
-#if !defined(NO_HARDWARE)
- OSUnMapPhysToLin(pvRegsLinAddr,
- SYS_OMAP4430_SGX_REGS_SIZE,
- PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
- IMG_NULL);
-#endif
+ ui32SGXRevision = SGX_CORE_REV;
+ ui32MaxStrLen = 99;
+ i32Count = OSSNPrintf(aszVersionString, ui32MaxStrLen + 1,
+ "SGX revision = %u",
+ (IMG_UINT)(ui32SGXRevision));
if(i32Count == -1)
{
return IMG_NULL;
#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
TimerRegPhysBase = gsSysSpecificData.sTimerRegPhysBase;
#else
- TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE;
+ TimerRegPhysBase.uiAddr = SYS_OMAP_GP11TIMER_REGS_SYS_PHYS_BASE;
#endif
gpsSysData->pvSOCTimerRegisterKM = IMG_NULL;
gpsSysData->hSOCTimerRegisterOSMemHandle = 0;
#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
/* Deinitialise SGX */
- eError = PVRSRVDeinitialiseDevice (gui32SGXDeviceID);
+ eError = PVRSRVDeinitialiseDevice(gui32SGXDeviceID);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: failed to de-init the device"));
}
}
+ /* Disable system clocks. Must happen after last access to hardware */
+ if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
+ {
+ DisableSystemClocks(gpsSysData);
+ }
+
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_DVFS_INIT))
{
eError = SysDvfsDeinitialize(gpsSysSpecificData);
}
}
- /*
- Disable system clocks - must happen after last access to hardware.
- */
- if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
- {
- DisableSystemClocks(gpsSysData);
- }
-
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA))
{
eError = OSDeInitEnvData(gpsSysData->pvEnvSpecificData);
{
#if defined(NO_HARDWARE)
/* Free hardware resources. */
- OSBaseFreeContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase);
+ OSBaseFreeContigMemory(SYS_OMAP_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase);
#else
#if defined(SGX_OCP_REGS_ENABLED)
OSUnMapPhysToLin(gsSGXRegsCPUVAddr,
#define VS_PRODUCT_NAME "OMAP4"
-#if defined(SGX540) && (SGX_CORE_REV == 120)
-#define SYS_SGX_CLOCK_SPEED 307200000
-#else
-#define SYS_SGX_CLOCK_SPEED 304742400
-#endif
#define SYS_SGX_HWRECOVERY_TIMEOUT_FREQ (100) // 10ms (100hz)
#define SYS_SGX_PDS_TIMER_FREQ (1000) // 1ms (1000hz)
#endif
-#define SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE 0x56000000
-#define SYS_OMAP4430_SGX_REGS_SIZE 0xFFFF
+#define SYS_OMAP_SGX_REGS_SYS_PHYS_BASE 0x56000000
+#define SYS_OMAP_SGX_REGS_SIZE 0xFFFF
-#define SYS_OMAP4430_SGX_IRQ 53 /* OMAP4 IRQ's are offset by 32 */
+#define SYS_OMAP_SGX_IRQ 53 /* OMAP4 IRQ's are offset by 32 */
-#define SYS_OMAP4430_DSS_REGS_SYS_PHYS_BASE 0x58000000
-#define SYS_OMAP4430_DSS_REGS_SIZE 0x7000
+#define SYS_OMAP_DSS_REGS_SYS_PHYS_BASE 0x58000000
+#define SYS_OMAP_DSS_REGS_SIZE 0x7000
-#define SYS_OMAP4430_DSS_HDMI_INTERRUPT_STATUS_REG 0x6028
-#define SYS_OMAP4430_DSS_HDMI_INTERRUPT_ENABLE_REG 0x602c
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_STATUS_REG 0x6028
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_ENABLE_REG 0x602c
-#define SYS_OMAP4430_DSS_HDMI_INTERRUPT_VSYNC_ENABLE_MASK 0x10000
-#define SYS_OMAP4430_DSS_HDMI_INTERRUPT_VSYNC_STATUS_MASK 0x10000
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_VSYNC_ENABLE_MASK 0x10000
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_VSYNC_STATUS_MASK 0x10000
-#define SYS_OMAP4430_DSS_LCD_INTERRUPT_STATUS_REG 0x1018
-#define SYS_OMAP4430_DSS_LCD_INTERRUPT_ENABLE_REG 0x101c
+#define SYS_OMAP_DSS_LCD_INTERRUPT_STATUS_REG 0x1018
+#define SYS_OMAP_DSS_LCD_INTERRUPT_ENABLE_REG 0x101c
-#define SYS_OMAP4430_DSS_LCD_INTERRUPT_VSYNC_ENABLE_MASK 0x40002
-#define SYS_OMAP4430_DSS_LCD_INTERRUPT_VSYNC_STATUS_MASK 0x40002
+#define SYS_OMAP_DSS_LCD_INTERRUPT_VSYNC_ENABLE_MASK 0x40002
+#define SYS_OMAP_DSS_LCD_INTERRUPT_VSYNC_STATUS_MASK 0x40002
-#define SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE 0x48088038
-#define SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE 0x4808803C
-#define SYS_OMAP4430_GP11TIMER_TSICR_SYS_PHYS_BASE 0x48088054
+#define SYS_OMAP_GP11TIMER_ENABLE_SYS_PHYS_BASE 0x48088038
+#define SYS_OMAP_GP11TIMER_REGS_SYS_PHYS_BASE 0x4808803C
+#define SYS_OMAP_GP11TIMER_TSICR_SYS_PHYS_BASE 0x48088054
/* Interrupt bits */
#define DEVICE_SGX_INTERRUPT (1<<0)
#if !defined(__SYSINFO_H__)
#define __SYSINFO_H__
+#if defined(SGX540) && (SGX_CORE_REV == 120)
+#define SYS_SGX_CLOCK_SPEED 307200000
+#else
+#define SYS_SGX_CLOCK_SPEED 304742400
+#endif
+
/*!< System specific poll/timeout details */
#if defined(PVR_LINUX_USING_WORKQUEUES)
/*
#if defined(__linux__)
#if defined(SGX_OCP_REGS_ENABLED)
+/* FIXME: Temporary workaround for OMAP4470 and active power off in 4430 */
+#if !defined(SGX544) && defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
#define SGX_OCP_NO_INT_BYPASS
#endif
#endif
+#endif
#if defined (__cplusplus)
extern "C" {
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
-#if defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK)
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
#include <linux/opp.h>
#endif
#if !defined(NO_HARDWARE)
PVR_ASSERT(atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0);
#endif
-#if defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK)
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
psTimingInfo->ui32CoreClockSpeed =
gpsSysSpecificData->pui32SGXFreqList[gpsSysSpecificData->ui32SGXFreqListIndex];
-#else /* defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK) */
+#else /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
#endif
psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
-#if defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK)
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
{
struct gpu_platform_data *pdata;
IMG_UINT32 max_freq_index;
{
PVR_ASSERT(pdata->device_scale != IMG_NULL);
res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
&gpsPVRLDMDev->dev,
+#endif
psSysSpecData->pui32SGXFreqList[max_freq_index]);
if (res == 0)
{
}
}
}
-#endif /* defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK) */
+#endif /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
{
/*
* pm_runtime_get_sync returns 1 after the module has
PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
}
}
-#if defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK)
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
{
struct gpu_platform_data *pdata;
int res;
{
PVR_ASSERT(pdata->device_scale != IMG_NULL);
res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
&gpsPVRLDMDev->dev,
+#endif
psSysSpecData->pui32SGXFreqList[0]);
if (res == 0)
{
}
}
}
-#endif /* defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK) */
+#endif /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
#endif /* defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI) */
/* Indicate that the SGX clocks are disabled */
{
PVR_ASSERT(psSysSpecData->psGPTimer == NULL);
+ /*
+ * This code has problems on module reload for OMAP5 running Linux
+ * 3.4.10, due to omap2_dm_timer_set_src (called by
+ * omap_dm_timer_request_specific), being unable to set the parent
+ * clock to OMAP_TIMER_SRC_32_KHZ.
+ * Not calling omap_dm_timer_set_source doesn't help.
+ */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) || !defined(MODULE)
/*
* This code could try requesting registers 9, 10, and 11,
* stopping at the first succesful request. We'll stick with
return PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
}
- /* Set timer source to system clock */
omap_dm_timer_set_source(psSysSpecData->psGPTimer, OMAP_TIMER_SRC_SYS_CLK);
omap_dm_timer_enable(psSysSpecData->psGPTimer);
omap_dm_timer_start(psSysSpecData->psGPTimer);
/*
- * The DM timer API doesn't have a mechansim for obtaining the
+ * The DM timer API doesn't have a mechanism for obtaining the
* physical address of the counter register.
*/
- psSysSpecData->sTimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE;
+ psSysSpecData->sTimerRegPhysBase.uiAddr = SYS_OMAP_GP11TIMER_REGS_SYS_PHYS_BASE;
+#else /* (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0)) || !defined(MODULE) */
+ (void)psSysSpecData;
+#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0)) || !defined(MODULE) */
return PVRSRV_OK;
}
#endif /* defined(PVR_OMAP4_TIMING_PRCM) */
/* Set the timer to non-posted mode */
- sTimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_TSICR_SYS_PHYS_BASE;
+ sTimerRegPhysBase.uiAddr = SYS_OMAP_GP11TIMER_TSICR_SYS_PHYS_BASE;
pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
4,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
hTimerEnable);
/* Enable the timer */
- sTimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
+ sTimerRegPhysBase.uiAddr = SYS_OMAP_GP11TIMER_ENABLE_SYS_PHYS_BASE;
pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
4,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
PVRSRV_ERROR SysDvfsInitialize(SYS_SPECIFIC_DATA *psSysSpecificData)
{
-#if !defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK)
+#if !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
PVR_UNREFERENCED_PARAMETER(psSysSpecificData);
-#else /* !defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK) */
+#else /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
IMG_UINT32 i, *freq_list;
IMG_INT32 opp_count;
unsigned long freq;
/* Start in unknown state - no frequency request to DVFS yet made */
psSysSpecificData->ui32SGXFreqListIndex = opp_count;
-#endif /* !defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK) */
+#endif /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
return PVRSRV_OK;
}
PVRSRV_ERROR SysDvfsDeinitialize(SYS_SPECIFIC_DATA *psSysSpecificData)
{
-#if !defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK)
+#if !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
PVR_UNREFERENCED_PARAMETER(psSysSpecificData);
-#else /* !defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK) */
+#else /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
/*
* We assume this function is only called if SysDvfsInitialize() was
* completed successfully before.
PVR_ASSERT(pdata->device_scale != IMG_NULL);
res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
&gpsPVRLDMDev->dev,
+#endif
psSysSpecificData->pui32SGXFreqList[0]);
if (res == -EBUSY)
{
kfree(psSysSpecificData->pui32SGXFreqList);
psSysSpecificData->pui32SGXFreqList = 0;
psSysSpecificData->ui32SGXFreqListSize = 0;
-#endif /* !defined(SYS_OMAP4_HAS_DVFS_FRAMEWORK) */
+#endif /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
return PVRSRV_OK;
}
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title SGX kernel/client driver interface structures and prototypes
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__OEMFUNCS_H__)
#define __OEMFUNCS_H__
extern "C" {
#endif
+/* function in/out data structures: */
typedef IMG_UINT32 (*PFN_SRV_BRIDGEDISPATCH)( IMG_UINT32 Ioctl,
IMG_BYTE *pInBuf,
IMG_UINT32 InBufLen,
IMG_BYTE *pOutBuf,
IMG_UINT32 OutBufLen,
IMG_UINT32 *pdwBytesTransferred);
+/*
+ Function table for kernel 3rd party driver to kernel services
+*/
typedef struct PVRSRV_DC_OEM_JTABLE_TAG
{
PFN_SRV_BRIDGEDISPATCH pfnOEMBridgeDispatch;
}
#endif
-#endif
+#endif /* __OEMFUNCS_H__ */
+
+/*****************************************************************************
+ End of file (oemfuncs.h)
+*****************************************************************************/
+
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title System Configuration
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description System Configuration functions
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#include "sysconfig.h"
#include "services_headers.h"
#include "ocpdefs.h"
+/* top level system data anchor point*/
SYS_DATA* gpsSysData = (SYS_DATA*)IMG_NULL;
SYS_DATA gsSysData;
static SYS_SPECIFIC_DATA gsSysSpecificData;
SYS_SPECIFIC_DATA *gpsSysSpecificData;
-static IMG_UINT32 gui32SGXDeviceID;
-static SGX_DEVICE_MAP gsSGXDeviceMap;
-static PVRSRV_DEVICE_NODE *gpsSGXDevNode;
+/* SGX structures */
+static IMG_UINT32 gui32SGXDeviceID;
+static SGX_DEVICE_MAP gsSGXDeviceMap;
+static PVRSRV_DEVICE_NODE *gpsSGXDevNode;
-#define DEVICE_SGX_INTERRUPT (1 << 0)
#if defined(NO_HARDWARE) || defined(SGX_OCP_REGS_ENABLED)
static IMG_CPU_VIRTADDR gsSGXRegsCPUVAddr;
return eError;
}
-#else
+#else /* defined(SGX_OCP_REGS_ENABLED) */
static INLINE PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData)
{
return EnableSGXClocks(psSysData);
}
-#endif
+#endif /* defined(SGX_OCP_REGS_ENABLED) */
static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData)
{
#if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
if(eError == PVRSRV_OK)
{
-
+ /*
+ * The SGX Clocks are enabled separately if active power
+ * management is enabled.
+ */
eError = EnableSGXClocksWrap(psSysData);
if (eError != PVRSRV_OK)
{
return eError;
}
+/*!
+******************************************************************************
+
+ @Function SysLocateDevices
+
+ @Description Specifies devices in the systems memory map
+
+ @Input psSysData - sys data
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
{
#if defined(NO_HARDWARE)
PVR_UNREFERENCED_PARAMETER(psSysData);
-
+ /* SGX Device: */
gsSGXDeviceMap.ui32Flags = 0x0;
#if defined(NO_HARDWARE)
-
-
+ /*
+ * For no hardware, allocate some contiguous memory for the
+ * register block.
+ */
+
+ /* Registers */
gsSGXDeviceMap.ui32RegsSize = SYS_OMAP3430_SGX_REGS_SIZE;
eError = OSBaseAllocContigMemory(gsSGXDeviceMap.ui32RegsSize,
gsSGXDeviceMap.sRegsCpuPBase = sCpuPAddr;
gsSGXDeviceMap.sRegsSysPBase = SysCpuPAddrToSysPAddr(gsSGXDeviceMap.sRegsCpuPBase);
#if defined(__linux__)
-
+ /* Indicate the registers are already mapped */
gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
#else
-
+ /*
+ * FIXME: Could we just use the virtual address returned by
+ * OSBaseAllocContigMemory?
+ */
gsSGXDeviceMap.pvRegsCpuVBase = IMG_NULL;
#endif
OSMemSet(gsSGXRegsCPUVAddr, 0, gsSGXDeviceMap.ui32RegsSize);
-
-
-
+ /*
+ device interrupt IRQ
+ Note: no interrupts available on no hardware system
+ */
gsSGXDeviceMap.ui32IRQ = 0;
-#else
+#else /* defined(NO_HARDWARE) */
#if defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO)
-
+ /* get the resource and IRQ through platform resource API */
dev_res = platform_get_resource(gpsPVRLDMDev, IORESOURCE_MEM, 0);
if (dev_res == NULL)
{
SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
PVR_TRACE(("SGX register base: 0x%lx", (unsigned long)gsSGXDeviceMap.sRegsCpuPBase.uiAddr));
+#if defined(SGX544) && defined(SGX_FEATURE_MP)
+ /* FIXME: Workaround due to HWMOD change. Otherwise this region is too small. */
+ gsSGXDeviceMap.ui32RegsSize = SYS_OMAP3430_SGX_REGS_SIZE;
+#else
gsSGXDeviceMap.ui32RegsSize = (unsigned int)(dev_res->end - dev_res->start);
+#endif
PVR_TRACE(("SGX register size: %d",gsSGXDeviceMap.ui32RegsSize));
gsSGXDeviceMap.ui32IRQ = dev_irq;
PVR_TRACE(("SGX IRQ: %d", gsSGXDeviceMap.ui32IRQ));
-#else
+#else /* defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO) */
gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP3430_SGX_REGS_SYS_PHYS_BASE;
gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
gsSGXDeviceMap.ui32RegsSize = SYS_OMAP3430_SGX_REGS_SIZE;
gsSGXDeviceMap.ui32IRQ = SYS_OMAP3430_SGX_IRQ;
-#endif
+#endif /* defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO) */
#if defined(SGX_OCP_REGS_ENABLED)
gsSGXRegsCPUVAddr = OSMapPhysToLin(gsSGXDeviceMap.sRegsCpuPBase,
gsSGXDeviceMap.ui32RegsSize,
return PVRSRV_ERROR_BAD_MAPPING;
}
-
+ /* Indicate the registers are already mapped */
gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
gpvOCPRegsLinAddr = gsSGXRegsCPUVAddr;
#endif
-#endif
+#endif /* defined(NO_HARDWARE) */
#if defined(PDUMP)
{
-
+ /* initialise memory region name for pdumping */
static IMG_CHAR pszPDumpDevName[] = "SGXMEM";
gsSGXDeviceMap.pszPDumpDevName = pszPDumpDevName;
}
#endif
-
+ /* add other devices here: */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysCreateVersionString
+
+ @Description Read the version string
+
+ @Return IMG_CHAR * : Version string
+
+******************************************************************************/
static IMG_CHAR *SysCreateVersionString(void)
{
static IMG_CHAR aszVersionString[100];
+ IMG_UINT32 ui32MaxStrLen;
SYS_DATA *psSysData;
IMG_UINT32 ui32SGXRevision;
IMG_INT32 i32Count;
-#if !defined(NO_HARDWARE)
- IMG_VOID *pvRegsLinAddr;
-
- pvRegsLinAddr = OSMapPhysToLin(gsSGXDeviceMap.sRegsCpuPBase,
- SYS_OMAP3430_SGX_REGS_SIZE,
- PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
- IMG_NULL);
- if(!pvRegsLinAddr)
- {
- return IMG_NULL;
- }
-
- ui32SGXRevision = OSReadHWReg((IMG_PVOID)((IMG_PBYTE)pvRegsLinAddr),
- EUR_CR_CORE_REVISION);
-#else
- ui32SGXRevision = 0;
-#endif
SysAcquireData(&psSysData);
- i32Count = OSSNPrintf(aszVersionString, 100,
- "SGX revision = %u.%u.%u",
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAJOR_MASK)
- >> EUR_CR_CORE_REVISION_MAJOR_SHIFT),
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MINOR_MASK)
- >> EUR_CR_CORE_REVISION_MINOR_SHIFT),
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAINTENANCE_MASK)
- >> EUR_CR_CORE_REVISION_MAINTENANCE_SHIFT)
- );
-
-#if !defined(NO_HARDWARE)
- OSUnMapPhysToLin(pvRegsLinAddr,
- SYS_OMAP3430_SGX_REGS_SIZE,
- PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
- IMG_NULL);
-#endif
+ ui32SGXRevision = SGX_CORE_REV;
+ ui32MaxStrLen = 99;
+ i32Count = OSSNPrintf(aszVersionString, ui32MaxStrLen + 1,
+ "SGX revision = %u",
+ (IMG_UINT)(ui32SGXRevision));
if(i32Count == -1)
{
return IMG_NULL;
}
+/*!
+******************************************************************************
+
+ @Function SysInitialise
+
+ @Description Initialises kernel services at 'driver load' time
+
+ @Return PVRSRV_ERROR :
+
+******************************************************************************/
PVRSRV_ERROR SysInitialise(IMG_VOID)
{
IMG_UINT32 i;
gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT;
-
+ /* init device ID's */
for(i=0; i<SYS_DEVICE_COUNT; i++)
{
gpsSysData->sDeviceID[i].uiID = i;
}
#if !defined(SGX_DYNAMIC_TIMING_INFO)
-
+ /* Set up timing information*/
psTimingInfo = &gsSGXDeviceMap.sTimingInfo;
psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
psTimingInfo->bEnableActivePM = IMG_TRUE;
#else
psTimingInfo->bEnableActivePM = IMG_FALSE;
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ;
#endif
-
-
+ /*
+ Setup the Source Clock Divider value
+ */
gpsSysSpecificData->ui32SrcClockDiv = 3;
-
-
-
-
+ /*
+ Locate the devices within the system, specifying
+ the physical addresses of each devices components
+ (regs, mem, ports etc.)
+ */
eError = SysLocateDevices(gpsSysData);
if (eError != PVRSRV_OK)
{
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV);
-#if 0
+
eError = SysPMRuntimeRegister();
if (eError != PVRSRV_OK)
{
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME);
-#endif
-
+ eError = SysDvfsInitialize(gpsSysSpecificData);
+ if (eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to initialize DVFS"));
+ (IMG_VOID)SysDeinitialise(gpsSysData);
+ gpsSysData = IMG_NULL;
+ return eError;
+ }
+ SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_DVFS_INIT);
+ /*
+ Register devices with the system
+ This also sets up their memory maps/heaps
+ */
eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice,
DEVICE_SGX_INTERRUPT, &gui32SGXDeviceID);
if (eError != PVRSRV_OK)
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_REGDEV);
-
-
-
-
+ /*
+ Once all devices are registered, specify the backing store
+ and, if required, customise the memory heap config
+ */
psDeviceNode = gpsSysData->psDeviceNodeList;
while(psDeviceNode)
{
-
+ /* perform any OEM SOC address space customisations here */
switch(psDeviceNode->sDevId.eDeviceType)
{
case PVRSRV_DEVICE_TYPE_SGX:
DEVICE_MEMORY_INFO *psDevMemoryInfo;
DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
-
-
-
+ /*
+ specify the backing store to use for the devices MMU PT/PDs
+ - the PT/PDs are always UMA in this system
+ */
psDeviceNode->psLocalDevMemArena = IMG_NULL;
-
+ /* useful pointers */
psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo;
psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap;
-
+ /* specify the backing store for all SGX heaps */
for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++)
{
psDeviceMemoryHeap[i].ui32Attribs |= PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG;
return PVRSRV_ERROR_INIT_FAILURE;
}
-
+ /* advance to next device */
psDeviceNode = psDeviceNode->psNext;
}
gpsSysData = IMG_NULL;
return eError;
}
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
eError = PVRSRVInitialiseDevice(gui32SGXDeviceID);
if (eError != PVRSRV_OK)
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV);
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
-
+ /* SGX defaults to D3 power state */
DisableSGXClocks(gpsSysData);
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
#if !defined(PVR_NO_OMAP_TIMER)
#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
OSReservePhys(TimerRegPhysBase,
4,
PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED,
- IMG_NULL,
+ IMG_NULL,
(IMG_VOID **)&gpsSysData->pvSOCTimerRegisterKM,
&gpsSysData->hSOCTimerRegisterOSMemHandle);
}
-#endif
+#endif /* !defined(PVR_NO_OMAP_TIMER) */
+
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysFinalise
+
+ @Description Final part of initialisation at 'driver load' time
+
+ @Return PVRSRV_ERROR :
+
+******************************************************************************/
PVRSRV_ERROR SysFinalise(IMG_VOID)
{
PVRSRV_ERROR eError = PVRSRV_OK;
PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to Enable SGX clocks (%d)", eError));
return eError;
}
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
eError = OSInstallMISR(gpsSysData);
if (eError != PVRSRV_OK)
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR);
#if defined(SYS_USING_INTERRUPTS)
-
+ /* install a Device ISR */
eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode);
if (eError != PVRSRV_OK)
{
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR);
-#endif
-
+#if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
+ SysEnableSGXInterrupts(gpsSysData);
+#endif
+#endif /* defined(SYS_USING_INTERRUPTS) */
#if defined(__linux__)
-
+ /* Create a human readable version string for this system */
gpsSysData->pszVersionString = SysCreateVersionString();
if (!gpsSysData->pszVersionString)
{
#endif
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
-
+ /* SGX defaults to D3 power state */
DisableSGXClocks(gpsSysData);
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
gpsSysSpecificData->bSGXInitComplete = IMG_TRUE;
}
+/*!
+******************************************************************************
+
+ @Function SysDeinitialise
+
+ @Description De-initialises kernel services at 'driver unload' time
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
{
PVRSRV_ERROR eError;
+ PVR_UNREFERENCED_PARAMETER(psSysData);
+
if(gpsSysData->pvSOCTimerRegisterKM)
{
OSUnReservePhys(gpsSysData->pvSOCTimerRegisterKM,
gpsSysData->hSOCTimerRegisterOSMemHandle);
}
+
#if defined(SYS_USING_INTERRUPTS)
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR))
{
- eError = OSUninstallDeviceLISR(psSysData);
+ eError = OSUninstallDeviceLISR(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: OSUninstallDeviceLISR failed"));
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR))
{
- eError = OSUninstallMISR(psSysData);
+ eError = OSUninstallMISR(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: OSUninstallMISR failed"));
{
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
PVR_ASSERT(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS));
-
+ /* Reenable SGX clocks whilst SGX is being deinitialised. */
eError = EnableSGXClocksWrap(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: EnableSGXClocks failed"));
return eError;
}
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
-
- eError = PVRSRVDeinitialiseDevice (gui32SGXDeviceID);
+ /* Deinitialise SGX */
+ eError = PVRSRVDeinitialiseDevice(gui32SGXDeviceID);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: failed to de-init the device"));
return eError;
}
}
-#if 0
- if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME))
+
+ /* Disable system clocks. Must happen after last access to hardware */
+ if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
{
- eError = SysPMRuntimeUnregister();
+ DisableSystemClocks(gpsSysData);
+ }
+
+ if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_DVFS_INIT))
+ {
+ eError = SysDvfsDeinitialize(gpsSysSpecificData);
if (eError != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to unregister with OSPM!"));
+ PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to de-init DVFS"));
gpsSysData = IMG_NULL;
return eError;
}
}
-#endif
-
- if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
+ if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME))
{
- DisableSystemClocks(gpsSysData);
+ eError = SysPMRuntimeUnregister();
+ if (eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to unregister with OSPM!"));
+ gpsSysData = IMG_NULL;
+ return eError;
+ }
}
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA))
if(gsSGXRegsCPUVAddr != IMG_NULL)
{
#if defined(NO_HARDWARE)
-
+ /* Free hardware resources. */
OSBaseFreeContigMemory(SYS_OMAP3430_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase);
#else
#if defined(SGX_OCP_REGS_ENABLED)
gpvOCPRegsLinAddr = IMG_NULL;
#endif
-#endif
+#endif /* defined(NO_HARDWARE) */
gsSGXRegsCPUVAddr = IMG_NULL;
gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
}
-#endif
+#endif /* defined(NO_HARDWARE) || defined(SGX_OCP_REGS_ENABLED) */
gpsSysSpecificData->ui32SysSpecificData = 0;
}
+/*!
+******************************************************************************
+
+ @Function SysGetDeviceMemoryMap
+
+ @Description returns a device address map for the specified device
+
+ @Input eDeviceType - device type
+ @Input ppvDeviceMap - void ptr to receive device specific info.
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysGetDeviceMemoryMap(PVRSRV_DEVICE_TYPE eDeviceType,
IMG_VOID **ppvDeviceMap)
{
{
case PVRSRV_DEVICE_TYPE_SGX:
{
-
+ /* just return a pointer to the structure */
*ppvDeviceMap = (IMG_VOID*)&gsSGXDeviceMap;
break;
}
+/*!
+******************************************************************************
+ @Function SysCpuPAddrToDevPAddr
+
+ @Description Compute a device physical address from a cpu physical
+ address. Relevant when
+
+ @Input cpu_paddr - cpu physical address.
+ @Input eDeviceType - device type required if DevPAddr
+ address spaces vary across devices
+ in the same system
+ @Return device physical address.
+
+******************************************************************************/
IMG_DEV_PHYADDR SysCpuPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType,
IMG_CPU_PHYADDR CpuPAddr)
{
PVR_UNREFERENCED_PARAMETER(eDeviceType);
-
+ /* Note: for UMA system we assume DevP == CpuP */
DevPAddr.uiAddr = CpuPAddr.uiAddr;
return DevPAddr;
}
+/*!
+******************************************************************************
+ @Function SysSysPAddrToCpuPAddr
+
+ @Description Compute a cpu physical address from a system physical
+ address.
+
+ @Input sys_paddr - system physical address.
+ @Return cpu physical address.
+
+******************************************************************************/
IMG_CPU_PHYADDR SysSysPAddrToCpuPAddr (IMG_SYS_PHYADDR sys_paddr)
{
IMG_CPU_PHYADDR cpu_paddr;
-
+ /* This would only be an inequality if the CPU's MMU did not point to
+ sys address 0, ie. multi CPU system */
cpu_paddr.uiAddr = sys_paddr.uiAddr;
return cpu_paddr;
}
+/*!
+******************************************************************************
+ @Function SysCpuPAddrToSysPAddr
+
+ @Description Compute a system physical address from a cpu physical
+ address.
+
+ @Input cpu_paddr - cpu physical address.
+ @Return device physical address.
+
+******************************************************************************/
IMG_SYS_PHYADDR SysCpuPAddrToSysPAddr (IMG_CPU_PHYADDR cpu_paddr)
{
IMG_SYS_PHYADDR sys_paddr;
-
+ /* This would only be an inequality if the CPU's MMU did not point to
+ sys address 0, ie. multi CPU system */
sys_paddr.uiAddr = cpu_paddr.uiAddr;
return sys_paddr;
}
+/*!
+******************************************************************************
+ @Function SysSysPAddrToDevPAddr
+
+ @Description Compute a device physical address from a system physical
+ address.
+
+ @Input SysPAddr - system physical address.
+ @Input eDeviceType - device type required if DevPAddr
+ address spaces vary across devices
+ in the same system
+
+ @Return Device physical address.
+
+******************************************************************************/
IMG_DEV_PHYADDR SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_SYS_PHYADDR SysPAddr)
{
IMG_DEV_PHYADDR DevPAddr;
PVR_UNREFERENCED_PARAMETER(eDeviceType);
-
+ /* Note: for UMA system we assume DevP == CpuP */
DevPAddr.uiAddr = SysPAddr.uiAddr;
return DevPAddr;
}
+/*!
+******************************************************************************
+ @Function SysDevPAddrToSysPAddr
+
+ @Description Compute a device physical address from a system physical
+ address.
+
+ @Input DevPAddr - device physical address.
+ @Input eDeviceType - device type required if DevPAddr
+ address spaces vary across devices
+ in the same system
+
+ @Return System physical address.
+
+******************************************************************************/
IMG_SYS_PHYADDR SysDevPAddrToSysPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_DEV_PHYADDR DevPAddr)
{
IMG_SYS_PHYADDR SysPAddr;
PVR_UNREFERENCED_PARAMETER(eDeviceType);
-
+ /* Note: for UMA system we assume DevP == SysP */
SysPAddr.uiAddr = DevPAddr.uiAddr;
return SysPAddr;
}
+/*****************************************************************************
+ @Function SysRegisterExternalDevice
+
+ @Description Called when a 3rd party device registers with services
+
+ @Input psDeviceNode - the new device node.
+
+ @Return IMG_VOID
+*****************************************************************************/
IMG_VOID SysRegisterExternalDevice(PVRSRV_DEVICE_NODE *psDeviceNode)
{
PVR_UNREFERENCED_PARAMETER(psDeviceNode);
}
+/*****************************************************************************
+ @Function SysRemoveExternalDevice
+
+ @Description Called when a 3rd party device unregisters from services
+
+ @Input psDeviceNode - the device node being removed.
+
+ @Return IMG_VOID
+*****************************************************************************/
IMG_VOID SysRemoveExternalDevice(PVRSRV_DEVICE_NODE *psDeviceNode)
{
PVR_UNREFERENCED_PARAMETER(psDeviceNode);
}
+/*!
+******************************************************************************
+ @Function SysGetInterruptSource
+ @Description Returns System specific information about the device(s) that
+ generated the interrupt in the system
+
+ @Input psSysData
+ @Input psDeviceNode
+
+ @Return System specific information indicating which device(s)
+ generated the interrupt
+
+******************************************************************************/
IMG_UINT32 SysGetInterruptSource(SYS_DATA *psSysData,
PVRSRV_DEVICE_NODE *psDeviceNode)
{
PVR_UNREFERENCED_PARAMETER(psSysData);
#if defined(NO_HARDWARE)
-
+ /* no interrupts in no_hw system just return all bits */
return 0xFFFFFFFF;
#else
-
+ /* Not a shared irq, so we know this is an interrupt for this device */
return psDeviceNode->ui32SOCInterruptBit;
#endif
}
+/*!
+******************************************************************************
+ @Function SysClearInterrupts
+
+ @Description Clears specified system interrupts
+
+ @Input psSysData
+ @Input ui32ClearBits
+
+ @Return IMG_VOID
+
+******************************************************************************/
IMG_VOID SysClearInterrupts(SYS_DATA* psSysData, IMG_UINT32 ui32ClearBits)
{
PVR_UNREFERENCED_PARAMETER(ui32ClearBits);
-#if defined(NO_HARDWARE)
PVR_UNREFERENCED_PARAMETER(psSysData);
-#else
+#if !defined(NO_HARDWARE)
#if defined(SGX_OCP_NO_INT_BYPASS)
OSWriteHWReg(gpvOCPRegsLinAddr, EUR_CR_OCP_IRQSTATUS_2, 0x1);
#endif
-
+ /* Flush posted writes */
OSReadHWReg(((PVRSRV_SGXDEV_INFO *)gpsSGXDevNode->pvDevice)->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR);
-#endif
+#endif /* defined(NO_HARDWARE) */
}
#if defined(SGX_OCP_NO_INT_BYPASS)
+/*!
+******************************************************************************
+ @Function SysEnableSGXInterrupts
+
+ @Description Enables SGX interrupts
+
+ @Input psSysData
+
+ @Return IMG_VOID
+
+******************************************************************************/
IMG_VOID SysEnableSGXInterrupts(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
}
}
+/*!
+******************************************************************************
+ @Function SysDisableSGXInterrupts
+
+ @Description Disables SGX interrupts
+
+ @Input psSysData
+
+ @Return IMG_VOID
+
+******************************************************************************/
IMG_VOID SysDisableSGXInterrupts(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
SYS_SPECIFIC_DATA_CLEAR(psSysSpecData, SYS_SPECIFIC_DATA_IRQ_ENABLED);
}
}
-#endif
+#endif /* defined(SGX_OCP_NO_INT_BYPASS) */
+
+/*!
+******************************************************************************
+
+ @Function SysSystemPrePowerState
+ @Description Perform system-level processing required before a power transition
+
+ @Input eNewPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysSystemPrePowerState(PVRSRV_SYS_POWER_STATE eNewPowerState)
{
PVRSRV_ERROR eError = PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysSystemPostPowerState
+
+ @Description Perform system-level processing required after a power transition
+
+ @Input eNewPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysSystemPostPowerState(PVRSRV_SYS_POWER_STATE eNewPowerState)
{
PVRSRV_ERROR eError = PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysDevicePrePowerState
+
+ @Description Perform system level processing required before a device power
+ transition
+
+ @Input ui32DeviceIndex :
+ @Input eNewPowerState :
+ @Input eCurrentPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysDevicePrePowerState(IMG_UINT32 ui32DeviceIndex,
PVRSRV_DEV_POWER_STATE eNewPowerState,
PVRSRV_DEV_POWER_STATE eCurrentPowerState)
PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePrePowerState: SGX Entering state D3"));
DisableSGXClocks(gpsSysData);
}
-#else
+#else /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
PVR_UNREFERENCED_PARAMETER(eNewPowerState );
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysDevicePostPowerState
+
+ @Description Perform system level processing required after a device power
+ transition
+
+ @Input ui32DeviceIndex :
+ @Input eNewPowerState :
+ @Input eCurrentPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysDevicePostPowerState(IMG_UINT32 ui32DeviceIndex,
PVRSRV_DEV_POWER_STATE eNewPowerState,
PVRSRV_DEV_POWER_STATE eCurrentPowerState)
PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePostPowerState: SGX Leaving state D3"));
eError = EnableSGXClocksWrap(gpsSysData);
}
-#else
+#else /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
PVR_UNREFERENCED_PARAMETER(eCurrentPowerState);
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
return eError;
}
+#if defined(SYS_SUPPORTS_SGX_IDLE_CALLBACK)
+
+IMG_VOID SysSGXIdleTransition(IMG_BOOL bSGXIdle)
+{
+ PVR_DPF((PVR_DBG_MESSAGE, "SysSGXIdleTransition switch to %u", bSGXIdle));
+}
+
+#endif /* defined(SYS_SUPPORTS_SGX_IDLE_CALLBACK) */
+
+/*****************************************************************************
+ @Function SysOEMFunction
+
+ @Description marshalling function for custom OEM functions
+
+ @Input ui32ID - function ID
+ @Input pvIn - in data
+ @Output pvOut - out data
+ @Return PVRSRV_ERROR
+*****************************************************************************/
PVRSRV_ERROR SysOEMFunction ( IMG_UINT32 ui32ID,
IMG_VOID *pvIn,
IMG_UINT32 ulInSize,
if ((ui32ID == OEM_GET_EXT_FUNCS) &&
(ulOutSize == sizeof(PVRSRV_DC_OEM_JTABLE)))
{
-
PVRSRV_DC_OEM_JTABLE *psOEMJTable = (PVRSRV_DC_OEM_JTABLE*) pvOut;
psOEMJTable->pfnOEMBridgeDispatch = &PVRSRV_BridgeDispatchKM;
return PVRSRV_OK;
return PVRSRV_ERROR_INVALID_PARAMS;
}
+/******************************************************************************
+ End of file (sysconfig.c)
+******************************************************************************/
-/**********************************************************************
- *
- * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title System Description Header
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description This header provides system-specific declarations and macros
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__SOCCONFIG_H__)
#define __SOCCONFIG_H__
+#define VS_PRODUCT_NAME "OMAP3430"
-#define VS_PRODUCT_NAME "OMAP3"
-
-#define SYS_SGX_CLOCK_SPEED 110666666
-#define SYS_SGX_HWRECOVERY_TIMEOUT_FREQ (100)
-#define SYS_SGX_PDS_TIMER_FREQ (1000)
+#define SYS_SGX_HWRECOVERY_TIMEOUT_FREQ (100) // 10ms (100hz)
+#define SYS_SGX_PDS_TIMER_FREQ (1000) // 1ms (1000hz)
+/* Allow the AP latency to be overridden in the build config */
#if !defined(SYS_SGX_ACTIVE_POWER_LATENCY_MS)
#define SYS_SGX_ACTIVE_POWER_LATENCY_MS (2)
#endif
#define SYS_OMAP3430_SGX_REGS_SYS_PHYS_BASE 0x50000000
-
#define SYS_OMAP3430_SGX_REGS_SIZE 0x4000
-#define SYS_OMAP3430_SGX_IRQ 21
+#define SYS_OMAP3430_SGX_IRQ 21 /* OMAP4 IRQ's are offset by 32 */
+
+#define SYS_OMAP_DSS_REGS_SYS_PHYS_BASE 0x58000000
+#define SYS_OMAP_DSS_REGS_SIZE 0x7000
-#define SYS_OMAP3430_GP11TIMER_ENABLE_SYS_PHYS_BASE 0x48088024
-#define SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE 0x48088028
-#define SYS_OMAP3430_GP11TIMER_TSICR_SYS_PHYS_BASE 0x48088040
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_STATUS_REG 0x6028
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_ENABLE_REG 0x602c
+
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_VSYNC_ENABLE_MASK 0x10000
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_VSYNC_STATUS_MASK 0x10000
+
+#define SYS_OMAP_DSS_LCD_INTERRUPT_STATUS_REG 0x1018
+#define SYS_OMAP_DSS_LCD_INTERRUPT_ENABLE_REG 0x101c
+
+#define SYS_OMAP_DSS_LCD_INTERRUPT_VSYNC_ENABLE_MASK 0x40002
+#define SYS_OMAP_DSS_LCD_INTERRUPT_VSYNC_STATUS_MASK 0x40002
+
+
+#define SYS_OMAP3430_GP11TIMER_ENABLE_SYS_PHYS_BASE 0x48088024
+#define SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE 0x48088028
+#define SYS_OMAP3430_GP11TIMER_TSICR_SYS_PHYS_BASE 0x48088040
+
+
+
+/* Interrupt bits */
+#define DEVICE_SGX_INTERRUPT (1<<0)
+#define DEVICE_MSVDX_INTERRUPT (1<<1)
+#define DEVICE_DISP_INTERRUPT (1<<2)
+
+#if 0
+#if defined(__linux__)
+/*
+ * Recent OMAP4 kernels register SGX as platform device "omap_gpu".
+ * This device must be used with the Linux power management calls
+ * in sysutils_linux.c, in order for SGX to be powered on.
+ */
+#if defined(PVR_LDM_PLATFORM_PRE_REGISTERED_DEV)
+#define SYS_SGX_DEV_NAME PVR_LDM_PLATFORM_PRE_REGISTERED_DEV
+#else
+#define SYS_SGX_DEV_NAME "omap_gpu"
+#endif /* defined(PVR_LDM_PLATFORM_PRE_REGISTERED_DEV) */
+#endif /* defined(__linux__) */
+#endif
+/*****************************************************************************
+ * system specific data structures
+ *****************************************************************************/
-#endif
+#endif /* __SYSCONFIG_H__ */
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title System Description Header
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description This header provides system-specific declarations and macros
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__SYSINFO_H__)
#define __SYSINFO_H__
+#if defined(SGX540) && (SGX_CORE_REV == 120)
+#define SYS_SGX_CLOCK_SPEED 307200000
+#else
+#define SYS_SGX_CLOCK_SPEED 200000000
+#endif
+
+/*!< System specific poll/timeout details */
#if defined(PVR_LINUX_USING_WORKQUEUES)
+/*
+ * The workqueue based 3rd party display driver may be blocked for up
+ * to 500ms waiting for a vsync when the screen goes blank, so we
+ * need to wait longer for the hardware if a flush of the swap chain is
+ * required.
+ */
#define MAX_HW_TIME_US (1000000)
#define WAIT_TRY_COUNT (20000)
#else
#endif
-#define SYS_DEVICE_COUNT 15
+#define SYS_DEVICE_COUNT 15 /* SGX, DISPLAYCLASS (external), BUFFERCLASS (external) */
-#endif
+#endif /* __SYSINFO_H__ */
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title Local system definitions
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description This header provides local system declarations and macros
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__SYSLOCAL_H__)
#define __SYSLOCAL_H__
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26))
#include <linux/semaphore.h>
#include <linux/resource.h>
-#else
+#else /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26)) */
#include <asm/semaphore.h>
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22))
#include <asm/arch/resource.h>
-#endif
-#endif
+#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22)) */
+#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26)) */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35))
#if !defined(LDM_PLATFORM)
#error "LDM_PLATFORM must be set"
#endif
-/*#define PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO*/
+//#define PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO
//#include <linux/platform_device.h>
#endif
#if ((defined(DEBUG) || defined(TIMING)) && \
(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))) && \
!defined(PVR_NO_OMAP_TIMER)
-#define PVR_OMAP3_TIMING_PRCM
+/*
+ * We need to explicitly enable the GPTIMER11 clocks, or we'll get an
+ * abort when we try to access the timer registers.
+ */
+#define PVR_OMAP4_TIMING_PRCM
#endif
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35))
-/*#include <plat/gpu.h>*/
+//#include <plat/gpu.h>
#if !defined(PVR_NO_OMAP_TIMER)
-/*#define PVR_OMAP_USE_DM_TIMER_API*/
+//#define PVR_OMAP_USE_DM_TIMER_API
//#include <plat/dmtimer.h>
#endif
#endif
#if !defined(PVR_NO_OMAP_TIMER)
//#define PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA
#endif
-#endif
+#endif /* defined(__linux__) */
#if !defined(NO_HARDWARE) && \
defined(SYS_USING_INTERRUPTS) && \
#endif
#if defined(__linux__)
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) && defined(SGX_OCP_REGS_ENABLED)
-/*#define SGX_OCP_NO_INT_BYPASS*/
+#if defined(SGX_OCP_REGS_ENABLED)
+/* FIXME: Temporary workaround for OMAP4470 and active power off in 4430 */
+#if !defined(SGX544) && defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
+//#define SGX_OCP_NO_INT_BYPASS
+#endif
#endif
#endif
extern "C" {
#endif
+/*****************************************************************************
+ * system specific data structures
+ *****************************************************************************/
+/*****************************************************************************
+ * system specific function prototypes
+ *****************************************************************************/
IMG_VOID DisableSystemClocks(SYS_DATA *psSysData);
PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData);
IMG_VOID DisableSGXClocks(SYS_DATA *psSysData);
PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData);
+/*
+ * Various flags to indicate what has been initialised, and what
+ * has been temporarily deinitialised for power management purposes.
+ */
#define SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS 0x00000001
#define SYS_SPECIFIC_DATA_ENABLE_LISR 0x00000002
#define SYS_SPECIFIC_DATA_ENABLE_MISR 0x00000004
#define SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS 0x00000400
#define SYS_SPECIFIC_DATA_ENABLE_OCPREGS 0x00000800
#define SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME 0x00001000
-#if defined(SGX_OCP_REGS_ENABLED) && defined(SGX_OCP_NO_INT_BYPASS)
#define SYS_SPECIFIC_DATA_IRQ_ENABLED 0x00002000
-#endif
+#define SYS_SPECIFIC_DATA_DVFS_INIT 0x00004000
#define SYS_SPECIFIC_DATA_SET(psSysSpecData, flag) ((IMG_VOID)((psSysSpecData)->ui32SysSpecificData |= (flag)))
atomic_t sNotifyLockCPU;
IMG_BOOL bCallVDD2PostFunc;
#endif
- struct clk *psCORE_CK;
- struct clk *psSGX_FCK;
+ struct clk *psCORE_CK;
+ struct clk *psSGX_FCK;
struct clk *psSGX_ICK;
#if defined(DEBUG) || defined(TIMING)
#if defined(PVR_OMAP_USE_DM_TIMER_API)
struct omap_dm_timer *psGPTimer;
#endif
-#endif
+ IMG_UINT32 ui32SGXFreqListSize;
+ IMG_UINT32 *pui32SGXFreqList;
+ IMG_UINT32 ui32SGXFreqListIndex;
+#endif /* defined(__linux__) */
} SYS_SPECIFIC_DATA;
extern SYS_SPECIFIC_DATA *gpsSysSpecificData;
PVRSRV_ERROR SysPMRuntimeRegister(void);
PVRSRV_ERROR SysPMRuntimeUnregister(void);
-#else
+PVRSRV_ERROR SysDvfsInitialize(SYS_SPECIFIC_DATA *psSysSpecificData);
+PVRSRV_ERROR SysDvfsDeinitialize(SYS_SPECIFIC_DATA *psSysSpecificData);
+
+#else /* defined(__linux__) */
#ifdef INLINE_IS_PRAGMA
#pragma inline(SysPMRuntimeRegister)
return PVRSRV_OK;
}
-#endif
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysDvfsInitialize)
+#endif
+static INLINE PVRSRV_ERROR SysDvfsInitialize(void)
+{
+ return PVRSRV_OK;
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysDvfsDeinitialize)
+#endif
+static INLINE PVRSRV_ERROR SysDvfsDeinitialize(void)
+{
+ return PVRSRV_OK;
+}
+
+#endif /* defined(__linux__) */
#if defined(__cplusplus)
}
#endif
-#endif
+#endif /* __SYSLOCAL_H__ */
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title Shared (User/kernel) and System dependent utilities
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description Provides system-specific functions
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+/* Pull in the correct system dependent sysutils source */
#if defined(__linux__)
#include "sysutils_linux.c"
#endif
+
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
-
+/*************************************************************************/ /*!
+@Title System dependent utilities
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description Provides system-specific functions
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#include <linux/version.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/hardirq.h>
#include <linux/mutex.h>
+#include <linux/slab.h>
#include "sgxdefs.h"
#include "services_headers.h"
#include "sgxinfokm.h"
#include "syslocal.h"
-//#include <linux/platform_device.h>
-//#include <linux/pm_runtime.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+#include <linux/opp.h>
+#endif
+
+#if defined(SUPPORT_DRI_DRM_PLUGIN)
+#include <drm/drmP.h>
+#include <drm/drm.h>
+
+#include <linux/omap_gpu.h>
+
+#include "pvr_drm.h"
+#endif
#define ONE_MHZ 1000000
#define HZ_TO_MHZ(m) ((m) / ONE_MHZ)
extern struct platform_device *gpsPVRLDMDev;
#endif
-
static PVRSRV_ERROR PowerLockWrap(SYS_SPECIFIC_DATA *psSysSpecData, IMG_BOOL bTryLock)
{
- if (!in_interrupt())
- {
- if (bTryLock)
- {
- int locked = mutex_trylock(&psSysSpecData->sPowerLock);
- if (locked == 0)
- {
- return PVRSRV_ERROR_RETRY;
- }
- }
- else
- {
- mutex_lock(&psSysSpecData->sPowerLock);
- }
- }
+ if (!in_interrupt())
+ {
+ if (bTryLock)
+ {
+ int locked = mutex_trylock(&psSysSpecData->sPowerLock);
+ if (locked == 0)
+ {
+ return PVRSRV_ERROR_RETRY;
+ }
+ }
+ else
+ {
+ mutex_lock(&psSysSpecData->sPowerLock);
+ }
+ }
- return PVRSRV_OK;
+ return PVRSRV_OK;
}
static IMG_VOID PowerLockUnwrap(SYS_SPECIFIC_DATA *psSysSpecData)
{
- if (!in_interrupt())
- {
- mutex_unlock(&psSysSpecData->sPowerLock);
- }
+ if (!in_interrupt())
+ {
+ mutex_unlock(&psSysSpecData->sPowerLock);
+ }
}
PVRSRV_ERROR SysPowerLockWrap(IMG_BOOL bTryLock)
{
- SYS_DATA *psSysData;
+ SYS_DATA *psSysData;
- SysAcquireData(&psSysData);
+ SysAcquireData(&psSysData);
- return PowerLockWrap(psSysData->pvSysSpecificData, bTryLock);
+ return PowerLockWrap(psSysData->pvSysSpecificData, bTryLock);
}
IMG_VOID SysPowerLockUnwrap(IMG_VOID)
{
- SYS_DATA *psSysData;
+ SYS_DATA *psSysData;
- SysAcquireData(&psSysData);
+ SysAcquireData(&psSysData);
- PowerLockUnwrap(psSysData->pvSysSpecificData);
+ PowerLockUnwrap(psSysData->pvSysSpecificData);
}
-
-
-
+/*
+ * This function should be called to unwrap the Services power lock, prior
+ * to calling any function that might sleep.
+ * This function shouldn't be called prior to calling EnableSystemClocks
+ * or DisableSystemClocks, as those functions perform their own power lock
+ * unwrapping.
+ * If the function returns IMG_TRUE, UnwrapSystemPowerChange must be
+ * called to rewrap the power lock, prior to returning to Services.
+ */
IMG_BOOL WrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData)
{
return IMG_TRUE;
{
}
-static inline IMG_UINT32 scale_by_rate(IMG_UINT32 val, IMG_UINT32 rate1, IMG_UINT32 rate2)
-{
- if (rate1 >= rate2)
- {
- return val * (rate1 / rate2);
- }
-
- return val / (rate2 / rate1);
-}
-
-static inline IMG_UINT32 scale_prop_to_SGX_clock(IMG_UINT32 val, IMG_UINT32 rate)
-{
- return scale_by_rate(val, rate, SYS_SGX_CLOCK_SPEED);
-}
-
-static inline IMG_UINT32 scale_inv_prop_to_SGX_clock(IMG_UINT32 val, IMG_UINT32 rate)
-{
- return scale_by_rate(val, SYS_SGX_CLOCK_SPEED, rate);
-}
-
+/*
+ * Return SGX timining information to caller.
+ */
IMG_VOID SysGetSGXTimingInformation(SGX_TIMING_INFORMATION *psTimingInfo)
{
- IMG_UINT32 rate;
-
- rate = SYS_SGX_CLOCK_SPEED;
#if !defined(NO_HARDWARE)
PVR_ASSERT(atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0);
#endif
- psTimingInfo->ui32CoreClockSpeed = rate;
- psTimingInfo->ui32HWRecoveryFreq = scale_prop_to_SGX_clock(SYS_SGX_HWRECOVERY_TIMEOUT_FREQ, rate);
- psTimingInfo->ui32uKernelFreq = scale_prop_to_SGX_clock(SYS_SGX_PDS_TIMER_FREQ, rate);
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ psTimingInfo->ui32CoreClockSpeed =
+ gpsSysSpecificData->pui32SGXFreqList[gpsSysSpecificData->ui32SGXFreqListIndex];
+#else /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
+#endif
+ psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
+ psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ;
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
psTimingInfo->bEnableActivePM = IMG_TRUE;
#else
psTimingInfo->bEnableActivePM = IMG_FALSE;
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
}
+/*!
+******************************************************************************
+
+ @Function EnableSGXClocks
+
+ @Description Enable SGX clocks
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
- IMG_INT res;
- long lRate,lNewRate;
-
+#if !defined(PM_RUNTIME_SUPPORT)
+ IMG_INT res;
+ long lRate,lNewRate;
+#endif
+ /* SGX clocks already enabled? */
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0)
{
return PVRSRV_OK;
}
- PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
-
- res=clk_enable(psSysSpecData->psSGX_FCK);
- if (res < 0)
- {
- PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX functional clock (%d)", res));
- return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
- }
-
- res=clk_enable(psSysSpecData->psSGX_ICK);
+#if !defined(PM_RUNTIME_SUPPORT)
+ PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
+ res=clk_enable(psSysSpecData->psSGX_FCK);
if (res < 0)
{
- PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX interface clock (%d)", res));
-
- clk_disable(psSysSpecData->psSGX_FCK);
+ PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX functional clock (%d)", res));
return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
}
- lNewRate = clk_round_rate(psSysSpecData->psSGX_FCK, SYS_SGX_CLOCK_SPEED + ONE_MHZ);
+ lNewRate = clk_round_rate(psSysSpecData->psSGX_FCK, SYS_SGX_CLOCK_SPEED + ONE_MHZ);
if (lNewRate <= 0)
{
PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't round SGX functional clock rate"));
if (res < 0)
{
PVR_DPF((PVR_DBG_WARNING, "EnableSGXClocks: Couldn't set SGX functional clock rate (%d)", res));
- return PVRSRV_ERROR_UNABLE_TO_SET_CLOCK_RATE;
+ return PVRSRV_ERROR_UNABLE_TO_SET_CLOCK_RATE;
}
}
PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: SGX Functional Clock is %dMhz", HZ_TO_MHZ(rate)));
}
#endif
-
-
-
+#endif
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
{
-
-// int res = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
-// if (res < 0)
-// {
-// PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: pm_runtime_get_sync failed (%d)", -res));
-// return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
-// }
+ struct gpu_platform_data *pdata;
+ IMG_UINT32 max_freq_index;
+ int res;
+
+ pdata = (struct gpu_platform_data *)gpsPVRLDMDev->dev.platform_data;
+ max_freq_index = psSysSpecData->ui32SGXFreqListSize - 2;
+
+ /*
+ * Request maximum frequency from DVFS layer if not already set. DVFS may
+ * report busy if early in initialization, but all other errors are
+ * considered serious. Upon any error we proceed assuming our safe frequency
+ * value to be in use as indicated by the "unknown" index.
+ */
+ if (psSysSpecData->ui32SGXFreqListIndex != max_freq_index)
+ {
+ PVR_ASSERT(pdata->device_scale != IMG_NULL);
+ res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
+ &gpsPVRLDMDev->dev,
+#endif
+ psSysSpecData->pui32SGXFreqList[max_freq_index]);
+ if (res == 0)
+ {
+ psSysSpecData->ui32SGXFreqListIndex = max_freq_index;
+ }
+ else if (res == -EBUSY)
+ {
+ PVR_DPF((PVR_DBG_WARNING, "EnableSGXClocks: Unable to scale SGX frequency (EBUSY)"));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ else if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Unable to scale SGX frequency (%d)", res));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ }
}
+#endif /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ {
+ /*
+ * pm_runtime_get_sync returns 1 after the module has
+ * been reloaded.
+ */
+#if defined(PM_RUNTIME_SUPPORT)
+
+ int res = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
+ if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: pm_runtime_get_sync failed (%d)", -res));
+ return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
+ }
#endif
-// SysEnableSGXInterrupts(psSysData);
+ }
+#endif /* defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI) */
-
+ SysEnableSGXInterrupts(psSysData);
+
+ /* Indicate that the SGX clocks are enabled */
atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
-#else
+#else /* !defined(NO_HARDWARE) */
PVR_UNREFERENCED_PARAMETER(psSysData);
-#endif
+#endif /* !defined(NO_HARDWARE) */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function DisableSGXClocks
+
+ @Description Disable SGX clocks.
+
+ @Return none
+
+******************************************************************************/
IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+ /* SGX clocks already disabled? */
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) == 0)
{
return;
}
-
- PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
-
- clk_disable(psSysSpecData->psSGX_FCK);
-
- clk_disable(psSysSpecData->psSGX_ICK);
-// SysDisableSGXInterrupts(psSysData);
+ PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
+#if !defined(PM_RUNTIME_SUPPORT)
+ clk_disable(psSysSpecData->psSGX_FCK);
+#endif
+ SysDisableSGXInterrupts(psSysData);
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
{
-// int res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
-// if (res < 0)
-// {
-// PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
-// }
+#if defined(PM_RUNTIME_SUPPORT)
+
+ int res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
+ if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
+ }
+#endif
}
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ {
+ struct gpu_platform_data *pdata;
+ int res;
+
+ pdata = (struct gpu_platform_data *)gpsPVRLDMDev->dev.platform_data;
+
+ /*
+ * Request minimum frequency (list index 0) from DVFS layer if not already
+ * set. DVFS may report busy if early in initialization, but all other errors
+ * are considered serious. Upon any error we proceed assuming our safe frequency
+ * value to be in use as indicated by the "unknown" index.
+ */
+ if (psSysSpecData->ui32SGXFreqListIndex != 0)
+ {
+ PVR_ASSERT(pdata->device_scale != IMG_NULL);
+ res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
+ &gpsPVRLDMDev->dev,
#endif
+ psSysSpecData->pui32SGXFreqList[0]);
+ if (res == 0)
+ {
+ psSysSpecData->ui32SGXFreqListIndex = 0;
+ }
+ else if (res == -EBUSY)
+ {
+ PVR_DPF((PVR_DBG_WARNING, "DisableSGXClocks: Unable to scale SGX frequency (EBUSY)"));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ else if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: Unable to scale SGX frequency (%d)", res));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ }
+ }
+#endif /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+#endif /* defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI) */
+ /* Indicate that the SGX clocks are disabled */
atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
-#else
+#else /* !defined(NO_HARDWARE) */
PVR_UNREFERENCED_PARAMETER(psSysData);
-#endif
+#endif /* !defined(NO_HARDWARE) */
}
#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
#if defined(PVR_OMAP_USE_DM_TIMER_API)
#define GPTIMER_TO_USE 11
+/*!
+******************************************************************************
+
+ @Function AcquireGPTimer
+
+ @Description Acquire a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
PVR_ASSERT(psSysSpecData->psGPTimer == NULL);
-
+ /*
+ * This code has problems on module reload for OMAP5 running Linux
+ * 3.4.10, due to omap2_dm_timer_set_src (called by
+ * omap_dm_timer_request_specific), being unable to set the parent
+ * clock to OMAP_TIMER_SRC_32_KHZ.
+ * Not calling omap_dm_timer_set_source doesn't help.
+ */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) || !defined(MODULE)
+ /*
+ * This code could try requesting registers 9, 10, and 11,
+ * stopping at the first succesful request. We'll stick with
+ * 11 for now, as it avoids having to hard code yet more
+ * physical addresses into the code.
+ */
psSysSpecData->psGPTimer = omap_dm_timer_request_specific(GPTIMER_TO_USE);
if (psSysSpecData->psGPTimer == NULL)
{
return PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
}
-
omap_dm_timer_set_source(psSysSpecData->psGPTimer, OMAP_TIMER_SRC_SYS_CLK);
omap_dm_timer_enable(psSysSpecData->psGPTimer);
-
+ /* Set autoreload, and start value of 0 */
omap_dm_timer_set_load_start(psSysSpecData->psGPTimer, 1, 0);
omap_dm_timer_start(psSysSpecData->psGPTimer);
-
+ /*
+ * The DM timer API doesn't have a mechanism for obtaining the
+ * physical address of the counter register.
+ */
psSysSpecData->sTimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE;
+#else /* (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0)) || !defined(MODULE) */
+ (void)psSysSpecData;
+#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0)) || !defined(MODULE) */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function ReleaseGPTimer
+
+ @Description Release a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
if (psSysSpecData->psGPTimer != NULL)
{
-
+ /* Always returns 0 */
(void) omap_dm_timer_stop(psSysSpecData->psGPTimer);
omap_dm_timer_disable(psSysSpecData->psGPTimer);
}
}
-#else
+#else /* PVR_OMAP_USE_DM_TIMER_API */
+/*!
+******************************************************************************
+
+ @Function AcquireGPTimer
+
+ @Description Acquire a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
-#if defined(PVR_OMAP3_TIMING_PRCM)
+#if defined(PVR_OMAP4_TIMING_PRCM)
struct clk *psCLK;
IMG_INT res;
struct clk *sys_ck;
PVR_ASSERT(psSysSpecData->sTimerRegPhysBase.uiAddr == 0);
#endif
-
-#if defined(PVR_OMAP3_TIMING_PRCM)
-
+#if defined(PVR_OMAP4_TIMING_PRCM)
+ /* assert our dependence on the GPTIMER11 module */
psCLK = clk_get(NULL, "gpt11_fck");
if (IS_ERR(psCLK))
{
goto ExitError;
}
psSysSpecData->psGPT11_ICK = psCLK;
-
+
sys_ck = clk_get(NULL, "sys_ck");
if (IS_ERR(sys_ck))
{
goto ExitError;
}
}
+
rate = clk_get_rate(psSysSpecData->psGPT11_FCK);
PVR_TRACE(("GPTIMER11 clock is %dMHz", HZ_TO_MHZ(rate)));
PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't enable GPTIMER11 interface clock (%d)", res));
goto ExitDisableGPT11FCK;
}
-#endif
+#endif /* defined(PVR_OMAP4_TIMING_PRCM) */
-
+ /* Set the timer to non-posted mode */
sTimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_TSICR_SYS_PHYS_BASE;
pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
4,
{
PVR_TRACE(("Setting GPTIMER11 mode to posted (currently is non-posted)"));
-
+ /* Set posted mode */
*pui32TimerEnable |= 4;
}
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
hTimerEnable);
-
+ /* Enable the timer */
sTimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
4,
goto ExitDisableGPT11ICK;
}
+ /* Enable and set autoreload on overflow */
*pui32TimerEnable = 3;
OSUnMapPhysToLin(pui32TimerEnable,
#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
psSysSpecData->sTimerRegPhysBase = sTimerRegPhysBase;
#endif
-
eError = PVRSRV_OK;
goto Exit;
ExitDisableGPT11ICK:
-#if defined(PVR_OMAP3_TIMING_PRCM)
+#if defined(PVR_OMAP4_TIMING_PRCM)
clk_disable(psSysSpecData->psGPT11_ICK);
ExitDisableGPT11FCK:
clk_disable(psSysSpecData->psGPT11_FCK);
ExitError:
-#endif
+#endif /* defined(PVR_OMAP4_TIMING_PRCM) */
eError = PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
Exit:
return eError;
}
+/*!
+******************************************************************************
+
+ @Function ReleaseGPTimer
+
+ @Description Release a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
IMG_HANDLE hTimerDisable;
return;
}
#endif
- TimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
+ /* Disable the timer */
pui32TimerDisable = OSMapPhysToLin(TimerRegPhysBase,
4,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
hTimerDisable);
}
-
#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
psSysSpecData->sTimerRegPhysBase.uiAddr = 0;
#endif
-
-#if defined(PVR_OMAP3_TIMING_PRCM)
+#if defined(PVR_OMAP4_TIMING_PRCM)
clk_disable(psSysSpecData->psGPT11_ICK);
clk_disable(psSysSpecData->psGPT11_FCK);
-#endif
+#endif /* defined(PVR_OMAP4_TIMING_PRCM) */
}
-#endif
-#else
+#endif /* PVR_OMAP_USE_DM_TIMER_API */
+#else /* (DEBUG || TIMING) && !PVR_NO_OMAP_TIMER */
static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
PVR_UNREFERENCED_PARAMETER(psSysSpecData);
+
return PVRSRV_OK;
}
static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
PVR_UNREFERENCED_PARAMETER(psSysSpecData);
}
-#endif
+#endif /* (DEBUG || TIMING) && !PVR_NO_OMAP_TIMER */
+
+/*!
+******************************************************************************
+
+ @Function EnableSystemClocks
+
+ @Description Setup up the clocks for the graphics device to work.
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
- struct clk *psCLK;
+#if !defined(PM_RUNTIME_SUPPORT)
+ struct clk *psCLK;
IMG_INT res;
+#endif
+
PVR_TRACE(("EnableSystemClocks: Enabling System Clocks"));
if (!psSysSpecData->bSysClocksOneTimeInit)
mutex_init(&psSysSpecData->sPowerLock);
atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
-
- psCLK = clk_get(NULL, SGX_PARENT_CLOCK);
+
+ psCLK = clk_get(NULL, SGX_PARENT_CLOCK);
if (IS_ERR(psCLK))
{
PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get Core Clock"));
}
psSysSpecData->psCORE_CK = psCLK;
- psCLK = clk_get(NULL, "sgx_fck");
+
+// psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
+#if !defined(PM_RUNTIME_SUPPORT)
+ psCLK = clk_get(NULL, "sgx_fck");
if (IS_ERR(psCLK))
{
PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get SGX Functional Clock"));
}
psSysSpecData->psSGX_FCK = psCLK;
- psCLK = clk_get(NULL, "sgx_ick");
+ psCLK = clk_get(NULL, "sgx_ick");
if (IS_ERR(psCLK))
{
PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get SGX Interface Clock"));
}
- psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
+ psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
+
+
+#endif
+
}
return AcquireGPTimer(psSysSpecData);
}
+/*!
+******************************************************************************
+
+ @Function DisableSystemClocks
+
+ @Description Disable the graphics clocks.
+
+ @Return none
+
+******************************************************************************/
IMG_VOID DisableSystemClocks(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+
PVR_TRACE(("DisableSystemClocks: Disabling System Clocks"));
-
+
+ /*
+ * Always disable the SGX clocks when the system clocks are disabled.
+ * This saves having to make an explicit call to DisableSGXClocks if
+ * active power management is enabled.
+ */
DisableSGXClocks(psSysData);
ReleaseGPTimer(psSysSpecData);
-
}
PVRSRV_ERROR SysPMRuntimeRegister(void)
{
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
-// pm_runtime_enable(&gpsPVRLDMDev->dev);
+#if defined(PM_RUNTIME_SUPPORT)
+ pm_runtime_enable(&gpsPVRLDMDev->dev);
+#endif
#endif
return PVRSRV_OK;
}
PVRSRV_ERROR SysPMRuntimeUnregister(void)
{
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
-// pm_runtime_disable(&gpsPVRLDMDev->dev);
+#if defined(PM_RUNTIME_SUPPORT)
+ pm_runtime_disable(&gpsPVRLDMDev->dev);
+#endif
#endif
return PVRSRV_OK;
}
+
+PVRSRV_ERROR SysDvfsInitialize(SYS_SPECIFIC_DATA *psSysSpecificData)
+{
+#if !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ PVR_UNREFERENCED_PARAMETER(psSysSpecificData);
+#else /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ IMG_UINT32 i, *freq_list;
+ IMG_INT32 opp_count;
+ unsigned long freq;
+ struct opp *opp;
+
+ /*
+ * We query and store the list of SGX frequencies just this once under the
+ * assumption that they are unchanging, e.g. no disabling of high frequency
+ * option for thermal management. This is currently valid for 4430 and 4460.
+ */
+ rcu_read_lock();
+ opp_count = opp_get_opp_count(&gpsPVRLDMDev->dev);
+ if (opp_count < 1)
+ {
+ rcu_read_unlock();
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsInitialize: Could not retrieve opp count"));
+ return PVRSRV_ERROR_NOT_SUPPORTED;
+ }
+
+ /*
+ * Allocate the frequency list with a slot for each available frequency plus
+ * one additional slot to hold a designated frequency value to assume when in
+ * an unknown frequency state.
+ */
+ freq_list = kmalloc((opp_count + 1) * sizeof(IMG_UINT32), GFP_ATOMIC);
+ if (!freq_list)
+ {
+ rcu_read_unlock();
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsInitialize: Could not allocate frequency list"));
+ return PVRSRV_ERROR_OUT_OF_MEMORY;
+ }
+
+ /*
+ * Fill in frequency list from lowest to highest then finally the "unknown"
+ * frequency value. We use the highest available frequency as our assumed value
+ * when in an unknown state, because it is safer for APM and hardware recovery
+ * timers to be longer than intended rather than shorter.
+ */
+ freq = 0;
+ for (i = 0; i < opp_count; i++)
+ {
+ opp = opp_find_freq_ceil(&gpsPVRLDMDev->dev, &freq);
+ if (IS_ERR_OR_NULL(opp))
+ {
+ rcu_read_unlock();
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsInitialize: Could not retrieve opp level %d", i));
+ kfree(freq_list);
+ return PVRSRV_ERROR_NOT_SUPPORTED;
+ }
+ freq_list[i] = (IMG_UINT32)freq;
+ freq++;
+ }
+ rcu_read_unlock();
+ freq_list[opp_count] = freq_list[opp_count - 1];
+
+ psSysSpecificData->ui32SGXFreqListSize = opp_count + 1;
+ psSysSpecificData->pui32SGXFreqList = freq_list;
+
+ /* Start in unknown state - no frequency request to DVFS yet made */
+ psSysSpecificData->ui32SGXFreqListIndex = opp_count;
+#endif /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+
+ return PVRSRV_OK;
+}
+
+PVRSRV_ERROR SysDvfsDeinitialize(SYS_SPECIFIC_DATA *psSysSpecificData)
+{
+#if !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ PVR_UNREFERENCED_PARAMETER(psSysSpecificData);
+#else /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ /*
+ * We assume this function is only called if SysDvfsInitialize() was
+ * completed successfully before.
+ *
+ * The DVFS interface does not allow us to actually unregister as a
+ * user of SGX, so we do the next best thing which is to lower our
+ * required frequency to the minimum if not already set. DVFS may
+ * report busy if early in initialization, but all other errors are
+ * considered serious.
+ */
+ if (psSysSpecificData->ui32SGXFreqListIndex != 0)
+ {
+ struct gpu_platform_data *pdata;
+ IMG_INT32 res;
+
+ pdata = (struct gpu_platform_data *)gpsPVRLDMDev->dev.platform_data;
+
+ PVR_ASSERT(pdata->device_scale != IMG_NULL);
+ res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
+ &gpsPVRLDMDev->dev,
+#endif
+ psSysSpecificData->pui32SGXFreqList[0]);
+ if (res == -EBUSY)
+ {
+ PVR_DPF((PVR_DBG_WARNING, "SysDvfsDeinitialize: Unable to scale SGX frequency (EBUSY)"));
+ }
+ else if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsDeinitialize: Unable to scale SGX frequency (%d)", res));
+ }
+
+ psSysSpecificData->ui32SGXFreqListIndex = 0;
+ }
+
+ kfree(psSysSpecificData->pui32SGXFreqList);
+ psSysSpecificData->pui32SGXFreqList = 0;
+ psSysSpecificData->ui32SGXFreqListSize = 0;
+#endif /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+
+ return PVRSRV_OK;
+}
+
+#if defined(SUPPORT_DRI_DRM_PLUGIN)
+static struct omap_gpu_plugin sOMAPGPUPlugin;
+
+#define SYS_DRM_SET_PLUGIN_FIELD(d, s, f) (d)->f = (s)->f
+int
+SysDRMRegisterPlugin(PVRSRV_DRM_PLUGIN *psDRMPlugin)
+{
+ int iRes;
+
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, name);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, open);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, load);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, unload);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, release);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, mmap);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, ioctls);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, num_ioctls);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, ioctl_start);
+
+ iRes = omap_gpu_register_plugin(&sOMAPGPUPlugin);
+ if (iRes != 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "%s: omap_gpu_register_plugin failed (%d)", __FUNCTION__, iRes));
+ }
+
+ return iRes;
+}
+
+void
+SysDRMUnregisterPlugin(PVRSRV_DRM_PLUGIN *psDRMPlugin)
+{
+ int iRes = omap_gpu_unregister_plugin(&sOMAPGPUPlugin);
+ if (iRes != 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "%s: omap_gpu_unregister_plugin failed (%d)", __FUNCTION__, iRes));
+ }
+}
+#endif
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title SGX kernel/client driver interface structures and prototypes
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__OEMFUNCS_H__)
#define __OEMFUNCS_H__
extern "C" {
#endif
+/* function in/out data structures: */
typedef IMG_UINT32 (*PFN_SRV_BRIDGEDISPATCH)( IMG_UINT32 Ioctl,
IMG_BYTE *pInBuf,
IMG_UINT32 InBufLen,
IMG_BYTE *pOutBuf,
IMG_UINT32 OutBufLen,
IMG_UINT32 *pdwBytesTransferred);
+/*
+ Function table for kernel 3rd party driver to kernel services
+*/
typedef struct PVRSRV_DC_OEM_JTABLE_TAG
{
PFN_SRV_BRIDGEDISPATCH pfnOEMBridgeDispatch;
}
#endif
-#endif
+#endif /* __OEMFUNCS_H__ */
+
+/*****************************************************************************
+ End of file (oemfuncs.h)
+*****************************************************************************/
+
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title System Configuration
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description System Configuration functions
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#include "sysconfig.h"
#include "services_headers.h"
#include "ocpdefs.h"
+/* top level system data anchor point*/
SYS_DATA* gpsSysData = (SYS_DATA*)IMG_NULL;
SYS_DATA gsSysData;
static SYS_SPECIFIC_DATA gsSysSpecificData;
SYS_SPECIFIC_DATA *gpsSysSpecificData;
-static IMG_UINT32 gui32SGXDeviceID;
-static SGX_DEVICE_MAP gsSGXDeviceMap;
-static PVRSRV_DEVICE_NODE *gpsSGXDevNode;
+/* SGX structures */
+static IMG_UINT32 gui32SGXDeviceID;
+static SGX_DEVICE_MAP gsSGXDeviceMap;
+static PVRSRV_DEVICE_NODE *gpsSGXDevNode;
-#define DEVICE_SGX_INTERRUPT (1 << 0)
#if defined(NO_HARDWARE) || defined(SGX_OCP_REGS_ENABLED)
static IMG_CPU_VIRTADDR gsSGXRegsCPUVAddr;
return eError;
}
-#else
+#else /* defined(SGX_OCP_REGS_ENABLED) */
static INLINE PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData)
{
return EnableSGXClocks(psSysData);
}
-#endif
+#endif /* defined(SGX_OCP_REGS_ENABLED) */
static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData)
{
#if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
if(eError == PVRSRV_OK)
{
-
+ /*
+ * The SGX Clocks are enabled separately if active power
+ * management is enabled.
+ */
eError = EnableSGXClocksWrap(psSysData);
if (eError != PVRSRV_OK)
{
return eError;
}
+/*!
+******************************************************************************
+
+ @Function SysLocateDevices
+
+ @Description Specifies devices in the systems memory map
+
+ @Input psSysData - sys data
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
{
#if defined(NO_HARDWARE)
PVR_UNREFERENCED_PARAMETER(psSysData);
-
+ /* SGX Device: */
gsSGXDeviceMap.ui32Flags = 0x0;
#if defined(NO_HARDWARE)
-
-
- gsSGXDeviceMap.ui32RegsSize = SYS_OMAP3430_SGX_REGS_SIZE;
+ /*
+ * For no hardware, allocate some contiguous memory for the
+ * register block.
+ */
+
+ /* Registers */
+ gsSGXDeviceMap.ui32RegsSize = SYS_OMAP3630_SGX_REGS_SIZE;
eError = OSBaseAllocContigMemory(gsSGXDeviceMap.ui32RegsSize,
&gsSGXRegsCPUVAddr,
gsSGXDeviceMap.sRegsCpuPBase = sCpuPAddr;
gsSGXDeviceMap.sRegsSysPBase = SysCpuPAddrToSysPAddr(gsSGXDeviceMap.sRegsCpuPBase);
#if defined(__linux__)
-
+ /* Indicate the registers are already mapped */
gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
#else
-
+ /*
+ * FIXME: Could we just use the virtual address returned by
+ * OSBaseAllocContigMemory?
+ */
gsSGXDeviceMap.pvRegsCpuVBase = IMG_NULL;
#endif
OSMemSet(gsSGXRegsCPUVAddr, 0, gsSGXDeviceMap.ui32RegsSize);
-
-
-
+ /*
+ device interrupt IRQ
+ Note: no interrupts available on no hardware system
+ */
gsSGXDeviceMap.ui32IRQ = 0;
-#else
+#else /* defined(NO_HARDWARE) */
#if defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO)
-
+ /* get the resource and IRQ through platform resource API */
dev_res = platform_get_resource(gpsPVRLDMDev, IORESOURCE_MEM, 0);
if (dev_res == NULL)
{
SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
PVR_TRACE(("SGX register base: 0x%lx", (unsigned long)gsSGXDeviceMap.sRegsCpuPBase.uiAddr));
+#if defined(SGX544) && defined(SGX_FEATURE_MP)
+ /* FIXME: Workaround due to HWMOD change. Otherwise this region is too small. */
+ gsSGXDeviceMap.ui32RegsSize = SYS_OMAP3630_SGX_REGS_SIZE;
+#else
gsSGXDeviceMap.ui32RegsSize = (unsigned int)(dev_res->end - dev_res->start);
+#endif
PVR_TRACE(("SGX register size: %d",gsSGXDeviceMap.ui32RegsSize));
gsSGXDeviceMap.ui32IRQ = dev_irq;
PVR_TRACE(("SGX IRQ: %d", gsSGXDeviceMap.ui32IRQ));
-#else
- gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP3430_SGX_REGS_SYS_PHYS_BASE;
+#else /* defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO) */
+ gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP3630_SGX_REGS_SYS_PHYS_BASE;
gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
- gsSGXDeviceMap.ui32RegsSize = SYS_OMAP3430_SGX_REGS_SIZE;
+ gsSGXDeviceMap.ui32RegsSize = SYS_OMAP3630_SGX_REGS_SIZE;
- gsSGXDeviceMap.ui32IRQ = SYS_OMAP3430_SGX_IRQ;
+ gsSGXDeviceMap.ui32IRQ = SYS_OMAP3630_SGX_IRQ;
-#endif
+#endif /* defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO) */
#if defined(SGX_OCP_REGS_ENABLED)
gsSGXRegsCPUVAddr = OSMapPhysToLin(gsSGXDeviceMap.sRegsCpuPBase,
gsSGXDeviceMap.ui32RegsSize,
return PVRSRV_ERROR_BAD_MAPPING;
}
-
+ /* Indicate the registers are already mapped */
gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
gpvOCPRegsLinAddr = gsSGXRegsCPUVAddr;
#endif
-#endif
+#endif /* defined(NO_HARDWARE) */
#if defined(PDUMP)
{
-
+ /* initialise memory region name for pdumping */
static IMG_CHAR pszPDumpDevName[] = "SGXMEM";
gsSGXDeviceMap.pszPDumpDevName = pszPDumpDevName;
}
#endif
-
+ /* add other devices here: */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysCreateVersionString
+
+ @Description Read the version string
+
+ @Return IMG_CHAR * : Version string
+
+******************************************************************************/
static IMG_CHAR *SysCreateVersionString(void)
{
static IMG_CHAR aszVersionString[100];
+ IMG_UINT32 ui32MaxStrLen;
SYS_DATA *psSysData;
IMG_UINT32 ui32SGXRevision;
IMG_INT32 i32Count;
-#if !defined(NO_HARDWARE)
- IMG_VOID *pvRegsLinAddr;
-
- pvRegsLinAddr = OSMapPhysToLin(gsSGXDeviceMap.sRegsCpuPBase,
- SYS_OMAP3430_SGX_REGS_SIZE,
- PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
- IMG_NULL);
- if(!pvRegsLinAddr)
- {
- return IMG_NULL;
- }
-
- ui32SGXRevision = OSReadHWReg((IMG_PVOID)((IMG_PBYTE)pvRegsLinAddr),
- EUR_CR_CORE_REVISION);
-#else
- ui32SGXRevision = 0;
-#endif
SysAcquireData(&psSysData);
- i32Count = OSSNPrintf(aszVersionString, 100,
- "SGX revision = %u.%u.%u",
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAJOR_MASK)
- >> EUR_CR_CORE_REVISION_MAJOR_SHIFT),
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MINOR_MASK)
- >> EUR_CR_CORE_REVISION_MINOR_SHIFT),
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAINTENANCE_MASK)
- >> EUR_CR_CORE_REVISION_MAINTENANCE_SHIFT)
- );
-
-#if !defined(NO_HARDWARE)
- OSUnMapPhysToLin(pvRegsLinAddr,
- SYS_OMAP3430_SGX_REGS_SIZE,
- PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
- IMG_NULL);
-#endif
+ ui32SGXRevision = SGX_CORE_REV;
+ ui32MaxStrLen = 99;
+ i32Count = OSSNPrintf(aszVersionString, ui32MaxStrLen + 1,
+ "SGX revision = %u",
+ (IMG_UINT)(ui32SGXRevision));
if(i32Count == -1)
{
return IMG_NULL;
}
+/*!
+******************************************************************************
+
+ @Function SysInitialise
+
+ @Description Initialises kernel services at 'driver load' time
+
+ @Return PVRSRV_ERROR :
+
+******************************************************************************/
PVRSRV_ERROR SysInitialise(IMG_VOID)
{
IMG_UINT32 i;
gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT;
-
+ /* init device ID's */
for(i=0; i<SYS_DEVICE_COUNT; i++)
{
gpsSysData->sDeviceID[i].uiID = i;
}
#if !defined(SGX_DYNAMIC_TIMING_INFO)
-
+ /* Set up timing information*/
psTimingInfo = &gsSGXDeviceMap.sTimingInfo;
psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
psTimingInfo->bEnableActivePM = IMG_TRUE;
#else
psTimingInfo->bEnableActivePM = IMG_FALSE;
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ;
#endif
-
-
+ /*
+ Setup the Source Clock Divider value
+ */
gpsSysSpecificData->ui32SrcClockDiv = 3;
-
-
-
-
+ /*
+ Locate the devices within the system, specifying
+ the physical addresses of each devices components
+ (regs, mem, ports etc.)
+ */
eError = SysLocateDevices(gpsSysData);
if (eError != PVRSRV_OK)
{
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV);
-#if 0
+
eError = SysPMRuntimeRegister();
if (eError != PVRSRV_OK)
{
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME);
-#endif
-
+ eError = SysDvfsInitialize(gpsSysSpecificData);
+ if (eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to initialize DVFS"));
+ (IMG_VOID)SysDeinitialise(gpsSysData);
+ gpsSysData = IMG_NULL;
+ return eError;
+ }
+ SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_DVFS_INIT);
+ /*
+ Register devices with the system
+ This also sets up their memory maps/heaps
+ */
eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice,
DEVICE_SGX_INTERRUPT, &gui32SGXDeviceID);
if (eError != PVRSRV_OK)
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_REGDEV);
-
-
-
-
+ /*
+ Once all devices are registered, specify the backing store
+ and, if required, customise the memory heap config
+ */
psDeviceNode = gpsSysData->psDeviceNodeList;
while(psDeviceNode)
{
-
+ /* perform any OEM SOC address space customisations here */
switch(psDeviceNode->sDevId.eDeviceType)
{
case PVRSRV_DEVICE_TYPE_SGX:
DEVICE_MEMORY_INFO *psDevMemoryInfo;
DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
-
-
-
+ /*
+ specify the backing store to use for the devices MMU PT/PDs
+ - the PT/PDs are always UMA in this system
+ */
psDeviceNode->psLocalDevMemArena = IMG_NULL;
-
+ /* useful pointers */
psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo;
psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap;
-
+ /* specify the backing store for all SGX heaps */
for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++)
{
psDeviceMemoryHeap[i].ui32Attribs |= PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG;
return PVRSRV_ERROR_INIT_FAILURE;
}
-
+ /* advance to next device */
psDeviceNode = psDeviceNode->psNext;
}
gpsSysData = IMG_NULL;
return eError;
}
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
eError = PVRSRVInitialiseDevice(gui32SGXDeviceID);
if (eError != PVRSRV_OK)
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV);
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
-
+ /* SGX defaults to D3 power state */
DisableSGXClocks(gpsSysData);
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
#if !defined(PVR_NO_OMAP_TIMER)
#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
TimerRegPhysBase = gsSysSpecificData.sTimerRegPhysBase;
#else
- TimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE;
+ TimerRegPhysBase.uiAddr = SYS_OMAP3630_GP11TIMER_REGS_SYS_PHYS_BASE;
#endif
gpsSysData->pvSOCTimerRegisterKM = IMG_NULL;
gpsSysData->hSOCTimerRegisterOSMemHandle = 0;
(IMG_VOID **)&gpsSysData->pvSOCTimerRegisterKM,
&gpsSysData->hSOCTimerRegisterOSMemHandle);
}
-#endif
+#endif /* !defined(PVR_NO_OMAP_TIMER) */
+
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysFinalise
+
+ @Description Final part of initialisation at 'driver load' time
+
+ @Return PVRSRV_ERROR :
+
+******************************************************************************/
PVRSRV_ERROR SysFinalise(IMG_VOID)
{
PVRSRV_ERROR eError = PVRSRV_OK;
PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to Enable SGX clocks (%d)", eError));
return eError;
}
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
eError = OSInstallMISR(gpsSysData);
if (eError != PVRSRV_OK)
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR);
#if defined(SYS_USING_INTERRUPTS)
-
+ /* install a Device ISR */
eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode);
if (eError != PVRSRV_OK)
{
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR);
-#endif
-
+#if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
+ SysEnableSGXInterrupts(gpsSysData);
+#endif
+#endif /* defined(SYS_USING_INTERRUPTS) */
#if defined(__linux__)
-
+ /* Create a human readable version string for this system */
gpsSysData->pszVersionString = SysCreateVersionString();
if (!gpsSysData->pszVersionString)
{
#endif
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
-
+ /* SGX defaults to D3 power state */
DisableSGXClocks(gpsSysData);
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
gpsSysSpecificData->bSGXInitComplete = IMG_TRUE;
}
+/*!
+******************************************************************************
+
+ @Function SysDeinitialise
+
+ @Description De-initialises kernel services at 'driver unload' time
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
{
PVRSRV_ERROR eError;
+ PVR_UNREFERENCED_PARAMETER(psSysData);
+
if(gpsSysData->pvSOCTimerRegisterKM)
{
OSUnReservePhys(gpsSysData->pvSOCTimerRegisterKM,
gpsSysData->hSOCTimerRegisterOSMemHandle);
}
+
#if defined(SYS_USING_INTERRUPTS)
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR))
{
- eError = OSUninstallDeviceLISR(psSysData);
+ eError = OSUninstallDeviceLISR(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: OSUninstallDeviceLISR failed"));
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR))
{
- eError = OSUninstallMISR(psSysData);
+ eError = OSUninstallMISR(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: OSUninstallMISR failed"));
{
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
PVR_ASSERT(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS));
-
+ /* Reenable SGX clocks whilst SGX is being deinitialised. */
eError = EnableSGXClocksWrap(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: EnableSGXClocks failed"));
return eError;
}
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
-
- eError = PVRSRVDeinitialiseDevice (gui32SGXDeviceID);
+ /* Deinitialise SGX */
+ eError = PVRSRVDeinitialiseDevice(gui32SGXDeviceID);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: failed to de-init the device"));
return eError;
}
}
-#if 0
- if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME))
+
+ /* Disable system clocks. Must happen after last access to hardware */
+ if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
{
- eError = SysPMRuntimeUnregister();
+ DisableSystemClocks(gpsSysData);
+ }
+
+ if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_DVFS_INIT))
+ {
+ eError = SysDvfsDeinitialize(gpsSysSpecificData);
if (eError != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to unregister with OSPM!"));
+ PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to de-init DVFS"));
gpsSysData = IMG_NULL;
return eError;
}
}
-#endif
-
- if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
+ if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME))
{
- DisableSystemClocks(gpsSysData);
+ eError = SysPMRuntimeUnregister();
+ if (eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to unregister with OSPM!"));
+ gpsSysData = IMG_NULL;
+ return eError;
+ }
}
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA))
if(gsSGXRegsCPUVAddr != IMG_NULL)
{
#if defined(NO_HARDWARE)
-
- OSBaseFreeContigMemory(SYS_OMAP3430_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase);
+ /* Free hardware resources. */
+ OSBaseFreeContigMemory(SYS_OMAP3630_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase);
#else
#if defined(SGX_OCP_REGS_ENABLED)
OSUnMapPhysToLin(gsSGXRegsCPUVAddr,
gpvOCPRegsLinAddr = IMG_NULL;
#endif
-#endif
+#endif /* defined(NO_HARDWARE) */
gsSGXRegsCPUVAddr = IMG_NULL;
gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
}
-#endif
+#endif /* defined(NO_HARDWARE) || defined(SGX_OCP_REGS_ENABLED) */
gpsSysSpecificData->ui32SysSpecificData = 0;
}
+/*!
+******************************************************************************
+
+ @Function SysGetDeviceMemoryMap
+
+ @Description returns a device address map for the specified device
+
+ @Input eDeviceType - device type
+ @Input ppvDeviceMap - void ptr to receive device specific info.
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysGetDeviceMemoryMap(PVRSRV_DEVICE_TYPE eDeviceType,
IMG_VOID **ppvDeviceMap)
{
{
case PVRSRV_DEVICE_TYPE_SGX:
{
-
+ /* just return a pointer to the structure */
*ppvDeviceMap = (IMG_VOID*)&gsSGXDeviceMap;
break;
}
+/*!
+******************************************************************************
+ @Function SysCpuPAddrToDevPAddr
+
+ @Description Compute a device physical address from a cpu physical
+ address. Relevant when
+
+ @Input cpu_paddr - cpu physical address.
+ @Input eDeviceType - device type required if DevPAddr
+ address spaces vary across devices
+ in the same system
+ @Return device physical address.
+
+******************************************************************************/
IMG_DEV_PHYADDR SysCpuPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType,
IMG_CPU_PHYADDR CpuPAddr)
{
PVR_UNREFERENCED_PARAMETER(eDeviceType);
-
+ /* Note: for UMA system we assume DevP == CpuP */
DevPAddr.uiAddr = CpuPAddr.uiAddr;
return DevPAddr;
}
+/*!
+******************************************************************************
+ @Function SysSysPAddrToCpuPAddr
+
+ @Description Compute a cpu physical address from a system physical
+ address.
+
+ @Input sys_paddr - system physical address.
+ @Return cpu physical address.
+
+******************************************************************************/
IMG_CPU_PHYADDR SysSysPAddrToCpuPAddr (IMG_SYS_PHYADDR sys_paddr)
{
IMG_CPU_PHYADDR cpu_paddr;
-
+ /* This would only be an inequality if the CPU's MMU did not point to
+ sys address 0, ie. multi CPU system */
cpu_paddr.uiAddr = sys_paddr.uiAddr;
return cpu_paddr;
}
+/*!
+******************************************************************************
+ @Function SysCpuPAddrToSysPAddr
+
+ @Description Compute a system physical address from a cpu physical
+ address.
+
+ @Input cpu_paddr - cpu physical address.
+ @Return device physical address.
+
+******************************************************************************/
IMG_SYS_PHYADDR SysCpuPAddrToSysPAddr (IMG_CPU_PHYADDR cpu_paddr)
{
IMG_SYS_PHYADDR sys_paddr;
-
+ /* This would only be an inequality if the CPU's MMU did not point to
+ sys address 0, ie. multi CPU system */
sys_paddr.uiAddr = cpu_paddr.uiAddr;
return sys_paddr;
}
+/*!
+******************************************************************************
+ @Function SysSysPAddrToDevPAddr
+
+ @Description Compute a device physical address from a system physical
+ address.
+
+ @Input SysPAddr - system physical address.
+ @Input eDeviceType - device type required if DevPAddr
+ address spaces vary across devices
+ in the same system
+
+ @Return Device physical address.
+
+******************************************************************************/
IMG_DEV_PHYADDR SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_SYS_PHYADDR SysPAddr)
{
IMG_DEV_PHYADDR DevPAddr;
PVR_UNREFERENCED_PARAMETER(eDeviceType);
-
+ /* Note: for UMA system we assume DevP == CpuP */
DevPAddr.uiAddr = SysPAddr.uiAddr;
return DevPAddr;
}
+/*!
+******************************************************************************
+ @Function SysDevPAddrToSysPAddr
+
+ @Description Compute a device physical address from a system physical
+ address.
+
+ @Input DevPAddr - device physical address.
+ @Input eDeviceType - device type required if DevPAddr
+ address spaces vary across devices
+ in the same system
+
+ @Return System physical address.
+
+******************************************************************************/
IMG_SYS_PHYADDR SysDevPAddrToSysPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_DEV_PHYADDR DevPAddr)
{
IMG_SYS_PHYADDR SysPAddr;
PVR_UNREFERENCED_PARAMETER(eDeviceType);
-
+ /* Note: for UMA system we assume DevP == SysP */
SysPAddr.uiAddr = DevPAddr.uiAddr;
return SysPAddr;
}
+/*****************************************************************************
+ @Function SysRegisterExternalDevice
+
+ @Description Called when a 3rd party device registers with services
+
+ @Input psDeviceNode - the new device node.
+
+ @Return IMG_VOID
+*****************************************************************************/
IMG_VOID SysRegisterExternalDevice(PVRSRV_DEVICE_NODE *psDeviceNode)
{
PVR_UNREFERENCED_PARAMETER(psDeviceNode);
}
+/*****************************************************************************
+ @Function SysRemoveExternalDevice
+
+ @Description Called when a 3rd party device unregisters from services
+
+ @Input psDeviceNode - the device node being removed.
+
+ @Return IMG_VOID
+*****************************************************************************/
IMG_VOID SysRemoveExternalDevice(PVRSRV_DEVICE_NODE *psDeviceNode)
{
PVR_UNREFERENCED_PARAMETER(psDeviceNode);
}
+/*!
+******************************************************************************
+ @Function SysGetInterruptSource
+ @Description Returns System specific information about the device(s) that
+ generated the interrupt in the system
+
+ @Input psSysData
+ @Input psDeviceNode
+
+ @Return System specific information indicating which device(s)
+ generated the interrupt
+
+******************************************************************************/
IMG_UINT32 SysGetInterruptSource(SYS_DATA *psSysData,
PVRSRV_DEVICE_NODE *psDeviceNode)
{
PVR_UNREFERENCED_PARAMETER(psSysData);
#if defined(NO_HARDWARE)
-
+ /* no interrupts in no_hw system just return all bits */
return 0xFFFFFFFF;
#else
-
+ /* Not a shared irq, so we know this is an interrupt for this device */
return psDeviceNode->ui32SOCInterruptBit;
#endif
}
+/*!
+******************************************************************************
+ @Function SysClearInterrupts
+
+ @Description Clears specified system interrupts
+
+ @Input psSysData
+ @Input ui32ClearBits
+
+ @Return IMG_VOID
+
+******************************************************************************/
IMG_VOID SysClearInterrupts(SYS_DATA* psSysData, IMG_UINT32 ui32ClearBits)
{
PVR_UNREFERENCED_PARAMETER(ui32ClearBits);
-#if defined(NO_HARDWARE)
PVR_UNREFERENCED_PARAMETER(psSysData);
-#else
+#if !defined(NO_HARDWARE)
#if defined(SGX_OCP_NO_INT_BYPASS)
OSWriteHWReg(gpvOCPRegsLinAddr, EUR_CR_OCP_IRQSTATUS_2, 0x1);
#endif
-
+ /* Flush posted writes */
OSReadHWReg(((PVRSRV_SGXDEV_INFO *)gpsSGXDevNode->pvDevice)->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR);
-#endif
+#endif /* defined(NO_HARDWARE) */
}
#if defined(SGX_OCP_NO_INT_BYPASS)
+/*!
+******************************************************************************
+ @Function SysEnableSGXInterrupts
+
+ @Description Enables SGX interrupts
+
+ @Input psSysData
+
+ @Return IMG_VOID
+
+******************************************************************************/
IMG_VOID SysEnableSGXInterrupts(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
}
}
+/*!
+******************************************************************************
+ @Function SysDisableSGXInterrupts
+
+ @Description Disables SGX interrupts
+
+ @Input psSysData
+
+ @Return IMG_VOID
+
+******************************************************************************/
IMG_VOID SysDisableSGXInterrupts(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
SYS_SPECIFIC_DATA_CLEAR(psSysSpecData, SYS_SPECIFIC_DATA_IRQ_ENABLED);
}
}
-#endif
+#endif /* defined(SGX_OCP_NO_INT_BYPASS) */
+
+/*!
+******************************************************************************
+
+ @Function SysSystemPrePowerState
+ @Description Perform system-level processing required before a power transition
+
+ @Input eNewPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysSystemPrePowerState(PVRSRV_SYS_POWER_STATE eNewPowerState)
{
PVRSRV_ERROR eError = PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysSystemPostPowerState
+
+ @Description Perform system-level processing required after a power transition
+
+ @Input eNewPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysSystemPostPowerState(PVRSRV_SYS_POWER_STATE eNewPowerState)
{
PVRSRV_ERROR eError = PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysDevicePrePowerState
+
+ @Description Perform system level processing required before a device power
+ transition
+
+ @Input ui32DeviceIndex :
+ @Input eNewPowerState :
+ @Input eCurrentPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysDevicePrePowerState(IMG_UINT32 ui32DeviceIndex,
PVRSRV_DEV_POWER_STATE eNewPowerState,
PVRSRV_DEV_POWER_STATE eCurrentPowerState)
PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePrePowerState: SGX Entering state D3"));
DisableSGXClocks(gpsSysData);
}
-#else
+#else /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
PVR_UNREFERENCED_PARAMETER(eNewPowerState );
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysDevicePostPowerState
+
+ @Description Perform system level processing required after a device power
+ transition
+
+ @Input ui32DeviceIndex :
+ @Input eNewPowerState :
+ @Input eCurrentPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysDevicePostPowerState(IMG_UINT32 ui32DeviceIndex,
PVRSRV_DEV_POWER_STATE eNewPowerState,
PVRSRV_DEV_POWER_STATE eCurrentPowerState)
PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePostPowerState: SGX Leaving state D3"));
eError = EnableSGXClocksWrap(gpsSysData);
}
-#else
+#else /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
PVR_UNREFERENCED_PARAMETER(eCurrentPowerState);
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
return eError;
}
+#if defined(SYS_SUPPORTS_SGX_IDLE_CALLBACK)
+
+IMG_VOID SysSGXIdleTransition(IMG_BOOL bSGXIdle)
+{
+ PVR_DPF((PVR_DBG_MESSAGE, "SysSGXIdleTransition switch to %u", bSGXIdle));
+}
+
+#endif /* defined(SYS_SUPPORTS_SGX_IDLE_CALLBACK) */
+
+/*****************************************************************************
+ @Function SysOEMFunction
+
+ @Description marshalling function for custom OEM functions
+
+ @Input ui32ID - function ID
+ @Input pvIn - in data
+ @Output pvOut - out data
+ @Return PVRSRV_ERROR
+*****************************************************************************/
PVRSRV_ERROR SysOEMFunction ( IMG_UINT32 ui32ID,
IMG_VOID *pvIn,
IMG_UINT32 ulInSize,
if ((ui32ID == OEM_GET_EXT_FUNCS) &&
(ulOutSize == sizeof(PVRSRV_DC_OEM_JTABLE)))
{
-
PVRSRV_DC_OEM_JTABLE *psOEMJTable = (PVRSRV_DC_OEM_JTABLE*) pvOut;
psOEMJTable->pfnOEMBridgeDispatch = &PVRSRV_BridgeDispatchKM;
return PVRSRV_OK;
return PVRSRV_ERROR_INVALID_PARAMS;
}
+/******************************************************************************
+ End of file (sysconfig.c)
+******************************************************************************/
-/**********************************************************************
- *
- * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title System Description Header
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description This header provides system-specific declarations and macros
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__SOCCONFIG_H__)
#define __SOCCONFIG_H__
-
#define VS_PRODUCT_NAME "OMAP3630"
-#define SYS_SGX_CLOCK_SPEED 200000000
-#define SYS_SGX_HWRECOVERY_TIMEOUT_FREQ (100)
-#define SYS_SGX_PDS_TIMER_FREQ (1000)
+#define SYS_SGX_HWRECOVERY_TIMEOUT_FREQ (100) // 10ms (100hz)
+#define SYS_SGX_PDS_TIMER_FREQ (1000) // 1ms (1000hz)
+/* Allow the AP latency to be overridden in the build config */
#if !defined(SYS_SGX_ACTIVE_POWER_LATENCY_MS)
#define SYS_SGX_ACTIVE_POWER_LATENCY_MS (2)
#endif
-#define SYS_OMAP3430_SGX_REGS_SYS_PHYS_BASE 0x50000000
+#define SYS_OMAP3630_SGX_REGS_SYS_PHYS_BASE 0x50000000
+#define SYS_OMAP3630_SGX_REGS_SIZE 0x10000
+
+#define SYS_OMAP3630_SGX_IRQ 21 /* OMAP4 IRQ's are offset by 32 */
-#define SYS_OMAP3430_SGX_REGS_SIZE 0x10000
+#define SYS_OMAP_DSS_REGS_SYS_PHYS_BASE 0x58000000
+#define SYS_OMAP_DSS_REGS_SIZE 0x7000
-#define SYS_OMAP3430_SGX_IRQ 21
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_STATUS_REG 0x6028
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_ENABLE_REG 0x602c
-#define SYS_OMAP3430_GP11TIMER_ENABLE_SYS_PHYS_BASE 0x48088024
-#define SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE 0x48088028
-#define SYS_OMAP3430_GP11TIMER_TSICR_SYS_PHYS_BASE 0x48088040
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_VSYNC_ENABLE_MASK 0x10000
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_VSYNC_STATUS_MASK 0x10000
+
+#define SYS_OMAP_DSS_LCD_INTERRUPT_STATUS_REG 0x1018
+#define SYS_OMAP_DSS_LCD_INTERRUPT_ENABLE_REG 0x101c
+
+#define SYS_OMAP_DSS_LCD_INTERRUPT_VSYNC_ENABLE_MASK 0x40002
+#define SYS_OMAP_DSS_LCD_INTERRUPT_VSYNC_STATUS_MASK 0x40002
+
+
+#define SYS_OMAP3630_GP11TIMER_ENABLE_SYS_PHYS_BASE 0x48088024
+#define SYS_OMAP3630_GP11TIMER_REGS_SYS_PHYS_BASE 0x48088028
+#define SYS_OMAP3630_GP11TIMER_TSICR_SYS_PHYS_BASE 0x48088040
+
+
+
+/* Interrupt bits */
+#define DEVICE_SGX_INTERRUPT (1<<0)
+#define DEVICE_MSVDX_INTERRUPT (1<<1)
+#define DEVICE_DISP_INTERRUPT (1<<2)
+
+#if 0
+#if defined(__linux__)
+/*
+ * Recent OMAP4 kernels register SGX as platform device "omap_gpu".
+ * This device must be used with the Linux power management calls
+ * in sysutils_linux.c, in order for SGX to be powered on.
+ */
+#if defined(PVR_LDM_PLATFORM_PRE_REGISTERED_DEV)
+#define SYS_SGX_DEV_NAME PVR_LDM_PLATFORM_PRE_REGISTERED_DEV
+#else
+#define SYS_SGX_DEV_NAME "omap_gpu"
+#endif /* defined(PVR_LDM_PLATFORM_PRE_REGISTERED_DEV) */
+#endif /* defined(__linux__) */
+#endif
+/*****************************************************************************
+ * system specific data structures
+ *****************************************************************************/
-#endif
+#endif /* __SYSCONFIG_H__ */
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title System Description Header
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description This header provides system-specific declarations and macros
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__SYSINFO_H__)
#define __SYSINFO_H__
+#if defined(SGX540) && (SGX_CORE_REV == 120)
+#define SYS_SGX_CLOCK_SPEED 307200000
+#else
+#define SYS_SGX_CLOCK_SPEED 200000000
+#endif
+
+/*!< System specific poll/timeout details */
#if defined(PVR_LINUX_USING_WORKQUEUES)
+/*
+ * The workqueue based 3rd party display driver may be blocked for up
+ * to 500ms waiting for a vsync when the screen goes blank, so we
+ * need to wait longer for the hardware if a flush of the swap chain is
+ * required.
+ */
#define MAX_HW_TIME_US (1000000)
#define WAIT_TRY_COUNT (20000)
#else
#endif
-#define SYS_DEVICE_COUNT 15
+#define SYS_DEVICE_COUNT 15 /* SGX, DISPLAYCLASS (external), BUFFERCLASS (external) */
-#endif
+#endif /* __SYSINFO_H__ */
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title Local system definitions
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description This header provides local system declarations and macros
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__SYSLOCAL_H__)
#define __SYSLOCAL_H__
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26))
#include <linux/semaphore.h>
#include <linux/resource.h>
-#else
+#else /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26)) */
#include <asm/semaphore.h>
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22))
#include <asm/arch/resource.h>
-#endif
-#endif
+#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22)) */
+#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26)) */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35))
#if !defined(LDM_PLATFORM)
#error "LDM_PLATFORM must be set"
#endif
-/*#define PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO*/
+//#define PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO
//#include <linux/platform_device.h>
#endif
#if ((defined(DEBUG) || defined(TIMING)) && \
(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))) && \
!defined(PVR_NO_OMAP_TIMER)
-#define PVR_OMAP3_TIMING_PRCM
+/*
+ * We need to explicitly enable the GPTIMER11 clocks, or we'll get an
+ * abort when we try to access the timer registers.
+ */
+#define PVR_OMAP4_TIMING_PRCM
#endif
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35))
-/*#include <plat/gpu.h>*/
+//#include <plat/gpu.h>
#if !defined(PVR_NO_OMAP_TIMER)
-/*#define PVR_OMAP_USE_DM_TIMER_API*/
+//#define PVR_OMAP_USE_DM_TIMER_API
//#include <plat/dmtimer.h>
#endif
#endif
#if !defined(PVR_NO_OMAP_TIMER)
//#define PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA
#endif
-#endif
+#endif /* defined(__linux__) */
#if !defined(NO_HARDWARE) && \
defined(SYS_USING_INTERRUPTS) && \
#endif
#if defined(__linux__)
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) && defined(SGX_OCP_REGS_ENABLED)
-/*#define SGX_OCP_NO_INT_BYPASS*/
+#if defined(SGX_OCP_REGS_ENABLED)
+/* FIXME: Temporary workaround for OMAP4470 and active power off in 4430 */
+#if !defined(SGX544) && defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
+//#define SGX_OCP_NO_INT_BYPASS
+#endif
#endif
#endif
extern "C" {
#endif
+/*****************************************************************************
+ * system specific data structures
+ *****************************************************************************/
+/*****************************************************************************
+ * system specific function prototypes
+ *****************************************************************************/
IMG_VOID DisableSystemClocks(SYS_DATA *psSysData);
PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData);
IMG_VOID DisableSGXClocks(SYS_DATA *psSysData);
PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData);
+/*
+ * Various flags to indicate what has been initialised, and what
+ * has been temporarily deinitialised for power management purposes.
+ */
#define SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS 0x00000001
#define SYS_SPECIFIC_DATA_ENABLE_LISR 0x00000002
#define SYS_SPECIFIC_DATA_ENABLE_MISR 0x00000004
#define SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS 0x00000400
#define SYS_SPECIFIC_DATA_ENABLE_OCPREGS 0x00000800
#define SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME 0x00001000
-#if defined(SGX_OCP_REGS_ENABLED) && defined(SGX_OCP_NO_INT_BYPASS)
#define SYS_SPECIFIC_DATA_IRQ_ENABLED 0x00002000
-#endif
+#define SYS_SPECIFIC_DATA_DVFS_INIT 0x00004000
#define SYS_SPECIFIC_DATA_SET(psSysSpecData, flag) ((IMG_VOID)((psSysSpecData)->ui32SysSpecificData |= (flag)))
atomic_t sNotifyLockCPU;
IMG_BOOL bCallVDD2PostFunc;
#endif
- struct clk *psCORE_CK;
- struct clk *psSGX_FCK;
+ struct clk *psCORE_CK;
+ struct clk *psSGX_FCK;
struct clk *psSGX_ICK;
#if defined(DEBUG) || defined(TIMING)
#if defined(PVR_OMAP_USE_DM_TIMER_API)
struct omap_dm_timer *psGPTimer;
#endif
-#endif
+ IMG_UINT32 ui32SGXFreqListSize;
+ IMG_UINT32 *pui32SGXFreqList;
+ IMG_UINT32 ui32SGXFreqListIndex;
+#endif /* defined(__linux__) */
} SYS_SPECIFIC_DATA;
extern SYS_SPECIFIC_DATA *gpsSysSpecificData;
PVRSRV_ERROR SysPMRuntimeRegister(void);
PVRSRV_ERROR SysPMRuntimeUnregister(void);
-#else
+PVRSRV_ERROR SysDvfsInitialize(SYS_SPECIFIC_DATA *psSysSpecificData);
+PVRSRV_ERROR SysDvfsDeinitialize(SYS_SPECIFIC_DATA *psSysSpecificData);
+
+#else /* defined(__linux__) */
#ifdef INLINE_IS_PRAGMA
#pragma inline(SysPMRuntimeRegister)
return PVRSRV_OK;
}
-#endif
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysDvfsInitialize)
+#endif
+static INLINE PVRSRV_ERROR SysDvfsInitialize(void)
+{
+ return PVRSRV_OK;
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysDvfsDeinitialize)
+#endif
+static INLINE PVRSRV_ERROR SysDvfsDeinitialize(void)
+{
+ return PVRSRV_OK;
+}
+
+#endif /* defined(__linux__) */
#if defined(__cplusplus)
}
#endif
-#endif
+#endif /* __SYSLOCAL_H__ */
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title Shared (User/kernel) and System dependent utilities
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description Provides system-specific functions
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+/* Pull in the correct system dependent sysutils source */
#if defined(__linux__)
#include "sysutils_linux.c"
#endif
+
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
-
+/*************************************************************************/ /*!
+@Title System dependent utilities
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description Provides system-specific functions
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#include <linux/version.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/hardirq.h>
#include <linux/mutex.h>
+#include <linux/slab.h>
#include "sgxdefs.h"
#include "services_headers.h"
#include "sgxinfokm.h"
#include "syslocal.h"
-//#include <linux/platform_device.h>
-//#include <linux/pm_runtime.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+#include <linux/opp.h>
+#endif
+
+#if defined(SUPPORT_DRI_DRM_PLUGIN)
+#include <drm/drmP.h>
+#include <drm/drm.h>
+
+#include <linux/omap_gpu.h>
+
+#include "pvr_drm.h"
+#endif
#define ONE_MHZ 1000000
#define HZ_TO_MHZ(m) ((m) / ONE_MHZ)
extern struct platform_device *gpsPVRLDMDev;
#endif
-
static PVRSRV_ERROR PowerLockWrap(SYS_SPECIFIC_DATA *psSysSpecData, IMG_BOOL bTryLock)
{
- if (!in_interrupt())
- {
- if (bTryLock)
- {
- int locked = mutex_trylock(&psSysSpecData->sPowerLock);
- if (locked == 0)
- {
- return PVRSRV_ERROR_RETRY;
- }
- }
- else
- {
- mutex_lock(&psSysSpecData->sPowerLock);
- }
- }
+ if (!in_interrupt())
+ {
+ if (bTryLock)
+ {
+ int locked = mutex_trylock(&psSysSpecData->sPowerLock);
+ if (locked == 0)
+ {
+ return PVRSRV_ERROR_RETRY;
+ }
+ }
+ else
+ {
+ mutex_lock(&psSysSpecData->sPowerLock);
+ }
+ }
- return PVRSRV_OK;
+ return PVRSRV_OK;
}
static IMG_VOID PowerLockUnwrap(SYS_SPECIFIC_DATA *psSysSpecData)
{
- if (!in_interrupt())
- {
- mutex_unlock(&psSysSpecData->sPowerLock);
- }
+ if (!in_interrupt())
+ {
+ mutex_unlock(&psSysSpecData->sPowerLock);
+ }
}
PVRSRV_ERROR SysPowerLockWrap(IMG_BOOL bTryLock)
{
- SYS_DATA *psSysData;
+ SYS_DATA *psSysData;
- SysAcquireData(&psSysData);
+ SysAcquireData(&psSysData);
- return PowerLockWrap(psSysData->pvSysSpecificData, bTryLock);
+ return PowerLockWrap(psSysData->pvSysSpecificData, bTryLock);
}
IMG_VOID SysPowerLockUnwrap(IMG_VOID)
{
- SYS_DATA *psSysData;
+ SYS_DATA *psSysData;
- SysAcquireData(&psSysData);
+ SysAcquireData(&psSysData);
- PowerLockUnwrap(psSysData->pvSysSpecificData);
+ PowerLockUnwrap(psSysData->pvSysSpecificData);
}
-
-
-
+/*
+ * This function should be called to unwrap the Services power lock, prior
+ * to calling any function that might sleep.
+ * This function shouldn't be called prior to calling EnableSystemClocks
+ * or DisableSystemClocks, as those functions perform their own power lock
+ * unwrapping.
+ * If the function returns IMG_TRUE, UnwrapSystemPowerChange must be
+ * called to rewrap the power lock, prior to returning to Services.
+ */
IMG_BOOL WrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData)
{
return IMG_TRUE;
{
}
-static inline IMG_UINT32 scale_by_rate(IMG_UINT32 val, IMG_UINT32 rate1, IMG_UINT32 rate2)
-{
- if (rate1 >= rate2)
- {
- return val * (rate1 / rate2);
- }
-
- return val / (rate2 / rate1);
-}
-
-static inline IMG_UINT32 scale_prop_to_SGX_clock(IMG_UINT32 val, IMG_UINT32 rate)
-{
- return scale_by_rate(val, rate, SYS_SGX_CLOCK_SPEED);
-}
-
-static inline IMG_UINT32 scale_inv_prop_to_SGX_clock(IMG_UINT32 val, IMG_UINT32 rate)
-{
- return scale_by_rate(val, SYS_SGX_CLOCK_SPEED, rate);
-}
-
+/*
+ * Return SGX timining information to caller.
+ */
IMG_VOID SysGetSGXTimingInformation(SGX_TIMING_INFORMATION *psTimingInfo)
{
- IMG_UINT32 rate;
-
- rate = SYS_SGX_CLOCK_SPEED;
#if !defined(NO_HARDWARE)
PVR_ASSERT(atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0);
#endif
- psTimingInfo->ui32CoreClockSpeed = rate;
- psTimingInfo->ui32HWRecoveryFreq = scale_prop_to_SGX_clock(SYS_SGX_HWRECOVERY_TIMEOUT_FREQ, rate);
- psTimingInfo->ui32uKernelFreq = scale_prop_to_SGX_clock(SYS_SGX_PDS_TIMER_FREQ, rate);
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ psTimingInfo->ui32CoreClockSpeed =
+ gpsSysSpecificData->pui32SGXFreqList[gpsSysSpecificData->ui32SGXFreqListIndex];
+#else /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
+#endif
+ psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
+ psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ;
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
psTimingInfo->bEnableActivePM = IMG_TRUE;
#else
psTimingInfo->bEnableActivePM = IMG_FALSE;
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
}
+/*!
+******************************************************************************
+
+ @Function EnableSGXClocks
+
+ @Description Enable SGX clocks
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
- IMG_INT res;
- long lRate,lNewRate;
-
+#if !defined(PM_RUNTIME_SUPPORT)
+ IMG_INT res;
+ long lRate,lNewRate;
+#endif
+ /* SGX clocks already enabled? */
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0)
{
return PVRSRV_OK;
}
- PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
-
- res=clk_enable(psSysSpecData->psSGX_FCK);
- if (res < 0)
- {
- PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX functional clock (%d)", res));
- return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
- }
-
- res=clk_enable(psSysSpecData->psSGX_ICK);
+#if !defined(PM_RUNTIME_SUPPORT)
+ PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
+ res=clk_enable(psSysSpecData->psSGX_FCK);
if (res < 0)
{
- PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX interface clock (%d)", res));
-
- clk_disable(psSysSpecData->psSGX_FCK);
+ PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX functional clock (%d)", res));
return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
}
- lNewRate = clk_round_rate(psSysSpecData->psSGX_FCK, SYS_SGX_CLOCK_SPEED + ONE_MHZ);
+ lNewRate = clk_round_rate(psSysSpecData->psSGX_FCK, SYS_SGX_CLOCK_SPEED + ONE_MHZ);
if (lNewRate <= 0)
{
PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't round SGX functional clock rate"));
if (res < 0)
{
PVR_DPF((PVR_DBG_WARNING, "EnableSGXClocks: Couldn't set SGX functional clock rate (%d)", res));
- return PVRSRV_ERROR_UNABLE_TO_SET_CLOCK_RATE;
+ return PVRSRV_ERROR_UNABLE_TO_SET_CLOCK_RATE;
}
}
PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: SGX Functional Clock is %dMhz", HZ_TO_MHZ(rate)));
}
#endif
-
-
-
+#endif
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
{
-
-// int res = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
-// if (res < 0)
-// {
-// PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: pm_runtime_get_sync failed (%d)", -res));
-// return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
-// }
+ struct gpu_platform_data *pdata;
+ IMG_UINT32 max_freq_index;
+ int res;
+
+ pdata = (struct gpu_platform_data *)gpsPVRLDMDev->dev.platform_data;
+ max_freq_index = psSysSpecData->ui32SGXFreqListSize - 2;
+
+ /*
+ * Request maximum frequency from DVFS layer if not already set. DVFS may
+ * report busy if early in initialization, but all other errors are
+ * considered serious. Upon any error we proceed assuming our safe frequency
+ * value to be in use as indicated by the "unknown" index.
+ */
+ if (psSysSpecData->ui32SGXFreqListIndex != max_freq_index)
+ {
+ PVR_ASSERT(pdata->device_scale != IMG_NULL);
+ res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
+ &gpsPVRLDMDev->dev,
+#endif
+ psSysSpecData->pui32SGXFreqList[max_freq_index]);
+ if (res == 0)
+ {
+ psSysSpecData->ui32SGXFreqListIndex = max_freq_index;
+ }
+ else if (res == -EBUSY)
+ {
+ PVR_DPF((PVR_DBG_WARNING, "EnableSGXClocks: Unable to scale SGX frequency (EBUSY)"));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ else if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Unable to scale SGX frequency (%d)", res));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ }
}
+#endif /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ {
+ /*
+ * pm_runtime_get_sync returns 1 after the module has
+ * been reloaded.
+ */
+#if defined(PM_RUNTIME_SUPPORT)
+
+ int res = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
+ if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: pm_runtime_get_sync failed (%d)", -res));
+ return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
+ }
#endif
-// SysEnableSGXInterrupts(psSysData);
+ }
+#endif /* defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI) */
-
+ SysEnableSGXInterrupts(psSysData);
+
+ /* Indicate that the SGX clocks are enabled */
atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
-#else
+#else /* !defined(NO_HARDWARE) */
PVR_UNREFERENCED_PARAMETER(psSysData);
-#endif
+#endif /* !defined(NO_HARDWARE) */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function DisableSGXClocks
+
+ @Description Disable SGX clocks.
+
+ @Return none
+
+******************************************************************************/
IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+ /* SGX clocks already disabled? */
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) == 0)
{
return;
}
-
- PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
-
- clk_disable(psSysSpecData->psSGX_FCK);
-
- clk_disable(psSysSpecData->psSGX_ICK);
-// SysDisableSGXInterrupts(psSysData);
+ PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
+#if !defined(PM_RUNTIME_SUPPORT)
+ clk_disable(psSysSpecData->psSGX_FCK);
+#endif
+ SysDisableSGXInterrupts(psSysData);
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
{
-// int res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
-// if (res < 0)
-// {
-// PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
-// }
+#if defined(PM_RUNTIME_SUPPORT)
+
+ int res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
+ if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
+ }
+#endif
}
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ {
+ struct gpu_platform_data *pdata;
+ int res;
+
+ pdata = (struct gpu_platform_data *)gpsPVRLDMDev->dev.platform_data;
+
+ /*
+ * Request minimum frequency (list index 0) from DVFS layer if not already
+ * set. DVFS may report busy if early in initialization, but all other errors
+ * are considered serious. Upon any error we proceed assuming our safe frequency
+ * value to be in use as indicated by the "unknown" index.
+ */
+ if (psSysSpecData->ui32SGXFreqListIndex != 0)
+ {
+ PVR_ASSERT(pdata->device_scale != IMG_NULL);
+ res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
+ &gpsPVRLDMDev->dev,
#endif
+ psSysSpecData->pui32SGXFreqList[0]);
+ if (res == 0)
+ {
+ psSysSpecData->ui32SGXFreqListIndex = 0;
+ }
+ else if (res == -EBUSY)
+ {
+ PVR_DPF((PVR_DBG_WARNING, "DisableSGXClocks: Unable to scale SGX frequency (EBUSY)"));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ else if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: Unable to scale SGX frequency (%d)", res));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ }
+ }
+#endif /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+#endif /* defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI) */
+ /* Indicate that the SGX clocks are disabled */
atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
-#else
+#else /* !defined(NO_HARDWARE) */
PVR_UNREFERENCED_PARAMETER(psSysData);
-#endif
+#endif /* !defined(NO_HARDWARE) */
}
#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
#if defined(PVR_OMAP_USE_DM_TIMER_API)
#define GPTIMER_TO_USE 11
+/*!
+******************************************************************************
+
+ @Function AcquireGPTimer
+
+ @Description Acquire a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
PVR_ASSERT(psSysSpecData->psGPTimer == NULL);
-
+ /*
+ * This code has problems on module reload for OMAP5 running Linux
+ * 3.4.10, due to omap2_dm_timer_set_src (called by
+ * omap_dm_timer_request_specific), being unable to set the parent
+ * clock to OMAP_TIMER_SRC_32_KHZ.
+ * Not calling omap_dm_timer_set_source doesn't help.
+ */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) || !defined(MODULE)
+ /*
+ * This code could try requesting registers 9, 10, and 11,
+ * stopping at the first succesful request. We'll stick with
+ * 11 for now, as it avoids having to hard code yet more
+ * physical addresses into the code.
+ */
psSysSpecData->psGPTimer = omap_dm_timer_request_specific(GPTIMER_TO_USE);
if (psSysSpecData->psGPTimer == NULL)
{
return PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
}
-
omap_dm_timer_set_source(psSysSpecData->psGPTimer, OMAP_TIMER_SRC_SYS_CLK);
omap_dm_timer_enable(psSysSpecData->psGPTimer);
-
+ /* Set autoreload, and start value of 0 */
omap_dm_timer_set_load_start(psSysSpecData->psGPTimer, 1, 0);
omap_dm_timer_start(psSysSpecData->psGPTimer);
-
- psSysSpecData->sTimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE;
+ /*
+ * The DM timer API doesn't have a mechanism for obtaining the
+ * physical address of the counter register.
+ */
+ psSysSpecData->sTimerRegPhysBase.uiAddr = SYS_OMAP3630_GP11TIMER_REGS_SYS_PHYS_BASE;
+#else /* (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0)) || !defined(MODULE) */
+ (void)psSysSpecData;
+#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0)) || !defined(MODULE) */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function ReleaseGPTimer
+
+ @Description Release a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
if (psSysSpecData->psGPTimer != NULL)
{
-
+ /* Always returns 0 */
(void) omap_dm_timer_stop(psSysSpecData->psGPTimer);
omap_dm_timer_disable(psSysSpecData->psGPTimer);
}
}
-#else
+#else /* PVR_OMAP_USE_DM_TIMER_API */
+/*!
+******************************************************************************
+
+ @Function AcquireGPTimer
+
+ @Description Acquire a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
-#if defined(PVR_OMAP3_TIMING_PRCM)
+#if defined(PVR_OMAP4_TIMING_PRCM)
struct clk *psCLK;
IMG_INT res;
struct clk *sys_ck;
PVR_ASSERT(psSysSpecData->sTimerRegPhysBase.uiAddr == 0);
#endif
-
-#if defined(PVR_OMAP3_TIMING_PRCM)
-
+#if defined(PVR_OMAP4_TIMING_PRCM)
+ /* assert our dependence on the GPTIMER11 module */
psCLK = clk_get(NULL, "gpt11_fck");
if (IS_ERR(psCLK))
{
goto ExitError;
}
psSysSpecData->psGPT11_ICK = psCLK;
-
+
sys_ck = clk_get(NULL, "sys_ck");
if (IS_ERR(sys_ck))
{
goto ExitError;
}
}
+
rate = clk_get_rate(psSysSpecData->psGPT11_FCK);
PVR_TRACE(("GPTIMER11 clock is %dMHz", HZ_TO_MHZ(rate)));
PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't enable GPTIMER11 interface clock (%d)", res));
goto ExitDisableGPT11FCK;
}
-#endif
+#endif /* defined(PVR_OMAP4_TIMING_PRCM) */
-
- sTimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_TSICR_SYS_PHYS_BASE;
+ /* Set the timer to non-posted mode */
+ sTimerRegPhysBase.uiAddr = SYS_OMAP3630_GP11TIMER_TSICR_SYS_PHYS_BASE;
pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
4,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
{
PVR_TRACE(("Setting GPTIMER11 mode to posted (currently is non-posted)"));
-
+ /* Set posted mode */
*pui32TimerEnable |= 4;
}
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
hTimerEnable);
-
- sTimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
+ /* Enable the timer */
+ sTimerRegPhysBase.uiAddr = SYS_OMAP3630_GP11TIMER_ENABLE_SYS_PHYS_BASE;
pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
4,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
goto ExitDisableGPT11ICK;
}
+ /* Enable and set autoreload on overflow */
*pui32TimerEnable = 3;
OSUnMapPhysToLin(pui32TimerEnable,
#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
psSysSpecData->sTimerRegPhysBase = sTimerRegPhysBase;
#endif
-
eError = PVRSRV_OK;
goto Exit;
ExitDisableGPT11ICK:
-#if defined(PVR_OMAP3_TIMING_PRCM)
+#if defined(PVR_OMAP4_TIMING_PRCM)
clk_disable(psSysSpecData->psGPT11_ICK);
ExitDisableGPT11FCK:
clk_disable(psSysSpecData->psGPT11_FCK);
ExitError:
-#endif
+#endif /* defined(PVR_OMAP4_TIMING_PRCM) */
eError = PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
Exit:
return eError;
}
+/*!
+******************************************************************************
+
+ @Function ReleaseGPTimer
+
+ @Description Release a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
IMG_HANDLE hTimerDisable;
return;
}
#endif
- TimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
+ /* Disable the timer */
pui32TimerDisable = OSMapPhysToLin(TimerRegPhysBase,
4,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
hTimerDisable);
}
-
#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
psSysSpecData->sTimerRegPhysBase.uiAddr = 0;
#endif
-
-#if defined(PVR_OMAP3_TIMING_PRCM)
+#if defined(PVR_OMAP4_TIMING_PRCM)
clk_disable(psSysSpecData->psGPT11_ICK);
clk_disable(psSysSpecData->psGPT11_FCK);
-#endif
+#endif /* defined(PVR_OMAP4_TIMING_PRCM) */
}
-#endif
-#else
+#endif /* PVR_OMAP_USE_DM_TIMER_API */
+#else /* (DEBUG || TIMING) && !PVR_NO_OMAP_TIMER */
static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
PVR_UNREFERENCED_PARAMETER(psSysSpecData);
+
return PVRSRV_OK;
}
static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
PVR_UNREFERENCED_PARAMETER(psSysSpecData);
}
-#endif
+#endif /* (DEBUG || TIMING) && !PVR_NO_OMAP_TIMER */
+
+/*!
+******************************************************************************
+
+ @Function EnableSystemClocks
+
+ @Description Setup up the clocks for the graphics device to work.
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
- struct clk *psCLK;
+#if !defined(PM_RUNTIME_SUPPORT)
+ struct clk *psCLK;
IMG_INT res;
+#endif
+
PVR_TRACE(("EnableSystemClocks: Enabling System Clocks"));
if (!psSysSpecData->bSysClocksOneTimeInit)
mutex_init(&psSysSpecData->sPowerLock);
atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
-
- psCLK = clk_get(NULL, SGX_PARENT_CLOCK);
+
+ psCLK = clk_get(NULL, SGX_PARENT_CLOCK);
if (IS_ERR(psCLK))
{
PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get Core Clock"));
}
psSysSpecData->psCORE_CK = psCLK;
- psCLK = clk_get(NULL, "sgx_fck");
+
+// psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
+#if !defined(PM_RUNTIME_SUPPORT)
+ psCLK = clk_get(NULL, "sgx_fck");
if (IS_ERR(psCLK))
{
PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get SGX Functional Clock"));
}
psSysSpecData->psSGX_FCK = psCLK;
- psCLK = clk_get(NULL, "sgx_ick");
+ psCLK = clk_get(NULL, "sgx_ick");
if (IS_ERR(psCLK))
{
PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get SGX Interface Clock"));
}
- psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
+ psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
+
+
+#endif
+
}
return AcquireGPTimer(psSysSpecData);
}
+/*!
+******************************************************************************
+
+ @Function DisableSystemClocks
+
+ @Description Disable the graphics clocks.
+
+ @Return none
+
+******************************************************************************/
IMG_VOID DisableSystemClocks(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+
PVR_TRACE(("DisableSystemClocks: Disabling System Clocks"));
-
+
+ /*
+ * Always disable the SGX clocks when the system clocks are disabled.
+ * This saves having to make an explicit call to DisableSGXClocks if
+ * active power management is enabled.
+ */
DisableSGXClocks(psSysData);
ReleaseGPTimer(psSysSpecData);
-
}
PVRSRV_ERROR SysPMRuntimeRegister(void)
{
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
-// pm_runtime_enable(&gpsPVRLDMDev->dev);
+#if defined(PM_RUNTIME_SUPPORT)
+ pm_runtime_enable(&gpsPVRLDMDev->dev);
+#endif
#endif
return PVRSRV_OK;
}
PVRSRV_ERROR SysPMRuntimeUnregister(void)
{
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
-// pm_runtime_disable(&gpsPVRLDMDev->dev);
+#if defined(PM_RUNTIME_SUPPORT)
+ pm_runtime_disable(&gpsPVRLDMDev->dev);
+#endif
#endif
return PVRSRV_OK;
}
+
+PVRSRV_ERROR SysDvfsInitialize(SYS_SPECIFIC_DATA *psSysSpecificData)
+{
+#if !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ PVR_UNREFERENCED_PARAMETER(psSysSpecificData);
+#else /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ IMG_UINT32 i, *freq_list;
+ IMG_INT32 opp_count;
+ unsigned long freq;
+ struct opp *opp;
+
+ /*
+ * We query and store the list of SGX frequencies just this once under the
+ * assumption that they are unchanging, e.g. no disabling of high frequency
+ * option for thermal management. This is currently valid for 4430 and 4460.
+ */
+ rcu_read_lock();
+ opp_count = opp_get_opp_count(&gpsPVRLDMDev->dev);
+ if (opp_count < 1)
+ {
+ rcu_read_unlock();
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsInitialize: Could not retrieve opp count"));
+ return PVRSRV_ERROR_NOT_SUPPORTED;
+ }
+
+ /*
+ * Allocate the frequency list with a slot for each available frequency plus
+ * one additional slot to hold a designated frequency value to assume when in
+ * an unknown frequency state.
+ */
+ freq_list = kmalloc((opp_count + 1) * sizeof(IMG_UINT32), GFP_ATOMIC);
+ if (!freq_list)
+ {
+ rcu_read_unlock();
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsInitialize: Could not allocate frequency list"));
+ return PVRSRV_ERROR_OUT_OF_MEMORY;
+ }
+
+ /*
+ * Fill in frequency list from lowest to highest then finally the "unknown"
+ * frequency value. We use the highest available frequency as our assumed value
+ * when in an unknown state, because it is safer for APM and hardware recovery
+ * timers to be longer than intended rather than shorter.
+ */
+ freq = 0;
+ for (i = 0; i < opp_count; i++)
+ {
+ opp = opp_find_freq_ceil(&gpsPVRLDMDev->dev, &freq);
+ if (IS_ERR_OR_NULL(opp))
+ {
+ rcu_read_unlock();
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsInitialize: Could not retrieve opp level %d", i));
+ kfree(freq_list);
+ return PVRSRV_ERROR_NOT_SUPPORTED;
+ }
+ freq_list[i] = (IMG_UINT32)freq;
+ freq++;
+ }
+ rcu_read_unlock();
+ freq_list[opp_count] = freq_list[opp_count - 1];
+
+ psSysSpecificData->ui32SGXFreqListSize = opp_count + 1;
+ psSysSpecificData->pui32SGXFreqList = freq_list;
+
+ /* Start in unknown state - no frequency request to DVFS yet made */
+ psSysSpecificData->ui32SGXFreqListIndex = opp_count;
+#endif /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+
+ return PVRSRV_OK;
+}
+
+PVRSRV_ERROR SysDvfsDeinitialize(SYS_SPECIFIC_DATA *psSysSpecificData)
+{
+#if !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ PVR_UNREFERENCED_PARAMETER(psSysSpecificData);
+#else /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ /*
+ * We assume this function is only called if SysDvfsInitialize() was
+ * completed successfully before.
+ *
+ * The DVFS interface does not allow us to actually unregister as a
+ * user of SGX, so we do the next best thing which is to lower our
+ * required frequency to the minimum if not already set. DVFS may
+ * report busy if early in initialization, but all other errors are
+ * considered serious.
+ */
+ if (psSysSpecificData->ui32SGXFreqListIndex != 0)
+ {
+ struct gpu_platform_data *pdata;
+ IMG_INT32 res;
+
+ pdata = (struct gpu_platform_data *)gpsPVRLDMDev->dev.platform_data;
+
+ PVR_ASSERT(pdata->device_scale != IMG_NULL);
+ res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
+ &gpsPVRLDMDev->dev,
+#endif
+ psSysSpecificData->pui32SGXFreqList[0]);
+ if (res == -EBUSY)
+ {
+ PVR_DPF((PVR_DBG_WARNING, "SysDvfsDeinitialize: Unable to scale SGX frequency (EBUSY)"));
+ }
+ else if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsDeinitialize: Unable to scale SGX frequency (%d)", res));
+ }
+
+ psSysSpecificData->ui32SGXFreqListIndex = 0;
+ }
+
+ kfree(psSysSpecificData->pui32SGXFreqList);
+ psSysSpecificData->pui32SGXFreqList = 0;
+ psSysSpecificData->ui32SGXFreqListSize = 0;
+#endif /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+
+ return PVRSRV_OK;
+}
+
+#if defined(SUPPORT_DRI_DRM_PLUGIN)
+static struct omap_gpu_plugin sOMAPGPUPlugin;
+
+#define SYS_DRM_SET_PLUGIN_FIELD(d, s, f) (d)->f = (s)->f
+int
+SysDRMRegisterPlugin(PVRSRV_DRM_PLUGIN *psDRMPlugin)
+{
+ int iRes;
+
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, name);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, open);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, load);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, unload);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, release);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, mmap);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, ioctls);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, num_ioctls);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, ioctl_start);
+
+ iRes = omap_gpu_register_plugin(&sOMAPGPUPlugin);
+ if (iRes != 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "%s: omap_gpu_register_plugin failed (%d)", __FUNCTION__, iRes));
+ }
+
+ return iRes;
+}
+
+void
+SysDRMUnregisterPlugin(PVRSRV_DRM_PLUGIN *psDRMPlugin)
+{
+ int iRes = omap_gpu_unregister_plugin(&sOMAPGPUPlugin);
+ if (iRes != 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "%s: omap_gpu_unregister_plugin failed (%d)", __FUNCTION__, iRes));
+ }
+}
+#endif
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title SGX kernel/client driver interface structures and prototypes
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__OEMFUNCS_H__)
#define __OEMFUNCS_H__
extern "C" {
#endif
+/* function in/out data structures: */
typedef IMG_UINT32 (*PFN_SRV_BRIDGEDISPATCH)( IMG_UINT32 Ioctl,
IMG_BYTE *pInBuf,
IMG_UINT32 InBufLen,
IMG_BYTE *pOutBuf,
IMG_UINT32 OutBufLen,
IMG_UINT32 *pdwBytesTransferred);
+/*
+ Function table for kernel 3rd party driver to kernel services
+*/
typedef struct PVRSRV_DC_OEM_JTABLE_TAG
{
PFN_SRV_BRIDGEDISPATCH pfnOEMBridgeDispatch;
}
#endif
-#endif
+#endif /* __OEMFUNCS_H__ */
+
+/*****************************************************************************
+ End of file (oemfuncs.h)
+*****************************************************************************/
+
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title System Configuration
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description System Configuration functions
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#include "sysconfig.h"
#include "services_headers.h"
#include "ocpdefs.h"
+/* top level system data anchor point*/
SYS_DATA* gpsSysData = (SYS_DATA*)IMG_NULL;
SYS_DATA gsSysData;
static SYS_SPECIFIC_DATA gsSysSpecificData;
SYS_SPECIFIC_DATA *gpsSysSpecificData;
-static IMG_UINT32 gui32SGXDeviceID;
-static SGX_DEVICE_MAP gsSGXDeviceMap;
-static PVRSRV_DEVICE_NODE *gpsSGXDevNode;
+/* SGX structures */
+static IMG_UINT32 gui32SGXDeviceID;
+static SGX_DEVICE_MAP gsSGXDeviceMap;
+static PVRSRV_DEVICE_NODE *gpsSGXDevNode;
-#define DEVICE_SGX_INTERRUPT (1 << 0)
#if defined(NO_HARDWARE) || defined(SGX_OCP_REGS_ENABLED)
static IMG_CPU_VIRTADDR gsSGXRegsCPUVAddr;
return eError;
}
-#else
+#else /* defined(SGX_OCP_REGS_ENABLED) */
static INLINE PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData)
{
return EnableSGXClocks(psSysData);
}
-#endif
+#endif /* defined(SGX_OCP_REGS_ENABLED) */
static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData)
{
#if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
if(eError == PVRSRV_OK)
{
-
+ /*
+ * The SGX Clocks are enabled separately if active power
+ * management is enabled.
+ */
eError = EnableSGXClocksWrap(psSysData);
if (eError != PVRSRV_OK)
{
return eError;
}
+/*!
+******************************************************************************
+
+ @Function SysLocateDevices
+
+ @Description Specifies devices in the systems memory map
+
+ @Input psSysData - sys data
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
{
#if defined(NO_HARDWARE)
PVR_UNREFERENCED_PARAMETER(psSysData);
-
+ /* SGX Device: */
gsSGXDeviceMap.ui32Flags = 0x0;
#if defined(NO_HARDWARE)
-
-
+ /*
+ * For no hardware, allocate some contiguous memory for the
+ * register block.
+ */
+
+ /* Registers */
gsSGXDeviceMap.ui32RegsSize = SYS_TI335x_SGX_REGS_SIZE;
eError = OSBaseAllocContigMemory(gsSGXDeviceMap.ui32RegsSize,
gsSGXDeviceMap.sRegsCpuPBase = sCpuPAddr;
gsSGXDeviceMap.sRegsSysPBase = SysCpuPAddrToSysPAddr(gsSGXDeviceMap.sRegsCpuPBase);
#if defined(__linux__)
-
+ /* Indicate the registers are already mapped */
gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
#else
-
+ /*
+ * FIXME: Could we just use the virtual address returned by
+ * OSBaseAllocContigMemory?
+ */
gsSGXDeviceMap.pvRegsCpuVBase = IMG_NULL;
#endif
OSMemSet(gsSGXRegsCPUVAddr, 0, gsSGXDeviceMap.ui32RegsSize);
-
-
-
+ /*
+ device interrupt IRQ
+ Note: no interrupts available on no hardware system
+ */
gsSGXDeviceMap.ui32IRQ = 0;
-#else
+#else /* defined(NO_HARDWARE) */
#if defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO)
-
+ /* get the resource and IRQ through platform resource API */
dev_res = platform_get_resource(gpsPVRLDMDev, IORESOURCE_MEM, 0);
if (dev_res == NULL)
{
SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
PVR_TRACE(("SGX register base: 0x%lx", (unsigned long)gsSGXDeviceMap.sRegsCpuPBase.uiAddr));
+#if defined(SGX544) && defined(SGX_FEATURE_MP)
+ /* FIXME: Workaround due to HWMOD change. Otherwise this region is too small. */
+ gsSGXDeviceMap.ui32RegsSize = SYS_TI335x_SGX_REGS_SIZE;
+#else
gsSGXDeviceMap.ui32RegsSize = (unsigned int)(dev_res->end - dev_res->start);
+#endif
PVR_TRACE(("SGX register size: %d",gsSGXDeviceMap.ui32RegsSize));
gsSGXDeviceMap.ui32IRQ = dev_irq;
PVR_TRACE(("SGX IRQ: %d", gsSGXDeviceMap.ui32IRQ));
-#else
+#else /* defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO) */
gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_TI335x_SGX_REGS_SYS_PHYS_BASE;
gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
gsSGXDeviceMap.ui32RegsSize = SYS_TI335x_SGX_REGS_SIZE;
gsSGXDeviceMap.ui32IRQ = SYS_TI335x_SGX_IRQ;
-#endif
+#endif /* defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO) */
#if defined(SGX_OCP_REGS_ENABLED)
gsSGXRegsCPUVAddr = OSMapPhysToLin(gsSGXDeviceMap.sRegsCpuPBase,
gsSGXDeviceMap.ui32RegsSize,
return PVRSRV_ERROR_BAD_MAPPING;
}
-
+ /* Indicate the registers are already mapped */
gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
gpvOCPRegsLinAddr = gsSGXRegsCPUVAddr;
#endif
-#endif
+#endif /* defined(NO_HARDWARE) */
#if defined(PDUMP)
{
-
+ /* initialise memory region name for pdumping */
static IMG_CHAR pszPDumpDevName[] = "SGXMEM";
gsSGXDeviceMap.pszPDumpDevName = pszPDumpDevName;
}
#endif
-
+ /* add other devices here: */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysCreateVersionString
+
+ @Description Read the version string
+
+ @Return IMG_CHAR * : Version string
+
+******************************************************************************/
static IMG_CHAR *SysCreateVersionString(void)
{
static IMG_CHAR aszVersionString[100];
+ IMG_UINT32 ui32MaxStrLen;
SYS_DATA *psSysData;
IMG_UINT32 ui32SGXRevision;
IMG_INT32 i32Count;
-#if !defined(NO_HARDWARE)
- IMG_VOID *pvRegsLinAddr;
-
- pvRegsLinAddr = OSMapPhysToLin(gsSGXDeviceMap.sRegsCpuPBase,
- SYS_TI335x_SGX_REGS_SIZE,
- PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
- IMG_NULL);
- if(!pvRegsLinAddr)
- {
- return IMG_NULL;
- }
-
- ui32SGXRevision = OSReadHWReg((IMG_PVOID)((IMG_PBYTE)pvRegsLinAddr),
- EUR_CR_CORE_REVISION);
-#else
- ui32SGXRevision = 0;
-#endif
SysAcquireData(&psSysData);
- i32Count = OSSNPrintf(aszVersionString, 100,
- "SGX revision = %u.%u.%u",
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAJOR_MASK)
- >> EUR_CR_CORE_REVISION_MAJOR_SHIFT),
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MINOR_MASK)
- >> EUR_CR_CORE_REVISION_MINOR_SHIFT),
- (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAINTENANCE_MASK)
- >> EUR_CR_CORE_REVISION_MAINTENANCE_SHIFT)
- );
-
-#if !defined(NO_HARDWARE)
- OSUnMapPhysToLin(pvRegsLinAddr,
- SYS_TI335x_SGX_REGS_SIZE,
- PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
- IMG_NULL);
-#endif
+ ui32SGXRevision = SGX_CORE_REV;
+ ui32MaxStrLen = 99;
+ i32Count = OSSNPrintf(aszVersionString, ui32MaxStrLen + 1,
+ "SGX revision = %u",
+ (IMG_UINT)(ui32SGXRevision));
if(i32Count == -1)
{
return IMG_NULL;
}
+/*!
+******************************************************************************
+
+ @Function SysInitialise
+
+ @Description Initialises kernel services at 'driver load' time
+
+ @Return PVRSRV_ERROR :
+
+******************************************************************************/
PVRSRV_ERROR SysInitialise(IMG_VOID)
{
IMG_UINT32 i;
gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT;
-
+ /* init device ID's */
for(i=0; i<SYS_DEVICE_COUNT; i++)
{
gpsSysData->sDeviceID[i].uiID = i;
}
#if !defined(SGX_DYNAMIC_TIMING_INFO)
-
+ /* Set up timing information*/
psTimingInfo = &gsSGXDeviceMap.sTimingInfo;
psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
psTimingInfo->bEnableActivePM = IMG_TRUE;
#else
psTimingInfo->bEnableActivePM = IMG_FALSE;
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ;
#endif
-
-
+ /*
+ Setup the Source Clock Divider value
+ */
gpsSysSpecificData->ui32SrcClockDiv = 3;
-
-
-
-
+ /*
+ Locate the devices within the system, specifying
+ the physical addresses of each devices components
+ (regs, mem, ports etc.)
+ */
eError = SysLocateDevices(gpsSysData);
if (eError != PVRSRV_OK)
{
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV);
-#if 0
+
eError = SysPMRuntimeRegister();
if (eError != PVRSRV_OK)
{
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME);
-#endif
-
+ eError = SysDvfsInitialize(gpsSysSpecificData);
+ if (eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to initialize DVFS"));
+ (IMG_VOID)SysDeinitialise(gpsSysData);
+ gpsSysData = IMG_NULL;
+ return eError;
+ }
+ SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_DVFS_INIT);
+ /*
+ Register devices with the system
+ This also sets up their memory maps/heaps
+ */
eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice,
DEVICE_SGX_INTERRUPT, &gui32SGXDeviceID);
if (eError != PVRSRV_OK)
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_REGDEV);
-
-
-
-
+ /*
+ Once all devices are registered, specify the backing store
+ and, if required, customise the memory heap config
+ */
psDeviceNode = gpsSysData->psDeviceNodeList;
while(psDeviceNode)
{
-
+ /* perform any OEM SOC address space customisations here */
switch(psDeviceNode->sDevId.eDeviceType)
{
case PVRSRV_DEVICE_TYPE_SGX:
DEVICE_MEMORY_INFO *psDevMemoryInfo;
DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
-
-
-
+ /*
+ specify the backing store to use for the devices MMU PT/PDs
+ - the PT/PDs are always UMA in this system
+ */
psDeviceNode->psLocalDevMemArena = IMG_NULL;
-
+ /* useful pointers */
psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo;
psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap;
-
+ /* specify the backing store for all SGX heaps */
for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++)
{
psDeviceMemoryHeap[i].ui32Attribs |= PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG;
return PVRSRV_ERROR_INIT_FAILURE;
}
-
+ /* advance to next device */
psDeviceNode = psDeviceNode->psNext;
}
gpsSysData = IMG_NULL;
return eError;
}
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
eError = PVRSRVInitialiseDevice(gui32SGXDeviceID);
if (eError != PVRSRV_OK)
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV);
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
-
+ /* SGX defaults to D3 power state */
DisableSGXClocks(gpsSysData);
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
#if !defined(PVR_NO_OMAP_TIMER)
#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
(IMG_VOID **)&gpsSysData->pvSOCTimerRegisterKM,
&gpsSysData->hSOCTimerRegisterOSMemHandle);
}
-#endif
+#endif /* !defined(PVR_NO_OMAP_TIMER) */
+
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysFinalise
+
+ @Description Final part of initialisation at 'driver load' time
+
+ @Return PVRSRV_ERROR :
+
+******************************************************************************/
PVRSRV_ERROR SysFinalise(IMG_VOID)
{
PVRSRV_ERROR eError = PVRSRV_OK;
PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to Enable SGX clocks (%d)", eError));
return eError;
}
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
eError = OSInstallMISR(gpsSysData);
if (eError != PVRSRV_OK)
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR);
#if defined(SYS_USING_INTERRUPTS)
-
+ /* install a Device ISR */
eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode);
if (eError != PVRSRV_OK)
{
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR);
-#endif
-
+#if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
+ SysEnableSGXInterrupts(gpsSysData);
+#endif
+#endif /* defined(SYS_USING_INTERRUPTS) */
#if defined(__linux__)
-
+ /* Create a human readable version string for this system */
gpsSysData->pszVersionString = SysCreateVersionString();
if (!gpsSysData->pszVersionString)
{
#endif
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
-
+ /* SGX defaults to D3 power state */
DisableSGXClocks(gpsSysData);
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
gpsSysSpecificData->bSGXInitComplete = IMG_TRUE;
}
+/*!
+******************************************************************************
+
+ @Function SysDeinitialise
+
+ @Description De-initialises kernel services at 'driver unload' time
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
{
PVRSRV_ERROR eError;
+ PVR_UNREFERENCED_PARAMETER(psSysData);
+
if(gpsSysData->pvSOCTimerRegisterKM)
{
OSUnReservePhys(gpsSysData->pvSOCTimerRegisterKM,
gpsSysData->hSOCTimerRegisterOSMemHandle);
}
+
#if defined(SYS_USING_INTERRUPTS)
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR))
{
- eError = OSUninstallDeviceLISR(psSysData);
+ eError = OSUninstallDeviceLISR(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: OSUninstallDeviceLISR failed"));
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR))
{
- eError = OSUninstallMISR(psSysData);
+ eError = OSUninstallMISR(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: OSUninstallMISR failed"));
{
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
PVR_ASSERT(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS));
-
+ /* Reenable SGX clocks whilst SGX is being deinitialised. */
eError = EnableSGXClocksWrap(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: EnableSGXClocks failed"));
return eError;
}
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
-
- eError = PVRSRVDeinitialiseDevice (gui32SGXDeviceID);
+ /* Deinitialise SGX */
+ eError = PVRSRVDeinitialiseDevice(gui32SGXDeviceID);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: failed to de-init the device"));
return eError;
}
}
-#if 0
- if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME))
+
+ /* Disable system clocks. Must happen after last access to hardware */
+ if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
{
- eError = SysPMRuntimeUnregister();
+ DisableSystemClocks(gpsSysData);
+ }
+
+ if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_DVFS_INIT))
+ {
+ eError = SysDvfsDeinitialize(gpsSysSpecificData);
if (eError != PVRSRV_OK)
{
- PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to unregister with OSPM!"));
+ PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to de-init DVFS"));
gpsSysData = IMG_NULL;
return eError;
}
}
-#endif
-
- if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
+ if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME))
{
- DisableSystemClocks(gpsSysData);
+ eError = SysPMRuntimeUnregister();
+ if (eError != PVRSRV_OK)
+ {
+ PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to unregister with OSPM!"));
+ gpsSysData = IMG_NULL;
+ return eError;
+ }
}
if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA))
if(gsSGXRegsCPUVAddr != IMG_NULL)
{
#if defined(NO_HARDWARE)
-
+ /* Free hardware resources. */
OSBaseFreeContigMemory(SYS_TI335x_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase);
#else
#if defined(SGX_OCP_REGS_ENABLED)
gpvOCPRegsLinAddr = IMG_NULL;
#endif
-#endif
+#endif /* defined(NO_HARDWARE) */
gsSGXRegsCPUVAddr = IMG_NULL;
gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
}
-#endif
+#endif /* defined(NO_HARDWARE) || defined(SGX_OCP_REGS_ENABLED) */
gpsSysSpecificData->ui32SysSpecificData = 0;
}
+/*!
+******************************************************************************
+
+ @Function SysGetDeviceMemoryMap
+
+ @Description returns a device address map for the specified device
+
+ @Input eDeviceType - device type
+ @Input ppvDeviceMap - void ptr to receive device specific info.
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysGetDeviceMemoryMap(PVRSRV_DEVICE_TYPE eDeviceType,
IMG_VOID **ppvDeviceMap)
{
{
case PVRSRV_DEVICE_TYPE_SGX:
{
-
+ /* just return a pointer to the structure */
*ppvDeviceMap = (IMG_VOID*)&gsSGXDeviceMap;
break;
}
+/*!
+******************************************************************************
+ @Function SysCpuPAddrToDevPAddr
+
+ @Description Compute a device physical address from a cpu physical
+ address. Relevant when
+
+ @Input cpu_paddr - cpu physical address.
+ @Input eDeviceType - device type required if DevPAddr
+ address spaces vary across devices
+ in the same system
+ @Return device physical address.
+
+******************************************************************************/
IMG_DEV_PHYADDR SysCpuPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType,
IMG_CPU_PHYADDR CpuPAddr)
{
PVR_UNREFERENCED_PARAMETER(eDeviceType);
-
+ /* Note: for UMA system we assume DevP == CpuP */
DevPAddr.uiAddr = CpuPAddr.uiAddr;
return DevPAddr;
}
+/*!
+******************************************************************************
+ @Function SysSysPAddrToCpuPAddr
+
+ @Description Compute a cpu physical address from a system physical
+ address.
+
+ @Input sys_paddr - system physical address.
+ @Return cpu physical address.
+
+******************************************************************************/
IMG_CPU_PHYADDR SysSysPAddrToCpuPAddr (IMG_SYS_PHYADDR sys_paddr)
{
IMG_CPU_PHYADDR cpu_paddr;
-
+ /* This would only be an inequality if the CPU's MMU did not point to
+ sys address 0, ie. multi CPU system */
cpu_paddr.uiAddr = sys_paddr.uiAddr;
return cpu_paddr;
}
+/*!
+******************************************************************************
+ @Function SysCpuPAddrToSysPAddr
+
+ @Description Compute a system physical address from a cpu physical
+ address.
+
+ @Input cpu_paddr - cpu physical address.
+ @Return device physical address.
+
+******************************************************************************/
IMG_SYS_PHYADDR SysCpuPAddrToSysPAddr (IMG_CPU_PHYADDR cpu_paddr)
{
IMG_SYS_PHYADDR sys_paddr;
-
+ /* This would only be an inequality if the CPU's MMU did not point to
+ sys address 0, ie. multi CPU system */
sys_paddr.uiAddr = cpu_paddr.uiAddr;
return sys_paddr;
}
+/*!
+******************************************************************************
+ @Function SysSysPAddrToDevPAddr
+
+ @Description Compute a device physical address from a system physical
+ address.
+
+ @Input SysPAddr - system physical address.
+ @Input eDeviceType - device type required if DevPAddr
+ address spaces vary across devices
+ in the same system
+
+ @Return Device physical address.
+
+******************************************************************************/
IMG_DEV_PHYADDR SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_SYS_PHYADDR SysPAddr)
{
IMG_DEV_PHYADDR DevPAddr;
PVR_UNREFERENCED_PARAMETER(eDeviceType);
-
+ /* Note: for UMA system we assume DevP == CpuP */
DevPAddr.uiAddr = SysPAddr.uiAddr;
return DevPAddr;
}
+/*!
+******************************************************************************
+ @Function SysDevPAddrToSysPAddr
+
+ @Description Compute a device physical address from a system physical
+ address.
+
+ @Input DevPAddr - device physical address.
+ @Input eDeviceType - device type required if DevPAddr
+ address spaces vary across devices
+ in the same system
+
+ @Return System physical address.
+
+******************************************************************************/
IMG_SYS_PHYADDR SysDevPAddrToSysPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_DEV_PHYADDR DevPAddr)
{
IMG_SYS_PHYADDR SysPAddr;
PVR_UNREFERENCED_PARAMETER(eDeviceType);
-
+ /* Note: for UMA system we assume DevP == SysP */
SysPAddr.uiAddr = DevPAddr.uiAddr;
return SysPAddr;
}
+/*****************************************************************************
+ @Function SysRegisterExternalDevice
+
+ @Description Called when a 3rd party device registers with services
+
+ @Input psDeviceNode - the new device node.
+
+ @Return IMG_VOID
+*****************************************************************************/
IMG_VOID SysRegisterExternalDevice(PVRSRV_DEVICE_NODE *psDeviceNode)
{
PVR_UNREFERENCED_PARAMETER(psDeviceNode);
}
+/*****************************************************************************
+ @Function SysRemoveExternalDevice
+
+ @Description Called when a 3rd party device unregisters from services
+
+ @Input psDeviceNode - the device node being removed.
+
+ @Return IMG_VOID
+*****************************************************************************/
IMG_VOID SysRemoveExternalDevice(PVRSRV_DEVICE_NODE *psDeviceNode)
{
PVR_UNREFERENCED_PARAMETER(psDeviceNode);
}
+/*!
+******************************************************************************
+ @Function SysGetInterruptSource
+ @Description Returns System specific information about the device(s) that
+ generated the interrupt in the system
+
+ @Input psSysData
+ @Input psDeviceNode
+
+ @Return System specific information indicating which device(s)
+ generated the interrupt
+
+******************************************************************************/
IMG_UINT32 SysGetInterruptSource(SYS_DATA *psSysData,
PVRSRV_DEVICE_NODE *psDeviceNode)
{
PVR_UNREFERENCED_PARAMETER(psSysData);
#if defined(NO_HARDWARE)
-
+ /* no interrupts in no_hw system just return all bits */
return 0xFFFFFFFF;
#else
-
+ /* Not a shared irq, so we know this is an interrupt for this device */
return psDeviceNode->ui32SOCInterruptBit;
#endif
}
+/*!
+******************************************************************************
+ @Function SysClearInterrupts
+
+ @Description Clears specified system interrupts
+
+ @Input psSysData
+ @Input ui32ClearBits
+
+ @Return IMG_VOID
+
+******************************************************************************/
IMG_VOID SysClearInterrupts(SYS_DATA* psSysData, IMG_UINT32 ui32ClearBits)
{
PVR_UNREFERENCED_PARAMETER(ui32ClearBits);
-#if defined(NO_HARDWARE)
PVR_UNREFERENCED_PARAMETER(psSysData);
-#else
+#if !defined(NO_HARDWARE)
#if defined(SGX_OCP_NO_INT_BYPASS)
OSWriteHWReg(gpvOCPRegsLinAddr, EUR_CR_OCP_IRQSTATUS_2, 0x1);
#endif
-
+ /* Flush posted writes */
OSReadHWReg(((PVRSRV_SGXDEV_INFO *)gpsSGXDevNode->pvDevice)->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR);
-#endif
+#endif /* defined(NO_HARDWARE) */
}
#if defined(SGX_OCP_NO_INT_BYPASS)
+/*!
+******************************************************************************
+ @Function SysEnableSGXInterrupts
+
+ @Description Enables SGX interrupts
+
+ @Input psSysData
+
+ @Return IMG_VOID
+
+******************************************************************************/
IMG_VOID SysEnableSGXInterrupts(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
}
}
+/*!
+******************************************************************************
+ @Function SysDisableSGXInterrupts
+
+ @Description Disables SGX interrupts
+
+ @Input psSysData
+
+ @Return IMG_VOID
+
+******************************************************************************/
IMG_VOID SysDisableSGXInterrupts(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
SYS_SPECIFIC_DATA_CLEAR(psSysSpecData, SYS_SPECIFIC_DATA_IRQ_ENABLED);
}
}
-#endif
+#endif /* defined(SGX_OCP_NO_INT_BYPASS) */
+
+/*!
+******************************************************************************
+
+ @Function SysSystemPrePowerState
+ @Description Perform system-level processing required before a power transition
+
+ @Input eNewPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysSystemPrePowerState(PVRSRV_SYS_POWER_STATE eNewPowerState)
{
PVRSRV_ERROR eError = PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysSystemPostPowerState
+
+ @Description Perform system-level processing required after a power transition
+
+ @Input eNewPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysSystemPostPowerState(PVRSRV_SYS_POWER_STATE eNewPowerState)
{
PVRSRV_ERROR eError = PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysDevicePrePowerState
+
+ @Description Perform system level processing required before a device power
+ transition
+
+ @Input ui32DeviceIndex :
+ @Input eNewPowerState :
+ @Input eCurrentPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysDevicePrePowerState(IMG_UINT32 ui32DeviceIndex,
PVRSRV_DEV_POWER_STATE eNewPowerState,
PVRSRV_DEV_POWER_STATE eCurrentPowerState)
PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePrePowerState: SGX Entering state D3"));
DisableSGXClocks(gpsSysData);
}
-#else
+#else /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
PVR_UNREFERENCED_PARAMETER(eNewPowerState );
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function SysDevicePostPowerState
+
+ @Description Perform system level processing required after a device power
+ transition
+
+ @Input ui32DeviceIndex :
+ @Input eNewPowerState :
+ @Input eCurrentPowerState :
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR SysDevicePostPowerState(IMG_UINT32 ui32DeviceIndex,
PVRSRV_DEV_POWER_STATE eNewPowerState,
PVRSRV_DEV_POWER_STATE eCurrentPowerState)
PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePostPowerState: SGX Leaving state D3"));
eError = EnableSGXClocksWrap(gpsSysData);
}
-#else
+#else /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
PVR_UNREFERENCED_PARAMETER(eCurrentPowerState);
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
return eError;
}
+#if defined(SYS_SUPPORTS_SGX_IDLE_CALLBACK)
+
+IMG_VOID SysSGXIdleTransition(IMG_BOOL bSGXIdle)
+{
+ PVR_DPF((PVR_DBG_MESSAGE, "SysSGXIdleTransition switch to %u", bSGXIdle));
+}
+
+#endif /* defined(SYS_SUPPORTS_SGX_IDLE_CALLBACK) */
+
+/*****************************************************************************
+ @Function SysOEMFunction
+
+ @Description marshalling function for custom OEM functions
+
+ @Input ui32ID - function ID
+ @Input pvIn - in data
+ @Output pvOut - out data
+ @Return PVRSRV_ERROR
+*****************************************************************************/
PVRSRV_ERROR SysOEMFunction ( IMG_UINT32 ui32ID,
IMG_VOID *pvIn,
IMG_UINT32 ulInSize,
if ((ui32ID == OEM_GET_EXT_FUNCS) &&
(ulOutSize == sizeof(PVRSRV_DC_OEM_JTABLE)))
{
-
PVRSRV_DC_OEM_JTABLE *psOEMJTable = (PVRSRV_DC_OEM_JTABLE*) pvOut;
psOEMJTable->pfnOEMBridgeDispatch = &PVRSRV_BridgeDispatchKM;
return PVRSRV_OK;
return PVRSRV_ERROR_INVALID_PARAMS;
}
+/******************************************************************************
+ End of file (sysconfig.c)
+******************************************************************************/
-/**********************************************************************
- *
- * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title System Description Header
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description This header provides system-specific declarations and macros
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__SOCCONFIG_H__)
#define __SOCCONFIG_H__
-
#define VS_PRODUCT_NAME "TI335x"
-#define SYS_SGX_CLOCK_SPEED 200000000
-#define SYS_SGX_HWRECOVERY_TIMEOUT_FREQ (100)
-#define SYS_SGX_PDS_TIMER_FREQ (1000)
+#define SYS_SGX_HWRECOVERY_TIMEOUT_FREQ (100) // 10ms (100hz)
+#define SYS_SGX_PDS_TIMER_FREQ (1000) // 1ms (1000hz)
+/* Allow the AP latency to be overridden in the build config */
#if !defined(SYS_SGX_ACTIVE_POWER_LATENCY_MS)
#define SYS_SGX_ACTIVE_POWER_LATENCY_MS (2)
#endif
#define SYS_TI335x_SGX_REGS_SYS_PHYS_BASE 0x56000000
-
#define SYS_TI335x_SGX_REGS_SIZE 0x1000000
-#define SYS_TI335x_SGX_IRQ 37
+#define SYS_TI335x_SGX_IRQ 37 /* OMAP4 IRQ's are offset by 32 */
+
+#define SYS_OMAP_DSS_REGS_SYS_PHYS_BASE 0x58000000
+#define SYS_OMAP_DSS_REGS_SIZE 0x7000
+
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_STATUS_REG 0x6028
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_ENABLE_REG 0x602c
+
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_VSYNC_ENABLE_MASK 0x10000
+#define SYS_OMAP_DSS_HDMI_INTERRUPT_VSYNC_STATUS_MASK 0x10000
+
+#define SYS_OMAP_DSS_LCD_INTERRUPT_STATUS_REG 0x1018
+#define SYS_OMAP_DSS_LCD_INTERRUPT_ENABLE_REG 0x101c
+
+#define SYS_OMAP_DSS_LCD_INTERRUPT_VSYNC_ENABLE_MASK 0x40002
+#define SYS_OMAP_DSS_LCD_INTERRUPT_VSYNC_STATUS_MASK 0x40002
+
#define SYS_TI335x_GP7TIMER_ENABLE_SYS_PHYS_BASE 0x4804A038
#define SYS_TI335x_GP7TIMER_REGS_SYS_PHYS_BASE 0x4804A03C
#define SYS_TI335x_GP7TIMER_TSICR_SYS_PHYS_BASE 0x4804A054
+
+
+/* Interrupt bits */
+#define DEVICE_SGX_INTERRUPT (1<<0)
+#define DEVICE_MSVDX_INTERRUPT (1<<1)
+#define DEVICE_DISP_INTERRUPT (1<<2)
+
+#if 0
+#if defined(__linux__)
+/*
+ * Recent OMAP4 kernels register SGX as platform device "omap_gpu".
+ * This device must be used with the Linux power management calls
+ * in sysutils_linux.c, in order for SGX to be powered on.
+ */
+#if defined(PVR_LDM_PLATFORM_PRE_REGISTERED_DEV)
+#define SYS_SGX_DEV_NAME PVR_LDM_PLATFORM_PRE_REGISTERED_DEV
+#else
+#define SYS_SGX_DEV_NAME "omap_gpu"
+#endif /* defined(PVR_LDM_PLATFORM_PRE_REGISTERED_DEV) */
+#endif /* defined(__linux__) */
+#endif
+
+/*****************************************************************************
+ * system specific data structures
+ *****************************************************************************/
-#endif
+#endif /* __SYSCONFIG_H__ */
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title System Description Header
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description This header provides system-specific declarations and macros
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__SYSINFO_H__)
#define __SYSINFO_H__
+#if defined(SGX540) && (SGX_CORE_REV == 120)
+#define SYS_SGX_CLOCK_SPEED 307200000
+#else
+#define SYS_SGX_CLOCK_SPEED 200000000
+#endif
+
+/*!< System specific poll/timeout details */
#if defined(PVR_LINUX_USING_WORKQUEUES)
+/*
+ * The workqueue based 3rd party display driver may be blocked for up
+ * to 500ms waiting for a vsync when the screen goes blank, so we
+ * need to wait longer for the hardware if a flush of the swap chain is
+ * required.
+ */
#define MAX_HW_TIME_US (1000000)
#define WAIT_TRY_COUNT (20000)
#else
#endif
-#define SYS_DEVICE_COUNT 15
+#define SYS_DEVICE_COUNT 15 /* SGX, DISPLAYCLASS (external), BUFFERCLASS (external) */
-#endif
+#endif /* __SYSINFO_H__ */
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title Local system definitions
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description This header provides local system declarations and macros
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#if !defined(__SYSLOCAL_H__)
#define __SYSLOCAL_H__
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26))
#include <linux/semaphore.h>
#include <linux/resource.h>
-#else
+#else /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26)) */
#include <asm/semaphore.h>
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22))
#include <asm/arch/resource.h>
-#endif
-#endif
+#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22)) */
+#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26)) */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35))
#if !defined(LDM_PLATFORM)
#error "LDM_PLATFORM must be set"
#endif
-/*#define PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO*/
+//#define PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO
//#include <linux/platform_device.h>
#endif
#if ((defined(DEBUG) || defined(TIMING)) && \
(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))) && \
!defined(PVR_NO_OMAP_TIMER)
-#define PVR_OMAP3_TIMING_PRCM
+/*
+ * We need to explicitly enable the GPTIMER11 clocks, or we'll get an
+ * abort when we try to access the timer registers.
+ */
+#define PVR_OMAP4_TIMING_PRCM
#endif
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35))
-/*#include <plat/gpu.h>*/
+//#include <plat/gpu.h>
#if !defined(PVR_NO_OMAP_TIMER)
-/*#define PVR_OMAP_USE_DM_TIMER_API*/
+//#define PVR_OMAP_USE_DM_TIMER_API
//#include <plat/dmtimer.h>
#endif
#endif
#if !defined(PVR_NO_OMAP_TIMER)
//#define PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA
#endif
-#endif
+#endif /* defined(__linux__) */
#if !defined(NO_HARDWARE) && \
defined(SYS_USING_INTERRUPTS) && \
#endif
#if defined(__linux__)
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) && defined(SGX_OCP_REGS_ENABLED)
-/*#define SGX_OCP_NO_INT_BYPASS*/
+#if defined(SGX_OCP_REGS_ENABLED)
+/* FIXME: Temporary workaround for OMAP4470 and active power off in 4430 */
+#if !defined(SGX544) && defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
+//#define SGX_OCP_NO_INT_BYPASS
+#endif
#endif
#endif
extern "C" {
#endif
+/*****************************************************************************
+ * system specific data structures
+ *****************************************************************************/
+/*****************************************************************************
+ * system specific function prototypes
+ *****************************************************************************/
IMG_VOID DisableSystemClocks(SYS_DATA *psSysData);
PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData);
IMG_VOID DisableSGXClocks(SYS_DATA *psSysData);
PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData);
+/*
+ * Various flags to indicate what has been initialised, and what
+ * has been temporarily deinitialised for power management purposes.
+ */
#define SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS 0x00000001
#define SYS_SPECIFIC_DATA_ENABLE_LISR 0x00000002
#define SYS_SPECIFIC_DATA_ENABLE_MISR 0x00000004
#define SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS 0x00000400
#define SYS_SPECIFIC_DATA_ENABLE_OCPREGS 0x00000800
#define SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME 0x00001000
-#if defined(SGX_OCP_REGS_ENABLED) && defined(SGX_OCP_NO_INT_BYPASS)
#define SYS_SPECIFIC_DATA_IRQ_ENABLED 0x00002000
-#endif
+#define SYS_SPECIFIC_DATA_DVFS_INIT 0x00004000
#define SYS_SPECIFIC_DATA_SET(psSysSpecData, flag) ((IMG_VOID)((psSysSpecData)->ui32SysSpecificData |= (flag)))
atomic_t sNotifyLockCPU;
IMG_BOOL bCallVDD2PostFunc;
#endif
- struct clk *psCORE_CK;
- struct clk *psSGX_FCK;
+ struct clk *psCORE_CK;
+ struct clk *psSGX_FCK;
struct clk *psSGX_ICK;
#if defined(DEBUG) || defined(TIMING)
#if defined(PVR_OMAP_USE_DM_TIMER_API)
struct omap_dm_timer *psGPTimer;
#endif
-#endif
+ IMG_UINT32 ui32SGXFreqListSize;
+ IMG_UINT32 *pui32SGXFreqList;
+ IMG_UINT32 ui32SGXFreqListIndex;
+#endif /* defined(__linux__) */
} SYS_SPECIFIC_DATA;
extern SYS_SPECIFIC_DATA *gpsSysSpecificData;
PVRSRV_ERROR SysPMRuntimeRegister(void);
PVRSRV_ERROR SysPMRuntimeUnregister(void);
-#else
+PVRSRV_ERROR SysDvfsInitialize(SYS_SPECIFIC_DATA *psSysSpecificData);
+PVRSRV_ERROR SysDvfsDeinitialize(SYS_SPECIFIC_DATA *psSysSpecificData);
+
+#else /* defined(__linux__) */
#ifdef INLINE_IS_PRAGMA
#pragma inline(SysPMRuntimeRegister)
return PVRSRV_OK;
}
-#endif
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysDvfsInitialize)
+#endif
+static INLINE PVRSRV_ERROR SysDvfsInitialize(void)
+{
+ return PVRSRV_OK;
+}
+
+#ifdef INLINE_IS_PRAGMA
+#pragma inline(SysDvfsDeinitialize)
+#endif
+static INLINE PVRSRV_ERROR SysDvfsDeinitialize(void)
+{
+ return PVRSRV_OK;
+}
+
+#endif /* defined(__linux__) */
#if defined(__cplusplus)
}
#endif
-#endif
+#endif /* __SYSLOCAL_H__ */
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
+/*************************************************************************/ /*!
+@Title Shared (User/kernel) and System dependent utilities
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description Provides system-specific functions
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+/* Pull in the correct system dependent sysutils source */
#if defined(__linux__)
#include "sysutils_linux.c"
#endif
+
-/**********************************************************************
- *
- * Copyright (C) Imagination Technologies Ltd. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful but, except
- * as otherwise stated in writing, without any warranty; without even the
- * implied warranty of merchantability or fitness for a particular purpose.
- * See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
- *
- ******************************************************************************/
-
+/*************************************************************************/ /*!
+@Title System dependent utilities
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description Provides system-specific functions
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
#include <linux/version.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/hardirq.h>
#include <linux/mutex.h>
+#include <linux/slab.h>
#include "sgxdefs.h"
#include "services_headers.h"
#include "sgxinfokm.h"
#include "syslocal.h"
-//#include <linux/platform_device.h>
-//#include <linux/pm_runtime.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+#include <linux/opp.h>
+#endif
+
+#if defined(SUPPORT_DRI_DRM_PLUGIN)
+#include <drm/drmP.h>
+#include <drm/drm.h>
+
+#include <linux/omap_gpu.h>
+
+#include "pvr_drm.h"
+#endif
#define ONE_MHZ 1000000
#define HZ_TO_MHZ(m) ((m) / ONE_MHZ)
-#if defined(SUPPORT_TI335x_SGXFCLK_96M)
+#if defined(SUPPORT_OMAP3430_SGXFCLK_96M)
#define SGX_PARENT_CLOCK "cm_96m_fck"
#else
#define SGX_PARENT_CLOCK "core_ck"
extern struct platform_device *gpsPVRLDMDev;
#endif
-
static PVRSRV_ERROR PowerLockWrap(SYS_SPECIFIC_DATA *psSysSpecData, IMG_BOOL bTryLock)
{
- if (!in_interrupt())
- {
- if (bTryLock)
- {
- int locked = mutex_trylock(&psSysSpecData->sPowerLock);
- if (locked == 0)
- {
- return PVRSRV_ERROR_RETRY;
- }
- }
- else
- {
- mutex_lock(&psSysSpecData->sPowerLock);
- }
- }
+ if (!in_interrupt())
+ {
+ if (bTryLock)
+ {
+ int locked = mutex_trylock(&psSysSpecData->sPowerLock);
+ if (locked == 0)
+ {
+ return PVRSRV_ERROR_RETRY;
+ }
+ }
+ else
+ {
+ mutex_lock(&psSysSpecData->sPowerLock);
+ }
+ }
- return PVRSRV_OK;
+ return PVRSRV_OK;
}
static IMG_VOID PowerLockUnwrap(SYS_SPECIFIC_DATA *psSysSpecData)
{
- if (!in_interrupt())
- {
- mutex_unlock(&psSysSpecData->sPowerLock);
- }
+ if (!in_interrupt())
+ {
+ mutex_unlock(&psSysSpecData->sPowerLock);
+ }
}
PVRSRV_ERROR SysPowerLockWrap(IMG_BOOL bTryLock)
{
- SYS_DATA *psSysData;
+ SYS_DATA *psSysData;
- SysAcquireData(&psSysData);
+ SysAcquireData(&psSysData);
- return PowerLockWrap(psSysData->pvSysSpecificData, bTryLock);
+ return PowerLockWrap(psSysData->pvSysSpecificData, bTryLock);
}
IMG_VOID SysPowerLockUnwrap(IMG_VOID)
{
- SYS_DATA *psSysData;
+ SYS_DATA *psSysData;
- SysAcquireData(&psSysData);
+ SysAcquireData(&psSysData);
- PowerLockUnwrap(psSysData->pvSysSpecificData);
+ PowerLockUnwrap(psSysData->pvSysSpecificData);
}
-
-
-
+/*
+ * This function should be called to unwrap the Services power lock, prior
+ * to calling any function that might sleep.
+ * This function shouldn't be called prior to calling EnableSystemClocks
+ * or DisableSystemClocks, as those functions perform their own power lock
+ * unwrapping.
+ * If the function returns IMG_TRUE, UnwrapSystemPowerChange must be
+ * called to rewrap the power lock, prior to returning to Services.
+ */
IMG_BOOL WrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData)
{
return IMG_TRUE;
{
}
-static inline IMG_UINT32 scale_by_rate(IMG_UINT32 val, IMG_UINT32 rate1, IMG_UINT32 rate2)
-{
- if (rate1 >= rate2)
- {
- return val * (rate1 / rate2);
- }
-
- return val / (rate2 / rate1);
-}
-
-static inline IMG_UINT32 scale_prop_to_SGX_clock(IMG_UINT32 val, IMG_UINT32 rate)
-{
- return scale_by_rate(val, rate, SYS_SGX_CLOCK_SPEED);
-}
-
-static inline IMG_UINT32 scale_inv_prop_to_SGX_clock(IMG_UINT32 val, IMG_UINT32 rate)
-{
- return scale_by_rate(val, SYS_SGX_CLOCK_SPEED, rate);
-}
-
+/*
+ * Return SGX timining information to caller.
+ */
IMG_VOID SysGetSGXTimingInformation(SGX_TIMING_INFORMATION *psTimingInfo)
{
- IMG_UINT32 rate;
-
- rate = SYS_SGX_CLOCK_SPEED;
#if !defined(NO_HARDWARE)
PVR_ASSERT(atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0);
#endif
- psTimingInfo->ui32CoreClockSpeed = rate;
- psTimingInfo->ui32HWRecoveryFreq = scale_prop_to_SGX_clock(SYS_SGX_HWRECOVERY_TIMEOUT_FREQ, rate);
- psTimingInfo->ui32uKernelFreq = scale_prop_to_SGX_clock(SYS_SGX_PDS_TIMER_FREQ, rate);
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ psTimingInfo->ui32CoreClockSpeed =
+ gpsSysSpecificData->pui32SGXFreqList[gpsSysSpecificData->ui32SGXFreqListIndex];
+#else /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
+#endif
+ psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
+ psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ;
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
psTimingInfo->bEnableActivePM = IMG_TRUE;
#else
psTimingInfo->bEnableActivePM = IMG_FALSE;
-#endif
+#endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */
psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
}
+/*!
+******************************************************************************
+
+ @Function EnableSGXClocks
+
+ @Description Enable SGX clocks
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
- IMG_INT res;
- long lRate,lNewRate;
-
+#if !defined(PM_RUNTIME_SUPPORT)
+ IMG_INT res;
+ long lRate,lNewRate;
+#endif
+
+ /* SGX clocks already enabled? */
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0)
{
return PVRSRV_OK;
}
PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
-
- res=clk_enable(psSysSpecData->psSGX_FCK);
- if (res < 0)
+#if !defined(PM_RUNTIME_SUPPORT)
+ PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
+ res=clk_enable(psSysSpecData->psSGX_FCK);
+ if (res < 0)
{
PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX functional clock (%d)", res));
return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
}
-
- lNewRate = clk_round_rate(psSysSpecData->psSGX_FCK, SYS_SGX_CLOCK_SPEED + ONE_MHZ);
+
+ lNewRate = clk_round_rate(psSysSpecData->psSGX_FCK, SYS_SGX_CLOCK_SPEED + ONE_MHZ);
if (lNewRate <= 0)
{
PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't round SGX functional clock rate"));
if (res < 0)
{
PVR_DPF((PVR_DBG_WARNING, "EnableSGXClocks: Couldn't set SGX functional clock rate (%d)", res));
- return PVRSRV_ERROR_UNABLE_TO_SET_CLOCK_RATE;
+ return PVRSRV_ERROR_UNABLE_TO_SET_CLOCK_RATE;
}
}
PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: SGX Functional Clock is %dMhz", HZ_TO_MHZ(rate)));
}
#endif
-
-
-
+#endif
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
{
-
-// int res = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
-// if (res < 0)
-// {
-// PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: pm_runtime_get_sync failed (%d)", -res));
-// return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
-// }
+ struct gpu_platform_data *pdata;
+ IMG_UINT32 max_freq_index;
+ int res;
+
+ pdata = (struct gpu_platform_data *)gpsPVRLDMDev->dev.platform_data;
+ max_freq_index = psSysSpecData->ui32SGXFreqListSize - 2;
+
+ /*
+ * Request maximum frequency from DVFS layer if not already set. DVFS may
+ * report busy if early in initialization, but all other errors are
+ * considered serious. Upon any error we proceed assuming our safe frequency
+ * value to be in use as indicated by the "unknown" index.
+ */
+ if (psSysSpecData->ui32SGXFreqListIndex != max_freq_index)
+ {
+ PVR_ASSERT(pdata->device_scale != IMG_NULL);
+ res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
+ &gpsPVRLDMDev->dev,
+#endif
+ psSysSpecData->pui32SGXFreqList[max_freq_index]);
+ if (res == 0)
+ {
+ psSysSpecData->ui32SGXFreqListIndex = max_freq_index;
+ }
+ else if (res == -EBUSY)
+ {
+ PVR_DPF((PVR_DBG_WARNING, "EnableSGXClocks: Unable to scale SGX frequency (EBUSY)"));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ else if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Unable to scale SGX frequency (%d)", res));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ }
}
+#endif /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ {
+ /*
+ * pm_runtime_get_sync returns 1 after the module has
+ * been reloaded.
+ */
+#if defined(PM_RUNTIME_SUPPORT)
+
+ int res = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
+ if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: pm_runtime_get_sync failed (%d)", -res));
+ return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
+ }
#endif
-// SysEnableSGXInterrupts(psSysData);
+ }
+#endif /* defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI) */
-
+ SysEnableSGXInterrupts(psSysData);
+
+ /* Indicate that the SGX clocks are enabled */
atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
-#else
+#else /* !defined(NO_HARDWARE) */
PVR_UNREFERENCED_PARAMETER(psSysData);
-#endif
+#endif /* !defined(NO_HARDWARE) */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function DisableSGXClocks
+
+ @Description Disable SGX clocks.
+
+ @Return none
+
+******************************************************************************/
IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+ /* SGX clocks already disabled? */
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) == 0)
{
return;
}
-
- PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
-
- clk_disable(psSysSpecData->psSGX_FCK);
-
- clk_disable(psSysSpecData->psSGX_ICK);
-// SysDisableSGXInterrupts(psSysData);
+ PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
+#if !defined(PM_RUNTIME_SUPPORT)
+ clk_disable(psSysSpecData->psSGX_FCK);
+#endif
+ SysDisableSGXInterrupts(psSysData);
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
{
-// int res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
-// if (res < 0)
-// {
-// PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
-// }
+#if defined(PM_RUNTIME_SUPPORT)
+
+ int res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
+ if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
+ }
+#endif
}
+#if defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ {
+ struct gpu_platform_data *pdata;
+ int res;
+
+ pdata = (struct gpu_platform_data *)gpsPVRLDMDev->dev.platform_data;
+
+ /*
+ * Request minimum frequency (list index 0) from DVFS layer if not already
+ * set. DVFS may report busy if early in initialization, but all other errors
+ * are considered serious. Upon any error we proceed assuming our safe frequency
+ * value to be in use as indicated by the "unknown" index.
+ */
+ if (psSysSpecData->ui32SGXFreqListIndex != 0)
+ {
+ PVR_ASSERT(pdata->device_scale != IMG_NULL);
+ res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
+ &gpsPVRLDMDev->dev,
#endif
+ psSysSpecData->pui32SGXFreqList[0]);
+ if (res == 0)
+ {
+ psSysSpecData->ui32SGXFreqListIndex = 0;
+ }
+ else if (res == -EBUSY)
+ {
+ PVR_DPF((PVR_DBG_WARNING, "DisableSGXClocks: Unable to scale SGX frequency (EBUSY)"));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ else if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: Unable to scale SGX frequency (%d)", res));
+ psSysSpecData->ui32SGXFreqListIndex = psSysSpecData->ui32SGXFreqListSize - 1;
+ }
+ }
+ }
+#endif /* defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+#endif /* defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI) */
+ /* Indicate that the SGX clocks are disabled */
atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
-#else
+#else /* !defined(NO_HARDWARE) */
PVR_UNREFERENCED_PARAMETER(psSysData);
-#endif
+#endif /* !defined(NO_HARDWARE) */
}
#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
#if defined(PVR_OMAP_USE_DM_TIMER_API)
#define GPTIMER_TO_USE 11
+/*!
+******************************************************************************
+
+ @Function AcquireGPTimer
+
+ @Description Acquire a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
PVR_ASSERT(psSysSpecData->psGPTimer == NULL);
-
+ /*
+ * This code has problems on module reload for OMAP5 running Linux
+ * 3.4.10, due to omap2_dm_timer_set_src (called by
+ * omap_dm_timer_request_specific), being unable to set the parent
+ * clock to OMAP_TIMER_SRC_32_KHZ.
+ * Not calling omap_dm_timer_set_source doesn't help.
+ */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) || !defined(MODULE)
+ /*
+ * This code could try requesting registers 9, 10, and 11,
+ * stopping at the first succesful request. We'll stick with
+ * 11 for now, as it avoids having to hard code yet more
+ * physical addresses into the code.
+ */
psSysSpecData->psGPTimer = omap_dm_timer_request_specific(GPTIMER_TO_USE);
if (psSysSpecData->psGPTimer == NULL)
{
return PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
}
-
omap_dm_timer_set_source(psSysSpecData->psGPTimer, OMAP_TIMER_SRC_SYS_CLK);
omap_dm_timer_enable(psSysSpecData->psGPTimer);
-
+ /* Set autoreload, and start value of 0 */
omap_dm_timer_set_load_start(psSysSpecData->psGPTimer, 1, 0);
omap_dm_timer_start(psSysSpecData->psGPTimer);
-
+ /*
+ * The DM timer API doesn't have a mechanism for obtaining the
+ * physical address of the counter register.
+ */
psSysSpecData->sTimerRegPhysBase.uiAddr = SYS_TI335x_GP7TIMER_REGS_SYS_PHYS_BASE;
+#else /* (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0)) || !defined(MODULE) */
+ (void)psSysSpecData;
+#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0)) || !defined(MODULE) */
return PVRSRV_OK;
}
+/*!
+******************************************************************************
+
+ @Function ReleaseGPTimer
+
+ @Description Release a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
if (psSysSpecData->psGPTimer != NULL)
{
-
+ /* Always returns 0 */
(void) omap_dm_timer_stop(psSysSpecData->psGPTimer);
omap_dm_timer_disable(psSysSpecData->psGPTimer);
omap_dm_timer_free(psSysSpecData->psGPTimer);
-
+#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
psSysSpecData->sTimerRegPhysBase.uiAddr = 0;
+#endif
psSysSpecData->psGPTimer = NULL;
}
}
-#else
+#else /* PVR_OMAP_USE_DM_TIMER_API */
+/*!
+******************************************************************************
+
+ @Function AcquireGPTimer
+
+ @Description Acquire a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
-#if defined(PVR_OMAP3_TIMING_PRCM)
+#if defined(PVR_OMAP4_TIMING_PRCM)
struct clk *psCLK;
IMG_INT res;
struct clk *sys_ck;
PVR_ASSERT(psSysSpecData->sTimerRegPhysBase.uiAddr == 0);
#endif
-
-#if defined(PVR_OMAP3_TIMING_PRCM)
-
+#if defined(PVR_OMAP4_TIMING_PRCM)
+ /* assert our dependence on the GPTIMER11 module */
psCLK = clk_get(NULL, "gpt7_fck");
if (IS_ERR(psCLK))
{
goto ExitError;
}
psSysSpecData->psGPT11_ICK = psCLK;
+#if 0
+ sys_ck = clk_get(NULL, "sys_clkin_ck");
+ if (IS_ERR(sys_ck))
+ {
+ PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get System clock"));
+ goto ExitError;
+ }
+ if(clk_get_parent(psSysSpecData->psGPT11_FCK) != sys_ck)
+ {
+ PVR_TRACE(("Setting GPTIMER11 parent to System Clock"));
+ res = clk_set_parent(psSysSpecData->psGPT11_FCK, sys_ck);
+ if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't set GPTIMER11 parent clock (%d)", res));
+ goto ExitError;
+ }
+ }
+#endif
rate = clk_get_rate(psSysSpecData->psGPT11_FCK);
PVR_TRACE(("GPTIMER11 clock is %dMHz", HZ_TO_MHZ(rate)));
PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't enable GPTIMER11 interface clock (%d)", res));
goto ExitDisableGPT11FCK;
}
-#endif
+#endif /* defined(PVR_OMAP4_TIMING_PRCM) */
-
+ /* Set the timer to non-posted mode */
sTimerRegPhysBase.uiAddr = SYS_TI335x_GP7TIMER_TSICR_SYS_PHYS_BASE;
pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
4,
{
PVR_TRACE(("Setting GPTIMER11 mode to posted (currently is non-posted)"));
-
+ /* Set posted mode */
*pui32TimerEnable |= 4;
}
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
hTimerEnable);
-
+ /* Enable the timer */
sTimerRegPhysBase.uiAddr = SYS_TI335x_GP7TIMER_ENABLE_SYS_PHYS_BASE;
pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
4,
goto ExitDisableGPT11ICK;
}
+ /* Enable and set autoreload on overflow */
*pui32TimerEnable = 3;
OSUnMapPhysToLin(pui32TimerEnable,
4,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
hTimerEnable);
+
#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
psSysSpecData->sTimerRegPhysBase = sTimerRegPhysBase;
#endif
-
eError = PVRSRV_OK;
goto Exit;
ExitDisableGPT11ICK:
-#if defined(PVR_OMAP3_TIMING_PRCM)
+#if defined(PVR_OMAP4_TIMING_PRCM)
clk_disable(psSysSpecData->psGPT11_ICK);
ExitDisableGPT11FCK:
clk_disable(psSysSpecData->psGPT11_FCK);
ExitError:
-#endif
+#endif /* defined(PVR_OMAP4_TIMING_PRCM) */
eError = PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
Exit:
return eError;
}
+/*!
+******************************************************************************
+
+ @Function ReleaseGPTimer
+
+ @Description Release a GP timer
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
IMG_HANDLE hTimerDisable;
return;
}
#endif
- TimerRegPhysBase.uiAddr = SYS_TI335x_GP7TIMER_ENABLE_SYS_PHYS_BASE;
+ /* Disable the timer */
pui32TimerDisable = OSMapPhysToLin(TimerRegPhysBase,
4,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
hTimerDisable);
}
-
#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
psSysSpecData->sTimerRegPhysBase.uiAddr = 0;
#endif
-
-#if defined(PVR_OMAP3_TIMING_PRCM)
+#if defined(PVR_OMAP4_TIMING_PRCM)
clk_disable(psSysSpecData->psGPT11_ICK);
clk_disable(psSysSpecData->psGPT11_FCK);
-#endif
+#endif /* defined(PVR_OMAP4_TIMING_PRCM) */
}
-#endif
-#else
+#endif /* PVR_OMAP_USE_DM_TIMER_API */
+#else /* (DEBUG || TIMING) && !PVR_NO_OMAP_TIMER */
static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
PVR_UNREFERENCED_PARAMETER(psSysSpecData);
+
return PVRSRV_OK;
}
static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
{
PVR_UNREFERENCED_PARAMETER(psSysSpecData);
}
-#endif
+#endif /* (DEBUG || TIMING) && !PVR_NO_OMAP_TIMER */
+/*!
+******************************************************************************
+
+ @Function EnableSystemClocks
+
+ @Description Setup up the clocks for the graphics device to work.
+
+ @Return PVRSRV_ERROR
+
+******************************************************************************/
PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
- struct clk *psCLK;
+#if !defined(PM_RUNTIME_SUPPORT)
+ struct clk *psCLK;
+#endif
+
PVR_TRACE(("EnableSystemClocks: Enabling System Clocks"));
if (!psSysSpecData->bSysClocksOneTimeInit)
atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
-
- psCLK = clk_get(NULL, "sgx_ck");
+ psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
+#if !defined(PM_RUNTIME_SUPPORT)
+ psCLK = clk_get(NULL, "sgx_ck");
if (IS_ERR(psCLK))
{
PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get SGX Functional Clock"));
return PVRSRV_ERROR_UNABLE_TO_GET_CLOCK;
}
psSysSpecData->psSGX_FCK = psCLK;
+#endif
}
return AcquireGPTimer(psSysSpecData);
}
+/*!
+******************************************************************************
+
+ @Function DisableSystemClocks
+
+ @Description Disable the graphics clocks.
+
+ @Return none
+
+******************************************************************************/
IMG_VOID DisableSystemClocks(SYS_DATA *psSysData)
{
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+
PVR_TRACE(("DisableSystemClocks: Disabling System Clocks"));
-
+
+ /*
+ * Always disable the SGX clocks when the system clocks are disabled.
+ * This saves having to make an explicit call to DisableSGXClocks if
+ * active power management is enabled.
+ */
DisableSGXClocks(psSysData);
ReleaseGPTimer(psSysSpecData);
-
}
PVRSRV_ERROR SysPMRuntimeRegister(void)
{
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
-// pm_runtime_enable(&gpsPVRLDMDev->dev);
+#if defined(PM_RUNTIME_SUPPORT)
+ pm_runtime_enable(&gpsPVRLDMDev->dev);
+#endif
#endif
return PVRSRV_OK;
}
PVRSRV_ERROR SysPMRuntimeUnregister(void)
{
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
-// pm_runtime_disable(&gpsPVRLDMDev->dev);
+#if defined(PM_RUNTIME_SUPPORT)
+ pm_runtime_disable(&gpsPVRLDMDev->dev);
#endif
+#endif
+ return PVRSRV_OK;
+}
+
+PVRSRV_ERROR SysDvfsInitialize(SYS_SPECIFIC_DATA *psSysSpecificData)
+{
+#if !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ PVR_UNREFERENCED_PARAMETER(psSysSpecificData);
+#else /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ IMG_UINT32 i, *freq_list;
+ IMG_INT32 opp_count;
+ unsigned long freq;
+ struct opp *opp;
+
+ /*
+ * We query and store the list of SGX frequencies just this once under the
+ * assumption that they are unchanging, e.g. no disabling of high frequency
+ * option for thermal management. This is currently valid for 4430 and 4460.
+ */
+ rcu_read_lock();
+ opp_count = opp_get_opp_count(&gpsPVRLDMDev->dev);
+ if (opp_count < 1)
+ {
+ rcu_read_unlock();
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsInitialize: Could not retrieve opp count"));
+ return PVRSRV_ERROR_NOT_SUPPORTED;
+ }
+
+ /*
+ * Allocate the frequency list with a slot for each available frequency plus
+ * one additional slot to hold a designated frequency value to assume when in
+ * an unknown frequency state.
+ */
+ freq_list = kmalloc((opp_count + 1) * sizeof(IMG_UINT32), GFP_ATOMIC);
+ if (!freq_list)
+ {
+ rcu_read_unlock();
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsInitialize: Could not allocate frequency list"));
+ return PVRSRV_ERROR_OUT_OF_MEMORY;
+ }
+
+ /*
+ * Fill in frequency list from lowest to highest then finally the "unknown"
+ * frequency value. We use the highest available frequency as our assumed value
+ * when in an unknown state, because it is safer for APM and hardware recovery
+ * timers to be longer than intended rather than shorter.
+ */
+ freq = 0;
+ for (i = 0; i < opp_count; i++)
+ {
+ opp = opp_find_freq_ceil(&gpsPVRLDMDev->dev, &freq);
+ if (IS_ERR_OR_NULL(opp))
+ {
+ rcu_read_unlock();
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsInitialize: Could not retrieve opp level %d", i));
+ kfree(freq_list);
+ return PVRSRV_ERROR_NOT_SUPPORTED;
+ }
+ freq_list[i] = (IMG_UINT32)freq;
+ freq++;
+ }
+ rcu_read_unlock();
+ freq_list[opp_count] = freq_list[opp_count - 1];
+
+ psSysSpecificData->ui32SGXFreqListSize = opp_count + 1;
+ psSysSpecificData->pui32SGXFreqList = freq_list;
+
+ /* Start in unknown state - no frequency request to DVFS yet made */
+ psSysSpecificData->ui32SGXFreqListIndex = opp_count;
+#endif /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+
return PVRSRV_OK;
}
+
+PVRSRV_ERROR SysDvfsDeinitialize(SYS_SPECIFIC_DATA *psSysSpecificData)
+{
+#if !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK)
+ PVR_UNREFERENCED_PARAMETER(psSysSpecificData);
+#else /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+ /*
+ * We assume this function is only called if SysDvfsInitialize() was
+ * completed successfully before.
+ *
+ * The DVFS interface does not allow us to actually unregister as a
+ * user of SGX, so we do the next best thing which is to lower our
+ * required frequency to the minimum if not already set. DVFS may
+ * report busy if early in initialization, but all other errors are
+ * considered serious.
+ */
+ if (psSysSpecificData->ui32SGXFreqListIndex != 0)
+ {
+ struct gpu_platform_data *pdata;
+ IMG_INT32 res;
+
+ pdata = (struct gpu_platform_data *)gpsPVRLDMDev->dev.platform_data;
+
+ PVR_ASSERT(pdata->device_scale != IMG_NULL);
+ res = pdata->device_scale(&gpsPVRLDMDev->dev,
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,4,0))
+ &gpsPVRLDMDev->dev,
+#endif
+ psSysSpecificData->pui32SGXFreqList[0]);
+ if (res == -EBUSY)
+ {
+ PVR_DPF((PVR_DBG_WARNING, "SysDvfsDeinitialize: Unable to scale SGX frequency (EBUSY)"));
+ }
+ else if (res < 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "SysDvfsDeinitialize: Unable to scale SGX frequency (%d)", res));
+ }
+
+ psSysSpecificData->ui32SGXFreqListIndex = 0;
+ }
+
+ kfree(psSysSpecificData->pui32SGXFreqList);
+ psSysSpecificData->pui32SGXFreqList = 0;
+ psSysSpecificData->ui32SGXFreqListSize = 0;
+#endif /* !defined(SYS_OMAP_HAS_DVFS_FRAMEWORK) */
+
+ return PVRSRV_OK;
+}
+
+#if defined(SUPPORT_DRI_DRM_PLUGIN)
+static struct omap_gpu_plugin sOMAPGPUPlugin;
+
+#define SYS_DRM_SET_PLUGIN_FIELD(d, s, f) (d)->f = (s)->f
+int
+SysDRMRegisterPlugin(PVRSRV_DRM_PLUGIN *psDRMPlugin)
+{
+ int iRes;
+
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, name);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, open);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, load);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, unload);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, release);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, mmap);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, ioctls);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, num_ioctls);
+ SYS_DRM_SET_PLUGIN_FIELD(&sOMAPGPUPlugin, psDRMPlugin, ioctl_start);
+
+ iRes = omap_gpu_register_plugin(&sOMAPGPUPlugin);
+ if (iRes != 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "%s: omap_gpu_register_plugin failed (%d)", __FUNCTION__, iRes));
+ }
+
+ return iRes;
+}
+
+void
+SysDRMUnregisterPlugin(PVRSRV_DRM_PLUGIN *psDRMPlugin)
+{
+ int iRes = omap_gpu_unregister_plugin(&sOMAPGPUPlugin);
+ if (iRes != 0)
+ {
+ PVR_DPF((PVR_DBG_ERROR, "%s: omap_gpu_unregister_plugin failed (%d)", __FUNCTION__, iRes));
+ }
+}
+#endif
#define VS_PRODUCT_NAME "TI81xx"
-//#define SYS_SGX_CLOCK_SPEED 200000000
+#define SYS_SGX_CLOCK_SPEED 200000000
#define SYS_387x_SGX_CLOCK_SPEED 200000000
/* Allowed SGX Clock Speeds on Netra
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
IMG_INT res;
- long lRate,lNewRate;
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0)
{
#if defined(PVR_OMAP3_TIMING_PRCM)
struct clk *psCLK;
IMG_INT res;
- struct clk *sys_ck;
IMG_INT rate;
#endif
PVRSRV_ERROR eError;
*/
if ((psStream->psCtrl->ui32OutMode & DEBUG_OUTMODE_STREAMENABLE) == 0)
{
- PVR_DPF((PVR_DBG_ERROR, "WriteExpandingBuffer: buffer %x is disabled", (IMG_UINTPTR_T) psStream));
+ PVR_DPF((PVR_DBG_ERROR, "WriteExpandingBuffer: buffer %p is disabled", psStream));
return(0);
}
*/
if (ui32Space < 32)
{
- PVR_DPF((PVR_DBG_ERROR, "WriteExpandingBuffer: buffer %x is full and isn't expandable", (IMG_UINTPTR_T) psStream));
+ PVR_DPF((PVR_DBG_ERROR, "WriteExpandingBuffer: buffer %p is full and isn't expandable", psStream));
return(0);
}
}
else
{
/* out of memory */
- PVR_DPF((PVR_DBG_ERROR, "WriteExpandingBuffer: Unable to expand %x. Out of memory.", (IMG_UINTPTR_T) psStream));
+ PVR_DPF((PVR_DBG_ERROR, "WriteExpandingBuffer: Unable to expand %p. Out of memory.", psStream));
InvalidateAllStreams();
return (0xFFFFFFFFUL);
}
*/
if ((psStream->psCtrl->ui32OutMode & DEBUG_OUTMODE_STREAMENABLE) == 0)
{
- PVR_DPF((PVR_DBG_ERROR, "DBGDrivWrite: buffer %x is disabled", (IMG_UINTPTR_T) psStream));
+ PVR_DPF((PVR_DBG_ERROR, "DBGDrivWrite: buffer %p is disabled", psStream));
return(0);
}
if (ui32Space < 8)
{
- PVR_DPF((PVR_DBG_ERROR, "DBGDrivWrite: buffer %x is full", (IMG_UINTPTR_T) psStream));
+ PVR_DPF((PVR_DBG_ERROR, "DBGDrivWrite: buffer %p is full", psStream));
return(0);
}
*/
if (!StreamValidForRead(psMainStream))
{
- PVR_DPF((PVR_DBG_ERROR, "DBGDrivRead: buffer %x is invalid", (IMG_UINTPTR_T) psMainStream));
+ PVR_DPF((PVR_DBG_ERROR, "DBGDrivRead: buffer %p is invalid", psMainStream));
return(0);
}
#define MAX_PROCESSES 2
#define BLOCK_USED 0x01
#define BLOCK_LOCKED 0x02
-#define DBGDRIV_MONOBASE 0x000B0000
+#define DBGDRIV_MONOBASE 0x000B0000UL
extern IMG_VOID * g_pvAPIMutex;
git.openpandora.org / sgx.git / commitdiff