ARM: OMAP: Change __REG access to omap/read write for traffic controller
authorTony Lindgren <tony@atomide.com>
Fri, 16 May 2008 18:45:41 +0000 (11:45 -0700)
committerTony Lindgren <tony@atomide.com>
Fri, 30 May 2008 21:27:19 +0000 (14:27 -0700)
Change __REG access to omap/read write for traffic controller

Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap1/board-osk.c
drivers/mtd/maps/omap_nor.c
drivers/pcmcia/omap_cf.c
include/asm-arm/arch-omap/tc.h

index f2c47b9..845c663 100644 (file)
@@ -267,13 +267,17 @@ static struct i2c_board_info __initdata osk_i2c_board_info[] = {
 
 static void __init osk_init_smc91x(void)
 {
+       u32 l;
+
        if ((gpio_request(0, "smc_irq")) < 0) {
                printk("Error requesting gpio 0 for smc91x irq\n");
                return;
        }
 
        /* Check EMIFS wait states to fix errors with SMC_GET_PKT_HDR */
-       EMIFS_CCS(1) |= 0x3;
+       l = omap_readl(EMIFS_CCS(1));
+       l |= 0x3;
+       omap_writel(l, EMIFS_CCS(1));
 }
 
 static void __init osk_init_cf(void)
@@ -533,8 +537,9 @@ static void __init osk_init(void)
         * wrong CS3 memory timings. This mainly leads to CRC
         * or similar errors if you use NOR flash (e.g. with JFFS2)
         */
-       if (EMIFS_CCS(3) != EMIFS_CS3_VAL)
-               EMIFS_CCS(3) = EMIFS_CS3_VAL;
+       l = omap_readl(EMIFS_CCS(3));
+       if (l != EMIFS_CS3_VAL)
+               omap_writel(EMIFS_CS3_VAL, EMIFS_CCS(3));
 
        osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys();
        osk_flash_resource.end += SZ_32M - 1;
Simple merge
Simple merge
Simple merge