ARM: dts: exynos5420: add input clocks to audss clock controller
authorAndrew Bresticker <abrestic@chromium.org>
Wed, 25 Sep 2013 21:12:52 +0000 (14:12 -0700)
committerTomasz Figa <t.figa@samsung.com>
Wed, 8 Jan 2014 17:02:43 +0000 (18:02 +0100)
Specify the remaining input clocks (pll_ref, pll_in, and sclk_pcm_in)
for the AudioSS clock controller.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>

No differences found