ASoC: add xtensa xtfpga I2S interface and platform
authorMax Filippov <jcmvbkbc@gmail.com>
Fri, 26 Dec 2014 17:19:38 +0000 (20:19 +0300)
committerMark Brown <broonie@kernel.org>
Thu, 8 Jan 2015 19:52:11 +0000 (19:52 +0000)
XTFPGA boards provides an audio subsystem that consists of TI CDCE706
clock synthesizer, I2S transmitter and TLV320AIC23 audio codec.

I2S transmitter has MMIO-based interface that resembles that of the
OpenCores I2S transmitter. I2S transmitter is always a master on I2S
bus. There's no specialized audio DMA, sample data are transferred to
I2S transmitter FIFO by CPU through memory-mapped queue interface.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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