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ARM: Add Tauros2 L2 cache controller support
authorLennert Buytenhek <buytenh@marvell.com>
Tue, 24 Nov 2009 17:33:52 +0000 (19:33 +0200)
committerNicolas Pitre <nico@fluxnic.net>
Fri, 27 Nov 2009 20:43:21 +0000 (15:43 -0500)
Support for the Tauros2 L2 cache controller as used with the PJ1
and PJ4 CPUs.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>

No differences found
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