drm/i915: fix tiling on IGDNG
authorZhenyu Wang <zhenyuw@linux.intel.com>
Wed, 2 Sep 2009 02:57:52 +0000 (10:57 +0800)
committerEric Anholt <eric@anholt.net>
Fri, 4 Sep 2009 20:05:44 +0000 (13:05 -0700)
It seems that on IGDNG the same swizzling setup always applys.
And front buffer tiling needs to set address swizzle in display
arb control too.

Fix plane tricle feed setting in v1 which should be disable bit,
and always setup address swizzle to let hardware care for buffer
tiling in all cases.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

No differences found