drm/i915/skl: Determine enabled PLL and its linkrate/pixel clock
authorSatheeshakrishna M <satheeshakrishna.m@intel.com>
Thu, 13 Nov 2014 14:55:16 +0000 (14:55 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 14 Nov 2014 10:18:13 +0000 (11:18 +0100)
v2: Fixup compilation due to the removal of the intel_ddi_dpll_id enum.
And add a fixme about the abuse of pipe_config here.

v3: Rebase on top of the hsw_ddi_clock_get() rename (Damien)

v4: Modified as per review comments from Paulo

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v1)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> (v3)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v2)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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