--- /dev/null
+From: Mans Rullgard <mans@mansr.com>
+Date: Sat, 5 Jul 2008 20:31:56 +0000 (+0100)
+Subject: omapfb: fix video timings message
+X-Git-Tag: beagle-5~3
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=2929b75035ebe8702ba2ff2c81b654c487701f64
+
+omapfb: fix video timings message
+---
+
+diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
+index 418ed9f..1166a01 100644
+--- a/drivers/video/omap/omapfb_main.c
++++ b/drivers/video/omap/omapfb_main.c
+@@ -1789,7 +1789,8 @@ static int omapfb_do_probe(struct platform_device *pdev,
+ vram, fbdev->mem_desc.region_cnt);
+ pr_info("omapfb: Pixclock %lu kHz hfreq %lu.%lu kHz "
+ "vfreq %lu.%lu Hz\n",
+- phz / 1000, hhz / 10000, hhz % 10, vhz / 10, vhz % 10);
++ phz / 1000, hhz / 10000, hhz % 10000,
++ vhz / 10, vhz % 10);
+
+ return 0;
+
--- /dev/null
+From: Mans Rullgard <mans@mansr.com>
+Date: Sat, 5 Jul 2008 20:32:38 +0000 (+0100)
+Subject: omap: set CLKSEL_DSS1 to 2
+X-Git-Tag: beagle-5~2
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=d23f9c3c5c6243b626f7ec4c255469de2536e488
+
+omap: set CLKSEL_DSS1 to 2
+---
+
+diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
+index 8fdf8f3..04dedec 100644
+--- a/arch/arm/mach-omap2/clock34xx.c
++++ b/arch/arm/mach-omap2/clock34xx.c
+@@ -596,6 +596,8 @@ int __init omap2_clk_init(void)
+ /* u32 clkrate; */
+ u32 cpu_clkflg;
+
++ __raw_writel(0x1002, io_p2v(0x48004e40));
++
+ /* REVISIT: Ultimately this will be used for multiboot */
+ #if 0
+ if (cpu_is_omap242x()) {
--- /dev/null
+From: Mans Rullgard <mans@mansr.com>
+Date: Sun, 6 Jul 2008 13:15:36 +0000 (+0100)
+Subject: omapfb: enable overlay optimisation when possible
+X-Git-Tag: beagle-5~1
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=a63ac3abdf6781f863112321260fe7a5da757802
+
+omapfb: enable overlay optimisation when possible
+---
+
+diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
+index 6aff476..3b36227 100644
+--- a/drivers/video/omap/dispc.c
++++ b/drivers/video/omap/dispc.c
+@@ -582,11 +582,13 @@ static int omap_dispc_enable_plane(int plane, int enable)
+ const u32 at_reg[] = { DISPC_GFX_ATTRIBUTES,
+ DISPC_VID1_BASE + DISPC_VID_ATTRIBUTES,
+ DISPC_VID2_BASE + DISPC_VID_ATTRIBUTES };
++ unsigned overlay_opt = plane & !!enable & !dispc.color_key.key_type;
+ if ((unsigned int)plane > dispc.mem_desc.region_cnt)
+ return -EINVAL;
+
+ enable_lcd_clocks(1);
+ MOD_REG_FLD(at_reg[plane], 1, enable ? 1 : 0);
++ MOD_REG_FLD(DISPC_CONTROL, 1<<12 | 1<<5, overlay_opt<<12 | 1<<5);
+ enable_lcd_clocks(0);
+
+ return 0;
--- /dev/null
+From: Mans Rullgard <mans@mansr.com>
+Date: Sun, 6 Jul 2008 13:22:54 +0000 (+0100)
+Subject: omapfb: use PCD if set in panel config
+X-Git-Tag: beagle-5
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=c8060d36ae156771f00a7a27cabf1b4435c378bd
+
+omapfb: use PCD if set in panel config
+---
+
+diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
+index 3b36227..4e1a8e3 100644
+--- a/drivers/video/omap/dispc.c
++++ b/drivers/video/omap/dispc.c
+@@ -798,7 +798,13 @@ static void set_lcd_timings(void)
+ l |= panel->acb & 0xff;
+ dispc_write_reg(DISPC_POL_FREQ, l);
+
+- calc_ck_div(is_tft, panel->pixel_clock * 1000, &lck_div, &pck_div);
++ if (panel->pcd) {
++ pck_div = panel->pcd;
++ lck_div = 1;
++ } else {
++ calc_ck_div(is_tft, panel->pixel_clock * 1000,
++ &lck_div, &pck_div);
++ }
+
+ l = dispc_read_reg(DISPC_DIVISOR);
+ l &= ~(FLD_MASK(16, 8) | FLD_MASK(0, 8));
--- /dev/null
+From: Mans Rullgard <mans@mansr.com>
+Date: Mon, 7 Jul 2008 00:13:00 +0000 (+0100)
+Subject: omapfb: fix display panning
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=9fec252c96b0e69bcef0afd9cb9dd72b7179c239
+
+omapfb: fix display panning
+---
+
+diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
+index 4e1a8e3..c17371c 100644
+--- a/drivers/video/omap/dispc.c
++++ b/drivers/video/omap/dispc.c
+@@ -435,6 +435,8 @@ static inline int _setup_plane(int plane, int channel_out,
+
+ dispc_write_reg(ri_reg[plane], (screen_width - width) * bpp / 8 + 1);
+
++ MOD_REG_FLD(DISPC_CONTROL, 1<<5, 1<<5);
++
+ return height * screen_width * bpp / 8;
+ }
+
+diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
+index 1166a01..3e4959e 100644
+--- a/drivers/video/omap/omapfb_main.c
++++ b/drivers/video/omap/omapfb_main.c
+@@ -206,8 +206,8 @@ static int ctrl_change_mode(struct fb_info *fbi)
+ struct omapfb_device *fbdev = plane->fbdev;
+ struct fb_var_screeninfo *var = &fbi->var;
+
+- offset = var->yoffset * fbi->fix.line_length +
+- var->xoffset * var->bits_per_pixel / 8;
++ offset = (var->yoffset * var->xres_virtual + var->xoffset) *
++ var->bits_per_pixel / 8;
+
+ if (fbdev->ctrl->sync)
+ fbdev->ctrl->sync();
+@@ -423,6 +423,8 @@ static void set_fb_fix(struct fb_info *fbi)
+ }
+ fix->accel = FB_ACCEL_OMAP1610;
+ fix->line_length = var->xres_virtual * bpp / 8;
++ fix->xpanstep = 1;
++ fix->ypanstep = 1;
+ }
+
+ static int set_color_mode(struct omapfb_plane_struct *plane,
--- /dev/null
+From: Mans Rullgard <mans@mansr.com>
+Date: Mon, 7 Jul 2008 23:59:08 +0000 (+0100)
+Subject: omapfb: ensure fck/lcd < 173MHz
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=0523ece1bad659c48c66aea364d83f7490e7e5ae
+
+omapfb: ensure fck/lcd < 173MHz
+---
+
+diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
+index c17371c..85d6cad 100644
+--- a/drivers/video/omap/dispc.c
++++ b/drivers/video/omap/dispc.c
+@@ -738,14 +738,16 @@ static void setup_color_conv_coef(void)
+ MOD_REG_FLD(at2_reg, (1 << 11), ct->full_range);
+ }
+
++#define MAX_FCK_LCD 173000000
++
+ static void calc_ck_div(int is_tft, int pck, int *lck_div, int *pck_div)
+ {
+ unsigned long fck, lck;
+
+- *lck_div = 1;
+ pck = max(1, pck);
+ fck = clk_get_rate(dispc.dss1_fck);
+- lck = fck;
++ *lck_div = (fck + MAX_FCK_LCD - 1) / MAX_FCK_LCD;
++ lck = fck / *lck_div;
+ *pck_div = (lck + pck - 1) / pck;
+ if (is_tft)
+ *pck_div = max(2, *pck_div);
--- /dev/null
+From: Mans Rullgard <mans@mansr.com>
+Date: Tue, 8 Jul 2008 18:26:43 +0000 (+0100)
+Subject: omapfb: set graphics burst size to 16x32
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=4f9e415dfcd5613a8de973f6c9878cab959c5869
+
+omapfb: set graphics burst size to 16x32
+---
+
+diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
+index 85d6cad..fd06ca2 100644
+--- a/drivers/video/omap/dispc.c
++++ b/drivers/video/omap/dispc.c
+@@ -409,7 +409,7 @@ static inline int _setup_plane(int plane, int channel_out,
+ l |= cconv_en << 9;
+
+ l &= ~(0x03 << burst_shift);
+- l |= DISPC_BURST_8x32 << burst_shift;
++ l |= DISPC_BURST_16x32 << burst_shift;
+
+ l &= ~(1 << chout_shift);
+ l |= chout_val << chout_shift;
# CONFIG_FB_OMAP_092M9R is not set
# CONFIG_FB_OMAP_LCDC_EXTERNAL is not set
# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set
-CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=4
+CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=8
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
+++ /dev/null
-From linux-omap-owner@vger.kernel.org Tue Jun 24 09:24:30 2008
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- ([127.0.0.1] helo=dominion ident=koen)
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-Date: Tue, 24 Jun 2008 01:12:35 -0600 (MDT)
-From: Paul Walmsley <paul@pwsan.com>
-To: linux-omap@vger.kernel.org
-Subject: [PATCH] OMAP3 clock: DPLL{1,2}_FCLK clksel can divide by 4
-Message-ID: <alpine.DEB.1.00.0806240111320.9741@utopia.booyaka.com>
-User-Agent: Alpine 1.00 (DEB 882 2007-12-20)
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-
-
-OMAP34xx ES2 TRM Delta G to H states that the divider for DPLL1_FCLK and
-DPLL2_FCLK can divide by 4 in addition to dividing by 1 and 2. Encode this
-into the OMAP3 clock framework.
-
-Signed-off-by: Paul Walmsley <paul@pwsan.com>
----
-
- arch/arm/mach-omap2/clock34xx.h | 20 ++++++++++++++++----
- 1 files changed, 16 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
-index b4dceea..9605744 100644
---- a/arch/arm/mach-omap2/clock34xx.h
-+++ b/arch/arm/mach-omap2/clock34xx.h
-@@ -1029,8 +1029,15 @@ static struct clk corex2_fck = {
-
- /* DPLL power domain clock controls */
-
--static const struct clksel div2_core_clksel[] = {
-- { .parent = &core_ck, .rates = div2_rates },
-+static const struct clksel_rate div4_rates[] = {
-+ { .div = 1, .val = 1, .flags = RATE_IN_343X | DEFAULT_RATE },
-+ { .div = 2, .val = 2, .flags = RATE_IN_343X },
-+ { .div = 4, .val = 4, .flags = RATE_IN_343X },
-+ { .div = 0 }
-+};
-+
-+static const struct clksel div4_core_clksel[] = {
-+ { .parent = &core_ck, .rates = div4_rates },
- { .parent = NULL }
- };
-
-@@ -1044,7 +1051,7 @@ static struct clk dpll1_fck = {
- .init = &omap2_init_clksel_parent,
- .clksel_reg = _OMAP34XX_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL),
- .clksel_mask = OMAP3430_MPU_CLK_SRC_MASK,
-- .clksel = div2_core_clksel,
-+ .clksel = div4_core_clksel,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
- PARENT_CONTROLS_CLOCK,
- .recalc = &omap2_clksel_recalc,
-@@ -1119,7 +1126,7 @@ static struct clk dpll2_fck = {
- .init = &omap2_init_clksel_parent,
- .clksel_reg = _OMAP34XX_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL),
- .clksel_mask = OMAP3430_IVA2_CLK_SRC_MASK,
-- .clksel = div2_core_clksel,
-+ .clksel = div4_core_clksel,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
- PARENT_CONTROLS_CLOCK,
- .recalc = &omap2_clksel_recalc,
-@@ -1155,6 +1162,11 @@ static struct clk iva2_ck = {
-
- /* Common interface clocks */
-
-+static const struct clksel div2_core_clksel[] = {
-+ { .parent = &core_ck, .rates = div2_rates },
-+ { .parent = NULL }
-+};
-+
- static struct clk l3_ick = {
- .name = "l3_ick",
- .parent = &core_ck,
---
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at http://vger.kernel.org/majordomo-info.html
-
+++ /dev/null
-From linux-omap-owner@vger.kernel.org Tue Jun 24 09:24:30 2008
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- ([127.0.0.1] helo=dominion ident=koen)
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- for koen@localhost; Tue, 24 Jun 2008 09:24:30 +0200
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-Date: Tue, 24 Jun 2008 01:11:21 -0600 (MDT)
-From: Paul Walmsley <paul@pwsan.com>
-To: linux-omap@vger.kernel.org
-Subject: [PATCH] OMAP3 clock: fix DPLL jitter correction and rate
- programming
-Message-ID: <alpine.DEB.1.00.0806240109440.9741@utopia.booyaka.com>
-User-Agent: Alpine 1.00 (DEB 882 2007-12-20)
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-
-
-Fix DPLL jitter correction programming. Previously,
-omap3_noncore_dpll_program() stored the FREQSEL jitter correction
-parameter to the wrong register. This caused jitter correction to be set
-incorrectly and also caused the DPLL divider to be programmed incorrectly.
-
-Also, fix DPLL divider programming. An off-by-one error existed in
-omap3_noncore_dpll_program(), causing DPLLs to be programmed with a higher
-divider than intended.
-
-Signed-off-by: Paul Walmsley <paul@pwsan.com>
----
-
- arch/arm/mach-omap2/clock34xx.c | 13 ++++++++-----
- 1 files changed, 8 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
-index 408b51a..8fdf8f3 100644
---- a/arch/arm/mach-omap2/clock34xx.c
-+++ b/arch/arm/mach-omap2/clock34xx.c
-@@ -346,14 +346,17 @@ static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel)
- /* 3430 ES2 TRM: 4.7.6.9 DPLL Programming Sequence */
- _omap3_noncore_dpll_bypass(clk);
-
-+ /* Set jitter correction */
-+ v = __raw_readl(dd->control_reg);
-+ v &= ~dd->freqsel_mask;
-+ v |= freqsel << __ffs(dd->freqsel_mask);
-+ __raw_writel(v, dd->control_reg);
-+
-+ /* Set DPLL multiplier, divider */
- v = __raw_readl(dd->mult_div1_reg);
- v &= ~(dd->mult_mask | dd->div1_mask);
--
-- /* Set mult (M), div1 (N), freqsel */
- v |= m << __ffs(dd->mult_mask);
-- v |= n << __ffs(dd->div1_mask);
-- v |= freqsel << __ffs(dd->freqsel_mask);
--
-+ v |= (n - 1) << __ffs(dd->div1_mask);
- __raw_writel(v, dd->mult_div1_reg);
-
- /* We let the clock framework set the other output dividers later */
---
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at http://vger.kernel.org/majordomo-info.html
-
SRCREV = "7786cd7a00ae0b18923185789380a88052f4eee7"
PV = "2.6.25+2.6.26-rc9+${PR}+git${SRCREV}"
-PR = "r40"
+PR = "r41"
SRC_URI = "git://source.mvista.com/git/linux-omap-2.6.git;protocol=git \
file://defconfig"
file://no-empty-flash-warnings.patch;patch=1 \
file://logo_linux_clut224.ppm \
file://oprofile-0.9.3.armv7.diff;patch=1 \
+ file://01-fix-timing-print.diff;patch=1 \
+ file://02-set-clkseld11.diff;patch=1 \
+ file://03-enable-overlay-opt.diff;patch=1 \
+ file://04-use-pcd.diff;patch=1 \
+ file://05-fix-display-panning.diff;patch=1 \
+ file://06-ensure-fclk.diff;patch=1 \
+ file://07-set-burst-size.diff;patch=1 \
"
SRC_URI_append_omap3evm = " file://no-harry-potter.diff;patch=1 \
git.openpandora.org / openembedded.git / commitdiff