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tile PCI RC: tilepro conflict with PCI and RAM addresses
authorChris Metcalf <cmetcalf@tilera.com>
Fri, 2 Aug 2013 20:18:58 +0000 (16:18 -0400)
committerChris Metcalf <cmetcalf@tilera.com>
Mon, 5 Aug 2013 20:12:51 +0000 (16:12 -0400)
Fix a bug in the tilepro PCI resource allocation code that could make
the bootmem allocator unhappy if 4GB is installed on mshim 0.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>

No differences found
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