linux omap2 git: refresh mru's clock patches
authorKoen Kooi <koen@openembedded.org>
Wed, 23 Jul 2008 18:58:37 +0000 (18:58 +0000)
committerKoen Kooi <koen@openembedded.org>
Wed, 23 Jul 2008 18:58:37 +0000 (18:58 +0000)
packages/linux/linux-omap2-git/beagleboard/mru-clocks1.diff
packages/linux/linux-omap2-git/beagleboard/mru-clocks2.diff
packages/linux/linux-omap2-git/beagleboard/mru-clocks3.diff [new file with mode: 0644]
packages/linux/linux-omap2_git.bb

index a17cc52..d7dadbc 100644 (file)
@@ -1,7 +1,7 @@
 From: Mans Rullgard <mans@mansr.com>
 Date: Tue, 22 Jul 2008 00:31:11 +0000 (+0100)
 Subject: ARM: OMAP: make dpll4_m4_ck programmable with clk_set_rate()
-X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=edc6cd29284f64f524dd410fdc5e6133bc177a8f
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=2b7b958dc79e51127d7a4ecf88ce12dbc6c31426
 
 ARM: OMAP: make dpll4_m4_ck programmable with clk_set_rate()
 
index 99c8f7c..c8b370d 100644 (file)
@@ -1,7 +1,7 @@
 From: Mans Rullgard <mans@mansr.com>
 Date: Tue, 22 Jul 2008 00:58:18 +0000 (+0100)
 Subject: ARM: OMAP: add clk_get_parent() for OMAP2/3
-X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=76a35ce79194b60e3697378e726e1e510c9349d1
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=e2de5e5578fbaa9b4b75074796da0608fc93e6ae
 
 ARM: OMAP: add clk_get_parent() for OMAP2/3
 
diff --git a/packages/linux/linux-omap2-git/beagleboard/mru-clocks3.diff b/packages/linux/linux-omap2-git/beagleboard/mru-clocks3.diff
new file mode 100644 (file)
index 0000000..f8407fc
--- /dev/null
@@ -0,0 +1,94 @@
+From: Mans Rullgard <mans@mansr.com>
+Date: Wed, 23 Jul 2008 08:40:07 +0000 (+0100)
+Subject: ARM: OMAP: Set DSS1_ALWON_FCLK to a multiple of the pixel clock
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=01ee28c50701caa94739e764c3dae9298edd8216
+
+ARM: OMAP: Set DSS1_ALWON_FCLK to a multiple of the pixel clock
+
+This sets the DSS1_ALWON_FCLK clock as close as possible to a
+multiple of the requested pixel clock, while keeping it below
+the 173MHz limit.
+
+Due to of the structure of the clock tree, dss1_alwon_fck cannot
+be set directly, and we must use dpll4_m4_ck instead.
+
+Signed-off-by: Mans Rullgard <mans@mansr.com>
+---
+
+diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
+index fd06ca2..e0e8528 100644
+--- a/drivers/video/omap/dispc.c
++++ b/drivers/video/omap/dispc.c
+@@ -176,6 +176,7 @@ static struct {
+       struct clk      *dss_ick, *dss1_fck;
+       struct clk      *dss_54m_fck;
++      struct clk      *dpll4_m4_ck;
+       enum omapfb_update_mode update_mode;
+       struct omapfb_device    *fbdev;
+@@ -738,21 +739,34 @@ static void setup_color_conv_coef(void)
+       MOD_REG_FLD(at2_reg, (1 << 11), ct->full_range);
+ }
+-#define MAX_FCK_LCD 173000000
++#define MAX_FCK 173000000
+ static void calc_ck_div(int is_tft, int pck, int *lck_div, int *pck_div)
+ {
++      unsigned long prate = clk_get_rate(clk_get_parent(dispc.dpll4_m4_ck));
++      unsigned long pcd_min = is_tft? 2: 3;
++      unsigned long fck_div;
+       unsigned long fck, lck;
+       pck = max(1, pck);
++
++      if (pck * pcd_min > MAX_FCK) {
++              dev_warn(dispc.fbdev->dev, "pixclock %d kHz too high.\n",
++                       pck / 1000);
++              pck = MAX_FCK / pcd_min;
++      }
++
++      fck = pck * 2;
++      fck_div = (prate + pck) / fck;
++      if (fck_div > 16)
++              fck_div /= (fck_div + 15) / 16;
++      if (fck_div < 1)
++              fck_div = 1;
++      clk_set_rate(dispc.dpll4_m4_ck, prate / fck_div);
+       fck = clk_get_rate(dispc.dss1_fck);
+-      *lck_div = (fck + MAX_FCK_LCD - 1) / MAX_FCK_LCD;
+-      lck = fck / *lck_div;
+-      *pck_div = (lck + pck - 1) / pck;
+-      if (is_tft)
+-              *pck_div = max(2, *pck_div);
+-      else
+-              *pck_div = max(3, *pck_div);
++
++      *lck_div = 1;
++      *pck_div = (fck + pck - 1) / pck;
+       if (*pck_div > 255) {
+               *pck_div = 255;
+               lck = pck * *pck_div;
+@@ -914,11 +928,21 @@ static int get_dss_clocks(void)
+               return PTR_ERR(dispc.dss_54m_fck);
+       }
++      if (IS_ERR((dispc.dpll4_m4_ck =
++                              clk_get(dispc.fbdev->dev, "dpll4_m4_ck")))) {
++              dev_err(dispc.fbdev->dev, "can't get dpll4_m4_ck");
++              clk_put(dispc.dss_ick);
++              clk_put(dispc.dss1_fck);
++              clk_put(dispc.dss_54m_fck);
++              return PTR_ERR(dispc.dss_54m_fck);
++      }
++
+       return 0;
+ }
+ static void put_dss_clocks(void)
+ {
++      clk_put(dispc.dpll4_m4_ck);
+       clk_put(dispc.dss_54m_fck);
+       clk_put(dispc.dss1_fck);
+       clk_put(dispc.dss_ick);
index c6ffd34..d205131 100644 (file)
@@ -6,7 +6,7 @@ SRCREV = "d3b3ae0fe6c71641da19c8de466ec366d39847e3"
 
 PV = "2.6.26"
 #PV = "2.6.25+2.6.26-rc9+${PR}+git${SRCREV}"
-PR = "r46"
+PR = "r47"
 
 SRC_URI = "git://source.mvista.com/git/linux-omap-2.6.git;protocol=git \
           file://defconfig"
@@ -23,7 +23,6 @@ SRC_URI_append_beagleboard = " file://no-harry-potter.diff;patch=1 \
            file://logo_linux_clut224.ppm \
            file://oprofile-0.9.3.armv7.diff;patch=1 \
            file://01-fix-timing-print.diff;patch=1 \
-           file://02-set-clkseld11.diff;patch=1 \
            file://03-enable-overlay-opt.diff;patch=1 \
            file://04-use-pcd.diff;patch=1 \
            file://05-fix-display-panning.diff;patch=1 \
@@ -43,6 +42,7 @@ SRC_URI_append_beagleboard = " file://no-harry-potter.diff;patch=1 \
            file://TWL4030-09.patch;patch=1 \
            file://mru-clocks1.diff;patch=1 \
            file://mru-clocks2.diff;patch=1 \
+           file://mru-clocks3.diff;patch=1 \   
 "
 
 SRC_URI_append_omap3evm = " file://no-harry-potter.diff;patch=1 \