ARM: mvebu: add Device Tree description of the Armada 375 SoC
authorGregory CLEMENT <gregory.clement@free-electrons.com>
Mon, 17 Feb 2014 14:23:25 +0000 (15:23 +0100)
committerJason Cooper <jason@lakedaemon.net>
Mon, 17 Feb 2014 22:49:54 +0000 (22:49 +0000)
The Armada 375 SoC is a new SoC from Marvell, based on a dual core
Cortex-A9 and a number of hardware blocks that are common with earlier
SoCs from the mvebu family.

The provided Device Tree describes the following parts of the SoC:

 * CPUs
 * Device Bus
 * Clocks
 * Interrupt controllers: GIC and MPIC
 * GPIO controllers
 * I2C buses
 * L2 cache
 * MBus controller
 * SDIO
 * Pinctrl
 * SATA
 * Serial
 * SPI buses
 * System controller (for reboot)
 * Timer
 * XOR engines
 * PCIe controllers

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

No differences found