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drm/i915: Fix and cleanup DPLL calculation for Ironlake
authorZhenyu Wang <zhenyuw@linux.intel.com>
Mon, 2 Nov 2009 07:52:29 +0000 (07:52 +0000)
committerEric Anholt <eric@anholt.net>
Thu, 5 Nov 2009 22:00:32 +0000 (14:00 -0800)
When the ideal error range can't be reached, this will safely use
a most closed one. Clean up some dumb codes in DPLL function too.

This fixes DPLL clock issue against one monitor at 1680x1050@60hz.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

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