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ASoC: TWL6040: Fix playback with 19.2 Mhz MCLK
authorJorge Eduardo Candelaria <jorge.candelaria@ti.com>
Thu, 20 May 2010 22:53:07 +0000 (17:53 -0500)
committerLiam Girdwood <lrg@slimlogic.co.uk>
Fri, 21 May 2010 09:47:25 +0000 (10:47 +0100)
When using MCLK is configured for 19.2 Mhz, clock slicer should be
enabled and HPPLL should be bypassed in clock path.

Signed-off-by: Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
Signed-off-by: Margarita Olaya Cabrera <magi.olaya@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>

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