+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-#
-# Copyright (C) 2020 - 2022, Xilinx, Inc.
-# Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc.
-#
-if ARCH_VERSAL2
-
-config CMD_VERSAL2
- bool "Enable Versal Gen 2 specific commands"
- default y
- depends on ZYNQMP_FIRMWARE
- help
- Select this to enable AMD Versal Gen 2 specific commands.
- Commands like versal2 loadpdi are enabled by this.
-
-endif
#include <asm/arch/sys_proto.h>
#include <dm/device.h>
#include <dm/uclass.h>
+#include <versalpl.h>
#include "../../xilinx/common/board.h"
#include <linux/bitfield.h>
DECLARE_GLOBAL_DATA_PTR;
+#if defined(CONFIG_FPGA_VERSALPL)
+static xilinx_desc versalpl = {
+ xilinx_versal2, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
+ FPGA_LEGACY
+};
+#endif
+
int board_init(void)
{
printf("EL Level:\tEL%d\n", current_el());
+#if defined(CONFIG_FPGA_VERSALPL)
+ fpga_init();
+ fpga_add(fpga_xilinx, &versalpl);
+#endif
+
return 0;
}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2024, Advanced Micro Devices, Inc.
- *
- * Michal Simek <michal.simek@amd.com>
- */
-
-#include <cpu_func.h>
-#include <command.h>
-#include <log.h>
-#include <memalign.h>
-#include <versalpl.h>
-#include <vsprintf.h>
-#include <zynqmp_firmware.h>
-
-/**
- * do_versal2_load_pdi - Handle the "versal2 load pdi" command-line command
- * @cmdtp: Command data struct pointer
- * @flag: Command flag
- * @argc: Command-line argument count
- * @argv: Array of command-line arguments
- *
- * Processes the versal2 load pdi command
- *
- * Return: return 0 on success, Error value if command fails.
- * CMD_RET_USAGE incase of incorrect/missing parameters.
- */
-static int do_versal2_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc,
- char * const argv[])
-{
- u32 buf_lo, buf_hi;
- u32 ret_payload[PAYLOAD_ARG_CNT];
- ulong addr, *pdi_buf;
- size_t len;
- int ret;
-
- if (argc != cmdtp->maxargs) {
- debug("pdi_load: incorrect parameters passed\n");
- return CMD_RET_USAGE;
- }
-
- addr = simple_strtol(argv[1], NULL, 16);
- if (!addr) {
- debug("pdi_load: zero pdi_data address\n");
- return CMD_RET_USAGE;
- }
-
- len = hextoul(argv[2], NULL);
- if (!len) {
- debug("pdi_load: zero size\n");
- return CMD_RET_USAGE;
- }
-
- pdi_buf = (ulong *)ALIGN((ulong)addr, ARCH_DMA_MINALIGN);
- if ((ulong)addr != (ulong)pdi_buf) {
- memcpy((void *)pdi_buf, (void *)addr, len);
- debug("Pdi addr:0x%lx aligned to 0x%lx\n",
- addr, (ulong)pdi_buf);
- }
-
- flush_dcache_range((ulong)pdi_buf, (ulong)pdi_buf + len);
-
- buf_lo = lower_32_bits((ulong)pdi_buf);
- buf_hi = upper_32_bits((ulong)pdi_buf);
-
- ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo,
- buf_hi, 0, ret_payload);
- if (ret)
- printf("PDI load failed with err: 0x%08x\n", ret);
-
- return cmd_process_error(cmdtp, ret);
-}
-
-U_BOOT_LONGHELP(versal2,
- "loadpdi addr len - Load pdi image\n"
- "load pdi image at ddr address 'addr' with pdi image size 'len'\n");
-
-U_BOOT_CMD_WITH_SUBCMDS(versal2, "Versal Gen 2 sub-system", versal2_help_text,
- U_BOOT_SUBCMD_MKENT(loadpdi, 3, 1,
- do_versal2_load_pdi));
buf_lo = lower_32_bits(bin_buf);
buf_hi = upper_32_bits(bin_buf);
- ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo,
- buf_hi, 0, ret_payload);
+
+ if (desc->family == xilinx_versal2) {
+ ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_hi,
+ buf_lo, 0, ret_payload);
+ } else {
+ ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo,
+ buf_hi, 0, ret_payload);
+ }
+
if (ret)
printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);