ARM: dts: imx6: add pm_power_off support for i.mx6 chips
authorRobin Gong <b38343@freescale.com>
Wed, 12 Nov 2014 08:20:37 +0000 (16:20 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Sun, 23 Nov 2014 07:08:16 +0000 (15:08 +0800)
All chips of i.mx6 can be powered off by programming SNVS.
For example :
On i.mx6q-sabresd board, PMIC_ON_REQ connect with external
pmic ON/OFF pin, that will cause the whole PMIC powered off
except VSNVS. And system can restart once PMIC_ON_REQ goes
high by push POWRER key.

Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
arch/arm/boot/dts/imx6qdl.dtsi
arch/arm/boot/dts/imx6sl-evk.dts
arch/arm/boot/dts/imx6sl.dtsi
arch/arm/boot/dts/imx6sx-sdb.dts
arch/arm/boot/dts/imx6sx.dtsi

index baf2f00..05f5ff7 100644 (file)
        status = "okay";
 };
 
+&snvs_poweroff {
+       status = "okay";
+};
+
 &ssi2 {
        status = "okay";
 };
index e529308..4fc03b7 100644 (file)
                                        interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
                                                     <0 20 IRQ_TYPE_LEVEL_HIGH>;
                                };
+
+                               snvs_poweroff: snvs-poweroff@38 {
+                                       compatible = "fsl,sec-v4.0-poweroff";
+                                       reg = <0x38 0x4>;
+                                       status = "disabled";
+                               };
                        };
 
                        epit1: epit@020d0000 { /* EPIT1 */
index 898d14f..fda4932 100644 (file)
        status = "okay";
 };
 
+&snvs_poweroff {
+       status = "okay";
+};
+
 &ssi2 {
        status = "okay";
 };
index dfd83e6..36ab8e0 100644 (file)
                                        interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
                                                     <0 20 IRQ_TYPE_LEVEL_HIGH>;
                                };
+
+                               snvs_poweroff: snvs-poweroff@38 {
+                                       compatible = "fsl,sec-v4.0-poweroff";
+                                       reg = <0x38 0x4>;
+                                       status = "disabled";
+                               };
                        };
 
                        epit1: epit@020d0000 {
index 448489b..1e6e5cc 100644 (file)
        status = "okay";
 };
 
+&snvs_poweroff {
+       status = "okay";
+};
+
 &ssi2 {
        status = "okay";
 };
index 422fc5a..7a24fee 100644 (file)
                                        reg = <0x34 0x58>;
                                        interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                                };
+
+                               snvs_poweroff: snvs-poweroff@38 {
+                                       compatible = "fsl,sec-v4.0-poweroff";
+                                       reg = <0x38 0x4>;
+                                       status = "disabled";
+                               };
                        };
 
                        epit1: epit@020d0000 {