Convert CONFIG_SYS_NAND_HW_ECC to Kconfig
authorTom Rini <trini@konsulko.com>
Sat, 12 Nov 2022 22:36:45 +0000 (17:36 -0500)
committerTom Rini <trini@konsulko.com>
Mon, 5 Dec 2022 21:05:38 +0000 (16:05 -0500)
This converts the following to Kconfig:
   CONFIG_SYS_NAND_HW_ECC

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
12 files changed:
configs/da850evm_nand_defconfig
configs/k2e_evm_defconfig
configs/k2e_hs_evm_defconfig
configs/k2hk_evm_defconfig
configs/k2hk_hs_evm_defconfig
configs/k2l_evm_defconfig
configs/k2l_hs_evm_defconfig
configs/omapl138_lcdk_defconfig
drivers/mtd/nand/raw/Kconfig
drivers/mtd/nand/raw/davinci_nand.c
include/configs/da850evm.h
include/configs/omapl138_lcdk.h

index 84563b2..a7aaf46 100644 (file)
@@ -86,7 +86,6 @@ CONFIG_DM_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
-CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
 CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 CONFIG_SYS_NAND_PAGE_COUNT=0x40
index 9bf2e86..977348e 100644 (file)
@@ -79,7 +79,6 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
-CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
index afa4dc1..afba285 100644 (file)
@@ -54,7 +54,6 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
-CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
index cbf948f..6c45639 100644 (file)
@@ -79,7 +79,6 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
-CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
index 2480547..33624ba 100644 (file)
@@ -54,7 +54,6 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
-CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
index f4c8c5e..e28054b 100644 (file)
@@ -79,7 +79,6 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
-CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
index 051cd23..8f8bb54 100644 (file)
@@ -57,7 +57,6 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
-CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
index a067c01..ff3b5f0 100644 (file)
@@ -83,7 +83,6 @@ CONFIG_DM_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
-CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
 CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 CONFIG_SYS_NAND_PAGE_COUNT=0x40
index 49b7a4b..0e42841 100644 (file)
@@ -148,9 +148,21 @@ config NAND_DAVINCI
          Enable this driver for NAND flash controllers available in TI Davinci
          and Keystone2 platforms
 
+choice
+       prompt "Type of ECC used on NAND"
+       default SYS_NAND_4BIT_HW_ECC_OOBFIRST
+       depends on NAND_DAVINCI
+
+config SYS_NAND_HW_ECC
+       bool "Use 1-bit HW ECC"
+
 config SYS_NAND_4BIT_HW_ECC_OOBFIRST
        bool "Use 4-bit HW ECC with OOB at the front"
-       depends on NAND_DAVINCI
+
+config SYS_NAND_SOFT_ECC
+       bool "Use software ECC"
+
+endchoice
 
 config KEYSTONE_RBL_NAND
        depends on ARCH_KEYSTONE
index 9158d94..54aed13 100644 (file)
@@ -766,10 +766,7 @@ static void davinci_nand_init(struct nand_chip *nand)
        nand->ecc.calculate = nand_davinci_calculate_ecc;
        nand->ecc.correct  = nand_davinci_correct_data;
        nand->ecc.hwctl  = nand_davinci_enable_hwecc;
-#else
-       nand->ecc.mode = NAND_ECC_SOFT;
-#endif /* CONFIG_SYS_NAND_HW_ECC */
-#ifdef CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
+#elif defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST)
        nand->ecc.mode = NAND_ECC_HW_OOB_FIRST;
        nand->ecc.size = 512;
        nand->ecc.bytes = 10;
@@ -778,6 +775,8 @@ static void davinci_nand_init(struct nand_chip *nand)
        nand->ecc.correct = nand_davinci_4bit_correct_data;
        nand->ecc.hwctl = nand_davinci_4bit_enable_hwecc;
        nand->ecc.layout = &nand_davinci_4bit_layout_oobfirst;
+#elif defined(CONFIG_SYS_NAND_SOFT_ECC)
+       nand->ecc.mode = NAND_ECC_SOFT;
 #endif
        /* Set address of hardware control function */
        nand->cmd_ctrl = nand_davinci_hwcontrol;
index abf5db9..11f104b 100644 (file)
 #define CONFIG_SYS_NAND_BASE           DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
 #define CONFIG_SYS_NAND_MASK_CLE               0x10
 #define CONFIG_SYS_NAND_MASK_ALE               0x8
-#undef CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0x40000
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xc1080000
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
index 184360f..233e7b4 100644 (file)
 #define CONFIG_SYS_NAND_BASE           DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
 #define CONFIG_SYS_NAND_MASK_CLE       0x10
 #define CONFIG_SYS_NAND_MASK_ALE       0x8
-#undef CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    SZ_512K
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xc1080000