clk: qcom: Support bypass RCG configuration
authorStephen Boyd <sboyd@codeaurora.org>
Fri, 11 Jul 2014 19:55:27 +0000 (12:55 -0700)
committerStephen Boyd <sboyd@codeaurora.org>
Tue, 15 Jul 2014 23:38:59 +0000 (16:38 -0700)
In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.

Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

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