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ASoC: TWL4030: Syncronize the reg_cache for ANAMICL after the offset cancelation
authorPeter Ujfalusi <peter.ujfalusi@nokia.com>
Tue, 27 Jan 2009 09:29:39 +0000 (11:29 +0200)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Tue, 27 Jan 2009 10:42:39 +0000 (10:42 +0000)
The offset cancelation bit in ANAMICL register is self cleanig.
Make sure that the reg_cache holds the same value as the HW
register.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

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