ARM: OMAP: SmartReflex driver: added required register and bit definitions.
authorKalle Jokiniemi <ext-kalle.jokiniemi@nokia.com>
Thu, 19 Jun 2008 10:42:26 +0000 (13:42 +0300)
committerTony Lindgren <tony@atomide.com>
Mon, 23 Jun 2008 11:03:17 +0000 (14:03 +0300)
Added new register and bit definitions to enable Smartreflex driver
integration. Also PRM_VC_SMPS_SA bit definitions' naming was changed to match
the naming of other similar bit definitions.

Signed-off-by: Kalle Jokiniemi <ext-kalle.jokiniemi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/prm-regbits-34xx.h
arch/arm/mach-omap2/smartreflex.h [new file with mode: 0644]
include/asm-arm/arch-omap/control.h
include/asm-arm/arch-omap/omap34xx.h

index c6a7940..f82b5a7 100644 (file)
 /* PM_PWSTST_EMU specific bits */
 
 /* PRM_VC_SMPS_SA */
-#define OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT              16
-#define OMAP3430_PRM_VC_SMPS_SA_SA1_MASK               (0x7f << 16)
-#define OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT              0
-#define OMAP3430_PRM_VC_SMPS_SA_SA0_MASK               (0x7f << 0)
+#define OMAP3430_SMPS_SA1_SHIFT                                16
+#define OMAP3430_SMPS_SA1_MASK                         (0x7f << 16)
+#define OMAP3430_SMPS_SA0_SHIFT                                0
+#define OMAP3430_SMPS_SA0_MASK                         (0x7f << 0)
 
 /* PRM_VC_SMPS_VOL_RA */
 #define OMAP3430_VOLRA1_SHIFT                          16
 #define OMAP3430_CMDRA0_SHIFT                          0
 #define OMAP3430_CMDRA0_MASK                           (0xff << 0)
 
-/* PRM_VC_CMD_VAL_0 specific bits */
+/* PRM_VC_CMD_VAL */
 #define OMAP3430_VC_CMD_ON_SHIFT                       24
 #define OMAP3430_VC_CMD_ON_MASK                                (0xFF << 24)
 #define OMAP3430_VC_CMD_ONLP_SHIFT                     16
 #define OMAP3430_VC_CMD_OFF_SHIFT                      0
 #define OMAP3430_VC_CMD_OFF_MASK                       (0xFF << 0)
 
+/* PRM_VC_CMD_VAL_0 specific bits */
+#define OMAP3430_VC_CMD_VAL0_ON                                (0x3 << 4)
+#define OMAP3430_VC_CMD_VAL0_ONLP                      (0x3 << 3)
+#define OMAP3430_VC_CMD_VAL0_RET                       (0x3 << 3)
+#define OMAP3430_VC_CMD_VAL0_OFF                       (0x3 << 3)
+
 /* PRM_VC_CMD_VAL_1 specific bits */
+#define OMAP3430_VC_CMD_VAL1_ON                                (0xB << 2)
+#define OMAP3430_VC_CMD_VAL1_ONLP                      (0x3 << 3)
+#define OMAP3430_VC_CMD_VAL1_RET                       (0x3 << 3)
+#define OMAP3430_VC_CMD_VAL1_OFF                       (0x3 << 3)
 
 /* PRM_VC_CH_CONF */
 #define OMAP3430_CMD1                                  (1 << 20)
 #define OMAP3430_AUTO_RET                              (1 << 1)
 #define OMAP3430_AUTO_SLEEP                            (1 << 0)
 
+/* Constants to define setup durations */
+#define OMAP3430_CLKSETUP_DURATION                     0xff
+#define OMAP3430_VOLTSETUP_TIME2                       0xfff
+#define OMAP3430_VOLTSETUP_TIME1                       0xfff
+#define OMAP3430_VOLTOFFSET_DURATION                   0xff
+#define OMAP3430_VOLTSETUP2_DURATION                   0xff
+
 /* PRM_SRAM_PCHARGE */
 #define OMAP3430_PCHARGE_TIME_SHIFT                    0
 #define OMAP3430_PCHARGE_TIME_MASK                     (0xff << 0)
Simple merge
Simple merge
Simple merge