clk: sunxi: Implement A10 EMAC clocks

Implement EMAC clocks via ccu_clk_gate for Allwinner A10 SoC.

Which would eventually used in sunxi_emac.c driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index b8b57e2..15ffe5e 100644 (file)
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -22,6 +22,7 @@ static struct ccu_clk_gate a10_gates[] = {
        [CLK_AHB_MMC1]          = GATE(0x060, BIT(9)),
        [CLK_AHB_MMC2]          = GATE(0x060, BIT(10)),
        [CLK_AHB_MMC3]          = GATE(0x060, BIT(11)),
+       [CLK_AHB_EMAC]          = GATE(0x060, BIT(17)),
        [CLK_AHB_SPI0]          = GATE(0x060, BIT(20)),
        [CLK_AHB_SPI1]          = GATE(0x060, BIT(21)),
        [CLK_AHB_SPI2]          = GATE(0x060, BIT(22)),

diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c
index c6fcede..33d41d4 100644 (file)
--- a/drivers/clk/sunxi/clk_a10s.c
+++ b/drivers/clk/sunxi/clk_a10s.c
@@ -19,6 +19,7 @@ static struct ccu_clk_gate a10s_gates[] = {
        [CLK_AHB_MMC0]          = GATE(0x060, BIT(8)),
        [CLK_AHB_MMC1]          = GATE(0x060, BIT(9)),
        [CLK_AHB_MMC2]          = GATE(0x060, BIT(10)),
+       [CLK_AHB_EMAC]          = GATE(0x060, BIT(17)),
        [CLK_AHB_SPI0]          = GATE(0x060, BIT(20)),
        [CLK_AHB_SPI1]          = GATE(0x060, BIT(21)),
        [CLK_AHB_SPI2]          = GATE(0x060, BIT(22)),