pinctrl: tegra: Add MIPI pad control
authorSean Paul <seanpaul@chromium.org>
Tue, 9 Sep 2014 19:58:45 +0000 (15:58 -0400)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 19 Sep 2014 17:28:54 +0000 (12:28 -0500)
This patch adds MIPI CSI/DSIB pad control mux register
from the APB misc block to tegra pinctrl.

Without writing to this register, the dsib pads are
muxed as csi, and cannot be used.

The register is not yet documented in the TRM, here is
the description:

70000820: APB_MISC_GP_MIPI_PAD_CTRL_0
[31:02] RESERVED
[01:01] DSIB_MODE       [CSI=0,DSIB=1]
[00:00] RESERVED

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

No differences found