#define TI_SCI_MSG_BOARD_CONFIG_SECURITY 0x000d
#define TI_SCI_MSG_BOARD_CONFIG_PM 0x000e
#define TISCI_MSG_QUERY_MSMC 0x0020
+#define TI_SCI_MSG_QUERY_FW_CAPS 0x0022
/* Device requests */
#define TI_SCI_MSG_SET_DEVICE_STATE 0x0200
u8 abi_minor;
} __packed;
+/**
+ * struct ti_sci_query_fw_caps_resp - Response for a message
+ * @hdr: Generic header
+ * @fw_caps: 64-bit value representing the FW/SOC capabilities.
+ *
+ * Response to a message with message type TI_SCI_MSG_QUERY_FW_CAPS
+ */
+struct ti_sci_query_fw_caps_resp {
+ struct ti_sci_msg_hdr hdr;
+ u64 fw_caps;
+} __packed;
+
/**
* struct ti_sci_msg_req_reboot - Reboot the SoC
* @hdr: Generic Header
u64 *msmc_start, u64 *msmc_end);
};
+/**
+ * struct ti_sci_firmware_ops - DM firmware operations
+ * @query_dm_cap: Query the DM capabilities
+ * Return 0 for successful query else appropriate error value.
+ */
+struct ti_sci_firmware_ops {
+ int (*query_dm_cap)(struct ti_sci_handle *handle,
+ u64 *dm_cap);
+};
+
+#define TI_SCI_MSG_FLAG_FW_CAP_DM 0x100
+
/**
* struct ti_sci_proc_ops - Processor specific operations.
*
struct ti_sci_dev_ops dev_ops;
struct ti_sci_clk_ops clk_ops;
struct ti_sci_core_ops core_ops;
+ struct ti_sci_firmware_ops fw_ops;
struct ti_sci_proc_ops proc_ops;
struct ti_sci_rm_core_ops rm_core_ops;
struct ti_sci_rm_ringacc_ops rm_ring_ops;