+/*
+ * basically the same as the letux Cortex 15
+ * except that we change the UART3 pinmux because it is wired up
+ * differently
+ */
+
+/* move away definition by included file */
+#define set_muxconf_regs_essential set_muxconf_regs_essential_disabled
+
#include "../../goldelico/letux-cortex15/lc15.c"
+#undef set_muxconf_regs_essential
+
+const struct pad_conf_entry core_padconf_array_essential_alternate[] = {
+
+ {EMMC_CLK, (PTU | IEN | M0)}, /* EMMC_CLK */
+ {EMMC_CMD, (PTU | IEN | M0)}, /* EMMC_CMD */
+ {EMMC_DATA0, (PTU | IEN | M0)}, /* EMMC_DATA0 */
+ {EMMC_DATA1, (PTU | IEN | M0)}, /* EMMC_DATA1 */
+ {EMMC_DATA2, (PTU | IEN | M0)}, /* EMMC_DATA2 */
+ {EMMC_DATA3, (PTU | IEN | M0)}, /* EMMC_DATA3 */
+ {EMMC_DATA4, (PTU | IEN | M0)}, /* EMMC_DATA4 */
+ {EMMC_DATA5, (PTU | IEN | M0)}, /* EMMC_DATA5 */
+ {EMMC_DATA6, (PTU | IEN | M0)}, /* EMMC_DATA6 */
+ {EMMC_DATA7, (PTU | IEN | M0)}, /* EMMC_DATA7 */
+ {SDCARD_CLK, (PTU | IEN | M0)}, /* SDCARD_CLK */
+ {SDCARD_CMD, (PTU | IEN | M0)}, /* SDCARD_CMD */
+ {SDCARD_DATA0, (PTU | IEN | M0)}, /* SDCARD_DATA0*/
+ {SDCARD_DATA1, (PTU | IEN | M0)}, /* SDCARD_DATA1*/
+ {SDCARD_DATA2, (PTU | IEN | M0)}, /* SDCARD_DATA2*/
+ {SDCARD_DATA3, (PTU | IEN | M0)}, /* SDCARD_DATA3*/
+ {UART3_RX_IRRX, (PTU | M4)}, /* SDIO4_CLK */
+ {UART3_TX_IRTX, (PTU | M4)}, /* SDIO4_CMD */
+ {RFBI_DATA1, (PTU | IEN | M4)}, /* UART3_RX_IRRX */
+ {RFBI_DATA2, (M4)}, /* UART3_TX_IRTX */
+ {USBB1_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB1_HSIC_STROBE */
+ {USBB1_HSIC_DATA, (PTU | IEN | M0)}, /* USBB1_HSIC_DATA */
+ {USBB2_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB2_HSIC_STROBE */
+ {USBB2_HSIC_DATA, (PTU | IEN | M0)}, /* USBB2_HSIC_DATA */
+ {USBB3_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB3_HSIC_STROBE*/
+ {USBB3_HSIC_DATA, (PTU | IEN | M0)}, /* USBB3_HSIC_DATA */
+ {USBD0_HS_DP, (IEN | M0)}, /* USBD0_HS_DP */
+ {USBD0_HS_DM, (IEN | M0)}, /* USBD0_HS_DM */
+ {USBD0_SS_RX, (IEN | M0)}, /* USBD0_SS_RX */
+ {I2C5_SCL, (IEN | M0)}, /* I2C5_SCL */
+ {I2C5_SDA, (IEN | M0)}, /* I2C5_SDA */
+ {HSI2_ACWAKE, (PTU | M6)}, /* HSI2_ACWAKE */
+ {HSI2_CAFLAG, (PTU | M6)}, /* HSI2_CAFLAG */
+};
+
+void set_muxconf_regs_essential(void)
+{
+ do_set_mux((*ctrl)->control_padconf_core_base,
+ core_padconf_array_essential_alternate,
+ sizeof(core_padconf_array_essential_alternate) /
+ sizeof(struct pad_conf_entry));
+
+ do_set_mux((*ctrl)->control_padconf_wkup_base,
+ wkup_padconf_array_essential,
+ sizeof(wkup_padconf_array_essential) /
+ sizeof(struct pad_conf_entry));
+}
+
+
+
// (re)enable tca6424 (because we do have it on this board)
\ No newline at end of file
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __CONFIG_OMAP5_EVM_H
-#define __CONFIG_OMAP5_EVM_H
+#ifndef __CONFIG_PANDORA_PYRA_LC15_H
+#define __CONFIG_PANDORA_PYRA_LC15_H
-#ifndef CONFIG_SPL_BUILD
-/* Define the default GPT table for eMMC */
-#define PARTS_DEFAULT \
- "uuid_disk=${uuid_gpt_disk};" \
- "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
-#endif
+#include <configs/letux_cortex15.h>
-#define DFU_ALT_INFO_MMC \
- "dfu_alt_info_mmc=" \
- "boot part 0 1;" \
- "rootfs part 0 2;" \
- "MLO fat 0 1;" \
- "MLO.raw raw 0x100 0x100;" \
- "u-boot.img.raw raw 0x300 0x400;" \
- "spl-os-args.raw raw 0x80 0x80;" \
- "spl-os-image.raw raw 0x900 0x2000;" \
- "spl-os-args fat 0 1;" \
- "spl-os-image fat 0 1;" \
- "u-boot.img fat 0 1;" \
- "uEnv.txt fat 0 1\0"
-
-#define DFU_ALT_INFO_EMMC \
- "dfu_alt_info_emmc=" \
- "rawemmc raw 0 3751936;" \
- "boot part 1 1;" \
- "rootfs part 1 2;" \
- "MLO fat 1 1;" \
- "MLO.raw raw 0x100 0x100;" \
- "u-boot.img.raw raw 0x300 0x400;" \
- "spl-os-args.raw raw 0x80 0x80;" \
- "spl-os-image.raw raw 0x900 0x2000;" \
- "spl-os-args fat 1 1;" \
- "spl-os-image fat 1 1;" \
- "u-boot.img fat 1 1;" \
- "uEnv.txt fat 1 1\0"
-
-#define DFU_ALT_INFO_RAM \
- "dfu_alt_info_ram=" \
- "kernel ram 0x80200000 0x4000000;" \
- "fdt ram 0x80f80000 0x80000;" \
- "ramdisk ram 0x81000000 0x4000000\0"
-
-#define DFUARGS \
- "dfu_bufsiz=0x10000\0" \
- DFU_ALT_INFO_MMC \
- DFU_ALT_INFO_EMMC \
- DFU_ALT_INFO_RAM
-
-#include <configs/ti_omap5_common.h>
-
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_SYS_NS16550_COM3 UART3_BASE
-#define CONFIG_BAUDRATE 115200
-
-#define CONFIG_MISC_INIT_R
-/* MMC ENV related defines */
-#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
-#define CONFIG_ENV_SIZE (128 << 10)
-#define CONFIG_ENV_OFFSET 0xE0000
-#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-
-/* Enhance our eMMC support / experience. */
-#define CONFIG_CMD_GPT
-#define CONFIG_EFI_PARTITION
-#define CONFIG_HSMMC2_8BIT
-#define CONFIG_SUPPORT_EMMC_BOOT
-
-/* Required support for the TCA642X GPIO we have on the uEVM */
+/* Re-enable support for the TCA642X GPIO we have on the Pyra mainbord (like uEVM) */
#define CONFIG_TCA642X
#define CONFIG_CMD_TCA642X
#define CONFIG_SYS_I2C_TCA642X_BUS_NUM 4
#define CONFIG_SYS_I2C_TCA642X_ADDR 0x22
-/* USB UHH support options */
-#define CONFIG_CMD_USB
-#define CONFIG_USB_HOST
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_OMAP
-#define CONFIG_USB_STORAGE
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-
-#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
-#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 79
-
-/* USB GADGET */
-#define CONFIG_USB_DWC3_PHY_OMAP
-#define CONFIG_USB_DWC3_OMAP
-#define CONFIG_USB_DWC3
-#define CONFIG_USB_DWC3_GADGET
-
-#define CONFIG_USB_GADGET
-#define CONFIG_USB_GADGET_DOWNLOAD
-#define CONFIG_USB_GADGET_VBUS_DRAW 2
-#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
-#define CONFIG_G_DNL_VENDOR_NUM 0x0403
-#define CONFIG_G_DNL_PRODUCT_NUM 0xBD00
-#define CONFIG_USB_GADGET_DUALSPEED
-
-/* USB Device Firmware Update support */
-#define CONFIG_USB_FUNCTION_DFU
-#define CONFIG_DFU_RAM
-#define CONFIG_CMD_DFU
-
-#define CONFIG_DFU_MMC
-
-/* Enabled commands */
-#define CONFIG_CMD_DHCP /* DHCP Support */
-
-/* USB Networking options */
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_SMSC95XX
-
-#define CONSOLEDEV "ttyO2"
-
-/* Max time to hold reset on this board, see doc/README.omap-reset-time */
-#define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC 16296
-
-#define CONFIG_CMD_SCSI
-#define CONFIG_LIBATA
-#define CONFIG_SCSI_AHCI
-#define CONFIG_SCSI_AHCI_PLAT
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
-#define CONFIG_SYS_SCSI_MAX_LUN 1
-#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
- CONFIG_SYS_SCSI_MAX_LUN)
-
-#endif /* __CONFIG_OMAP5_EVM_H */
+#endif /* __CONFIG_PANDORA_PYRA_LC15_H */