Several init/setup functions passed the PCI BAR resource start address
to ioremap_nocache() via an unsigned long. This caused address truncation
for a 32-bit device mapped above 4 GiB (i.e. the CPU interacts with the
device via a translated address), which resulted in a kernel panic.
This patch replaces all of the instances of intermediate variable use
with pci_ioremap_bar() to ensure the full resource_size_t start address
is used and that ioremap_nocache() is still called.
The kernel panic (Exar XR17V358 PCIe device on a Freescale P2020 SBC):