24xx clock: Fix 54MHz APLL readiness test
authorPaul Walmsley <paul@pwsan.com>
Mon, 3 Dec 2007 23:24:29 +0000 (16:24 -0700)
committerTony Lindgren <tony@atomide.com>
Wed, 5 Dec 2007 22:38:23 +0000 (14:38 -0800)
omap2_clk_fixed_enable() was checking the wrong bit to determine if
the 54MHz APLL was ready, causing a "Clock apll54_ck didn't enable in
100000 tries" warning message on 2430SDP:

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/clock24xx.c

index 975d35e..1053fc9 100644 (file)
@@ -115,7 +115,7 @@ static int omap2_clk_fixed_enable(struct clk *clk)
        if (clk == &apll96_ck)
                cval = OMAP24XX_ST_96M_APLL;
        else if (clk == &apll54_ck)
-               cval = OMAP24XX_ST_54M_CLK;
+               cval = OMAP24XX_ST_54M_APLL;
 
        omap2_wait_clock_ready(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), cval,
                            clk->name);