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clk: zynq: Factor out PLL driver
authorSoren Brinkmann <soren.brinkmann@xilinx.com>
Mon, 13 May 2013 17:46:36 +0000 (10:46 -0700)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 21 May 2013 14:21:35 +0000 (16:21 +0200)
Refactor the PLL driver so it works with the clock controller driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mike Turquette <mturquette@linaro.org>

No differences found
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