Add a 1ms delay after powering on the PCIe power domain to ensure
the controller stabilizes before subsequent operations. This prevents
potential timing issues during PCIe endpoint initialization.
The delay allows sufficient time for the power domain to fully come
up and the hardware to be in a stable state before configuration
begins.
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
#include <regmap.h>
#include <syscon.h>
#include <pci_ep.h>
+#include <linux/delay.h>
#include "pcie-cadence.h"
dev_err(dev, "failed to power on: %d\n", ret);
return ret;
}
-
+ mdelay(1);
return 0;
}