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drm/i915: Update rps frequencies for BXT
authorBob Paauwe <bob.j.paauwe@intel.com>
Thu, 25 Jun 2015 21:54:07 +0000 (14:54 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 26 Jun 2015 17:41:15 +0000 (19:41 +0200)
Broxton is using a different register and different bit ordering
for rps status capabilities.

Also GT perf freqency register is different for Broxton so update
that.

Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

No differences found
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