drm/i915: Update rps frequencies for BXT

Broxton is using a different register and different bit ordering
for rps status capabilities.

Also GT perf freqency register is different for Broxton so update
that.

Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --cc drivers/gpu/drm/i915/i915_debugfs.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_reg.h
Simple merge

diff --cc drivers/gpu/drm/i915/intel_pm.c
Simple merge