armv8: layerscape: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33

Drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT
is used instead.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Michael Walle <michael@walle.cc> [for kontron-sl28]
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index b1acb56..7bc792b 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2011-2013 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  */
 
 /*
@@ -618,7 +618,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
 
 /*

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index e467ef4..b5197b3 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  */
 
 /*
@@ -574,7 +574,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
 
 /*

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index a04d913..139beae 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  */
 
 /*
@@ -585,7 +585,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
 
 

diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h
index 5f11205..bfb4e67 100644 (file)
--- a/include/configs/kontron_sl28.h
+++ b/include/configs/kontron_sl28.h
@@ -56,11 +56,6 @@
 #define CONFIG_DDR_CLK_FREQ            100000000
 #define COUNTER_FREQUENCY_REAL         (CONFIG_SYS_CLK_FREQ / 4)
 
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 /* ethernet */
 #define CONFIG_SYS_RX_ETH_BUFFER       8
 

diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index 9fbeecf..44f9da7 100644 (file)
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017 NXP
+ * Copyright 2017, 2021 NXP
  */
 
 #ifndef __LS1012A2G5RDB_H__
@@ -13,11 +13,6 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
 #define CONFIG_SYS_SDRAM_SIZE          0x40000000
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 /* SATA */
 #define CONFIG_LIBATA
 #define CONFIG_SCSI_AHCI

diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index beb7440..f8b3861 100644 (file)
--- a/include/configs/ls1012afrwy.h
+++ b/include/configs/ls1012afrwy.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2018 NXP
+ * Copyright 2018, 2021 NXP
  */
 
 #ifndef __LS1012AFRWY_H__
@@ -33,11 +33,6 @@
        func(DHCP, dhcp, na)
 #endif
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 #define CONFIG_PCIE1           /* PCIE controller 1 */
 
 #define CONFIG_PCI_SCAN_SHOW

diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index bdcb8d6..3e5fdad 100644 (file)
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2021 NXP
  */
 
 #ifndef __LS1012AQDS_H__
@@ -93,11 +94,6 @@
                                DSPI_CTAR_DT(0))
 #define CONFIG_SPI_FLASH_EON /* cs3 */
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 #define CONFIG_PCIE1           /* PCIE controller 1 */
 
 #define CONFIG_PCI_SCAN_SHOW

diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index efa0284..c8a2f12 100644 (file)
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  * Copyright 2016 Freescale Semiconductor, Inc.
  */
 
@@ -38,12 +38,6 @@
 #define __PHY_ETH2_MASK                0xFB
 #define __PHY_ETH1_MASK                0xFD
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
-
 #define CONFIG_PCIE1           /* PCIE controller 1 */
 
 #define CONFIG_PCI_SCAN_SHOW

diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index 31fcdae..5900b8f 100644 (file)
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
  */
 
 #ifndef __L1028A_COMMON_H
@@ -93,11 +93,6 @@
 
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 #define OCRAM_NONSECURE_SIZE           0x00010000
 #define CONFIG_SYS_FSL_QSPI_BASE       0x20000000
 

diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 29a3790..65d63e2 100644 (file)
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2015 Freescale Semiconductor
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
  */
 
 #ifndef __LS1043A_COMMON_H
@@ -171,13 +171,6 @@
 #endif
 #endif
 
-/*  MMC  */
-#ifndef SPL_NO_MMC
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-#endif
-
 /*  DSPI  */
 #ifndef SPL_NO_DSPI
 #ifdef CONFIG_FSL_DSPI

diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 0c3978a..11e1a18 100644 (file)
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2016 Freescale Semiconductor
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
  */
 
 #ifndef __LS1046A_COMMON_H
@@ -165,13 +165,6 @@
                                                CONFIG_SYS_SCSI_MAX_LUN)
 #endif
 
-/* MMC */
-#ifndef SPL_NO_MMC
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-#endif
-
 /* FMan ucode */
 #ifndef SPL_NO_FMAN
 #define CONFIG_SYS_DPAA_FMAN

diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 4d04833..d032a3d 100644 (file)
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017, 2020 NXP
+ * Copyright 2017, 2020-2021 NXP
  */
 
 #ifndef __LS1088A_QDS_H
@@ -361,7 +361,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_FSL_MEMAC
 
 /*  MMC  */
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \
        QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER)
 

diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index 6f36dd4..5ade0eb 100644 (file)
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017, 2020 NXP
+ * Copyright 2017, 2020-2021 NXP
  */
 
 #ifndef __LS1088A_RDB_H
@@ -507,11 +507,6 @@
 #endif
 #endif
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 #ifndef SPL_NO_ENV
 
 #define BOOT_TARGET_DEVICES(func) \

diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index b3fce1b..41c1a86 100644 (file)
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017, 2019-2020 NXP
+ * Copyright 2017, 2019-2021 NXP
  * Copyright 2015 Freescale Semiconductor
  */
 
@@ -318,11 +318,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PCI_SCAN_SHOW
 #endif
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 /* Initial environment variables */
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #ifdef CONFIG_NXP_ESBC

diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 8626a1d..f2dc495 100644 (file)
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017, 2019-2020 NXP
+ * Copyright 2017, 2019-2021 NXP
  * Copyright 2015 Freescale Semiconductor
  */
 
@@ -300,11 +300,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_PCI_SCAN_SHOW
 #endif
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 #define BOOT_TARGET_DEVICES(func) \
        func(USB, usb, 0) \
        func(MMC, mmc, 0) \

diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 9f2b899..15ea0e4 100644 (file)
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2021 NXP
  */
 
 #ifndef __LX2_COMMON_H
@@ -129,11 +129,6 @@
 #define CONFIG_PCI_SCAN_SHOW
 #endif
 
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 /* SATA */
 
 #ifdef CONFIG_SCSI

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 8f92b82..3dbcc04 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2307,7 +2307,6 @@ CONFIG_SYS_FSL_MAX_NUM_OF_SEC
 CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR
 CONFIG_SYS_FSL_MC_BASE
 CONFIG_SYS_FSL_MC_SIZE
-CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 CONFIG_SYS_FSL_NI_BASE
 CONFIG_SYS_FSL_NI_SIZE
 CONFIG_SYS_FSL_NO_SERDES