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pata_cypress: fix PIO timings underclocking
authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Mon, 18 Jan 2010 17:15:47 +0000 (18:15 +0100)
committerJeff Garzik <jgarzik@redhat.com>
Mon, 1 Mar 2010 19:58:45 +0000 (14:58 -0500)
Timing registers should be programmed with the desired number of clocks
minus one clock.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>

No differences found
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