drm/radeon/sumo: implement support for disable_gfx_power_gating_in_uvd flag
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 3 Jul 2013 19:14:25 +0000 (15:14 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 3 Jul 2013 21:37:31 +0000 (17:37 -0400)
Some asic revisions need to disable PG when UVD is active.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

No differences found