Revert "riscv: image: Add new image type for RV64"

This reverts commit 14a4792a71db3561bea065415ac1f2ac69ef32b5 as
discussed in [1].

[1] https://lists.denx.de/pipermail/u-boot/2025-May/590841.html

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

diff --git a/boot/image.c b/boot/image.c
index 45299a7..139c5bd 100644 (file)
--- a/boot/image.c
+++ b/boot/image.c
@@ -92,8 +92,7 @@ static const table_entry_t uimage_arch[] = {
        {       IH_ARCH_ARC,            "arc",          "ARC",          },
        {       IH_ARCH_X86_64,         "x86_64",       "AMD x86_64",   },
        {       IH_ARCH_XTENSA,         "xtensa",       "Xtensa",       },
-       {       IH_ARCH_RISCV,          "riscv",        "RISC-V 32 Bit",},
-       {       IH_ARCH_RISCV64,        "riscv64",      "RISC-V 64 Bit",},
+       {       IH_ARCH_RISCV,          "riscv",        "RISC-V",       },
        {       -1,                     "",             "",             },
 };
 

diff --git a/include/image.h b/include/image.h
index 4620782..c1db838 100644 (file)
--- a/include/image.h
+++ b/include/image.h
@@ -138,8 +138,7 @@ enum {
        IH_ARCH_ARC,                    /* Synopsys DesignWare ARC */
        IH_ARCH_X86_64,                 /* AMD x86_64, Intel and Via */
        IH_ARCH_XTENSA,                 /* Xtensa       */
-       IH_ARCH_RISCV,                  /* RISC-V 32 bit*/
-       IH_ARCH_RISCV64,                /* RISC-V 64 bit*/
+       IH_ARCH_RISCV,                  /* RISC-V */
 
        IH_ARCH_COUNT,
 };