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drm/i915: IVB FBC WaFbcAsynchFlipDisableFbcQueue
authorRodrigo Vivi <rodrigo.vivi@gmail.com>
Mon, 6 May 2013 22:37:34 +0000 (19:37 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 10 May 2013 19:56:48 +0000 (21:56 +0200)
Display register 42000h bit 22 must be set to 1b for the entire time that
Frame Buffer Compression is enabled.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

No differences found
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