ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15

When there is a cluster power down cycle in suspend, we need to set up
the correct L2 RAM data RAM latency to make L2 cache work correctly. This
is only needed for cluster 0 and needs to be done in tegra_resume before
the cache is enabled.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

diff --cc arch/arm/mach-tegra/reset-handler.S
Simple merge

diff --cc arch/arm/mach-tegra/sleep.S
Simple merge