ARM: l2c: shmobile: remove cache size override

The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
index 34e7f3c..39e11f4 100644 (file)
--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
@@ -165,7 +165,7 @@ static void __init eva_init(void)
 
 #ifdef CONFIG_CACHE_L2X0
        /* Shared attribute override enable, 32K*8way */
-       l2x0_init(IOMEM(0xf0002000), 0x00440000, 0xc2000fff);
+       l2x0_init(IOMEM(0xf0002000), 0x00400000, 0xc20f0fff);
 #endif
 
        r8a7740_add_standard_devices_dt();

diff --cc arch/arm/mach-shmobile/board-armadillo800eva.c
Simple merge

diff --cc arch/arm/mach-shmobile/board-kzm9g-reference.c
Simple merge

diff --cc arch/arm/mach-shmobile/board-kzm9g.c
Simple merge

diff --cc arch/arm/mach-shmobile/setup-r8a7778.c
Simple merge

diff --cc arch/arm/mach-shmobile/setup-r8a7779.c
Simple merge