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PCI: rcar: Write zeroes to reserved PCIEPARL bits
authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Mon, 2 Feb 2015 05:09:58 +0000 (14:09 +0900)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 24 Feb 2015 06:23:32 +0000 (00:23 -0600)
The lower 7 bits of PCIEPARL are reserved.  When we write to this register,
these bits must be 0.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>

No differences found
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