All patches from shr kernel repository
-http://gitorious.org/~jama/htc-msm-2-6-32/openmoko-kernel/commits/shr-2.6.34
+http://gitorious.org/~jama/htc-msm-2-6-32/openmoko-kernel/commits/shr-2.6.34-nodrm
-dec0e10 Use 100 as HZ value on S3C24XX
-6165821 Force GPS power up on resume if it were powered up on suspend
-17e3948 wm8753: use snd_soc_jack on neo1973
-c4c7ad4 Fix printk level of s3c touchscreen release message
-4af6ed4 s3c2410_ts: jitter less touchscreen for glamo, version 4
-9f4c4ae Openmoko resume reason sysfs node ported from 2.6.29
-911da41 tslib relies on ts pressures events so this hack is needed to get tslib stuff working
-4571684 GTA02 bt - remember state of bluetooth in variable
-da72ac9 Enable powering off after 8s POWER press
-367e5a0 Rename /dev/s3c2410_serialXXX to /dev/ttySACXXX
-8c6e224 mach-gta02: fix PR2349, do not manage down
-cc57694 Enable 3D engine
-6efb1c3 glamo-display: fix WSOD for 242 timming
-bd1b283 glamo-display: Enable FIFO stage for the LCD engine's memory access
-8c7e255 save_regs.patch
-e88329a ar6000_delay.patch
-f1d852c usbhost.patch
-daf5121 accels.patch
-bc5da40 Use unlocked_ioctl rather than ioctl
-0e3dfae Fix claim of 2D register resource
-e8f4cb4 Debug statements for testing
-bba7d30 Fix dynamic command queue allocation
-aa1daae JBT6k74 work for KMS
-0497e8b Work on Glamo-core for DRM
-f56f798 Glamo DRM and KMS driver
-c05e860 DRM for platform devices
+b96c7ac glamo-display: fix WSOD for 242 timming
+6df2955 Use 100 as HZ value on S3C24XX
+65cbad2 Force GPS power up on resume if it were powered up on suspend
+ae17594 wm8753: use snd_soc_jack on neo1973
+7701ff7 Fix printk level of s3c touchscreen release message
+d5af368 s3c2410_ts: jitter less touchscreen for glamo, version 4
+b2da9d4 Openmoko resume reason sysfs node ported from 2.6.29
+a423cbb tslib relies on ts pressures events so this hack is needed to get tslib stuff working
+95cb2de GTA02 bt - remember state of bluetooth in variable
+0472afa Enable powering off after 8s POWER press
+ae813ec Rename /dev/s3c2410_serialXXX to /dev/ttySACXXX
+3d1b96b mach-gta02: fix PR2349, do not manage down
+96ba47b save_regs.patch
+63a020b ar6000_delay.patch
+56dd2ae usbhost.patch
+f66711b accels.patch
97c4db8 touchscreen: ignore unexpected interrupts
7d0d327 wm8753: fix build with gcc-4.4.2, which works ok with 4.1.2
ret = htcCallbacks.deviceInsertedHandler(hif);
if (ret == A_OK)
return 0;
-diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
-index 305c590..590324c 100644
---- a/drivers/gpu/drm/Kconfig
-+++ b/drivers/gpu/drm/Kconfig
-@@ -6,7 +6,7 @@
- #
- menuconfig DRM
- tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)"
-- depends on (AGP || AGP=n) && PCI && !EMULATED_CMPXCHG && MMU
-+ depends on (AGP || AGP=n) && !EMULATED_CMPXCHG && MMU
- select I2C
- select I2C_ALGOBIT
- help
-@@ -157,3 +157,19 @@ config DRM_SAVAGE
- help
- Choose this option if you have a Savage3D/4/SuperSavage/Pro/Twister
- chipset. If M is selected the module will be called savage.
-+
-+config DRM_GLAMO
-+ tristate "Glamo direct rendering and kernel modesetting support"
-+ depends on MFD_GLAMO && DRM
-+ select FB_CFB_FILLRECT
-+ select FB_CFB_COPYAREA
-+ select FB_CFB_IMAGEBLIT
-+ select DRM_KMS_HELPER
-+ help
-+ Direct Rendering Manager interface for the S-Media Glamo chip, as
-+ used in Openmoko FreeRunner (GTA02).
-+
-+ This DRM driver includes kernel modesetting (KMS) support. As such,
-+ do not select FB_GLAMO if you choose to enable this option.
-+
-+ If unsure, say N.
-diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
-index abe3f44..165058e 100644
---- a/drivers/gpu/drm/Makefile
-+++ b/drivers/gpu/drm/Makefile
-@@ -33,4 +33,5 @@ obj-$(CONFIG_DRM_SAVAGE)+= savage/
- obj-$(CONFIG_DRM_VMWGFX)+= vmwgfx/
- obj-$(CONFIG_DRM_VIA) +=via/
- obj-$(CONFIG_DRM_NOUVEAU) +=nouveau/
-+obj-$(CONFIG_DRM_GLAMO) += glamo/
- obj-y += i2c/
-diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
-index f7ba82e..30ce982 100644
---- a/drivers/gpu/drm/drm_bufs.c
-+++ b/drivers/gpu/drm/drm_bufs.c
-@@ -189,7 +189,7 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
--#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__)
-+#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) && !defined(__arm__)
- if (map->offset + (map->size-1) < map->offset ||
- map->offset < virt_to_phys(high_memory)) {
- kfree(map);
-diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
-index c9736ed..b064dd2 100644
---- a/drivers/gpu/drm/drm_drv.c
-+++ b/drivers/gpu/drm/drm_drv.c
-@@ -250,6 +250,7 @@ int drm_lastclose(struct drm_device * dev)
- */
- int drm_init(struct drm_driver *driver)
- {
-+#ifdef CONFIG_PCI
- struct pci_dev *pdev = NULL;
- const struct pci_device_id *pid;
- int i;
-@@ -283,11 +284,37 @@ int drm_init(struct drm_driver *driver)
- drm_get_dev(pdev, pid, driver);
- }
- }
-+#endif
- return 0;
- }
-
- EXPORT_SYMBOL(drm_init);
-
-+/**
-+ * Call this to associate a drm_driver with a platform_device.
-+ *
-+ * \return zero on success or a negative number on failure.
-+ *
-+ * This is a replacement for drm_init(), but for platform drivers.
-+ * In this case, the caller must provide the matching platform_device
-+ *
-+ * since there is no physical bus to scan through.
-+ *
-+ * \sa drm_init
-+ *
-+ */
-+int drm_platform_init(struct drm_driver *driver, struct platform_device *pdev,
-+ void *priv)
-+{
-+ DRM_DEBUG("\n");
-+
-+ INIT_LIST_HEAD(&driver->device_list);
-+
-+ return drm_get_platform_dev(pdev, driver, priv);
-+}
-+
-+EXPORT_SYMBOL(drm_platform_init);
-+
- void drm_exit(struct drm_driver *driver)
- {
- struct drm_device *dev, *tmp;
-diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
-index f0f6c6b..838c2ee 100644
---- a/drivers/gpu/drm/drm_info.c
-+++ b/drivers/gpu/drm/drm_info.c
-@@ -52,12 +52,28 @@ int drm_name_info(struct seq_file *m, void *data)
- return 0;
-
- if (master->unique) {
-- seq_printf(m, "%s %s %s\n",
-- dev->driver->pci_driver.name,
-- pci_name(dev->pdev), master->unique);
-+
-+ if (drm_core_is_platform(dev)) {
-+ seq_printf(m, "%s %s %s\n",
-+ dev->driver->name,
-+ dev_name(&dev->platform_dev->dev),
-+ master->unique);
-+ } else {
-+ seq_printf(m, "%s %s %s\n",
-+ dev->driver->pci_driver.name,
-+ pci_name(dev->pdev), master->unique);
-+ }
-+
- } else {
-- seq_printf(m, "%s %s\n", dev->driver->pci_driver.name,
-- pci_name(dev->pdev));
-+
-+ if (drm_core_is_platform(dev)) {
-+ seq_printf(m, "%s %s\n", dev->driver->name,
-+ dev_name(&dev->platform_dev->dev));
-+ } else {
-+ seq_printf(m, "%s %s\n", dev->driver->pci_driver.name,
-+ pci_name(dev->pdev));
-+ }
-+
- }
-
- return 0;
-@@ -325,4 +341,3 @@ int drm_vma_info(struct seq_file *m, void *data)
- }
-
- #endif
--
-diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
-index 9b9ff46..133ef29 100644
---- a/drivers/gpu/drm/drm_ioctl.c
-+++ b/drivers/gpu/drm/drm_ioctl.c
-@@ -83,7 +83,6 @@ int drm_setunique(struct drm_device *dev, void *data,
- {
- struct drm_unique *u = data;
- struct drm_master *master = file_priv->master;
-- int domain, bus, slot, func, ret;
-
- if (master->unique_len || master->unique)
- return -EBUSY;
-@@ -101,28 +100,46 @@ int drm_setunique(struct drm_device *dev, void *data,
-
- master->unique[master->unique_len] = '\0';
-
-- dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) +
-- strlen(master->unique) + 2, GFP_KERNEL);
-- if (!dev->devname)
-- return -ENOMEM;
-+ if ( !drm_core_is_platform(dev) ) {
-
-- sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name,
-- master->unique);
-+ int domain, bus, slot, func, ret;
-
-- /* Return error if the busid submitted doesn't match the device's actual
-- * busid.
-- */
-- ret = sscanf(master->unique, "PCI:%d:%d:%d", &bus, &slot, &func);
-- if (ret != 3)
-- return -EINVAL;
-- domain = bus >> 8;
-- bus &= 0xff;
-+ /* PCI device */
-+ dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) +
-+ strlen(master->unique) + 2, GFP_KERNEL);
-+ if (!dev->devname)
-+ return -ENOMEM;
-
-- if ((domain != drm_get_pci_domain(dev)) ||
-- (bus != dev->pdev->bus->number) ||
-- (slot != PCI_SLOT(dev->pdev->devfn)) ||
-- (func != PCI_FUNC(dev->pdev->devfn)))
-- return -EINVAL;
-+ sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name,
-+ master->unique);
-+
-+ /* Return error if the busid submitted doesn't match the
-+ * device's actual busid.
-+ */
-+ ret = sscanf(master->unique, "PCI:%d:%d:%d", &bus, &slot, &func);
-+ if (ret != 3)
-+ return -EINVAL;
-+ domain = bus >> 8;
-+ bus &= 0xff;
-+
-+ if ((domain != drm_get_pci_domain(dev)) ||
-+ (bus != dev->pdev->bus->number) ||
-+ (slot != PCI_SLOT(dev->pdev->devfn)) ||
-+ (func != PCI_FUNC(dev->pdev->devfn)))
-+ return -EINVAL;
-+
-+ } else {
-+
-+ /* Platform device */
-+ dev->devname = kmalloc(strlen(dev->driver->name) +
-+ strlen(master->unique) + 2, GFP_KERNEL);
-+ if (!dev->devname)
-+ return -ENOMEM;
-+
-+ sprintf(dev->devname, "%s@%s", dev->driver->name,
-+ master->unique);
-+
-+ }
-
- return 0;
- }
-@@ -141,23 +158,52 @@ static int drm_set_busid(struct drm_device *dev, struct drm_file *file_priv)
- if (master->unique == NULL)
- return -ENOMEM;
-
-- len = snprintf(master->unique, master->unique_len, "pci:%04x:%02x:%02x.%d",
-- drm_get_pci_domain(dev),
-- dev->pdev->bus->number,
-- PCI_SLOT(dev->pdev->devfn),
-- PCI_FUNC(dev->pdev->devfn));
-- if (len >= master->unique_len)
-- DRM_ERROR("buffer overflow");
-- else
-- master->unique_len = len;
--
-- dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) +
-- master->unique_len + 2, GFP_KERNEL);
-- if (dev->devname == NULL)
-- return -ENOMEM;
-+ if ( !drm_core_is_platform(dev) ) {
-+
-+ /* PCI device */
-
-- sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name,
-- master->unique);
-+ len = snprintf(master->unique, master->unique_len,
-+ "pci:%04x:%02x:%02x.%d",
-+ drm_get_pci_domain(dev),
-+ dev->pdev->bus->number,
-+ PCI_SLOT(dev->pdev->devfn),
-+ PCI_FUNC(dev->pdev->devfn));
-+ if (len >= master->unique_len)
-+ DRM_ERROR("buffer overflow");
-+ else
-+ master->unique_len = len;
-+
-+ dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) +
-+ master->unique_len + 2, GFP_KERNEL);
-+ if (dev->devname == NULL)
-+ return -ENOMEM;
-+
-+ sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name,
-+ master->unique);
-+
-+ } else {
-+
-+ /* Platform device */
-+
-+ int len;
-+
-+ len = snprintf(master->unique, master->unique_len,
-+ "platform:%s", dev->platform_dev->name);
-+
-+ if (len >= master->unique_len)
-+ DRM_ERROR("buffer overflow");
-+ else
-+ master->unique_len = len;
-+
-+ dev->devname = kmalloc(strlen(dev->driver->name)
-+ + master->unique_len + 2, GFP_KERNEL);
-+ if (dev->devname == NULL)
-+ return -ENOMEM;
-+
-+ sprintf(dev->devname, "%s@%s", dev->driver->name,
-+ master->unique);
-+
-+ }
-
- return 0;
- }
-diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
-index a0c365f..7e7eba6 100644
---- a/drivers/gpu/drm/drm_stub.c
-+++ b/drivers/gpu/drm/drm_stub.c
-@@ -246,8 +246,10 @@ static int drm_fill_in_dev(struct drm_device * dev, struct pci_dev *pdev,
- idr_init(&dev->drw_idr);
-
- dev->pdev = pdev;
-- dev->pci_device = pdev->device;
-- dev->pci_vendor = pdev->vendor;
-+ if (pdev) {
-+ dev->pci_device = pdev->device;
-+ dev->pci_vendor = pdev->vendor;
-+ }
-
- #ifdef __alpha__
- dev->hose = pdev->sysdata;
-@@ -465,6 +467,76 @@ err_g1:
- EXPORT_SYMBOL(drm_get_dev);
-
- /**
-+ *
-+ * Register a platform device as a DRM device
-+ *
-+ * \param pdev - platform device structure
-+ * \param driver - the matching drm_driver structure
-+ * \return zero on success or a negative number on failure.
-+ *
-+ * Attempt to gets inter module "drm" information. If we are first
-+ * then register the character device and inter module information.
-+ * Try and register, if we fail to register, backout previous work.
-+ *
-+ * \sa drm_get_dev
-+ */
-+int drm_get_platform_dev(struct platform_device *pdev,
-+ struct drm_driver *driver, void *priv)
-+{
-+ struct drm_device *dev;
-+ int ret;
-+ DRM_DEBUG("\n");
-+
-+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
-+ if (!dev)
-+ return -ENOMEM;
-+ dev->dev_private = priv;
-+
-+ if ((ret = drm_fill_in_dev(dev, NULL, NULL, driver))) {
-+ printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
-+ goto err_g1;
-+ }
-+ dev->platform_dev = pdev;
-+
-+ if (drm_core_check_feature(dev, DRIVER_MODESET)) {
-+ ret = drm_get_minor(dev, &dev->control, DRM_MINOR_CONTROL);
-+ if (ret)
-+ goto err_g2;
-+ }
-+
-+ if ((ret = drm_get_minor(dev, &dev->primary, DRM_MINOR_LEGACY)))
-+ goto err_g3;
-+
-+ if (dev->driver->load) {
-+ ret = dev->driver->load(dev, 0);
-+ if (ret)
-+ goto err_g3;
-+ }
-+
-+ /* setup the grouping for the legacy output */
-+ if (drm_core_check_feature(dev, DRIVER_MODESET)) {
-+ ret = drm_mode_group_init_legacy_group(dev, &dev->primary->mode_group);
-+ if (ret)
-+ goto err_g3;
-+ }
-+
-+ list_add_tail(&dev->driver_item, &driver->device_list);
-+
-+ DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
-+ driver->name, driver->major, driver->minor, driver->patchlevel,
-+ driver->date, dev->primary->index);
-+
-+ return 0;
-+
-+err_g3:
-+ drm_put_minor(&dev->primary);
-+err_g2:
-+err_g1:
-+ kfree(dev);
-+ return ret;
-+}
-+
-+/**
- * Put a secondary minor number.
- *
- * \param sec_minor - structure to be released
-diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
-index 25bbd30..947e731 100644
---- a/drivers/gpu/drm/drm_sysfs.c
-+++ b/drivers/gpu/drm/drm_sysfs.c
-@@ -488,7 +488,11 @@ int drm_sysfs_device_add(struct drm_minor *minor)
- int err;
- char *minor_str;
-
-- minor->kdev.parent = &minor->dev->pdev->dev;
-+ if (minor->dev->pdev) {
-+ minor->kdev.parent = &minor->dev->pdev->dev;
-+ } else {
-+ minor->kdev.parent = &minor->dev->platform_dev->dev;
-+ }
- minor->kdev.class = drm_class;
- minor->kdev.release = drm_sysfs_device_release;
- minor->kdev.devt = minor->device;
-diff --git a/drivers/gpu/drm/glamo/Makefile b/drivers/gpu/drm/glamo/Makefile
-new file mode 100644
-index 0000000..a111397
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/Makefile
-@@ -0,0 +1,8 @@
-+#
-+# Makefile for the Smedia Glamo DRM driver
-+#
-+
-+obj-$(CONFIG_DRM_GLAMO) += glamo-drm.o
-+
-+glamo-drm-objs := glamo-drm-drv.o glamo-cmdq.o glamo-buffer.o \
-+ glamo-display.o glamo-kms-fb.o glamo-fence.o
-diff --git a/drivers/gpu/drm/glamo/glamo-buffer.c b/drivers/gpu/drm/glamo/glamo-buffer.c
-new file mode 100644
-index 0000000..82ea0c0
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-buffer.c
-@@ -0,0 +1,374 @@
-+/*
-+ * SMedia Glamo 336x/337x memory management
-+ *
-+ * Copyright (c) 2009 Thomas White <taw@bitwiz.org.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ *
-+ * Memory mapping functions based on i915_gem.c, to which the following
-+ * notice applies:
-+ *
-+ * Copyright © 2008 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
-+ * IN THE SOFTWARE.
-+ *
-+ * Authors:
-+ * Eric Anholt <eric@anholt.net>
-+ */
-+
-+
-+#include <drm/drmP.h>
-+#include <drm/glamo_drm.h>
-+
-+#include "glamo-drm-private.h"
-+#include "glamo-cmdq.h" /* For glamo_cmdq_blank() */
-+
-+
-+struct drm_gem_object *glamo_gem_object_alloc(struct drm_device *dev, int size,
-+ int alignment)
-+{
-+ struct drm_gem_object *obj;
-+ struct glamodrm_handle *gdrm;
-+ struct drm_glamo_gem_object *gobj;
-+
-+ gdrm = dev->dev_private;
-+
-+ size = roundup(size, PAGE_SIZE);
-+
-+ obj = drm_gem_object_alloc(dev, size);
-+ if (obj == NULL) return NULL;
-+
-+ /* See glamodrm_gem_init_object() below */
-+ gobj = obj->driver_private;
-+
-+ /* Allocate memory for this object in VRAM */
-+ gobj->block = drm_mm_search_free(gdrm->mmgr, size, alignment, 1);
-+ if (!gobj->block) {
-+ goto fail;
-+ }
-+ gobj->block = drm_mm_get_block(gobj->block, size, alignment);
-+ if (!gobj->block) {
-+ goto fail;
-+ }
-+
-+ /* Arrange for the contents to be set to zero */
-+ glamo_cmdq_blank(gdrm, obj);
-+
-+ return obj;
-+
-+fail:
-+ mutex_lock(&dev->struct_mutex);
-+ drm_gem_object_unreference(obj);
-+ mutex_unlock(&dev->struct_mutex);
-+ printk(KERN_INFO "[glamo-drm] Failed to allocate object\n");
-+
-+ return NULL;
-+}
-+
-+
-+int glamo_ioctl_gem_create(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ struct drm_glamo_gem_create *args = data;
-+ struct drm_gem_object *obj;
-+ int handle, ret, alignment, size;
-+
-+ /* Alignment must be a non-zero multiple of 2 */
-+ alignment = args->alignment;
-+ if ( alignment < 2 ) alignment = 2;
-+ if ( alignment % 2 ) alignment *= 2;
-+
-+ /* Size must be similarly sanitised */
-+ size = args->size;
-+ if ( size < 2 ) size = 2;
-+ if ( size % 2 ) size += 1;
-+
-+ /* Create an object */
-+ obj = glamo_gem_object_alloc(dev, size, alignment);
-+ if ( obj == NULL ) return -ENOMEM;
-+
-+ /* Create a handle for it */
-+ ret = drm_gem_handle_create(file_priv, obj, &handle);
-+ mutex_lock(&dev->struct_mutex);
-+ drm_gem_object_handle_unreference(obj);
-+ mutex_unlock(&dev->struct_mutex);
-+ if (ret) goto fail;
-+
-+ /* Return */
-+ args->handle = handle;
-+ return 0;
-+
-+fail:
-+ mutex_lock(&dev->struct_mutex);
-+ drm_gem_object_unreference(obj);
-+ mutex_unlock(&dev->struct_mutex);
-+ printk(KERN_INFO "[glamo-drm] Failed to allocate object\n");
-+ return ret;
-+}
-+
-+
-+int glamodrm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
-+{
-+ struct drm_gem_object *obj = vma->vm_private_data;
-+ struct drm_device *dev = obj->dev;
-+ struct drm_glamo_gem_object *gobj = obj->driver_private;
-+ struct glamodrm_handle *gdrm = dev->dev_private;
-+ pgoff_t page_offset;
-+ unsigned long pfn;
-+ int ret = 0;
-+
-+ /* We don't use vmf->pgoff since that has the fake offset */
-+ page_offset = ((unsigned long)vmf->virtual_address - vma->vm_start) >>
-+ PAGE_SHIFT;
-+
-+ mutex_lock(&dev->struct_mutex);
-+ pfn = ((gdrm->vram->start + GLAMO_OFFSET_FB + gobj->block->start)
-+ >> PAGE_SHIFT) + page_offset;
-+ ret = vm_insert_pfn(vma, (unsigned long)vmf->virtual_address, pfn);
-+ mutex_unlock(&dev->struct_mutex);
-+
-+ switch (ret) {
-+ case -ENOMEM:
-+ case -EAGAIN:
-+ return VM_FAULT_OOM;
-+ case -EFAULT:
-+ case -EBUSY:
-+ DRM_ERROR("can't insert pfn?? fault or busy...\n");
-+ return VM_FAULT_SIGBUS;
-+ default:
-+ return VM_FAULT_NOPAGE;
-+ }
-+}
-+
-+
-+static int glamo_gem_create_mmap_offset(struct drm_gem_object *obj)
-+{
-+ struct drm_device *dev = obj->dev;
-+ struct drm_gem_mm *mm = dev->mm_private;
-+ struct drm_glamo_gem_object *gobj = obj->driver_private;
-+ struct drm_map_list *list;
-+ struct drm_local_map *map;
-+ int ret = 0;
-+
-+ /* Set the object up for mmap'ing */
-+ list = &obj->map_list;
-+ list->map = kzalloc(sizeof(struct drm_map_list), GFP_KERNEL);
-+ if (!list->map)
-+ return -ENOMEM;
-+
-+ map = list->map;
-+ map->type = _DRM_GEM;
-+ map->size = obj->size;
-+ map->handle = obj;
-+
-+ /* Get a DRM GEM mmap offset allocated... */
-+ list->file_offset_node = drm_mm_search_free(&mm->offset_manager,
-+ obj->size / PAGE_SIZE, 0, 0);
-+ if (!list->file_offset_node) {
-+ DRM_ERROR("failed to allocate offset for bo %d\n", obj->name);
-+ ret = -ENOMEM;
-+ goto out_free_list;
-+ }
-+
-+ list->file_offset_node = drm_mm_get_block(list->file_offset_node,
-+ obj->size / PAGE_SIZE, 0);
-+ if (!list->file_offset_node) {
-+ ret = -ENOMEM;
-+ goto out_free_list;
-+ }
-+
-+ list->hash.key = list->file_offset_node->start;
-+ if (drm_ht_insert_item(&mm->offset_hash, &list->hash)) {
-+ DRM_ERROR("failed to add to map hash\n");
-+ goto out_free_mm;
-+ }
-+
-+ /* By now we should be all set, any drm_mmap request on the offset
-+ * below will get to our mmap & fault handler */
-+ gobj->mmap_offset = ((uint64_t) list->hash.key) << PAGE_SHIFT;
-+
-+ return 0;
-+
-+out_free_mm:
-+ drm_mm_put_block(list->file_offset_node);
-+out_free_list:
-+ kfree(list->map);
-+
-+ return ret;
-+}
-+
-+
-+int glamo_ioctl_gem_mmap(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ struct drm_glamo_gem_mmap *args = data;
-+ struct drm_gem_object *obj;
-+ struct drm_glamo_gem_object *gobj;
-+ int ret;
-+
-+ obj = drm_gem_object_lookup(dev, file_priv, args->handle);
-+ if (obj == NULL)
-+ return -EBADF;
-+
-+ mutex_lock(&dev->struct_mutex);
-+
-+ gobj = obj->driver_private;
-+ if (!gobj->mmap_offset) {
-+ ret = glamo_gem_create_mmap_offset(obj);
-+ if (ret) {
-+ printk(KERN_CRIT "Couldn't create mmap offset\n");
-+ drm_gem_object_unreference(obj);
-+ mutex_unlock(&dev->struct_mutex);
-+ return ret;
-+ }
-+ }
-+
-+ args->offset = gobj->mmap_offset;
-+
-+ drm_gem_object_unreference(obj);
-+ mutex_unlock(&dev->struct_mutex);
-+
-+ return 0;
-+}
-+
-+
-+int glamo_ioctl_gem_pin(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ printk(KERN_INFO "glamo_ioctl_gem_pin\n");
-+ return 0;
-+}
-+
-+
-+int glamo_ioctl_gem_unpin(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ printk(KERN_INFO "glamo_ioctl_gem_unpin\n");
-+ return 0;
-+}
-+
-+
-+int glamo_ioctl_gem_pread(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ printk(KERN_INFO "glamo_ioctl_gem_pread\n");
-+ return 0;
-+}
-+
-+
-+int glamo_ioctl_gem_pwrite(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ printk(KERN_INFO "glamo_ioctl_gem_pwrite\n");
-+ return 0;
-+}
-+
-+
-+int glamodrm_gem_init_object(struct drm_gem_object *obj)
-+{
-+ struct drm_glamo_gem_object *gobj;
-+
-+ /* Allocate a private structure */
-+ gobj = kzalloc(sizeof(*gobj), GFP_KERNEL);
-+ if (!gobj) return -ENOMEM;
-+
-+ obj->driver_private = gobj;
-+ gobj->obj = obj;
-+
-+ return 0;
-+}
-+
-+
-+void glamodrm_gem_free_object(struct drm_gem_object *obj)
-+{
-+ struct drm_glamo_gem_object *gobj;
-+ struct drm_map_list *list;
-+ struct drm_device *dev;
-+ struct drm_gem_mm *mm;
-+ struct drm_local_map *map;
-+
-+ dev = obj->dev;
-+ mm = dev->mm_private;
-+ gobj = obj->driver_private;
-+
-+ /* Free the VRAM */
-+ if ( gobj->block != NULL ) {
-+ drm_mm_put_block(gobj->block);
-+ }
-+
-+ /* Release mappings */
-+ list = &obj->map_list;
-+ drm_ht_remove_item(&mm->offset_hash, &list->hash);
-+ if (list->file_offset_node) {
-+ drm_mm_put_block(list->file_offset_node);
-+ list->file_offset_node = NULL;
-+ }
-+ map = list->map;
-+ if (map) {
-+ kfree(map);
-+ list->map = NULL;
-+ }
-+
-+ /* Free the private structure */
-+ kfree(obj->driver_private);
-+}
-+
-+
-+/* Memory management initialisation */
-+int glamo_buffer_init(struct glamodrm_handle *gdrm)
-+{
-+ gdrm->mmgr = kzalloc(sizeof(struct drm_mm), GFP_KERNEL);
-+ drm_mm_init(gdrm->mmgr, 0, gdrm->vram_size);
-+
-+ /* Reserve a scratch buffer. We do this outside the protections
-+ * of the other GEM code. To do this safely, the allocation must
-+ * be a multiple of PAGE_SIZE. */
-+ gdrm->scratch = drm_mm_search_free(gdrm->mmgr, PAGE_SIZE, 4, 1);
-+ if ( gdrm->scratch ) {
-+ gdrm->scratch = drm_mm_get_block(gdrm->scratch, PAGE_SIZE, 4);
-+ }
-+ if ( !gdrm->scratch ) {
-+ printk(KERN_WARNING "[glamo-drm] Couldn't allocate"
-+ " scratch buffer!\n");
-+ }
-+
-+ return 0;
-+}
-+
-+
-+/* Memory management finalisation */
-+int glamo_buffer_final(struct glamodrm_handle *gdrm)
-+{
-+ drm_mm_takedown(gdrm->mmgr);
-+ kfree(gdrm->mmgr);
-+ return 0;
-+}
-diff --git a/drivers/gpu/drm/glamo/glamo-buffer.h b/drivers/gpu/drm/glamo/glamo-buffer.h
-new file mode 100644
-index 0000000..41f18fd
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-buffer.h
-@@ -0,0 +1,60 @@
-+/*
-+ * SMedia Glamo 336x/337x memory management
-+ *
-+ * Copyright (c) 2009 Thomas White <taw@bitwiz.org.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+
-+#ifndef __GLAMO_BUFFER_H
-+#define __GLAMO_BUFFER_H
-+
-+#include <drm/drmP.h>
-+
-+#include "glamo-drm-private.h"
-+
-+extern int glamo_buffer_init(struct glamodrm_handle *gdrm);
-+extern int glamo_buffer_final(struct glamodrm_handle *gdrm);
-+
-+extern int glamodrm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
-+
-+extern int glamodrm_gem_init_object(struct drm_gem_object *obj);
-+
-+extern void glamodrm_gem_free_object(struct drm_gem_object *obj);
-+
-+extern struct drm_gem_object *glamo_gem_object_alloc(struct drm_device *dev,
-+ int size, int alignment);
-+
-+extern int glamo_ioctl_gem_create(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv);
-+
-+extern int glamo_ioctl_gem_mmap(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv);
-+
-+extern int glamo_ioctl_gem_pin(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv);
-+
-+extern int glamo_ioctl_gem_unpin(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv);
-+
-+extern int glamo_ioctl_gem_pread(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv);
-+
-+extern int glamo_ioctl_gem_pwrite(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv);
-+
-+#endif /* __GLAMO_BUFFER_H */
-diff --git a/drivers/gpu/drm/glamo/glamo-cmdq.c b/drivers/gpu/drm/glamo/glamo-cmdq.c
-new file mode 100644
-index 0000000..84551e3
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-cmdq.c
-@@ -0,0 +1,564 @@
-+/*
-+ * SMedia Glamo 336x/337x command queue handling
-+ *
-+ * Copyright (C) 2008-2009 Thomas White <taw@bitwiz.org.uk>
-+ * Copyright (C) 2009 Andreas Pokorny <andreas.pokorny@gmail.com>
-+ * Based on xf86-video-glamo (see below for details)
-+ *
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ * Command queue handling functions based on those from xf86-video-glamo, to
-+ * which the following licence applies:
-+ *
-+ * Copyright 2007 OpenMoko, Inc.
-+ * Copyright © 2009 Lars-Peter Clausen <lars@metafoo.de>
-+ *
-+ * This driver is based on Xati,
-+ * Copyright 2004 Eric Anholt
-+ *
-+ * Permission to use, copy, modify, distribute, and sell this software and its
-+ * documentation for any purpose is hereby granted without fee, provided that
-+ * the above copyright notice appear in all copies and that both that copyright
-+ * notice and this permission notice appear in supporting documentation, and
-+ * that the name of the copyright holders not be used in advertising or
-+ * publicity pertaining to distribution of the software without specific,
-+ * written prior permission. The copyright holders make no representations
-+ * about the suitability of this software for any purpose. It is provided "as
-+ * is" without express or implied warranty.
-+ *
-+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
-+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
-+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
-+ * OF THIS SOFTWARE.
-+ */
-+
-+
-+#include <drm/drmP.h>
-+#include <drm/glamo_drm.h>
-+
-+#include <linux/mfd/glamo-core.h>
-+#include <linux/mfd/glamo-regs.h>
-+
-+#include "glamo-drm-private.h"
-+#include "glamo-buffer.h"
-+
-+
-+#define GLAMO_CMDQ_SIZE (128 * 1024) /* 128k ring buffer */
-+
-+
-+static inline void reg_write(struct glamodrm_handle *gdrm,
-+ u_int16_t reg, u_int16_t val)
-+{
-+ iowrite16(val, gdrm->reg_base + reg);
-+}
-+
-+
-+static inline u16 reg_read(struct glamodrm_handle *gdrm, u_int16_t reg)
-+{
-+ return ioread16(gdrm->reg_base + reg);
-+}
-+
-+
-+static u32 glamo_get_read(struct glamodrm_handle *gdrm)
-+{
-+ /* we could turn off clock here */
-+ u32 ring_read = reg_read(gdrm, GLAMO_REG_CMDQ_READ_ADDRL);
-+ ring_read |= (reg_read(gdrm, GLAMO_REG_CMDQ_READ_ADDRH) & 0x7) << 16;
-+
-+ return ring_read;
-+}
-+
-+
-+static u32 glamo_get_write(struct glamodrm_handle *gdrm)
-+{
-+ u32 ring_write = reg_read(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRL);
-+ ring_write |= (reg_read(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRH) & 0x7) << 16;
-+
-+ return ring_write;
-+}
-+
-+
-+/* Add commands to the ring buffer */
-+int glamo_add_to_ring(struct glamodrm_handle *gdrm, u16 *addr,
-+ unsigned int count)
-+{
-+ size_t ring_write, ring_read;
-+ size_t new_ring_write;
-+
-+ if ( count >= GLAMO_CMDQ_SIZE ) {
-+ printk(KERN_WARNING "[glamo-drm] CmdQ submission too large\n");
-+ return -EINVAL;
-+ }
-+
-+ down(&gdrm->add_to_ring);
-+
-+ ring_write = glamo_get_write(gdrm);
-+
-+ /* Calculate where we'll end up */
-+ new_ring_write = (ring_write + count) % GLAMO_CMDQ_SIZE;
-+
-+ /* Wait until there is enough space to queue the cmd buffer */
-+ if (new_ring_write > ring_write) {
-+ /* Loop while the read pointer is between the old and new
-+ * positions */
-+ do {
-+ ring_read = glamo_get_read(gdrm);
-+ } while (ring_read > ring_write && ring_read < new_ring_write);
-+ } else {
-+ /* Same, but kind of inside-out */
-+ do {
-+ ring_read = glamo_get_read(gdrm);
-+ } while (ring_read > ring_write || ring_read < new_ring_write);
-+ }
-+
-+ /* Are we about to wrap around? */
-+ if (ring_write >= new_ring_write) {
-+
-+ u32 rest_size;
-+
-+ /* Wrap around */
-+ rest_size = GLAMO_CMDQ_SIZE - ring_write; /* Space left */
-+
-+ /* Write from current position to end */
-+ memcpy_toio(gdrm->cmdq_base+ring_write, addr, rest_size);
-+
-+ /* Write from start */
-+ memcpy_toio(gdrm->cmdq_base, addr+(rest_size>>1),
-+ count - rest_size);
-+
-+ /* ring_write being 0 will result in a deadlock because the
-+ * cmdq read will never stop. To avoid such an behaviour insert
-+ * an empty instruction. */
-+ if (new_ring_write == 0) {
-+ iowrite16(0x0000, gdrm->cmdq_base);
-+ iowrite16(0x0000, gdrm->cmdq_base + 2);
-+ new_ring_write = 4;
-+ }
-+
-+ } else {
-+
-+ memcpy_toio(gdrm->cmdq_base+ring_write, addr, count);
-+
-+ }
-+
-+ reg_write(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRH,
-+ (new_ring_write >> 16) & 0x7f);
-+ reg_write(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRL,
-+ new_ring_write & 0xffff);
-+
-+ if ( !(reg_read(gdrm, GLAMO_REG_CMDQ_STATUS) & 1<<3) ) {
-+ printk(KERN_ERR "[glamo-drm] CmdQ decode failure.\n");
-+ }
-+
-+ up(&gdrm->add_to_ring);
-+
-+ return 0;
-+}
-+
-+
-+/* Return true for a legal sequence of commands, otherwise false */
-+static int glamo_sanitize_buffer(u16 *cmds, unsigned int count)
-+{
-+ /* XXX FIXME TODO: Implementation... */
-+ return 1;
-+}
-+
-+
-+/* Substitute the real addresses in VRAM for any required buffer objects */
-+static int glamo_do_relocation(struct glamodrm_handle *gdrm,
-+ drm_glamo_cmd_buffer_t *cbuf, u16 *cmds,
-+ struct drm_device *dev,
-+ struct drm_file *file_priv)
-+{
-+ u32 *handles;
-+ int *offsets;
-+ int nobjs = cbuf->nobjs;
-+ int i;
-+
-+ if ( nobjs > 32 ) return -EINVAL; /* Get real... */
-+
-+ handles = kmalloc(nobjs*sizeof(u32), GFP_KERNEL);
-+ if ( handles == NULL ) return -1;
-+ if ( copy_from_user(handles, cbuf->objs, nobjs*sizeof(u32)) )
-+ return -1;
-+
-+ offsets = kmalloc(nobjs*sizeof(int), GFP_KERNEL);
-+ if ( offsets == NULL ) return -1;
-+ if ( copy_from_user(offsets, cbuf->obj_pos, nobjs*sizeof(int)) )
-+ return -1;
-+
-+ for ( i=0; i<nobjs; i++ ) {
-+
-+ u32 handle = handles[i];
-+ int offset = offsets[i];
-+ struct drm_gem_object *obj;
-+ struct drm_glamo_gem_object *gobj;
-+ u32 addr;
-+ u16 addr_low, addr_high;
-+
-+ if ( offset > cbuf->bufsz ) {
-+ printk(KERN_WARNING "[glamo-drm] Offset out of range"
-+ " for this relocation!\n");
-+ goto fail;
-+ }
-+
-+ obj = drm_gem_object_lookup(dev, file_priv, handle);
-+ if ( obj == NULL ) return -1;
-+
-+ /* Unref the object now, or it'll never get freed.
-+ * This should really happen after the GPU has finished
-+ * the commands which are about to be submitted. */
-+ drm_gem_object_unreference(obj);
-+
-+ gobj = obj->driver_private;
-+ if ( gobj == NULL ) {
-+ printk(KERN_WARNING "[glamo-drm] This object has no"
-+ " private data!\n");
-+ goto fail;
-+ }
-+
-+ addr = GLAMO_OFFSET_FB + gobj->block->start;
-+ addr_low = addr & 0xffff;
-+ addr_high = (addr >> 16) & 0x7f;
-+
-+ /* FIXME: Should really check that the register is a
-+ * valid one for this relocation. */
-+
-+ *(cmds+(offset/2)+1) = addr_low;
-+ *(cmds+(offset/2)+3) = addr_high;
-+
-+ }
-+
-+ kfree(handles);
-+ kfree(offsets);
-+ return 0;
-+
-+fail:
-+ kfree(handles);
-+ kfree(offsets);
-+ return -1;
-+}
-+
-+
-+/* This is DRM_IOCTL_GLAMO_CMDBUF */
-+int glamo_ioctl_cmdbuf(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ int ret = 0;
-+ struct glamodrm_handle *gdrm;
-+ unsigned int count;
-+ drm_glamo_cmd_buffer_t *cbuf = data;
-+ u16 *cmds;
-+
-+ gdrm = dev->dev_private;
-+
-+ count = cbuf->bufsz;
-+
-+ if ( count > PAGE_SIZE ) return -EINVAL;
-+
-+ cmds = kmalloc(count, GFP_KERNEL);
-+ if ( cmds == NULL ) return -ENOMEM;
-+ if ( copy_from_user(cmds, cbuf->buf, count) ) {
-+ printk(KERN_WARNING "[glamo-drm] copy from user failed\n");
-+ ret = -EINVAL;
-+ goto cleanup;
-+ }
-+
-+ /* Check the buffer isn't going to tell Glamo to enact naughtiness */
-+ if ( !glamo_sanitize_buffer(cmds, count) ) {
-+ printk(KERN_WARNING "[glamo-drm] sanitize buffer failed\n");
-+ ret = -EINVAL;
-+ goto cleanup;
-+ }
-+
-+ /* Perform relocation, if necessary */
-+ if ( cbuf->nobjs ) {
-+ if ( glamo_do_relocation(gdrm, cbuf, cmds, dev, file_priv) )
-+ {
-+ printk(KERN_WARNING "[glamo-drm] Relocation failed\n");
-+ ret = -EINVAL;
-+ goto cleanup;
-+ }
-+ }
-+
-+ glamo_add_to_ring(gdrm, cmds, count);
-+
-+cleanup:
-+ kfree(cmds);
-+
-+ return ret;
-+}
-+
-+
-+/* Return true for a legal sequence of commands, otherwise false */
-+static int glamo_sanitize_burst(u16 base, u16 *cmds, unsigned int count)
-+{
-+ /* XXX FIXME TODO: Implementation... */
-+ return 1;
-+}
-+
-+
-+static int glamo_relocate_burst(struct glamodrm_handle *gdrm,
-+ drm_glamo_cmd_burst_t *cbuf, u16 *data,
-+ struct drm_device *dev,
-+ struct drm_file *file_priv)
-+{
-+ u32 *handles;
-+ int *offsets;
-+ int nobjs = cbuf->nobjs;
-+ int i;
-+
-+ if ( nobjs > 32 ) return -EINVAL; /* Get real... */
-+
-+ handles = kmalloc(nobjs*sizeof(u32), GFP_KERNEL);
-+ if ( handles == NULL ) return -1;
-+ if ( copy_from_user(handles, cbuf->objs, nobjs*sizeof(u32)) )
-+ return -1;
-+
-+ offsets = kmalloc(nobjs*sizeof(int), GFP_KERNEL);
-+ if ( offsets == NULL ) return -1;
-+ if ( copy_from_user(offsets, cbuf->obj_pos, nobjs*sizeof(int)) )
-+ return -1;
-+
-+ for ( i=0; i<nobjs; i++ ) {
-+
-+ u32 handle = handles[i];
-+ int offset = offsets[i];
-+ struct drm_gem_object *obj;
-+ struct drm_glamo_gem_object *gobj;
-+ u32 addr;
-+ u16 addr_low, addr_high;
-+
-+ if ( offset > cbuf->bufsz ) {
-+ printk(KERN_WARNING "[glamo-drm] Offset out of range"
-+ " for this relocation!\n");
-+ goto fail;
-+ }
-+
-+ obj = drm_gem_object_lookup(dev, file_priv, handle);
-+ if ( obj == NULL ) return -1;
-+
-+ /* Unref the object now, or it'll never get freed.
-+ * FIXME: This should really happen after the GPU has
-+ * finished executing these commands. */
-+ drm_gem_object_unreference(obj);
-+
-+ gobj = obj->driver_private;
-+ if ( gobj == NULL ) {
-+ printk(KERN_WARNING "[glamo-drm] This object has no"
-+ " private data!\n");
-+ goto fail;
-+ }
-+
-+ addr = GLAMO_OFFSET_FB + gobj->block->start;
-+ addr_low = addr & 0xffff;
-+ addr_high = (addr >> 16) & 0x7f;
-+
-+ /* FIXME: Should really check that the register is a
-+ * valid one for this relocation. */
-+
-+ *(data+(offset/2)+0) = addr_low;
-+ *(data+(offset/2)+1) = addr_high;
-+
-+ }
-+
-+ kfree(handles);
-+ kfree(offsets);
-+ return 0;
-+
-+fail:
-+ kfree(handles);
-+ kfree(offsets);
-+ return -1;
-+}
-+
-+
-+/* This is DRM_IOCTL_GLAMO_CMDBURST */
-+int glamo_ioctl_cmdburst(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ int ret = 0;
-+ struct glamodrm_handle *gdrm;
-+ drm_glamo_cmd_burst_t *cbuf = data;
-+ u16 *burst;
-+ size_t burst_size;
-+ size_t data_size;
-+
-+ gdrm = dev->dev_private;
-+
-+ data_size = cbuf->bufsz;
-+ if ( data_size % 4 ) data_size += 2;
-+ if ( data_size % 4 ) return -EINVAL;
-+ burst_size = data_size + 4; /* Add space for header */
-+ if ( burst_size > PAGE_SIZE ) return -EINVAL;
-+
-+ burst = kmalloc(burst_size, GFP_KERNEL);
-+ if ( burst == NULL ) return -ENOMEM;
-+
-+ /* Get data from userspace */
-+ if ( copy_from_user(burst+2, cbuf->data, cbuf->bufsz) ) {
-+ printk(KERN_WARNING "[glamo-drm] copy from user failed\n");
-+ ret = -EINVAL;
-+ goto cleanup;
-+ }
-+
-+ /* Sanitise */
-+ if ( !glamo_sanitize_burst(cbuf->base, burst+2, cbuf->bufsz) ) {
-+ printk(KERN_WARNING "[glamo-drm] sanitize buffer failed\n");
-+ ret = -EINVAL;
-+ goto cleanup;
-+ }
-+
-+ /* Relocate */
-+ if ( cbuf->nobjs ) {
-+ if ( glamo_relocate_burst(gdrm, cbuf, burst+2, dev, file_priv) )
-+ {
-+ printk(KERN_WARNING "[glamo-drm] Relocation failed\n");
-+ ret = -EINVAL;
-+ goto cleanup;
-+ }
-+ }
-+
-+ /* Add burst header */
-+ burst[0] = 1<<15 | cbuf->base;
-+ burst[1] = data_size / 2; /* -> 2-byte words */
-+ if ( burst[1] & 0x01 ) {
-+ printk(KERN_WARNING "[glamo-drm] Burst not aligned!\n");
-+ goto cleanup;
-+ }
-+
-+ /* Zero-pad if necessary */
-+ if ( data_size % 4 ) {
-+ burst[burst_size-1] = 0x0000;
-+ }
-+
-+ /* Add to command queue */
-+ glamo_add_to_ring(gdrm, burst, burst_size);
-+
-+cleanup:
-+ kfree(burst);
-+
-+ return ret;
-+}
-+
-+
-+int glamo_cmdq_setup(struct glamodrm_handle *gdrm)
-+{
-+ unsigned int i;
-+
-+ init_MUTEX(&gdrm->add_to_ring);
-+
-+ /* Enable 2D */
-+ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_2D);
-+ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_2D);
-+
-+ /* Enable 3D */
-+ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_3D);
-+ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_3D);
-+
-+ /* Start by zeroing the command queue memory */
-+ for ( i=0; i<GLAMO_CMDQ_SIZE; i+=2 ) {
-+ iowrite16(0x0000, gdrm->cmdq_base+i);
-+ }
-+
-+ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_CMDQ);
-+ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_CMDQ);
-+
-+ /* Set up command queue location */
-+ reg_write(gdrm, GLAMO_REG_CMDQ_BASE_ADDRL,
-+ gdrm->cmdq_offs & 0xffff);
-+ reg_write(gdrm, GLAMO_REG_CMDQ_BASE_ADDRH,
-+ (gdrm->cmdq_offs >> 16) & 0x7f);
-+
-+ /* Length of command queue in 1k blocks, minus one */
-+ reg_write(gdrm, GLAMO_REG_CMDQ_LEN, (GLAMO_CMDQ_SIZE >> 10)-1);
-+ reg_write(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRH, 0);
-+ reg_write(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRL, 0);
-+ reg_write(gdrm, GLAMO_REG_CMDQ_CONTROL,
-+ 1 << 12 | /* Turbo flip (?) */
-+ 5 << 8 | /* no interrupt */
-+ 8 << 4); /* HQ threshold */
-+
-+ return 0;
-+}
-+
-+
-+int glamo_cmdq_init(struct drm_device *dev)
-+{
-+ struct drm_gem_object *obj;
-+ struct drm_glamo_gem_object *gobj;
-+ struct glamodrm_handle *gdrm = dev->dev_private;
-+ int ret = 0;
-+
-+ obj = glamo_gem_object_alloc(dev, GLAMO_CMDQ_SIZE, 4);
-+ if ( !obj ) {
-+ printk(KERN_ERR "[glamo-drm] Failed to allocate CmdQ\n");
-+ ret = -ENOMEM;
-+ goto out;
-+ }
-+ gobj = obj->driver_private;
-+ gdrm->cmdq_offs = GLAMO_OFFSET_FB + gobj->block->start;
-+ gdrm->cmdq_base = ioremap(gdrm->vram->start + gdrm->cmdq_offs,
-+ GLAMO_CMDQ_SIZE);
-+
-+ /* Set up registers */
-+ glamo_cmdq_setup(gdrm);
-+
-+out:
-+ return ret;
-+}
-+
-+
-+int glamo_cmdq_shutdown(struct glamodrm_handle *gdrm)
-+{
-+ iounmap(gdrm->cmdq_base);
-+ return 0;
-+}
-+
-+
-+void glamo_cmdq_suspend(struct glamodrm_handle *gdrm)
-+{
-+ /* Placeholder... */
-+}
-+
-+
-+void glamo_cmdq_resume(struct glamodrm_handle *gdrm)
-+{
-+ glamo_cmdq_setup(gdrm);
-+}
-+
-+
-+/* Initialise an object's contents to zero.
-+ * This is in glamo-cmdq.c in the hope that we can accelerate it later. */
-+void glamo_cmdq_blank(struct glamodrm_handle *gdrm, struct drm_gem_object *obj)
-+{
-+ char __iomem *cookie;
-+ struct drm_glamo_gem_object *gobj;
-+ int i;
-+
-+ gobj = obj->driver_private;
-+
-+ cookie = ioremap(gdrm->vram->start + gobj->block->start, obj->size);
-+ for ( i=0; i<obj->size; i+=2 ) {
-+ iowrite16(0, cookie+i);
-+ }
-+ iounmap(cookie);
-+}
-diff --git a/drivers/gpu/drm/glamo/glamo-cmdq.h b/drivers/gpu/drm/glamo/glamo-cmdq.h
-new file mode 100644
-index 0000000..6d7f184
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-cmdq.h
-@@ -0,0 +1,49 @@
-+/* Smedia Glamo 336x/337x command queue handling
-+ *
-+ * Copyright (c) 2008-2009 Thomas White <taw@bitwiz.org.uk>
-+ * Copyright (c) 2009 Andreas Pokorny <andreas.pokorny@gmail.com>
-+ * Based on xf86-video-glamo
-+ * Copyright 2007 OpenMoko, Inc.
-+ * Copyright © 2009 Lars-Peter Clausen <lars@metafoo.de>
-+ *
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __GLAMO_CMDQ_H
-+#define __GLAMO_CMDQ_H
-+
-+#include <drm/drmP.h>
-+
-+#include "glamo-drm-private.h"
-+
-+extern int glamo_ioctl_cmdbuf(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv);
-+extern int glamo_ioctl_cmdburst(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv);
-+extern void glamo_cmdq_blank(struct glamodrm_handle *gdrm,
-+ struct drm_gem_object *obj);
-+
-+extern int glamo_cmdq_init(struct drm_device *de);
-+extern int glamo_cmdq_shutdown(struct glamodrm_handle *gdrm);
-+extern void glamo_cmdq_suspend(struct glamodrm_handle *gdrm);
-+extern void glamo_cmdq_resume(struct glamodrm_handle *gdrm);
-+
-+extern int glamo_add_to_ring(struct glamodrm_handle *gdrm, u16 *addr,
-+ unsigned int count);
-+
-+#endif /* __GLAMO_CMDQ_H */
-diff --git a/drivers/gpu/drm/glamo/glamo-display.c b/drivers/gpu/drm/glamo/glamo-display.c
-new file mode 100644
-index 0000000..0c02e66
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-display.c
-@@ -0,0 +1,983 @@
-+/*
-+ * SMedia Glamo 336x/337x display
-+ *
-+ * Copyright (C) 2008-2009 Thomas White <taw@bitwiz.org.uk>
-+ *
-+ * Based on glamo-fb.c (C) 2007-2008 by Openmoko, Inc.
-+ * Author: Harald Welte <laforge@openmoko.org>
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ *
-+ * Based on intel_display.c and intel_crt.c from drivers/gpu/drm/i915
-+ * to which the following licence applies:
-+ *
-+ * Copyright © 2006-2007 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ *
-+ * Authors:
-+ * Eric Anholt <eric@anholt.net>
-+ *
-+ */
-+
-+#include <drm/drmP.h>
-+#include <drm/glamo_drm.h>
-+#include <drm/drm_crtc_helper.h>
-+#include <drm/drm_crtc.h>
-+#include <linux/glamofb.h>
-+#include <linux/jbt6k74.h>
-+
-+#include <linux/mfd/glamo-core.h>
-+#include <linux/mfd/glamo-regs.h>
-+
-+#include "glamo-drm-private.h"
-+#include "glamo-kms-fb.h"
-+#include "glamo-display.h"
-+
-+
-+#define GLAMO_LCD_WIDTH_MASK 0x03FF
-+#define GLAMO_LCD_HEIGHT_MASK 0x03FF
-+#define GLAMO_LCD_PITCH_MASK 0x07FE
-+#define GLAMO_LCD_HV_TOTAL_MASK 0x03FF
-+#define GLAMO_LCD_HV_RETR_START_MASK 0x03FF
-+#define GLAMO_LCD_HV_RETR_END_MASK 0x03FF
-+#define GLAMO_LCD_HV_RETR_DISP_START_MASK 0x03FF
-+#define GLAMO_LCD_HV_RETR_DISP_END_MASK 0x03FF
-+
-+
-+struct glamofb_par {
-+ struct drm_device *dev;
-+ struct drm_display_mode *our_mode;
-+ struct glamo_framebuffer *glamo_fb;
-+ int crtc_count;
-+ /* crtc currently bound to this */
-+ uint32_t crtc_ids[2];
-+};
-+
-+
-+static int reg_read_lcd(struct glamodrm_handle *gdrm, u_int16_t reg)
-+{
-+ int i = 0;
-+
-+ for (i = 0; i != 2; i++)
-+ nop();
-+
-+ return ioread16(gdrm->lcd_base + reg);
-+}
-+
-+
-+static void reg_write_lcd(struct glamodrm_handle *gdrm,
-+ u_int16_t reg, u_int16_t val)
-+{
-+ int i = 0;
-+
-+ for (i = 0; i != 2; i++)
-+ nop();
-+
-+ iowrite16(val, gdrm->lcd_base + reg);
-+}
-+
-+
-+static void reg_set_bit_mask_lcd(struct glamodrm_handle *gdrm,
-+ u_int16_t reg, u_int16_t mask,
-+ u_int16_t val)
-+{
-+ u_int16_t tmp;
-+
-+ val &= mask;
-+
-+ tmp = reg_read_lcd(gdrm, reg);
-+ tmp &= ~mask;
-+ tmp |= val;
-+ reg_write_lcd(gdrm, reg, tmp);
-+}
-+
-+
-+/* Note that this has nothing at all to do with the engine command queue
-+ * in glamo-cmdq.c */
-+static inline int glamo_lcd_cmdq_empty(struct glamodrm_handle *gdrm)
-+{
-+ /* DGCMdQempty -- 1 == command queue is empty */
-+ return reg_read_lcd(gdrm, GLAMO_REG_LCD_STATUS1) & (1 << 15);
-+}
-+
-+
-+/* call holding gfb->lock_cmd when locking, until you unlock */
-+int glamo_lcd_cmd_mode(struct glamodrm_handle *gdrm, int on)
-+{
-+ int timeout = 2000000;
-+
-+ dev_dbg(gdrm->dev, "glamofb_cmd_mode(on=%d)\n", on);
-+ if (on) {
-+
-+ while ((!glamo_lcd_cmdq_empty(gdrm)) && (timeout--))
-+ /* yield() */;
-+ if (timeout < 0) {
-+ printk(KERN_ERR "*************"
-+ " LCD command queue never got empty "
-+ "*************\n");
-+ return -EIO;
-+ }
-+
-+ /* display the entire frame then switch to command */
-+ reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1,
-+ GLAMO_LCD_CMD_TYPE_DISP |
-+ GLAMO_LCD_CMD_DATA_FIRE_VSYNC);
-+
-+ /* wait until lcd idle */
-+ timeout = 2000000;
-+ while ((!reg_read_lcd(gdrm, GLAMO_REG_LCD_STATUS2) & (1 << 12))
-+ && (timeout--))
-+ /* yield() */;
-+ if (timeout < 0) {
-+ printk(KERN_ERR"*************"
-+ " LCD never idle "
-+ "*************\n");
-+ return -EIO;
-+ }
-+
-+ mdelay(100);
-+
-+ } else {
-+ /* RGB interface needs vsync/hsync */
-+ int mode;
-+ mode = reg_read_lcd(gdrm, GLAMO_REG_LCD_MODE3);
-+ if ( mode & GLAMO_LCD_MODE3_RGB)
-+ reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1,
-+ GLAMO_LCD_CMD_TYPE_DISP |
-+ GLAMO_LCD_CMD_DATA_DISP_SYNC);
-+ mdelay(1);
-+ reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1,
-+ GLAMO_LCD_CMD_TYPE_DISP |
-+ GLAMO_LCD_CMD_DATA_DISP_FIRE);
-+ }
-+
-+ return 0;
-+}
-+
-+
-+static struct glamo_script lcd_init_script[] = {
-+ { GLAMO_REG_LCD_MODE1, 0x0020 },
-+ /* no display rotation, no hardware cursor, no dither, no gamma,
-+ * no retrace flip, vsync low-active, hsync low active,
-+ * no TVCLK, no partial display, hw dest color from fb,
-+ * no partial display mode, LCD1, software flip, */
-+ { GLAMO_REG_LCD_MODE2, 0x9020 },
-+ /* video flip, no ptr, no ptr, dhclk off,
-+ * normal mode, no cpuif,
-+ * res, serial msb first, single fb, no fr ctrl,
-+ * cpu if bits all zero, no crc
-+ * 0000 0000 0010 0000 */
-+ { GLAMO_REG_LCD_MODE3, 0x0b40 },
-+ /* src data rgb565, res, 18bit rgb666
-+ * 000 01 011 0100 0000 */
-+ { GLAMO_REG_LCD_POLARITY, 0x440c },
-+ /* DE high active, no cpu/lcd if, cs0 force low, a0 low active,
-+ * np cpu if, 9bit serial data, sclk rising edge latch data
-+ * 01 00 0 100 0 000 01 0 0 */
-+ /* The following values assume 640*480@16bpp */
-+ /* FIXME: fb0 has not yet been allocated! */
-+ { GLAMO_REG_LCD_A_BASE1, PAGE_SIZE }, /* display A base address 15:0 */
-+ { GLAMO_REG_LCD_A_BASE2, 0x4000 }, /* display A base address 22:16 */
-+ { GLAMO_REG_LCD_B_BASE1, 0x6000 }, /* display B base address 15:0 */
-+ { GLAMO_REG_LCD_B_BASE2, 0x0009 }, /* display B base address 22:16 */
-+ { GLAMO_REG_LCD_CURSOR_BASE1, 0xC000 }, /* cursor base address 15:0 */
-+ { GLAMO_REG_LCD_CURSOR_BASE2, 0x0012 }, /* cursor base address 22:16 */
-+ { GLAMO_REG_LCD_COMMAND2, 0x0000 }, /* display page A */
-+};
-+
-+
-+static int glamo_run_lcd_script(struct glamodrm_handle *gdrm,
-+ struct glamo_script *script, int len)
-+{
-+ int i;
-+
-+ for (i = 0; i < len; i++) {
-+ struct glamo_script *line = &script[i];
-+
-+ if (line->reg == 0xffff)
-+ return 0;
-+ else if (line->reg == 0xfffe)
-+ msleep(line->val);
-+ else
-+ reg_write_lcd(gdrm, script[i].reg, script[i].val);
-+ }
-+
-+ return 0;
-+}
-+
-+
-+static bool glamo_crtc_mode_fixup(struct drm_crtc *crtc,
-+ struct drm_display_mode *mode,
-+ struct drm_display_mode *adjusted_mode)
-+{
-+ return true;
-+}
-+
-+
-+static int glamo_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
-+ struct drm_framebuffer *old_fb)
-+{
-+ struct glamodrm_handle *gdrm;
-+ struct glamo_crtc *gcrtc;
-+ struct glamo_framebuffer *gfb;
-+ struct drm_gem_object *obj;
-+ struct drm_glamo_gem_object *gobj;
-+ u32 addr;
-+ u16 addr_low, addr_high;
-+
-+ printk(KERN_CRIT "Setting base!\n");
-+
-+ if (!crtc->fb) {
-+ DRM_DEBUG("No FB bound\n");
-+ return -EINVAL;
-+ }
-+
-+ /* Dig out our handle */
-+ gcrtc = to_glamo_crtc(crtc);
-+ gdrm = gcrtc->gdrm; /* Here it is! */
-+
-+ if ( !gcrtc->pixel_clock_on ) {
-+ printk(KERN_WARNING "[glamo-drm] Display is off - "
-+ "enabling it before setting base.\n");
-+ glamo_lcd_power(gdrm, 1);
-+ }
-+
-+ gfb = to_glamo_framebuffer(crtc->fb);
-+ obj = gfb->obj;
-+ gobj = obj->driver_private;
-+
-+ addr = GLAMO_OFFSET_FB + gobj->block->start;
-+ addr_low = addr & 0xffff;
-+ addr_high = ((addr >> 16) & 0x7f) | 0x4000;
-+
-+ glamo_lcd_cmd_mode(gdrm, 1);
-+ reg_write_lcd(gdrm, GLAMO_REG_LCD_A_BASE1, addr_low);
-+ reg_write_lcd(gdrm, GLAMO_REG_LCD_A_BASE2, addr_high);
-+ glamo_lcd_cmd_mode(gdrm, 0);
-+
-+ return 0;
-+}
-+
-+
-+static int glamo_crtc_mode_set(struct drm_crtc *crtc,
-+ struct drm_display_mode *mode,
-+ struct drm_display_mode *adjusted_mode,
-+ int x, int y,
-+ struct drm_framebuffer *old_fb)
-+{
-+ struct glamodrm_handle *gdrm;
-+ struct glamo_crtc *gcrtc;
-+ int retr_start, retr_end, disp_start, disp_end;
-+ int rot;
-+
-+ /* Dig out our handle */
-+ gcrtc = to_glamo_crtc(crtc);
-+ gdrm = gcrtc->gdrm; /* Here it is! */
-+
-+ if ( !gcrtc->pixel_clock_on ) {
-+ printk(KERN_WARNING "[glamo-drm] Display is off - "
-+ "enabling it before setting mode.\n");
-+ glamo_lcd_power(gdrm, 1);
-+ msleep(500);
-+ }
-+
-+ printk(KERN_CRIT "Setting mode!\n");
-+
-+ /* Rotate? */
-+ if ( (mode->hdisplay == 640) && (mode->vdisplay == 480) ) {
-+ rot = GLAMO_LCD_ROT_MODE_90;
-+ } else if ( (mode->hdisplay == 480) && (mode->vdisplay == 640) ) {
-+ rot = GLAMO_LCD_ROT_MODE_0;
-+ } else if ( (mode->hdisplay == 320) && (mode->vdisplay == 240) ) {
-+ rot = GLAMO_LCD_ROT_MODE_90;
-+ } else if ( (mode->hdisplay == 240) && (mode->vdisplay == 320) ) {
-+ rot = GLAMO_LCD_ROT_MODE_0;
-+ } else {
-+ printk(KERN_WARNING "[glamo-drm] Couldn't choose rotation.\n");
-+ rot = GLAMO_LCD_ROT_MODE_0;
-+ }
-+
-+ glamo_lcd_cmd_mode(gdrm, 1);
-+
-+ /* Set dimensions */
-+ if ( rot == GLAMO_LCD_ROT_MODE_0 ) {
-+
-+ glamo_engine_reclock(gdrm->glamo_core, GLAMO_ENGINE_LCD,
-+ mode->clock);
-+
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
-+ GLAMO_LCD_WIDTH_MASK, mode->hdisplay);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HEIGHT,
-+ GLAMO_LCD_HEIGHT_MASK, mode->vdisplay);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_PITCH,
-+ GLAMO_LCD_PITCH_MASK, mode->hdisplay*2);
-+
-+ /* Set rotation */
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
-+ GLAMO_LCD_ROT_MODE_MASK, rot);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_MODE1,
-+ GLAMO_LCD_MODE1_ROTATE_EN,
-+ (rot != GLAMO_LCD_ROT_MODE_0) ?
-+ GLAMO_LCD_MODE1_ROTATE_EN : 0);
-+
-+ /* Convert "X modeline timings" into "Glamo timings" */
-+ retr_start = 0;
-+ retr_end = retr_start + mode->hsync_end - mode->hsync_start;
-+ disp_start = mode->htotal - mode->hsync_start;
-+ disp_end = disp_start + mode->hdisplay;
-+
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_TOTAL,
-+ GLAMO_LCD_HV_TOTAL_MASK, mode->htotal);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_START,
-+ GLAMO_LCD_HV_RETR_START_MASK, retr_start);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_END,
-+ GLAMO_LCD_HV_RETR_END_MASK, retr_end);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_START,
-+ GLAMO_LCD_HV_RETR_DISP_START_MASK, disp_start);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_END,
-+ GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
-+
-+ /* The same in the vertical direction */
-+ retr_start = 0;
-+ retr_end = retr_start + mode->vsync_end - mode->vsync_start;
-+ disp_start = mode->vtotal - mode->vsync_start;
-+ disp_end = disp_start + mode->vdisplay;
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_TOTAL,
-+ GLAMO_LCD_HV_TOTAL_MASK, mode->vtotal);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_START,
-+ GLAMO_LCD_HV_RETR_START_MASK, retr_start);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_END,
-+ GLAMO_LCD_HV_RETR_END_MASK, retr_end);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_START,
-+ GLAMO_LCD_HV_RETR_DISP_START_MASK,
-+ disp_start);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_END,
-+ GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
-+
-+ } else {
-+
-+ glamo_engine_reclock(gdrm->glamo_core, GLAMO_ENGINE_LCD,
-+ mode->clock/2);
-+
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
-+ GLAMO_LCD_WIDTH_MASK, mode->vdisplay);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HEIGHT,
-+ GLAMO_LCD_HEIGHT_MASK, mode->hdisplay);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_PITCH,
-+ GLAMO_LCD_PITCH_MASK, mode->hdisplay*2);
-+
-+ /* Set rotation */
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
-+ GLAMO_LCD_ROT_MODE_MASK, rot);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_MODE1,
-+ GLAMO_LCD_MODE1_ROTATE_EN,
-+ (rot != GLAMO_LCD_ROT_MODE_0) ?
-+ GLAMO_LCD_MODE1_ROTATE_EN : 0);
-+
-+ /* Apply "vertical" numbers to the horizontal registers */
-+ retr_start = 0;
-+ retr_end = retr_start + mode->vsync_end - mode->vsync_start;
-+ disp_start = mode->vtotal - mode->vsync_start;
-+ disp_end = disp_start + mode->vdisplay;
-+
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_TOTAL,
-+ GLAMO_LCD_HV_TOTAL_MASK, mode->vtotal);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_START,
-+ GLAMO_LCD_HV_RETR_START_MASK, retr_start);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_END,
-+ GLAMO_LCD_HV_RETR_END_MASK, retr_end);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_START,
-+ GLAMO_LCD_HV_RETR_DISP_START_MASK,
-+ disp_start);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_END,
-+ GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
-+
-+ /* Apply "horizontal" numbers to the vertical registers */
-+ retr_start = 0;
-+ retr_end = retr_start + mode->hsync_end - mode->hsync_start;
-+ disp_start = mode->htotal - mode->hsync_start;
-+ disp_end = disp_start + mode->hdisplay;
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_TOTAL,
-+ GLAMO_LCD_HV_TOTAL_MASK, mode->htotal);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_START,
-+ GLAMO_LCD_HV_RETR_START_MASK, retr_start);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_END,
-+ GLAMO_LCD_HV_RETR_END_MASK, retr_end);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_START,
-+ GLAMO_LCD_HV_RETR_DISP_START_MASK,
-+ disp_start);
-+ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_END,
-+ GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
-+
-+ }
-+
-+ gdrm->saved_clock = mode->clock;
-+
-+ glamo_lcd_cmd_mode(gdrm, 0);
-+
-+ glamo_crtc_mode_set_base(crtc, 0, 0, old_fb);
-+
-+ if ( mode->hdisplay == 240 ) {
-+ jbt6k74_finish_resolutionchange(JBT_RESOLUTION_QVGA);
-+ } else {
-+ jbt6k74_finish_resolutionchange(JBT_RESOLUTION_VGA);
-+ }
-+
-+ gcrtc->current_mode = *mode;
-+ gcrtc->current_mode_set = 1;
-+ gcrtc->current_fb = old_fb;
-+
-+ return 0;
-+}
-+
-+
-+/* This is not the right place to switch power on/off, because the helper
-+ * stuff ends up calling this before/after setting the mode. We can't
-+ * set modes with the display off (although backlight off would be OK) */
-+static void glamo_crtc_dpms(struct drm_crtc *crtc, int mode)
-+{
-+ /* do nothing */
-+}
-+
-+
-+static void glamo_crtc_prepare(struct drm_crtc *crtc)
-+{
-+}
-+
-+
-+static void glamo_crtc_commit(struct drm_crtc *crtc)
-+{
-+}
-+
-+
-+static int glamo_crtc_cursor_set(struct drm_crtc *crtc,
-+ struct drm_file *file_priv,
-+ uint32_t handle,
-+ uint32_t width, uint32_t height)
-+{
-+ return 0;
-+}
-+
-+
-+static int glamo_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
-+{
-+ return 0;
-+}
-+
-+
-+static void glamo_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
-+ u16 *blue, uint32_t size)
-+{
-+}
-+
-+
-+static void glamo_crtc_destroy(struct drm_crtc *crtc)
-+{
-+ struct glamo_crtc *glamo_crtc = to_glamo_crtc(crtc);
-+ drm_crtc_cleanup(crtc);
-+ kfree(glamo_crtc);
-+}
-+
-+
-+static enum drm_connector_status
-+glamo_connector_detect(struct drm_connector *connector)
-+{
-+ /* One hopes it hasn't been de-soldered... */
-+ return connector_status_connected;
-+}
-+
-+
-+static void glamo_connector_destroy(struct drm_connector *connector)
-+{
-+ drm_sysfs_connector_remove(connector);
-+ drm_connector_cleanup(connector);
-+ kfree(connector);
-+}
-+
-+
-+static int glamo_connector_get_modes(struct drm_connector *connector)
-+{
-+ struct glamo_fb_platform_data *fb_info;
-+ struct glamo_output *goutput = to_glamo_output(connector);
-+ struct glamodrm_handle *gdrm = goutput->gdrm;
-+ int i;
-+
-+ /* Dig out the record which will tell us about the hardware */
-+ fb_info = gdrm->glamo_core->pdata->fb_data;
-+
-+ for ( i=0; i<fb_info->num_modes; i++ ) {
-+
-+ struct drm_display_mode *mode;
-+
-+ mode = drm_mode_create(connector->dev);
-+ if ( !mode ) continue;
-+
-+ mode->type = DRM_MODE_TYPE_DEFAULT | DRM_MODE_TYPE_PREFERRED;
-+
-+ /* Convert framebuffer timings into KMS timings.
-+ * First: ps -> kHz */
-+ mode->clock = 1000000000UL / fb_info->modes[i].pixclock;
-+ mode->clock *= 1000; /* then kHz -> Hz */
-+ mode->hdisplay = fb_info->modes[i].xres;
-+ mode->hsync_start = fb_info->modes[i].right_margin
-+ + mode->hdisplay;
-+ mode->hsync_end = mode->hsync_start
-+ + fb_info->modes[i].hsync_len;
-+ mode->htotal = mode->hsync_end + fb_info->modes[i].left_margin;
-+ mode->hskew = 0;
-+
-+ mode->vdisplay = fb_info->modes[i].yres;
-+ mode->vsync_start = fb_info->modes[i].lower_margin
-+ + mode->vdisplay;
-+ mode->vsync_end = mode->vsync_start
-+ + fb_info->modes[i].vsync_len;
-+ mode->vtotal = mode->vsync_end + fb_info->modes[i].upper_margin;
-+ mode->vscan = 0;
-+
-+ /* Physical size */
-+ mode->width_mm = fb_info->width;
-+ mode->height_mm = fb_info->height;
-+
-+ drm_mode_set_name(mode);
-+ drm_mode_probed_add(connector, mode);
-+
-+ }
-+
-+ return fb_info->num_modes;
-+}
-+
-+
-+static int glamo_connector_set_property(struct drm_connector *connector,
-+ struct drm_property *property,
-+ uint64_t value)
-+{
-+ return 0;
-+}
-+
-+
-+static int glamo_connector_mode_valid(struct drm_connector *connector,
-+ struct drm_display_mode *mode)
-+{
-+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
-+ return MODE_NO_DBLESCAN;
-+
-+ return MODE_OK;
-+}
-+
-+
-+struct drm_encoder *
-+glamo_connector_best_encoder(struct drm_connector *connector)
-+{
-+ struct glamo_output *glamo_output = to_glamo_output(connector);
-+ return &glamo_output->enc;
-+}
-+
-+
-+static void glamo_encoder_dpms(struct drm_encoder *encoder, int mode)
-+{
-+}
-+
-+
-+static bool glamo_encoder_mode_fixup(struct drm_encoder *encoder,
-+ struct drm_display_mode *mode,
-+ struct drm_display_mode *adjusted_mode)
-+{
-+ if ( mode->clock == 0 ) return false;
-+ return true;
-+}
-+
-+
-+void glamo_encoder_prepare(struct drm_encoder *encoder)
-+{
-+}
-+
-+
-+void glamo_encoder_commit(struct drm_encoder *encoder)
-+{
-+}
-+
-+
-+static void glamo_encoder_mode_set(struct drm_encoder *encoder,
-+ struct drm_display_mode *mode,
-+ struct drm_display_mode *adjusted_mode)
-+{
-+}
-+
-+
-+static void glamo_encoder_destroy(struct drm_encoder *encoder)
-+{
-+ drm_encoder_cleanup(encoder);
-+}
-+
-+
-+static void glamo_framebuffer_destroy(struct drm_framebuffer *fb)
-+{
-+ struct glamo_framebuffer *glamo_fb = to_glamo_framebuffer(fb);
-+ struct drm_device *dev = fb->dev;
-+
-+ drm_framebuffer_cleanup(fb);
-+ mutex_lock(&dev->struct_mutex);
-+ drm_gem_object_unreference(glamo_fb->obj);
-+ mutex_unlock(&dev->struct_mutex);
-+
-+ kfree(glamo_fb);
-+}
-+
-+static int glamo_framebuffer_create_handle(struct drm_framebuffer *fb,
-+ struct drm_file *file_priv,
-+ unsigned int *handle)
-+{
-+ struct glamo_framebuffer *glamo_fb = to_glamo_framebuffer(fb);
-+ struct drm_gem_object *object = glamo_fb->obj;
-+
-+ return drm_gem_handle_create(file_priv, object, handle);
-+}
-+
-+
-+static const struct drm_framebuffer_funcs glamo_fb_funcs = {
-+ .destroy = glamo_framebuffer_destroy,
-+ .create_handle = glamo_framebuffer_create_handle,
-+};
-+
-+
-+int glamo_framebuffer_create(struct drm_device *dev,
-+ struct drm_mode_fb_cmd *mode_cmd,
-+ struct drm_framebuffer **fb,
-+ struct drm_gem_object *obj)
-+{
-+ struct glamo_framebuffer *glamo_fb;
-+ int ret;
-+
-+ glamo_fb = kzalloc(sizeof(*glamo_fb), GFP_KERNEL);
-+ if (!glamo_fb)
-+ return -ENOMEM;
-+
-+ ret = drm_framebuffer_init(dev, &glamo_fb->base, &glamo_fb_funcs);
-+ if (ret) {
-+ DRM_ERROR("framebuffer init failed %d\n", ret);
-+ return ret;
-+ }
-+
-+ drm_helper_mode_fill_fb_struct(&glamo_fb->base, mode_cmd);
-+
-+ glamo_fb->obj = obj;
-+
-+ *fb = &glamo_fb->base;
-+
-+ return 0;
-+}
-+
-+
-+static struct drm_framebuffer *
-+glamo_user_framebuffer_create(struct drm_device *dev,
-+ struct drm_file *filp,
-+ struct drm_mode_fb_cmd *mode_cmd)
-+{
-+ struct drm_gem_object *obj;
-+ struct drm_framebuffer *fb;
-+ int ret;
-+
-+ obj = drm_gem_object_lookup(dev, filp, mode_cmd->handle);
-+ if (!obj)
-+ return NULL;
-+
-+ ret = glamo_framebuffer_create(dev, mode_cmd, &fb, obj);
-+ if (ret) {
-+ drm_gem_object_unreference(obj);
-+ return NULL;
-+ }
-+
-+ return fb;
-+}
-+
-+
-+int glamo_fbchanged(struct drm_device *dev)
-+{
-+ return 0;
-+}
-+
-+
-+/* CRTC functions */
-+static const struct drm_crtc_funcs glamo_crtc_funcs = {
-+ .cursor_set = glamo_crtc_cursor_set,
-+ .cursor_move = glamo_crtc_cursor_move,
-+ .gamma_set = glamo_crtc_gamma_set,
-+ .set_config = drm_crtc_helper_set_config,
-+ .destroy = glamo_crtc_destroy,
-+};
-+
-+
-+/* CRTC helper functions */
-+static const struct drm_crtc_helper_funcs glamo_crtc_helper_funcs = {
-+ .dpms = glamo_crtc_dpms,
-+ .mode_fixup = glamo_crtc_mode_fixup,
-+ .mode_set = glamo_crtc_mode_set,
-+ .mode_set_base = glamo_crtc_mode_set_base,
-+ .prepare = glamo_crtc_prepare,
-+ .commit = glamo_crtc_commit,
-+};
-+
-+
-+/* Connector functions */
-+static const struct drm_connector_funcs glamo_connector_funcs = {
-+ .detect = glamo_connector_detect,
-+ .fill_modes = drm_helper_probe_single_connector_modes,
-+ .destroy = glamo_connector_destroy,
-+ .set_property = glamo_connector_set_property,
-+};
-+
-+
-+/* Connector helper functions */
-+static const struct drm_connector_helper_funcs glamo_connector_helper_funcs = {
-+ .mode_valid = glamo_connector_mode_valid,
-+ .get_modes = glamo_connector_get_modes,
-+ .best_encoder = glamo_connector_best_encoder,
-+};
-+
-+
-+/* Encoder functions */
-+static const struct drm_encoder_funcs glamo_encoder_funcs = {
-+ .destroy = glamo_encoder_destroy,
-+};
-+
-+
-+/* Encoder helper functions */
-+static const struct drm_encoder_helper_funcs glamo_encoder_helper_funcs = {
-+ .dpms = glamo_encoder_dpms,
-+ .mode_fixup = glamo_encoder_mode_fixup,
-+ .prepare = glamo_encoder_prepare,
-+ .commit = glamo_encoder_commit,
-+ .mode_set = glamo_encoder_mode_set,
-+};
-+
-+
-+/* Mode functions */
-+static const struct drm_mode_config_funcs glamo_mode_funcs = {
-+ .fb_create = glamo_user_framebuffer_create,
-+ .fb_changed = glamo_fbchanged
-+};
-+
-+
-+static struct drm_mode_set kernelfb_mode;
-+
-+
-+/* Restore's the kernel's fbcon mode, used for panic path */
-+void glamo_display_restore(void)
-+{
-+ drm_crtc_helper_set_config(&kernelfb_mode);
-+}
-+
-+
-+static int glamo_display_panic(struct notifier_block *n, unsigned long ununsed,
-+ void *panic_str)
-+{
-+ DRM_ERROR("panic occurred, switching back to text console\n");
-+
-+ glamo_display_restore();
-+ return 0;
-+}
-+
-+
-+static struct notifier_block paniced = {
-+ .notifier_call = glamo_display_panic,
-+};
-+
-+
-+int glamo_display_init(struct drm_device *dev)
-+{
-+ struct glamodrm_handle *gdrm;
-+ struct glamo_crtc *glamo_crtc;
-+ struct glamo_output *glamo_output;
-+ struct drm_connector *connector;
-+ struct glamo_framebuffer *glamo_fb;
-+ struct fb_info *info;
-+ struct glamofb_par *par;
-+ struct drm_mode_set *modeset;
-+
-+ gdrm = dev->dev_private;
-+
-+ /* Initial setup of the LCD controller */
-+ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD);
-+ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_LCD);
-+
-+ glamo_run_lcd_script(gdrm, lcd_init_script,
-+ ARRAY_SIZE(lcd_init_script));
-+
-+ drm_mode_config_init(dev);
-+
-+ dev->mode_config.min_width = 240;
-+ dev->mode_config.min_height = 240;
-+ dev->mode_config.max_width = 640;
-+ dev->mode_config.max_height = 640;
-+
-+ dev->mode_config.funcs = (void *)&glamo_mode_funcs;
-+
-+ /* Initialise our CRTC object.
-+ * Only one connector per CRTC. We know this: it's kind of soldered. */
-+ glamo_crtc = kzalloc(sizeof(struct glamo_crtc)
-+ + sizeof(struct drm_connector *), GFP_KERNEL);
-+ if (glamo_crtc == NULL) return 1;
-+ glamo_crtc->gdrm = gdrm;
-+ gdrm->crtc = (struct drm_crtc *)glamo_crtc;
-+ glamo_crtc->pixel_clock_on = 1;
-+ glamo_crtc->blank_mode = DRM_MODE_DPMS_OFF;
-+ drm_crtc_init(dev, &glamo_crtc->base, &glamo_crtc_funcs);
-+ drm_crtc_helper_add(&glamo_crtc->base, &glamo_crtc_helper_funcs);
-+
-+ glamo_crtc->mode_set.crtc = &glamo_crtc->base;
-+ glamo_crtc->mode_set.connectors =
-+ (struct drm_connector **)(glamo_crtc + 1);
-+ glamo_crtc->mode_set.num_connectors = 0;
-+
-+ /* Create our "output" object: consists of an output and an encoder */
-+ glamo_output = kzalloc(sizeof(struct glamo_output), GFP_KERNEL);
-+ if (glamo_output == NULL) return 1;
-+ connector = &glamo_output->base;
-+ glamo_output->gdrm = gdrm;
-+
-+ /* Initialise the connector */
-+ drm_connector_init(dev, connector, &glamo_connector_funcs,
-+ DRM_MODE_CONNECTOR_LVDS);
-+ drm_sysfs_connector_add(connector);
-+ connector->interlace_allowed = 0;
-+ connector->doublescan_allowed = 0;
-+
-+ /* Initialise the encoder */
-+ drm_encoder_init(dev, &glamo_output->enc, &glamo_encoder_funcs,
-+ DRM_MODE_ENCODER_DAC);
-+ glamo_output->enc.possible_crtcs = 1 << 0;
-+ drm_mode_connector_attach_encoder(&glamo_output->base,
-+ &glamo_output->enc);
-+
-+ drm_encoder_helper_add(&glamo_output->enc, &glamo_encoder_helper_funcs);
-+ drm_connector_helper_add(connector, &glamo_connector_helper_funcs);
-+
-+ drm_helper_initial_config(dev);
-+
-+ if (list_empty(&dev->mode_config.fb_kernel_list)) {
-+ int ret, cols, cols_g;
-+ cols_g = reg_read_lcd(gdrm, GLAMO_REG_LCD_MODE3) & 0xc000;
-+ switch ( cols_g ) {
-+ case GLAMO_LCD_SRC_RGB565 :
-+ cols = GLAMO_FB_RGB565; break;
-+ case GLAMO_LCD_SRC_ARGB1555 :
-+ cols = GLAMO_FB_ARGB1555; break;
-+ case GLAMO_LCD_SRC_ARGB4444 :
-+ cols = GLAMO_FB_ARGB4444; break;
-+ default :
-+ printk(KERN_WARNING "Unrecognised LCD colour mode\n");
-+ cols = GLAMO_FB_RGB565; break; /* Take a guess */
-+ }
-+ ret = glamofb_create(dev, 480, 640, 480, 640, cols, &glamo_fb);
-+ if (ret) return -EINVAL;
-+ }
-+
-+ info = glamo_fb->base.fbdev;
-+ par = info->par;
-+
-+ modeset = &glamo_crtc->mode_set;
-+ modeset->fb = &glamo_fb->base;
-+ modeset->connectors[0] = connector;
-+
-+ par->crtc_ids[0] = glamo_crtc->base.base.id;
-+
-+ modeset->num_connectors = 1;
-+ modeset->mode = modeset->crtc->desired_mode;
-+
-+ par->crtc_count = 1;
-+
-+ if (register_framebuffer(info) < 0)
-+ return -EINVAL;
-+
-+ printk(KERN_INFO "[glamo-drm] fb%d: %s frame buffer device\n",
-+ info->node, info->fix.id);
-+
-+ /* Switch back to kernel console on panic */
-+ kernelfb_mode = *modeset;
-+ atomic_notifier_chain_register(&panic_notifier_list, &paniced);
-+ printk(KERN_INFO "[glamo-drm] Registered panic notifier\n");
-+
-+ return 0;
-+}
-+
-+
-+void glamo_lcd_power(struct glamodrm_handle *gdrm, int mode)
-+{
-+ struct drm_crtc *crtc = gdrm->crtc;
-+ struct glamo_crtc *gcrtc = to_glamo_crtc(crtc);
-+
-+ if ( mode ) {
-+ printk(KERN_CRIT "Power on sequence\n");
-+ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD);
-+ gcrtc->pixel_clock_on = 1;
-+ jbt6k74_setpower(JBT_POWER_MODE_NORMAL);
-+ if ( gcrtc->current_mode_set ) {
-+ printk(KERN_CRIT "Setting previous mode\n");
-+ glamo_crtc_mode_set(crtc, &gcrtc->current_mode,
-+ &gcrtc->current_mode, 0, 0,
-+ gcrtc->current_fb);
-+ }
-+ } else {
-+ printk(KERN_CRIT "Power off sequence\n");
-+ jbt6k74_setpower(JBT_POWER_MODE_OFF);
-+ glamo_engine_suspend(gdrm->glamo_core, GLAMO_ENGINE_LCD);
-+ gcrtc->pixel_clock_on = 0;
-+ }
-+}
-+
-+
-+void glamo_display_suspend(struct glamodrm_handle *gdrm)
-+{
-+ /* do nothing */
-+}
-+
-+
-+void glamo_display_resume(struct glamodrm_handle *gdrm)
-+{
-+ struct drm_crtc *crtc = gdrm->crtc;
-+ struct glamo_crtc *gcrtc = to_glamo_crtc(crtc);
-+
-+ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD);
-+ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_LCD);
-+ glamo_run_lcd_script(gdrm, lcd_init_script,
-+ ARRAY_SIZE(lcd_init_script));
-+
-+ if ( gcrtc->current_mode_set ) {
-+ glamo_crtc_mode_set(crtc, &gcrtc->current_mode,
-+ &gcrtc->current_mode, 0, 0,
-+ gcrtc->current_fb);
-+ }
-+}
-diff --git a/drivers/gpu/drm/glamo/glamo-display.h b/drivers/gpu/drm/glamo/glamo-display.h
-new file mode 100644
-index 0000000..728bba5
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-display.h
-@@ -0,0 +1,41 @@
-+/* Smedia Glamo 336x/337x Display
-+ *
-+ * Copyright (c) 2008-2009 Thomas White <taw@bitwiz.org.uk>
-+ *
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __GLAMO_DISPLAY_H
-+#define __GLAMO_DISPLAY_H
-+
-+#include <drm/drmP.h>
-+#include "glamo-drm-private.h"
-+
-+extern int glamo_display_init(struct drm_device *dev);
-+
-+extern int glamo_framebuffer_create(struct drm_device *dev,
-+ struct drm_mode_fb_cmd *mode_cmd,
-+ struct drm_framebuffer **fb,
-+ struct drm_gem_object *obj);
-+
-+extern void glamo_display_suspend(struct glamodrm_handle *gdrm);
-+extern void glamo_display_resume(struct glamodrm_handle *gdrm);
-+
-+extern void glamo_lcd_power(struct glamodrm_handle *gdrm, int mode);
-+
-+#endif /* __GLAMO_DISPLAY_H */
-diff --git a/drivers/gpu/drm/glamo/glamo-drm-drv.c b/drivers/gpu/drm/glamo/glamo-drm-drv.c
-new file mode 100644
-index 0000000..2cdf429
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-drm-drv.c
-@@ -0,0 +1,422 @@
-+/* Smedia Glamo 336x/337x Graphics Driver
-+ *
-+ * Copyright (C) 2009 Openmoko, Inc. Jorge Luis Zapata <turran@openmoko.com>
-+ * Copyright (C) 2008-2009 Thomas White <taw@bitwiz.org.uk>
-+ * Copyright (C) 2009 Andreas Pokorny <andreas.pokorny@gmail.com>
-+ *
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <drm/drmP.h>
-+#include <drm/glamo_drm.h>
-+#include <linux/glamofb.h>
-+
-+#include <linux/mfd/glamo-core.h>
-+
-+#include "glamo-cmdq.h"
-+#include "glamo-buffer.h"
-+#include "glamo-drm-private.h"
-+#include "glamo-display.h"
-+#include "glamo-kms-fb.h"
-+#include "glamo-fence.h"
-+
-+#define DRIVER_AUTHOR "Openmoko, Inc."
-+#define DRIVER_NAME "glamo-drm"
-+#define DRIVER_DESC "SMedia Glamo 3362"
-+#define DRIVER_DATE "20090614"
-+
-+
-+static int glamo_ioctl_swap(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ printk(KERN_INFO "glamo_ioctl_swap\n");
-+ return 0;
-+}
-+
-+
-+static int glamo_ioctl_gem_info(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ printk(KERN_INFO "glamo_ioctl_gem_info\n");
-+ return 0;
-+}
-+
-+
-+struct drm_ioctl_desc glamo_ioctls[] = {
-+ DRM_IOCTL_DEF(DRM_GLAMO_CMDBUF, glamo_ioctl_cmdbuf, DRM_AUTH),
-+ DRM_IOCTL_DEF(DRM_GLAMO_SWAP, glamo_ioctl_swap, DRM_AUTH),
-+ DRM_IOCTL_DEF(DRM_GLAMO_CMDBURST, glamo_ioctl_cmdburst, DRM_AUTH),
-+ DRM_IOCTL_DEF(DRM_GLAMO_GEM_INFO, glamo_ioctl_gem_info, DRM_AUTH),
-+ DRM_IOCTL_DEF(DRM_GLAMO_GEM_CREATE, glamo_ioctl_gem_create, DRM_AUTH),
-+ DRM_IOCTL_DEF(DRM_GLAMO_GEM_MMAP, glamo_ioctl_gem_mmap, DRM_AUTH),
-+ DRM_IOCTL_DEF(DRM_GLAMO_GEM_PIN, glamo_ioctl_gem_pin, DRM_AUTH),
-+ DRM_IOCTL_DEF(DRM_GLAMO_GEM_UNPIN, glamo_ioctl_gem_unpin, DRM_AUTH),
-+ DRM_IOCTL_DEF(DRM_GLAMO_GEM_PREAD, glamo_ioctl_gem_pread, DRM_AUTH),
-+ DRM_IOCTL_DEF(DRM_GLAMO_GEM_PWRITE, glamo_ioctl_gem_pwrite, DRM_AUTH),
-+ DRM_IOCTL_DEF(DRM_GLAMO_GEM_WAIT_RENDERING,
-+ glamo_ioctl_wait_rendering, DRM_AUTH),
-+};
-+
-+
-+static int glamodrm_firstopen(struct drm_device *dev)
-+{
-+ DRM_DEBUG("\n");
-+ return 0;
-+}
-+
-+
-+static int glamodrm_open(struct drm_device *dev, struct drm_file *fh)
-+{
-+ DRM_DEBUG("\n");
-+ return 0;
-+}
-+
-+
-+static void glamodrm_preclose(struct drm_device *dev, struct drm_file *fh)
-+{
-+ DRM_DEBUG("\n");
-+}
-+
-+static void glamodrm_postclose(struct drm_device *dev, struct drm_file *fh)
-+{
-+ DRM_DEBUG("\n");
-+}
-+
-+
-+static void glamodrm_lastclose(struct drm_device *dev)
-+{
-+ DRM_DEBUG("\n");
-+}
-+
-+
-+static int glamodrm_master_create(struct drm_device *dev,
-+ struct drm_master *master)
-+{
-+ DRM_DEBUG("\n");
-+
-+ return 0;
-+}
-+
-+
-+static void glamodrm_master_destroy(struct drm_device *dev,
-+ struct drm_master *master)
-+{
-+ DRM_DEBUG("\n");
-+}
-+
-+
-+static int glamodrm_load(struct drm_device *dev, unsigned long flags)
-+{
-+ struct glamodrm_handle *gdrm;
-+ gdrm = dev->dev_private;
-+
-+ glamo_buffer_init(gdrm);
-+ glamo_cmdq_init(dev);
-+ glamo_fence_init(gdrm);
-+ glamo_display_init(dev);
-+
-+ return 0;
-+}
-+
-+
-+static int glamodrm_unload(struct drm_device *dev)
-+{
-+ struct glamodrm_handle *gdrm;
-+
-+ gdrm = dev->dev_private;
-+
-+ glamo_engine_disable(gdrm->glamo_core, GLAMO_ENGINE_2D);
-+ glamo_engine_disable(gdrm->glamo_core, GLAMO_ENGINE_3D);
-+ glamo_buffer_final(gdrm);
-+ glamo_fence_shutdown(gdrm);
-+
-+ return 0;
-+}
-+
-+
-+static struct vm_operations_struct glamodrm_gem_vm_ops = {
-+ .fault = glamodrm_gem_fault,
-+ .open = drm_gem_vm_open,
-+ .close = drm_gem_vm_close,
-+};
-+
-+static struct drm_driver glamodrm_drm_driver = {
-+ .driver_features = DRIVER_IS_PLATFORM | DRIVER_GEM | DRIVER_MODESET,
-+ .firstopen = glamodrm_firstopen,
-+ .load = glamodrm_load,
-+ .unload = glamodrm_unload,
-+ .open = glamodrm_open,
-+ .preclose = glamodrm_preclose,
-+ .postclose = glamodrm_postclose,
-+ .lastclose = glamodrm_lastclose,
-+ .reclaim_buffers = drm_core_reclaim_buffers,
-+ .get_map_ofs = drm_core_get_map_ofs,
-+ .get_reg_ofs = drm_core_get_reg_ofs,
-+ .master_create = glamodrm_master_create,
-+ .master_destroy = glamodrm_master_destroy,
-+ .gem_init_object = glamodrm_gem_init_object,
-+ .gem_free_object = glamodrm_gem_free_object,
-+ .gem_vm_ops = &glamodrm_gem_vm_ops,
-+ .ioctls = glamo_ioctls,
-+ .fops = {
-+ .owner = THIS_MODULE,
-+ .open = drm_open,
-+ .release = drm_release,
-+ .unlocked_ioctl = drm_ioctl,
-+ .mmap = drm_gem_mmap,
-+ .poll = drm_poll,
-+ .fasync = drm_fasync,
-+ },
-+ .major = 0,
-+ .minor = 1,
-+ .patchlevel = 0,
-+ .name = DRIVER_NAME,
-+ .desc = DRIVER_DESC,
-+ .date = DRIVER_DATE,
-+};
-+
-+
-+static int glamodrm_probe(struct platform_device *pdev)
-+{
-+ int rc;
-+ struct glamodrm_handle *gdrm;
-+ struct glamo_core *core = dev_get_drvdata(pdev->dev.parent);
-+
-+ printk(KERN_INFO "[glamo-drm] SMedia Glamo Direct Rendering Support\n");
-+
-+ gdrm = kzalloc(sizeof(*gdrm), GFP_KERNEL);
-+ if ( !gdrm )
-+ return -ENOMEM;
-+ platform_set_drvdata(pdev, gdrm);
-+ gdrm->glamo_core = core;
-+ gdrm->dev = &pdev->dev;
-+
-+ /* Find the command queue registers */
-+ gdrm->reg = platform_get_resource_byname(pdev, IORESOURCE_MEM,
-+ "glamo-cmdq-regs");
-+ if ( !gdrm->reg ) {
-+ dev_err(&pdev->dev, "Unable to find cmdq registers.\n");
-+ rc = -ENOENT;
-+ goto out_free;
-+ }
-+ gdrm->reg = request_mem_region(gdrm->reg->start,
-+ resource_size(gdrm->reg), pdev->name);
-+ if ( !gdrm->reg ) {
-+ dev_err(&pdev->dev, "failed to request MMIO region\n");
-+ rc = -ENOENT;
-+ goto out_free;
-+ }
-+ gdrm->reg_base = ioremap_nocache(gdrm->reg->start,
-+ resource_size(gdrm->reg));
-+ if ( !gdrm->reg_base ) {
-+ dev_err(&pdev->dev, "failed to ioremap() MMIO registers\n");
-+ rc = -ENOENT;
-+ goto out_release_regs;
-+ }
-+
-+ /* Find the VRAM */
-+ gdrm->vram = platform_get_resource_byname(pdev, IORESOURCE_MEM,
-+ "glamo-fb-mem");
-+ if ( !gdrm->vram ) {
-+ dev_err(&pdev->dev, "Unable to find VRAM.\n");
-+ rc = -ENOENT;
-+ goto out_unmap_regs;
-+ }
-+ gdrm->vram = request_mem_region(gdrm->vram->start,
-+ resource_size(gdrm->vram), pdev->name);
-+ if ( !gdrm->vram ) {
-+ dev_err(&pdev->dev, "failed to request VRAM region\n");
-+ rc = -ENOENT;
-+ goto out_unmap_regs;
-+ }
-+
-+ /* Find the LCD controller */
-+ gdrm->lcd_regs = platform_get_resource_byname(pdev, IORESOURCE_MEM,
-+ "glamo-fb-regs");
-+ if ( !gdrm->lcd_regs ) {
-+ dev_err(&pdev->dev, "Unable to find LCD registers.\n");
-+ rc = -ENOENT;
-+ goto out_release_vram;
-+ }
-+ gdrm->lcd_regs = request_mem_region(gdrm->lcd_regs->start,
-+ resource_size(gdrm->lcd_regs),
-+ pdev->name);
-+ if ( !gdrm->lcd_regs ) {
-+ dev_err(&pdev->dev, "failed to request LCD registers\n");
-+ rc = -ENOENT;
-+ goto out_release_vram;
-+ }
-+ gdrm->lcd_base = ioremap_nocache(gdrm->lcd_regs->start,
-+ resource_size(gdrm->lcd_regs));
-+ if ( !gdrm->lcd_base ) {
-+ dev_err(&pdev->dev, "failed to ioremap() LCD registers\n");
-+ rc = -ENOENT;
-+ goto out_release_lcd;
-+ }
-+
-+ /* Find the 2D engine */
-+ gdrm->twod_regs = platform_get_resource_byname(pdev, IORESOURCE_MEM,
-+ "glamo-2d-regs");
-+ if ( !gdrm->twod_regs ) {
-+ dev_err(&pdev->dev, "Unable to find 2D registers.\n");
-+ rc = -ENOENT;
-+ goto out_unmap_lcd;
-+ }
-+ gdrm->twod_regs = request_mem_region(gdrm->twod_regs->start,
-+ resource_size(gdrm->twod_regs),
-+ pdev->name);
-+ if ( !gdrm->twod_regs ) {
-+ dev_err(&pdev->dev, "failed to request 2D registers\n");
-+ rc = -ENOENT;
-+ goto out_unmap_lcd;
-+ }
-+ gdrm->twod_base = ioremap(gdrm->twod_regs->start,
-+ resource_size(gdrm->twod_regs));
-+ if ( !gdrm->twod_base ) {
-+ dev_err(&pdev->dev, "failed to ioremap() 2D registers\n");
-+ rc = -ENOENT;
-+ goto out_release_2d;
-+ }
-+
-+ /* Hook up IRQ handle for fence processing */
-+ gdrm->twod_irq = platform_get_irq_byname(pdev, "glamo-2d-irq");
-+
-+ gdrm->vram_size = GLAMO_FB_SIZE;
-+ printk(KERN_INFO "[glamo-drm] %lli bytes of VRAM\n",
-+ (long long int)gdrm->vram_size);
-+
-+ /* Initialise DRM */
-+ drm_platform_init(&glamodrm_drm_driver, pdev, (void *)gdrm);
-+
-+ return 0;
-+
-+out_release_2d:
-+ release_mem_region(gdrm->twod_regs->start,
-+ resource_size(gdrm->twod_regs));
-+out_unmap_lcd:
-+ iounmap(gdrm->lcd_base);
-+out_release_lcd:
-+ release_mem_region(gdrm->lcd_regs->start,
-+ resource_size(gdrm->lcd_regs));
-+out_release_vram:
-+ release_mem_region(gdrm->vram->start, resource_size(gdrm->vram));
-+out_unmap_regs:
-+ iounmap(gdrm->reg_base);
-+out_release_regs:
-+ release_mem_region(gdrm->reg->start, resource_size(gdrm->reg));
-+out_free:
-+ kfree(gdrm);
-+ dev_set_drvdata(&pdev->dev, NULL);
-+ return rc;
-+}
-+
-+
-+static int glamodrm_remove(struct platform_device *pdev)
-+{
-+ struct glamodrm_handle *gdrm = platform_get_drvdata(pdev);
-+
-+ glamo_buffer_final(gdrm);
-+ glamo_cmdq_shutdown(gdrm);
-+
-+ drm_exit(&glamodrm_drm_driver);
-+
-+ platform_set_drvdata(pdev, NULL);
-+
-+ /* Release registers */
-+ iounmap(gdrm->reg_base);
-+ release_mem_region(gdrm->reg->start, resource_size(gdrm->reg));
-+
-+ /* Release VRAM */
-+ release_mem_region(gdrm->vram->start, resource_size(gdrm->vram));
-+
-+ /* Release LCD registers */
-+ iounmap(gdrm->lcd_base);
-+ release_mem_region(gdrm->lcd_regs->start,
-+ resource_size(gdrm->lcd_regs));
-+
-+ /* Release 2D engine */
-+ iounmap(gdrm->twod_base);
-+ release_mem_region(gdrm->twod_regs->start,
-+ resource_size(gdrm->twod_regs));
-+
-+ kfree(gdrm);
-+
-+ return 0;
-+}
-+
-+
-+static int glamodrm_suspend(struct platform_device *pdev, pm_message_t state)
-+{
-+ struct glamodrm_handle *gdrm = platform_get_drvdata(pdev);
-+
-+ glamo_kmsfb_suspend(gdrm);
-+ glamo_display_suspend(gdrm);
-+ glamo_cmdq_suspend(gdrm);
-+
-+ /* glamo_core.c will suspend the engines for us */
-+
-+ return 0;
-+}
-+
-+
-+static int glamodrm_resume(struct platform_device *pdev)
-+{
-+ struct glamodrm_handle *gdrm = platform_get_drvdata(pdev);
-+
-+ glamo_cmdq_resume(gdrm);
-+ glamo_display_resume(gdrm);
-+ glamo_kmsfb_resume(gdrm);
-+
-+ return 0;
-+}
-+
-+
-+static struct platform_driver glamodrm_driver = {
-+ .probe = glamodrm_probe,
-+ .remove = glamodrm_remove,
-+ .suspend = glamodrm_suspend,
-+ .resume = glamodrm_resume,
-+ .driver = {
-+ .name = "glamo-fb",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+
-+static int __devinit glamodrm_init(void)
-+{
-+ glamodrm_drm_driver.num_ioctls = DRM_ARRAY_SIZE(glamo_ioctls);
-+ return platform_driver_register(&glamodrm_driver);
-+}
-+
-+
-+static void __exit glamodrm_exit(void)
-+{
-+ platform_driver_unregister(&glamodrm_driver);
-+}
-+
-+
-+module_init(glamodrm_init);
-+module_exit(glamodrm_exit);
-+
-+MODULE_AUTHOR(DRIVER_AUTHOR);
-+MODULE_DESCRIPTION(DRIVER_DESC);
-+MODULE_LICENSE("GPL");
-diff --git a/drivers/gpu/drm/glamo/glamo-drm-private.h b/drivers/gpu/drm/glamo/glamo-drm-private.h
-new file mode 100644
-index 0000000..602af4c
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-drm-private.h
-@@ -0,0 +1,166 @@
-+/* Smedia Glamo 336x/337x DRM private bits
-+ *
-+ * Copyright (C) 2008-2009 Thomas White <taw@bitwiz.org.uk>
-+ * Copyright (C) 2009 Andreas Pokorny <andreas.pokorny@gmail.com>
-+ * Based on xf86-video-glamo
-+ * Copyright 2007 OpenMoko, Inc.
-+ * Copyright © 2009 Lars-Peter Clausen <lars@metafoo.de>
-+ *
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __GLAMO_DRMPRIV_H
-+#define __GLAMO_DRMPRIV_H
-+
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/semaphore.h>
-+#include <linux/spinlock.h>
-+#include <linux/wait.h>
-+
-+#include <linux/mfd/glamo-core.h>
-+
-+
-+/* Memory to allocate for the framebuffer.
-+ * The rest is reserved for the DRM memory manager */
-+#define GLAMO_FRAMEBUFFER_ALLOCATION (2*480*640)
-+
-+
-+struct glamodrm_handle {
-+
-+ /* This device */
-+ struct device *dev;
-+
-+ /* The parent device handle */
-+ struct glamo_core *glamo_core;
-+
-+ /* Framebuffer handle for the console (i.e. /dev/fb0) */
-+ struct fb_info *fb;
-+
-+ /* Command queue registers */
-+ struct resource *reg;
-+ char __iomem *reg_base;
-+
-+ /* VRAM region */
-+ struct resource *vram;
-+
-+ /* Command queue region */
-+ char __iomem *cmdq_base;
-+ unsigned long cmdq_offs;
-+
-+ /* LCD controller registers */
-+ struct resource *lcd_regs;
-+ char __iomem *lcd_base;
-+
-+ /* 2D engine registers and IRQ */
-+ struct resource *twod_regs;
-+ char __iomem *twod_base;
-+ unsigned int twod_irq;
-+
-+ ssize_t vram_size;
-+
-+ /* Memory management */
-+ struct drm_mm *mmgr;
-+
-+ /* semaphore against concurrent ioctl */
-+ struct semaphore add_to_ring;
-+
-+ /* Saved state */
-+ u_int16_t saved_clock;
-+ u_int16_t saved_width;
-+ u_int16_t saved_height;
-+ u_int16_t saved_pitch;
-+ u_int16_t saved_htotal;
-+ u_int16_t saved_hrtrst;
-+ u_int16_t saved_hrtren;
-+ u_int16_t saved_hdspst;
-+ u_int16_t saved_hdspen;
-+ u_int16_t saved_vtotal;
-+ u_int16_t saved_vrtrst;
-+ u_int16_t saved_vrtren;
-+ u_int16_t saved_vdspst;
-+ u_int16_t saved_vdspen;
-+
-+ /* Fencing */
-+ atomic_t curr_seq; /* The last used stamp number */
-+ struct list_head fence_list; /* List of active fences */
-+ rwlock_t fence_list_lock; /* Lock to protect fence_list */
-+ wait_queue_head_t fence_queue; /* Waitqueue */
-+ struct tasklet_struct fence_tl; /* Tasklet for fence IRQ */
-+
-+ /* A scratch block */
-+ struct drm_mm_node *scratch;
-+
-+ /* We only have one */
-+ struct drm_crtc *crtc;
-+};
-+
-+
-+/* Private data. This is where we keep our memory management bits */
-+struct drm_glamo_gem_object {
-+ struct drm_gem_object *obj; /* The GEM object this refers to */
-+ struct drm_mm_node *block; /* Block handle for drm_mm */
-+ uint64_t mmap_offset;
-+};
-+
-+
-+struct glamo_crtc {
-+
-+ struct drm_crtc base;
-+ struct glamodrm_handle *gdrm;
-+ /* a mode_set for fbdev users on this crtc */
-+ struct drm_mode_set mode_set;
-+ int blank_mode;
-+
-+ int pixel_clock_on;
-+
-+ int current_mode_set;
-+ struct drm_display_mode current_mode;
-+ struct drm_framebuffer *current_fb;
-+};
-+
-+
-+struct glamo_framebuffer {
-+ struct drm_framebuffer base;
-+ struct drm_gem_object *obj;
-+};
-+
-+
-+struct glamo_output {
-+ struct drm_connector base;
-+ struct drm_encoder enc;
-+ struct glamodrm_handle *gdrm;
-+};
-+
-+
-+/* Colour mode for KMS framebuffer */
-+enum {
-+ GLAMO_FB_RGB565,
-+ GLAMO_FB_ARGB1555,
-+ GLAMO_FB_ARGB4444
-+};
-+
-+
-+#define to_glamo_crtc(x) container_of(x, struct glamo_crtc, base)
-+#define to_glamo_output(x) container_of(x, struct glamo_output, base)
-+#define enc_to_glamo_output(x) container_of(x, struct glamo_output, enc)
-+#define to_glamo_framebuffer(x) container_of(x, struct glamo_framebuffer, base)
-+
-+
-+#endif /* __GLAMO_DRMPRIV_H */
-diff --git a/drivers/gpu/drm/glamo/glamo-fence.c b/drivers/gpu/drm/glamo/glamo-fence.c
-new file mode 100644
-index 0000000..56d6426
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-fence.c
-@@ -0,0 +1,331 @@
-+/*
-+ * SMedia Glamo 336x/337x fence objects
-+ *
-+ * Copyright (c) 2009 Thomas White <taw@bitwiz.org.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ *
-+ * Loosely based on radeon_fence.c, to which the following notice applies:
-+ *
-+ * Copyright 2009 Jerome Glisse.
-+ * All Rights Reserved.
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the
-+ * "Software"), to deal in the Software without restriction, including
-+ * without limitation the rights to use, copy, modify, merge, publish,
-+ * distribute, sub license, and/or sell copies of the Software, and to
-+ * permit persons to whom the Software is furnished to do so, subject to
-+ * the following conditions:
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
-+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
-+ *
-+ * The above copyright notice and this permission notice (including the
-+ * next paragraph) shall be included in all copies or substantial portions
-+ * of the Software.
-+ *
-+ */
-+/*
-+ * Authors:
-+ * Jerome Glisse <glisse@freedesktop.org>
-+ * Dave Airlie
-+ */
-+
-+
-+#include <drm/drmP.h>
-+#include <drm/glamo_drm.h>
-+#include <linux/kernel.h>
-+#include <linux/irq.h>
-+#include <linux/interrupt.h>
-+#include <linux/spinlock.h>
-+#include <linux/lockdep.h>
-+
-+#include <linux/mfd/glamo-core.h>
-+#include <linux/mfd/glamo-regs.h>
-+
-+#include "glamo-drm-private.h"
-+#include "glamo-cmdq.h"
-+
-+
-+static struct lock_class_key glamo_fence_lock_key;
-+
-+
-+struct glamo_fence
-+{
-+ struct list_head list;
-+ uint16_t seq; /* Wait for at least this ID */
-+ int signalled; /* Non-zero when fence has passed */
-+ struct glamodrm_handle *gdrm;
-+};
-+
-+
-+static void glamo_fence_emit(struct glamo_fence *fence)
-+{
-+ u16 fring[6];
-+
-+ fring[0] = 0x8000 | GLAMO_REG_2D_ID1;
-+ fring[1] = 3;
-+ fence->seq = atomic_inc_return(&fence->gdrm->curr_seq);
-+ if ( fence->seq > 1<<14 ) {
-+ atomic_set(&fence->gdrm->curr_seq, 0);
-+ fence->seq = atomic_inc_return(&fence->gdrm->curr_seq);
-+ }
-+ fring[2] = 1<<15 | fence->seq;
-+ fring[3] = 0; /* Unused */
-+ fring[4] = 0; /* Unused */
-+ fring[5] = 0; /* Padding */
-+
-+ glamo_add_to_ring(fence->gdrm, fring, 12);
-+}
-+
-+
-+static void glamo_fence_enable(struct glamodrm_handle *gdrm)
-+{
-+ enable_irq( GLAMO_IRQ_2D);
-+}
-+
-+
-+static inline u16 reg_read_2d(struct glamodrm_handle *gdrm, u_int16_t reg)
-+{
-+ /* For command queue, the address is given relative to
-+ * the overall base of Glamo. This isn't the case here. */
-+ return ioread16(gdrm->twod_base + reg-GLAMO_REGOFS_2D);
-+}
-+
-+
-+static inline u16 reg_read_cmdq(struct glamodrm_handle *gdrm, u_int16_t reg)
-+{
-+ return ioread16(gdrm->reg_base + reg);
-+}
-+
-+
-+static void glamo_cmdq_wait(struct glamodrm_handle *gdrm,
-+ enum glamo_engine engine)
-+{
-+ u16 mask, val, status;
-+ int i;
-+
-+ switch (engine)
-+ {
-+ case GLAMO_ENGINE_ALL:
-+ mask = 1 << 2;
-+ val = mask;
-+ break;
-+ default:
-+ return;
-+ }
-+
-+ for ( i=0; i<1000; i++ ) {
-+ status = reg_read_cmdq(gdrm, GLAMO_REG_CMDQ_STATUS);
-+ if ((status & mask) == val) break;
-+ mdelay(1);
-+ }
-+ if ( i == 1000 ) {
-+ size_t ring_read;
-+ printk(KERN_WARNING "[glamo-drm] CmdQ timeout!\n");
-+ printk(KERN_WARNING "[glamo-drm] status = %x\n", status);
-+ ring_read = reg_read_cmdq(gdrm, GLAMO_REG_CMDQ_READ_ADDRL);
-+ ring_read |= ((reg_read_cmdq(gdrm, GLAMO_REG_CMDQ_READ_ADDRH)
-+ & 0x7) << 16);
-+ printk(KERN_INFO "[glamo-drm] ring_read now 0x%x\n",
-+ ring_read);
-+ }
-+}
-+
-+
-+static irqreturn_t glamo_fence_irq_handler(int irq, void *data)
-+{
-+ struct glamodrm_handle *gdrm = data;
-+ if (!gdrm) return IRQ_NONE;
-+ tasklet_schedule(&gdrm->fence_tl);
-+ return IRQ_HANDLED;
-+}
-+
-+
-+/* This is nasty. I'm sorry. */
-+static void glamo_fence_debodge(struct glamodrm_handle *gdrm)
-+{
-+ struct list_head *tmp;
-+
-+ printk(KERN_ERR "[glamo-drm] Attempting to recover...\n");
-+
-+ glamo_cmdq_wait(gdrm, GLAMO_ENGINE_ALL);
-+ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_2D);
-+
-+ read_lock(&gdrm->fence_list_lock);
-+ list_for_each(tmp, &gdrm->fence_list) {
-+
-+ struct glamo_fence *fence;
-+
-+ fence = list_entry(tmp, struct glamo_fence, list);
-+
-+ if ( fence->signalled != 1 ) {
-+ printk(KERN_ERR "[glamo-drm] Fence seq#%i was not"
-+ " signalled\n", fence->seq);
-+ }
-+ fence->signalled = 1;
-+
-+ }
-+ read_unlock(&gdrm->fence_list_lock);
-+
-+ wake_up_all(&gdrm->fence_queue);
-+}
-+
-+
-+static void glamo_fence_tl(unsigned long data)
-+{
-+ struct glamodrm_handle *gdrm = (struct glamodrm_handle *)data;
-+ int wake = 0;
-+ u16 seq;
-+ struct list_head *tmp;
-+
-+ seq = reg_read_2d(gdrm, GLAMO_REG_2D_ID1) & 0x7fff;
-+
-+ read_lock(&gdrm->fence_list_lock);
-+ list_for_each(tmp, &gdrm->fence_list) {
-+
-+ struct glamo_fence *fence;
-+
-+ fence = list_entry(tmp, struct glamo_fence, list);
-+ if ( seq >= fence->seq ) {
-+ fence->signalled = 1;
-+ wake = 1;
-+ }
-+
-+ }
-+ read_unlock(&gdrm->fence_list_lock);
-+
-+ if ( wake ) wake_up_all(&gdrm->fence_queue);
-+}
-+
-+
-+static struct glamo_fence *glamo_fence_new(struct glamodrm_handle *gdrm)
-+{
-+ struct glamo_fence *fence;
-+ unsigned long irq_flags;
-+
-+ fence = kmalloc(sizeof(*fence), GFP_KERNEL);
-+ fence->signalled = 0;
-+ fence->gdrm = gdrm;
-+
-+ /* Add to list */
-+ write_lock_irqsave(&gdrm->fence_list_lock, irq_flags);
-+ list_add(&fence->list, &gdrm->fence_list);
-+ write_unlock_irqrestore(&gdrm->fence_list_lock, irq_flags);
-+
-+ return fence;
-+}
-+
-+
-+static struct glamo_fence *glamo_fence_destroy(struct glamo_fence *fence)
-+{
-+ unsigned long irq_flags;
-+ struct glamodrm_handle *gdrm = fence->gdrm;
-+
-+ /* Remove from list */
-+ write_lock_irqsave(&gdrm->fence_list_lock, irq_flags);
-+ list_del(&fence->list);
-+ write_unlock_irqrestore(&gdrm->fence_list_lock, irq_flags);
-+
-+ kfree(fence);
-+
-+ return fence;
-+}
-+
-+
-+int glamo_ioctl_wait_rendering(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ struct glamodrm_handle *gdrm;
-+ struct drm_glamo_gem_wait_rendering *args = data;
-+ struct glamo_fence *fence;
-+ int r;
-+
-+ gdrm = dev->dev_private;
-+
-+ if ( !args->have_handle ) {
-+ glamo_cmdq_wait(gdrm, GLAMO_ENGINE_ALL);
-+ return 0;
-+ }
-+
-+ fence = glamo_fence_new(gdrm);
-+ if ( fence == NULL ) {
-+ printk(KERN_WARNING "[glamo-drm] Couldn't allocate fence -"
-+ " falling back to busy wait.\n");
-+ glamo_cmdq_wait(gdrm, GLAMO_ENGINE_ALL);
-+ return 0;
-+ }
-+
-+ glamo_fence_emit(fence);
-+
-+ /* Wait... */
-+ r = wait_event_interruptible_timeout(gdrm->fence_queue,
-+ fence->signalled, HZ);
-+ if ( r == 0 ) {
-+ printk(KERN_ERR "[glamo-drm] Timeout!\n");
-+ glamo_fence_debodge(gdrm);
-+ }
-+
-+ glamo_fence_destroy(fence);
-+
-+ return 0;
-+}
-+
-+
-+void glamo_fence_init(struct glamodrm_handle *gdrm)
-+{
-+ unsigned long irq_flags;
-+ int r;
-+
-+ if ( gdrm->twod_irq == 0 ) {
-+ printk(KERN_ERR "[glamo-drm] Don't know which IRQ to use!\n");
-+ return;
-+ }
-+
-+ gdrm->fence_list_lock = __RW_LOCK_UNLOCKED(gdrm->fence_list_lock);
-+ lockdep_set_class(&gdrm->fence_list_lock, &glamo_fence_lock_key);
-+ init_waitqueue_head(&gdrm->fence_queue);
-+
-+ atomic_set(&gdrm->curr_seq, 0);
-+
-+ write_lock_irqsave(&gdrm->fence_list_lock, irq_flags);
-+ INIT_LIST_HEAD(&gdrm->fence_list);
-+ write_unlock_irqrestore(&gdrm->fence_list_lock, irq_flags);
-+
-+ tasklet_init(&gdrm->fence_tl, glamo_fence_tl, (unsigned long)gdrm);
-+
-+ r = request_irq(gdrm->twod_irq, glamo_fence_irq_handler,
-+ IRQF_SHARED, "glamo-fence", gdrm);
-+ if ( r ) {
-+ printk(KERN_ERR "[glamo-drm] Failed to register irq.\n");
-+ return;
-+ }
-+
-+ glamo_fence_enable(gdrm);
-+}
-+
-+
-+void glamo_fence_shutdown(struct glamodrm_handle *gdrm)
-+{
-+ free_irq(gdrm->twod_irq, gdrm);
-+ wake_up_all(&gdrm->fence_queue);
-+ tasklet_kill(&gdrm->fence_tl);
-+}
-diff --git a/drivers/gpu/drm/glamo/glamo-fence.h b/drivers/gpu/drm/glamo/glamo-fence.h
-new file mode 100644
-index 0000000..deda995
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-fence.h
-@@ -0,0 +1,34 @@
-+/*
-+ * SMedia Glamo 336x/337x fence objects
-+ *
-+ * Copyright (c) 2009 Thomas White <taw@bitwiz.org.uk>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ */
-+
-+#ifndef __GLAMO_FENCE_H
-+#define __GLAMO_FENCE_H
-+
-+#include <drm/drmP.h>
-+
-+#include "glamo-drm-private.h"
-+
-+extern void glamo_fence_init(struct glamodrm_handle *gdrm);
-+extern void glamo_fence_shutdown(struct glamodrm_handle *gdrm);
-+
-+extern int glamo_ioctl_wait_rendering(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv);
-+
-+#endif /* __GLAMO_FENCE_H */
-diff --git a/drivers/gpu/drm/glamo/glamo-kms-fb.c b/drivers/gpu/drm/glamo/glamo-kms-fb.c
-new file mode 100644
-index 0000000..cac524c
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-kms-fb.c
-@@ -0,0 +1,494 @@
-+/*
-+ * SMedia Glamo 336x/337x KMS Framebuffer
-+ *
-+ * Copyright (C) 2009 Thomas White <taw@bitwiz.org.uk>
-+ *
-+ * Based on glamo-fb.c (C) 2007-2008 by Openmoko, Inc.
-+ * Author: Harald Welte <laforge@openmoko.org>
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ *
-+ * Based on intel_fb.c from drivers/gpu/drm/i915
-+ * to which the following licence applies:
-+ *
-+ * Copyright © 2006-2007 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ *
-+ * Authors:
-+ * Eric Anholt <eric@anholt.net>
-+ *
-+ */
-+
-+
-+#include <drm/drmP.h>
-+#include <drm/glamo_drm.h>
-+#include <drm/drm_crtc_helper.h>
-+#include <drm/drm_crtc.h>
-+
-+#include <linux/mfd/glamo-core.h>
-+
-+#include "glamo-drm-private.h"
-+#include "glamo-display.h"
-+#include "glamo-buffer.h"
-+
-+
-+struct glamofb_par {
-+ struct drm_device *dev;
-+ struct drm_display_mode *our_mode;
-+ struct glamo_framebuffer *glamo_fb;
-+ int crtc_count;
-+ /* crtc currently bound to this */
-+ uint32_t crtc_ids[2];
-+};
-+
-+
-+static int glamofb_setcolreg(unsigned regno, unsigned red, unsigned green,
-+ unsigned blue, unsigned transp,
-+ struct fb_info *info)
-+{
-+ struct glamofb_par *par = info->par;
-+ struct drm_device *dev = par->dev;
-+ struct drm_crtc *crtc;
-+ int i;
-+
-+ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-+ struct glamo_crtc *glamo_crtc = to_glamo_crtc(crtc);
-+ struct drm_mode_set *modeset = &glamo_crtc->mode_set;
-+ struct drm_framebuffer *fb = modeset->fb;
-+
-+ for (i = 0; i < par->crtc_count; i++)
-+ if (crtc->base.id == par->crtc_ids[i])
-+ break;
-+
-+ if (i == par->crtc_count)
-+ continue;
-+
-+
-+ if (regno > 255)
-+ return 1;
-+
-+ if (regno < 16) {
-+ switch (fb->depth) {
-+ case 15:
-+ fb->pseudo_palette[regno] = ((red & 0xf800) >> 1) |
-+ ((green & 0xf800) >> 6) |
-+ ((blue & 0xf800) >> 11);
-+ break;
-+ case 16:
-+ fb->pseudo_palette[regno] = (red & 0xf800) |
-+ ((green & 0xfc00) >> 5) |
-+ ((blue & 0xf800) >> 11);
-+ break;
-+ case 24:
-+ case 32:
-+ fb->pseudo_palette[regno] = ((red & 0xff00) << 8) |
-+ (green & 0xff00) |
-+ ((blue & 0xff00) >> 8);
-+ break;
-+ }
-+ }
-+ }
-+ return 0;
-+}
-+
-+static int glamofb_check_var(struct fb_var_screeninfo *var,
-+ struct fb_info *info)
-+{
-+ struct glamofb_par *par = info->par;
-+ struct glamo_framebuffer *glamo_fb = par->glamo_fb;
-+ struct drm_framebuffer *fb = &glamo_fb->base;
-+ int depth;
-+
-+ /* Need to resize the fb object !!! */
-+ if (var->xres > fb->width || var->yres > fb->height) {
-+ DRM_ERROR("Cannot resize framebuffer object (%dx%d > %dx%d)\n",
-+ var->xres,var->yres,fb->width,fb->height);
-+ DRM_ERROR("Need resizing code.\n");
-+ return -EINVAL;
-+ }
-+
-+ switch (var->bits_per_pixel) {
-+ case 16:
-+ depth = (var->green.length == 6) ? 16 : 15;
-+ break;
-+ case 32:
-+ depth = (var->transp.length > 0) ? 32 : 24;
-+ break;
-+ default:
-+ depth = var->bits_per_pixel;
-+ break;
-+ }
-+
-+ switch (depth) {
-+ case 16:
-+ var->red.offset = 11;
-+ var->green.offset = 5;
-+ var->blue.offset = 0;
-+ var->red.length = 5;
-+ var->green.length = 6;
-+ var->blue.length = 5;
-+ var->transp.length = 0;
-+ var->transp.offset = 0;
-+ break;
-+ default:
-+ return -EINVAL;
-+ }
-+
-+ return 0;
-+}
-+
-+/* this will let fbcon do the mode init */
-+/* FIXME: take mode config lock? */
-+static int glamofb_set_par(struct fb_info *info)
-+{
-+ struct glamofb_par *par = info->par;
-+ struct drm_device *dev = par->dev;
-+ struct fb_var_screeninfo *var = &info->var;
-+ int i;
-+ struct drm_crtc *crtc;
-+ int ret;
-+
-+ DRM_DEBUG("%d %d\n", var->xres, var->pixclock);
-+
-+ if (var->pixclock != -1) {
-+ DRM_ERROR("Warning: userspace gave me a pixel clock value (%i)"
-+ "- I'm ignoring it.\n", var->pixclock);
-+ }
-+
-+ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-+ struct glamo_crtc *glamo_crtc = to_glamo_crtc(crtc);
-+
-+ for (i = 0; i < par->crtc_count; i++)
-+ if (crtc->base.id == par->crtc_ids[i])
-+ break;
-+
-+ if (i == par->crtc_count)
-+ continue;
-+
-+ if (crtc->fb == glamo_crtc->mode_set.fb) {
-+ mutex_lock(&dev->mode_config.mutex);
-+ ret = crtc->funcs->set_config(&glamo_crtc->mode_set);
-+ mutex_unlock(&dev->mode_config.mutex);
-+ if (ret)
-+ return ret;
-+ }
-+ }
-+ return 0;
-+}
-+
-+static int glamofb_pan_display(struct fb_var_screeninfo *var,
-+ struct fb_info *info)
-+{
-+ struct glamofb_par *par = info->par;
-+ struct drm_device *dev = par->dev;
-+ struct drm_mode_set *modeset;
-+ struct drm_crtc *crtc;
-+ struct glamo_crtc *glamo_crtc;
-+ int ret = 0;
-+ int i;
-+
-+ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-+ for (i = 0; i < par->crtc_count; i++)
-+ if (crtc->base.id == par->crtc_ids[i])
-+ break;
-+
-+ if (i == par->crtc_count)
-+ continue;
-+
-+ glamo_crtc = to_glamo_crtc(crtc);
-+ modeset = &glamo_crtc->mode_set;
-+
-+ modeset->x = var->xoffset;
-+ modeset->y = var->yoffset;
-+
-+ if (modeset->num_connectors) {
-+ mutex_lock(&dev->mode_config.mutex);
-+ ret = crtc->funcs->set_config(modeset);
-+ mutex_unlock(&dev->mode_config.mutex);
-+ if (!ret) {
-+ info->var.xoffset = var->xoffset;
-+ info->var.yoffset = var->yoffset;
-+ }
-+ }
-+ }
-+
-+ return ret;
-+}
-+
-+static void glamofb_on(struct fb_info *info)
-+{
-+ struct glamofb_par *par = info->par;
-+ struct drm_device *dev = par->dev;
-+ struct glamodrm_handle *gdrm = dev->dev_private;
-+
-+ gdrm = dev->dev_private;
-+
-+ glamo_lcd_power(gdrm, 1);
-+}
-+
-+static void glamofb_off(struct fb_info *info, int dpms_mode)
-+{
-+ struct glamofb_par *par = info->par;
-+ struct drm_device *dev = par->dev;
-+ struct glamodrm_handle *gdrm = dev->dev_private;
-+
-+ glamo_lcd_power(gdrm, 0);
-+}
-+
-+static int glamofb_blank(int blank, struct fb_info *info)
-+{
-+ switch (blank) {
-+ case FB_BLANK_UNBLANK:
-+ glamofb_on(info);
-+ break;
-+ case FB_BLANK_NORMAL:
-+ glamofb_off(info, DRM_MODE_DPMS_STANDBY);
-+ break;
-+ case FB_BLANK_HSYNC_SUSPEND:
-+ glamofb_off(info, DRM_MODE_DPMS_STANDBY);
-+ break;
-+ case FB_BLANK_VSYNC_SUSPEND:
-+ glamofb_off(info, DRM_MODE_DPMS_SUSPEND);
-+ break;
-+ case FB_BLANK_POWERDOWN:
-+ glamofb_off(info, DRM_MODE_DPMS_OFF);
-+ break;
-+ }
-+ return 0;
-+}
-+
-+static struct fb_ops glamofb_ops = {
-+ .owner = THIS_MODULE,
-+ .fb_check_var = glamofb_check_var,
-+ .fb_set_par = glamofb_set_par,
-+ .fb_setcolreg = glamofb_setcolreg,
-+ .fb_fillrect = cfb_fillrect,
-+ .fb_copyarea = cfb_copyarea,
-+ .fb_imageblit = cfb_imageblit,
-+ .fb_pan_display = glamofb_pan_display,
-+ .fb_blank = glamofb_blank,
-+};
-+
-+
-+#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
-+
-+
-+/* Here, we create a GEM object of the correct size, and then turn it into
-+ * /dev/fbX so that the kernel can put a console on it. */
-+int glamofb_create(struct drm_device *dev, uint32_t fb_width,
-+ uint32_t fb_height, uint32_t surface_width,
-+ uint32_t surface_height, int colour_mode,
-+ struct glamo_framebuffer **glamo_fb_p)
-+{
-+ struct fb_info *info;
-+ struct glamofb_par *par;
-+ struct drm_framebuffer *fb;
-+ struct glamo_framebuffer *glamo_fb;
-+ struct drm_mode_fb_cmd mode_cmd;
-+ struct drm_gem_object *fbo = NULL;
-+ struct drm_glamo_gem_object *gobj;
-+ struct device *device = &dev->platform_dev->dev;
-+ struct glamodrm_handle *gdrm;
-+ int size, ret;
-+ unsigned long offs;
-+
-+ gdrm = dev->dev_private;
-+
-+ mode_cmd.width = surface_width;
-+ mode_cmd.height = surface_height;
-+
-+ mode_cmd.bpp = 16;
-+ mode_cmd.pitch = ALIGN(mode_cmd.width * ((mode_cmd.bpp + 1) / 8), 64);
-+ mode_cmd.depth = 16;
-+
-+ size = mode_cmd.pitch * mode_cmd.height;
-+ size = ALIGN(size, PAGE_SIZE);
-+ if ( size > GLAMO_FRAMEBUFFER_ALLOCATION ) {
-+ printk(KERN_ERR "[glamo-drm] Not enough memory for fb\n");
-+ ret = -ENOMEM;
-+ goto out;
-+ }
-+ fbo = glamo_gem_object_alloc(dev, GLAMO_FRAMEBUFFER_ALLOCATION, 2);
-+ if (!fbo) {
-+ printk(KERN_ERR "[glamo-drm] Failed to allocate framebuffer\n");
-+ ret = -ENOMEM;
-+ goto out;
-+ }
-+ gobj = fbo->driver_private;
-+
-+ mutex_lock(&dev->struct_mutex);
-+
-+ ret = glamo_framebuffer_create(dev, &mode_cmd, &fb, fbo);
-+ if (ret) {
-+ DRM_ERROR("failed to allocate fb.\n");
-+ goto out_unref;
-+ }
-+
-+ list_add(&fb->filp_head, &dev->mode_config.fb_kernel_list);
-+
-+ glamo_fb = to_glamo_framebuffer(fb);
-+ *glamo_fb_p = glamo_fb;
-+
-+ info = framebuffer_alloc(sizeof(struct glamofb_par), device);
-+ if (!info) {
-+ ret = -ENOMEM;
-+ goto out_unref;
-+ }
-+
-+ par = info->par;
-+
-+ strcpy(info->fix.id, "glamodrmfb");
-+ info->fix.type = FB_TYPE_PACKED_PIXELS;
-+ info->fix.visual = FB_VISUAL_TRUECOLOR;
-+ info->fix.type_aux = 0;
-+ info->fix.xpanstep = 1; /* doing it in hw */
-+ info->fix.ypanstep = 1; /* doing it in hw */
-+ info->fix.ywrapstep = 0;
-+ info->fix.accel = FB_ACCEL_GLAMO;
-+ info->fix.type_aux = 0;
-+ info->flags = FBINFO_DEFAULT;
-+
-+ info->fbops = &glamofb_ops;
-+
-+ info->fix.line_length = fb->pitch;
-+
-+ info->flags = FBINFO_DEFAULT;
-+
-+ offs = gobj->block->start;
-+ info->screen_base = ioremap(gdrm->vram->start + offs + GLAMO_OFFSET_FB,
-+ GLAMO_FRAMEBUFFER_ALLOCATION);
-+ if (!info->screen_base) {
-+ printk(KERN_ERR "[glamo-drm] Couldn't map framebuffer!\n");
-+ ret = -ENOSPC;
-+ goto out_unref;
-+ }
-+ info->fix.smem_start = (unsigned long)gdrm->vram->start + offs;
-+ info->fix.smem_len = size;
-+ info->screen_size = size;
-+
-+ info->pseudo_palette = fb->pseudo_palette;
-+ info->var.xres_virtual = fb->width;
-+ info->var.yres_virtual = fb->height;
-+ info->var.bits_per_pixel = fb->bits_per_pixel;
-+ info->var.xoffset = 0;
-+ info->var.yoffset = 0;
-+ info->var.activate = FB_ACTIVATE_NOW;
-+ info->var.height = -1;
-+ info->var.width = -1;
-+ info->var.xres = fb_width;
-+ info->var.yres = fb_height;
-+
-+ info->fix.mmio_start = 0;
-+ info->fix.mmio_len = 0;
-+
-+ info->pixmap.size = 64*1024;
-+ info->pixmap.buf_align = 8;
-+ info->pixmap.access_align = 32;
-+ info->pixmap.flags = FB_PIXMAP_SYSTEM;
-+ info->pixmap.scan_align = 1;
-+
-+ switch (fb->depth) {
-+ case 16:
-+ switch ( colour_mode ) {
-+ case GLAMO_FB_RGB565:
-+ info->var.red.offset = 11;
-+ info->var.green.offset = 5;
-+ info->var.blue.offset = 0;
-+ info->var.red.length = 5;
-+ info->var.green.length = 6;
-+ info->var.blue.length = 5;
-+ info->var.transp.length = 0;
-+ break;
-+ case GLAMO_FB_ARGB1555:
-+ info->var.transp.offset = 15;
-+ info->var.red.offset = 10;
-+ info->var.green.offset = 5;
-+ info->var.blue.offset = 0;
-+ info->var.transp.length = 1;
-+ info->var.red.length = 5;
-+ info->var.green.length = 5;
-+ info->var.blue.length = 5;
-+ break;
-+ case GLAMO_FB_ARGB4444:
-+ info->var.transp.offset = 12;
-+ info->var.red.offset = 8;
-+ info->var.green.offset = 4;
-+ info->var.blue.offset = 0;
-+ info->var.transp.length = 4;
-+ info->var.red.length = 4;
-+ info->var.green.length = 4;
-+ info->var.blue.length = 4;
-+ break;
-+ }
-+ break;
-+ case 24:
-+ case 32:
-+ default:
-+ /* The Smedia Glamo doesn't support anything but 16bit color */
-+ printk(KERN_ERR "[glamo-drm] Only 16bpp is supported.\n");
-+ return -EINVAL;
-+ }
-+
-+ fb->fbdev = info;
-+ par->glamo_fb = glamo_fb;
-+ par->dev = dev;
-+ gdrm->fb = info;
-+
-+ info->var.pixclock = -1;
-+
-+ printk(KERN_INFO "[glamo-drm] Allocated %dx%d fb: bo %p\n",
-+ glamo_fb->base.width, glamo_fb->base.height, fbo);
-+ mutex_unlock(&dev->struct_mutex);
-+ return 0;
-+
-+out_unref:
-+ drm_gem_object_unreference(fbo);
-+ mutex_unlock(&dev->struct_mutex);
-+out:
-+ return ret;
-+}
-+
-+
-+void glamo_kmsfb_suspend(struct glamodrm_handle *gdrm)
-+{
-+ fb_set_suspend(gdrm->fb, 1);
-+}
-+
-+
-+void glamo_kmsfb_resume(struct glamodrm_handle *gdrm)
-+{
-+ fb_set_suspend(gdrm->fb, 0);
-+}
-diff --git a/drivers/gpu/drm/glamo/glamo-kms-fb.h b/drivers/gpu/drm/glamo/glamo-kms-fb.h
-new file mode 100644
-index 0000000..1960e76
---- /dev/null
-+++ b/drivers/gpu/drm/glamo/glamo-kms-fb.h
-@@ -0,0 +1,41 @@
-+/*
-+ * SMedia Glamo 336x/337x KMS framebuffer
-+ *
-+ * Copyright (C) 2009 Thomas White <taw@bitwiz.org.uk>
-+ *
-+ * Based on glamo-fb.c (C) 2007-2008 by Openmoko, Inc.
-+ * Author: Harald Welte <laforge@openmoko.org>
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+
-+#ifndef __GLAMO_KMS_FB_H
-+#define __GLAMO_KMS_FB_H
-+
-+#include <drm/drmP.h>
-+#include "glamo-drm-private.h"
-+
-+extern int glamofb_create(struct drm_device *dev, uint32_t fb_width,
-+ uint32_t fb_height, uint32_t surface_width,
-+ uint32_t surface_height, int colour_mode,
-+ struct glamo_framebuffer **glamo_fb_p);
-+
-+extern void glamo_kmsfb_suspend(struct glamodrm_handle *gdrm);
-+extern void glamo_kmsfb_resume(struct glamodrm_handle *gdrm);
-+
-+#endif /* __GLAMO_KMS_FB_H */
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index c75d165..29248b0 100644
--- a/drivers/input/misc/Kconfig
return 0;
diff --git a/drivers/mfd/glamo-core.c b/drivers/mfd/glamo-core.c
-index 8880263..ab1203c 100644
+index 8880263..a0556b8 100644
--- a/drivers/mfd/glamo-core.c
+++ b/drivers/mfd/glamo-core.c
@@ -160,6 +160,19 @@ static void reg_set_bit_mask(struct glamo_core *glamo,
static inline void __reg_clear_bit(struct glamo_core *glamo,
uint16_t reg, uint16_t bit)
{
-@@ -190,10 +246,25 @@ static struct resource glamo_fb_resources[] = {
- .flags = IORESOURCE_MEM,
- }, {
- .name = "glamo-fb-mem",
-- .start = GLAMO_OFFSET_FB,
-- .end = GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1,
-+ .start = GLAMO_MEM_BASE + GLAMO_OFFSET_FB,
-+ .end = GLAMO_MEM_BASE + GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1,
- .flags = IORESOURCE_MEM,
-- },
-+ }, {
-+ .name = "glamo-cmdq-regs",
-+ .start = GLAMO_REGOFS_CMDQUEUE,
-+ .end = GLAMO_REGOFS_RISC - 1,
-+ .flags = IORESOURCE_MEM,
-+ }, {
-+ .name = "glamo-2d-regs",
-+ .start = GLAMO_REGOFS_2D,
-+ .end = GLAMO_REGOFS_3D- 1,
-+ .flags = IORESOURCE_MEM,
-+ }, {
-+ .name = "glamo-2d-irq",
-+ .start = GLAMO_IRQ_2D,
-+ .end = GLAMO_IRQ_2D,
-+ .flags = IORESOURCE_IRQ,
-+ }
- };
-
- static struct resource glamo_mmc_resources[] = {
-@@ -204,9 +275,9 @@ static struct resource glamo_mmc_resources[] = {
- .flags = IORESOURCE_MEM
- }, {
- .name = "glamo-mmc-mem",
-- .start = GLAMO_OFFSET_FB + GLAMO_FB_SIZE,
-- .end = GLAMO_OFFSET_FB + GLAMO_FB_SIZE +
-- GLAMO_MMC_BUFFER_SIZE - 1,
-+ .start = GLAMO_MEM_BASE + GLAMO_OFFSET_MMC,
-+ .end = GLAMO_MEM_BASE + GLAMO_OFFSET_MMC
-+ + GLAMO_MMC_BUFFER_SIZE - 1,
- .flags = IORESOURCE_MEM
- }, {
- .start = GLAMO_IRQ_MMC,
-@@ -467,6 +538,23 @@ static const struct glamo_engine_reg_set glamo_2d_regs[] = {
- }
- };
-
-+static const struct glamo_engine_reg_set glamo_3d_regs[] = {
-+ { GLAMO_REG_CLOCK_3D,
-+ GLAMO_CLOCK_3D_EN_M8CLK |
-+ GLAMO_CLOCK_3D_DG_M8CLK,
-+
-+ GLAMO_CLOCK_3D_EN_ECLK |
-+ GLAMO_CLOCK_3D_DG_ECLK,
-+
-+ GLAMO_CLOCK_3D_EN_RCLK |
-+ GLAMO_CLOCK_3D_DG_RCLK
-+ },
-+ { GLAMO_REG_CLOCK_GEN5_1,
-+ 0,
-+ GLAMO_CLOCK_GEN51_EN_DIV_GCLK,
-+ }
-+};
-+
- static const struct glamo_engine_reg_set glamo_cmdq_regs[] = {
- { GLAMO_REG_CLOCK_2D,
- GLAMO_CLOCK_2D_EN_M6CLK,
-@@ -488,6 +576,8 @@ static const struct glamo_engine_desc glamo_engines[] = {
- glamo_mmc_regs),
- [GLAMO_ENGINE_2D] = GLAMO_ENGINE("2D", GLAMO_HOSTBUS2_MMIO_EN_2D,
- glamo_2d_regs),
-+ [GLAMO_ENGINE_3D] = GLAMO_ENGINE("3D", GLAMO_HOSTBUS2_MMIO_EN_3D,
-+ glamo_3d_regs),
- [GLAMO_ENGINE_CMDQ] = GLAMO_ENGINE("CMDQ", GLAMO_HOSTBUS2_MMIO_EN_CQ,
- glamo_cmdq_regs),
- };
-@@ -511,6 +601,7 @@ int __glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
- case GLAMO_ENGINE_LCD:
- case GLAMO_ENGINE_MMC:
- case GLAMO_ENGINE_2D:
-+ case GLAMO_ENGINE_3D:
- case GLAMO_ENGINE_CMDQ:
- break;
- default:
-@@ -557,6 +648,7 @@ int __glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine)
- case GLAMO_ENGINE_MMC:
- case GLAMO_ENGINE_2D:
- case GLAMO_ENGINE_CMDQ:
-+ case GLAMO_ENGINE_3D:
- break;
- default:
- return -EINVAL;
-@@ -649,6 +741,10 @@ static const struct glamo_script reset_regs[] = {
- [GLAMO_ENGINE_2D] = {
- GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_RESET
- },
-+ [GLAMO_ENGINE_3D] = {
-+ GLAMO_REG_CLOCK_3D, GLAMO_CLOCK_3D_BACK_RESET |
-+ GLAMO_CLOCK_3D_FRONT_RESET
-+ },
- [GLAMO_ENGINE_JPEG] = {
- GLAMO_REG_CLOCK_JPEG, GLAMO_CLOCK_JPEG_RESET
- },
-@@ -930,6 +1026,7 @@ static int __devinit glamo_probe(struct platform_device *pdev)
+@@ -930,6 +986,7 @@ static int __devinit glamo_probe(struct platform_device *pdev)
glamo->irq = platform_get_irq(pdev, 0);
glamo->irq_base = irq_base = platform_get_irq(pdev, 1);
glamo->pdata = pdev->dev.platform_data;
if (glamo->irq < 0) {
ret = glamo->irq;
-@@ -965,7 +1062,7 @@ static int __devinit glamo_probe(struct platform_device *pdev)
+@@ -965,7 +1022,7 @@ static int __devinit glamo_probe(struct platform_device *pdev)
goto err_free;
}
err_ioremap:
s3c2410_stop_hc(dev);
iounmap(hcd->regs);
-diff --git a/drivers/video/backlight/jbt6k74.c b/drivers/video/backlight/jbt6k74.c
-index 58547b5..ce925aa 100644
---- a/drivers/video/backlight/jbt6k74.c
-+++ b/drivers/video/backlight/jbt6k74.c
-@@ -101,20 +101,10 @@ enum jbt_register {
- JBT_REG_HCLOCK_QVGA = 0xed,
- };
-
--enum jbt_resolution {
-- JBT_RESOLUTION_VGA,
-- JBT_RESOLUTION_QVGA,
--};
--
--enum jbt_power_mode {
-- JBT_POWER_MODE_DEEP_STANDBY,
-- JBT_POWER_MODE_SLEEP,
-- JBT_POWER_MODE_NORMAL,
--};
-
- static const char *jbt_power_mode_names[] = {
-- [JBT_POWER_MODE_DEEP_STANDBY] = "deep-standby",
-- [JBT_POWER_MODE_SLEEP] = "sleep",
-+ [JBT_POWER_MODE_OFF] = "off",
-+ [JBT_POWER_MODE_STANDBY] = "standby",
- [JBT_POWER_MODE_NORMAL] = "normal",
- };
-
-@@ -123,6 +113,7 @@ static const char *jbt_resolution_names[] = {
- [JBT_RESOLUTION_QVGA] = "qvga",
- };
-
-+
- struct jbt_info {
- struct mutex lock; /* protects this structure */
- enum jbt_resolution resolution;
-@@ -141,6 +132,8 @@ struct jbt_info {
- uint16_t reg_cache[0xEE];
- };
-
-+struct jbt_info *jbt_global;
-+
- #define JBT_COMMAND 0x000
- #define JBT_DATA 0x100
-
-@@ -156,6 +149,8 @@ static int jbt_reg_write_nodata(struct jbt_info *jbt, uint8_t reg)
- else
- dev_err(&jbt->spi->dev, "Write failed: %d\n", ret);
-
-+ mdelay(1);
-+
- return ret;
- }
-
-@@ -173,6 +168,8 @@ static int jbt_reg_write(struct jbt_info *jbt, uint8_t reg, uint8_t data)
- else
- dev_err(&jbt->spi->dev, "Write failed: %d\n", ret);
-
-+ mdelay(1);
-+
- return ret;
- }
-
-@@ -191,6 +188,8 @@ static int jbt_reg_write16(struct jbt_info *jbt, uint8_t reg, uint16_t data)
- else
- dev_err(&jbt->spi->dev, "Write failed: %d\n", ret);
-
-+ mdelay(1);
-+
- return ret;
- }
-
-@@ -218,7 +217,7 @@ static int jbt_init_regs(struct jbt_info *jbt)
- * to avoid red / blue flicker
- */
- ret |= jbt_reg_write(jbt, JBT_REG_ASW_SLEW, 0x00 | (1 << 5));
-- ret |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0x00);
-+ ret |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0xff);
-
- ret |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_A, 0x11);
- ret |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_B, 0x11);
-@@ -260,9 +259,11 @@ static int jbt_init_regs(struct jbt_info *jbt)
- return ret ? -EIO : 0;
- }
-
--static int jbt_standby_to_sleep(struct jbt_info *jbt)
-+
-+static int jbt_off_to_normal(struct jbt_info *jbt)
- {
- int ret;
-+
- struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data;
-
- ret = regulator_bulk_enable(ARRAY_SIZE(jbt->supplies), jbt->supplies);
-@@ -270,7 +271,7 @@ static int jbt_standby_to_sleep(struct jbt_info *jbt)
- return ret;
-
- gpio_set_value_cansleep(pdata->gpio_reset, 1);
-- mdelay(100);
-+ mdelay(200);
-
- /* three times command zero */
- ret |= jbt_reg_write_nodata(jbt, 0x00);
-@@ -283,17 +284,16 @@ static int jbt_standby_to_sleep(struct jbt_info *jbt)
- /* deep standby out */
- ret |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x11);
- mdelay(1);
-- ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x28);
-+ if (ret != 0)
-+ printk (KERN_ERR "Ignored ret value:%i",ret);
-+
-+ ret |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x28);
-
- /* (re)initialize register set */
- ret |= jbt_init_regs(jbt);
-+ if (ret != 0)
-+ printk (KERN_ERR "Ignored ret value2:%i",ret);
-
-- return ret ? -EIO : 0;
--}
--
--static int jbt_sleep_to_normal(struct jbt_info *jbt)
--{
-- int ret;
-
- /* Make sure we are 120 ms after SLEEP_OUT */
- if (time_before(jiffies, jbt->next_sleep))
-@@ -324,6 +324,7 @@ static int jbt_sleep_to_normal(struct jbt_info *jbt)
-
- /* Sleep mode off */
- ret |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
-+
- jbt->next_sleep = jiffies + msecs_to_jiffies(120);
-
- /* Allow the booster and display controller to restart stably */
-@@ -332,95 +333,92 @@ static int jbt_sleep_to_normal(struct jbt_info *jbt)
- return ret ? -EIO : 0;
- }
-
--static int jbt_normal_to_sleep(struct jbt_info *jbt)
-+static int jbt_normal_to_off(struct jbt_info *jbt)
- {
- int ret;
-+ struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data;
-
-- /* Make sure we are 120 ms after SLEEP_OUT */
-- while (time_before(jiffies, jbt->next_sleep))
-- cpu_relax();
-+ /* Pull the plug! */
-+ ret = regulator_bulk_disable(ARRAY_SIZE(jbt->supplies),
-+ jbt->supplies);
-+
-+ if (!ret)
-+ gpio_set_value_cansleep(pdata->gpio_reset, 0);
-+
-+ return ret ? -EIO : 0;
-+}
-+
-+
-+static int jbt_normal_to_standby(struct jbt_info *jbt)
-+{
-+ int ret;
-+
-+ if ( jbt->power_mode != JBT_POWER_MODE_NORMAL ) return 0;
-
-+ /* Make sure we are 120 ms after SLEEP_{IN,OUT} */
-+ while (time_before(jiffies, jbt->next_sleep)) cpu_relax();
-+
-+ /* Sleep mode on */
- ret = jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
- ret |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0x8000 | 1 << 3);
-+
- ret |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_IN);
-- jbt->next_sleep = jiffies + msecs_to_jiffies(120);
-+ jbt->next_sleep = jiffies + msecs_to_jiffies(150);
-
-- /* Allow the internal circuits to stop automatically */
-- mdelay(5);
-+ jbt->power_mode = JBT_POWER_MODE_STANDBY;
-
- return ret ? -EIO : 0;
- }
-
--static int jbt_sleep_to_standby(struct jbt_info *jbt)
-+
-+static int jbt_standby_to_normal(struct jbt_info *jbt)
- {
- int ret;
- struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data;
-
-- ret = jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x00);
-+ if ( jbt->power_mode != JBT_POWER_MODE_STANDBY ) return 0;
-+
-+ /* Make sure we are 120 ms after SLEEP_{IN,OUT} */
-+ while (time_before(jiffies, jbt->next_sleep)) cpu_relax();
-+ ret = jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
-+ jbt->next_sleep = jiffies + msecs_to_jiffies(150);
-
- if (!ret) {
- gpio_set_value_cansleep(pdata->gpio_reset, 0);
- ret = regulator_bulk_disable(ARRAY_SIZE(jbt->supplies), jbt->supplies);
- }
-
-- return ret;
-+ ret |= jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
-+ ret |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xdff9);
-+
-+ jbt->power_mode = JBT_POWER_MODE_NORMAL;
-+
-+ return ret ? -EIO : 0;
- }
-
-+
- static int jbt6k74_enter_power_mode(struct jbt_info *jbt,
- enum jbt_power_mode new_mode)
- {
-- struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data;
- int ret = -EINVAL;
-
-- dev_dbg(&jbt->spi->dev, "entering (old_state=%s, new_state=%s)\n",
-+ printk(KERN_CRIT "entering (old_state=%s, new_state=%s)\n",
- jbt_power_mode_names[jbt->power_mode],
- jbt_power_mode_names[new_mode]);
-
- mutex_lock(&jbt->lock);
-
-- if (jbt->suspended) {
-- switch (new_mode) {
-- case JBT_POWER_MODE_DEEP_STANDBY:
-- case JBT_POWER_MODE_SLEEP:
-- case JBT_POWER_MODE_NORMAL:
-- ret = 0;
-- jbt->suspend_mode = new_mode;
-- break;
-- default:
-- break;
-- }
-- } else if (new_mode == JBT_POWER_MODE_NORMAL &&
-- pdata->enable_pixel_clock) {
-- pdata->enable_pixel_clock(&jbt->spi->dev, 1);
-- }
--
- switch (jbt->power_mode) {
-- case JBT_POWER_MODE_DEEP_STANDBY:
-+ case JBT_POWER_MODE_OFF:
- switch (new_mode) {
-- case JBT_POWER_MODE_DEEP_STANDBY:
-+ case JBT_POWER_MODE_OFF:
- ret = 0;
- break;
-- case JBT_POWER_MODE_SLEEP:
-- ret = jbt_standby_to_sleep(jbt);
-- break;
- case JBT_POWER_MODE_NORMAL:
-- /* first transition into sleep */
-- ret = jbt_standby_to_sleep(jbt);
-- /* then transition into normal */
-- ret |= jbt_sleep_to_normal(jbt);
-+ ret = jbt_off_to_normal(jbt);
- break;
-- }
-- break;
-- case JBT_POWER_MODE_SLEEP:
-- switch (new_mode) {
-- case JBT_POWER_MODE_SLEEP:
-- ret = 0;
-- break;
-- case JBT_POWER_MODE_DEEP_STANDBY:
-- ret = jbt_sleep_to_standby(jbt);
-- break;
-- case JBT_POWER_MODE_NORMAL:
-- ret = jbt_sleep_to_normal(jbt);
-+ case JBT_POWER_MODE_STANDBY:
-+ ret = -EINVAL;
- break;
- }
- break;
-@@ -429,25 +427,23 @@ static int jbt6k74_enter_power_mode(struct jbt_info *jbt,
- case JBT_POWER_MODE_NORMAL:
- ret = 0;
- break;
-- case JBT_POWER_MODE_DEEP_STANDBY:
-- /* first transition into sleep */
-- ret = jbt_normal_to_sleep(jbt);
-- /* then transition into deep standby */
-- ret |= jbt_sleep_to_standby(jbt);
-+ case JBT_POWER_MODE_OFF:
-+ ret = jbt_normal_to_off(jbt);
- break;
-- case JBT_POWER_MODE_SLEEP:
-- ret = jbt_normal_to_sleep(jbt);
-+ case JBT_POWER_MODE_STANDBY:
-+ ret = -EINVAL;
- break;
- }
-+ break;
-+ case JBT_POWER_MODE_STANDBY:
-+ ret = -EINVAL;
-+ break;
- }
-
- if (ret == 0) {
- jbt->power_mode = new_mode;
-- if (new_mode != JBT_POWER_MODE_NORMAL &&
-- pdata->enable_pixel_clock)
-- pdata->enable_pixel_clock(&jbt->spi->dev, 0);
- } else {
-- dev_err(&jbt->spi->dev, "Failed enter state '%s': %d\n",
-+ dev_err(&jbt->spi->dev, "Failed to enter state '%s': %d\n",
- jbt_power_mode_names[new_mode], ret);
- }
-
-@@ -459,28 +455,46 @@ static int jbt6k74_enter_power_mode(struct jbt_info *jbt,
- static int jbt6k74_set_resolution(struct jbt_info *jbt,
- enum jbt_resolution new_resolution)
- {
-+ int old_resolution;
- int ret = 0;
-- enum jbt_resolution old_resolution;
-+
-+ if ( !jbt ) return -1;
-
- mutex_lock(&jbt->lock);
-
-- if (jbt->resolution == new_resolution)
-- goto out_unlock;
-+ if ( jbt->resolution == new_resolution ) goto out_unlock;
-+ if ( jbt->power_mode == JBT_POWER_MODE_OFF ) goto out_unlock;
-
- old_resolution = jbt->resolution;
- jbt->resolution = new_resolution;
-
-- if (jbt->power_mode == JBT_POWER_MODE_NORMAL) {
-+ if ( jbt->power_mode == JBT_POWER_MODE_NORMAL ) {
-+
-+ ret = jbt_normal_to_standby(jbt);
-+
-+ mdelay(25);
-+
-+ if (jbt->resolution == JBT_RESOLUTION_VGA) {
-+ /* Quad mode off */
-+ ret |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00);
-+ ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80);
-+ } else {
-+ /* Quad mode on */
-+ ret |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x22);
-+ ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x81);
-+ }
-
-- /* first transition into sleep */
-- ret = jbt_normal_to_sleep(jbt);
-- ret |= jbt_sleep_to_normal(jbt);
-+ mdelay(25);
-+
-+ ret |= jbt_standby_to_normal(jbt);
-
- if (ret) {
- jbt->resolution = old_resolution;
-- dev_err(&jbt->spi->dev, "Failed to set resolution '%s')\n",
-+ dev_err(&jbt->spi->dev,
-+ "Failed to set resolution '%s')\n",
- jbt_resolution_names[new_resolution]);
- }
-+
- }
-
- out_unlock:
-@@ -592,7 +606,7 @@ static ssize_t reset_write(struct device *dev, struct device_attribute *attr,
-
- mutex_unlock(&jbt->lock);
-
-- jbt->power_mode = JBT_POWER_MODE_DEEP_STANDBY;
-+ jbt->power_mode = JBT_POWER_MODE_OFF;
- jbt6k74_enter_power_mode(jbt, old_power_mode);
-
- return count;
-@@ -619,27 +633,6 @@ static struct attribute_group jbt_attr_group = {
- .attrs = jbt_sysfs_entries,
- };
-
--/* FIXME: This in an ugly hack to delay display blanking.
-- When the jbt is in sleep mode it displays an all white screen and thus one
-- will a see a short flash.
-- By delaying the blanking we will give the backlight a chance to turn off and
-- thus avoid getting the flash */
--static void jbt_blank_worker(struct work_struct *work)
--{
-- struct jbt_info *jbt = container_of(work, struct jbt_info,
-- blank_work.work);
--
-- switch (jbt->blank_mode) {
-- case FB_BLANK_NORMAL:
-- jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_SLEEP);
-- break;
-- case FB_BLANK_POWERDOWN:
-- jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_DEEP_STANDBY);
-- break;
-- default:
-- break;
-- }
--}
-
- static int jbt6k74_set_mode(struct lcd_device *ld, struct fb_videomode *m)
- {
-@@ -652,7 +645,7 @@ static int jbt6k74_set_mode(struct lcd_device *ld, struct fb_videomode *m)
- ret = jbt6k74_set_resolution(jbt, JBT_RESOLUTION_VGA);
- } else {
- dev_err(&jbt->spi->dev, "Unknown resolution.\n");
-- jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_SLEEP);
-+ jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_OFF);
- }
-
- return ret;
-@@ -664,7 +657,7 @@ static int jbt6k74_set_power(struct lcd_device *ld, int power)
- struct jbt_info *jbt = dev_get_drvdata(&ld->dev);
-
- jbt->blank_mode = power;
-- cancel_rearming_delayed_work(&jbt->blank_work);
-+ //cancel_rearming_delayed_work(&jbt->blank_work);
-
- switch (power) {
- case FB_BLANK_UNBLANK:
-@@ -674,11 +667,13 @@ static int jbt6k74_set_power(struct lcd_device *ld, int power)
- break;
- case FB_BLANK_NORMAL:
- dev_dbg(&jbt->spi->dev, "blank\n");
-- ret = schedule_delayed_work(&jbt->blank_work, HZ);
-+ ret = jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_OFF);
- break;
- case FB_BLANK_POWERDOWN:
- dev_dbg(&jbt->spi->dev, "powerdown\n");
-- ret = schedule_delayed_work(&jbt->blank_work, HZ);
-+ //ret = schedule_delayed_work(&jbt->blank_work, HZ);
-+ jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_OFF);
-+ ret = 1;
- break;
- default:
- break;
-@@ -694,10 +689,10 @@ static int jbt6k74_get_power(struct lcd_device *ld)
- switch (jbt->power_mode) {
- case JBT_POWER_MODE_NORMAL:
- return FB_BLANK_UNBLANK;
-- case JBT_POWER_MODE_SLEEP:
-+ case JBT_POWER_MODE_OFF:
- return FB_BLANK_NORMAL;
- default:
-- return JBT_POWER_MODE_DEEP_STANDBY;
-+ return JBT_POWER_MODE_OFF;
- }
- }
-
-@@ -731,6 +726,8 @@ static int __devinit jbt_probe(struct spi_device *spi)
- if (!jbt)
- return -ENOMEM;
-
-+ jbt_global = jbt;
-+
- jbt->spi = spi;
-
- jbt->lcd_dev = lcd_device_register("jbt6k74-lcd", &spi->dev, jbt,
-@@ -741,11 +738,9 @@ static int __devinit jbt_probe(struct spi_device *spi)
- goto err_free_drvdata;
- }
-
-- INIT_DELAYED_WORK(&jbt->blank_work, jbt_blank_worker);
--
- jbt->resolution = JBT_RESOLUTION_VGA;
-- jbt->power_mode = JBT_POWER_MODE_DEEP_STANDBY;
- jbt->next_sleep = jiffies + msecs_to_jiffies(120);
-+ jbt->power_mode = JBT_POWER_MODE_OFF;
- mutex_init(&jbt->lock);
-
- dev_set_drvdata(&spi->dev, jbt);
-@@ -834,6 +829,26 @@ static int __devexit jbt_remove(struct spi_device *spi)
- return 0;
- }
-
-+/* Begin horrible layering violations in the interest of making stuff work */
-+
-+int jbt6k74_finish_resolutionchange(enum jbt_resolution new_resolution)
-+{
-+ if ( !jbt_global ) return 0;
-+ return jbt6k74_set_resolution(jbt_global, new_resolution);
-+}
-+EXPORT_SYMBOL_GPL(jbt6k74_finish_resolutionchange);
-+
-+void jbt6k74_setpower(enum jbt_power_mode new_power)
-+{
-+ printk(KERN_CRIT "About to set power..\n");
-+ if ( !jbt_global ) return;
-+ printk(KERN_CRIT "Setting JBT power.. %i\n", new_power);
-+ jbt6k74_enter_power_mode(jbt_global, new_power);
-+}
-+EXPORT_SYMBOL_GPL(jbt6k74_setpower);
-+
-+/* End horrible layering violations */
-+
- #ifdef CONFIG_PM
- static int jbt_suspend(struct spi_device *spi, pm_message_t state)
- {
-@@ -841,8 +856,7 @@ static int jbt_suspend(struct spi_device *spi, pm_message_t state)
-
- jbt->suspend_mode = jbt->power_mode;
-
-- jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_DEEP_STANDBY);
-- jbt->suspended = 1;
-+ jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_OFF);
-
- dev_info(&spi->dev, "suspended\n");
-
diff --git a/drivers/video/glamo-fb.c b/drivers/video/glamo-fb.c
index 3f8ec8d..a428047 100644
--- a/drivers/video/glamo-fb.c
glamofb_reg_write(gfb, GLAMO_REG_LCD_COMMAND1,
GLAMO_LCD_CMD_TYPE_DISP |
GLAMO_LCD_CMD_DATA_DISP_FIRE);
-diff --git a/include/drm/Kbuild b/include/drm/Kbuild
-index bd3a1c2..a8f06eb 100644
---- a/include/drm/Kbuild
-+++ b/include/drm/Kbuild
-@@ -10,3 +10,4 @@ unifdef-y += savage_drm.h
- unifdef-y += vmwgfx_drm.h
- unifdef-y += via_drm.h
- unifdef-y += nouveau_drm.h
-+unifdef-y += glamo_drm.h
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 2f3b3a0..43894ec 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -56,6 +56,7 @@
- #include <linux/cdev.h>
- #include <linux/mutex.h>
- #include <linux/slab.h>
-+#include <linux/platform_device.h>
- #if defined(__alpha__) || defined(__powerpc__)
- #include <asm/pgtable.h> /* For pte_wrprotect */
- #endif
-@@ -144,6 +145,7 @@ extern void drm_ut_debug_printk(unsigned int request_level,
- #define DRIVER_IRQ_VBL2 0x800
- #define DRIVER_GEM 0x1000
- #define DRIVER_MODESET 0x2000
-+#define DRIVER_IS_PLATFORM 0x4000
-
- /***********************************************************************/
- /** \name Begin the DRM... */
-@@ -1014,6 +1016,7 @@ struct drm_device {
- wait_queue_head_t buf_writers; /**< Processes waiting to ctx switch */
-
- struct drm_agp_head *agp; /**< AGP data */
-+ struct platform_device *platform_dev; /**< platform device structure */
-
- struct pci_dev *pdev; /**< PCI device structure */
- int pci_vendor; /**< PCI vendor id */
-@@ -1124,12 +1127,20 @@ static inline int drm_mtrr_del(int handle, unsigned long offset,
- }
- #endif
-
-+static inline int drm_core_is_platform(struct drm_device *dev)
-+{
-+ return drm_core_check_feature(dev, DRIVER_IS_PLATFORM);
-+}
-+
- /******************************************************************/
- /** \name Internal function definitions */
- /*@{*/
-
- /* Driver support (drm_drv.h) */
- extern int drm_init(struct drm_driver *driver);
-+extern int drm_platform_init(struct drm_driver *driver,
-+ struct platform_device *pdev,
-+ void *dev_private);
- extern void drm_exit(struct drm_driver *driver);
- extern long drm_ioctl(struct file *filp,
- unsigned int cmd, unsigned long arg);
-@@ -1350,6 +1361,8 @@ extern int drm_dropmaster_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
- struct drm_master *drm_master_create(struct drm_minor *minor);
- extern struct drm_master *drm_master_get(struct drm_master *master);
-+extern int drm_get_platform_dev(struct platform_device *pdev,
-+ struct drm_driver *driver, void *priv);
- extern void drm_master_put(struct drm_master **master);
- extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
- struct drm_driver *driver);
-diff --git a/include/drm/glamo_drm.h b/include/drm/glamo_drm.h
-new file mode 100644
-index 0000000..4c194dc
---- /dev/null
-+++ b/include/drm/glamo_drm.h
-@@ -0,0 +1,153 @@
-+/* glamo_drm.h -- Public header for the Glamo driver
-+ *
-+ * Copyright 2009 Thomas White
-+ * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
-+ * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
-+ * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
-+ * All rights reserved.
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
-+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
-+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
-+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ *
-+ * Authors:
-+ * Thomas White <taw@bitwiz.org.uk>
-+ * Kevin E. Martin <martin@valinux.com>
-+ * Gareth Hughes <gareth@valinux.com>
-+ * Keith Whitwell <keith@tungstengraphics.com>
-+ */
-+
-+#ifndef __GLAMO_DRM_H__
-+#define __GLAMO_DRM_H__
-+
-+#include "drm.h"
-+
-+#define GLAMO_GEM_DOMAIN_VRAM (0x1)
-+
-+/* Glamo specific ioctls */
-+#define DRM_GLAMO_CMDBUF 0x01
-+#define DRM_GLAMO_SWAP 0x02
-+#define DRM_GLAMO_CMDBURST 0x03
-+
-+#define DRM_GLAMO_GEM_INFO 0x1c
-+#define DRM_GLAMO_GEM_CREATE 0x1d
-+#define DRM_GLAMO_GEM_MMAP 0x1e
-+#define DRM_GLAMO_GEM_PIN 0x1f
-+#define DRM_GLAMO_GEM_UNPIN 0x20
-+#define DRM_GLAMO_GEM_PREAD 0x21
-+#define DRM_GLAMO_GEM_PWRITE 0x22
-+#define DRM_GLAMO_GEM_WAIT_RENDERING 0x24
-+
-+#define DRM_IOCTL_GLAMO_CMDBUF DRM_IOW(DRM_COMMAND_BASE + DRM_GLAMO_CMDBUF, drm_glamo_cmd_buffer_t)
-+#define DRM_IOCTL_GLAMO_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_GLAMO_SWAP)
-+#define DRM_IOCTL_GLAMO_CMDBURST DRM_IOW(DRM_COMMAND_BASE + DRM_GLAMO_CMDBURST, drm_glamo_cmd_burst_t)
-+
-+#define DRM_IOCTL_GLAMO_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_INFO, struct drm_glamo_gem_info)
-+#define DRM_IOCTL_GLAMO_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_CREATE, struct drm_glamo_gem_create)
-+#define DRM_IOCTL_GLAMO_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_MMAP, struct drm_glamo_gem_mmap)
-+#define DRM_IOCTL_GLAMO_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_PIN, struct drm_glamo_gem_pin)
-+#define DRM_IOCTL_GLAMO_GEM_UNPIN DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_UNPIN, struct drm_glamo_gem_unpin)
-+#define DRM_IOCTL_GLAMO_GEM_PREAD DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_PREAD, struct drm_glamo_gem_pread)
-+#define DRM_IOCTL_GLAMO_GEM_PWRITE DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_PWRITE, struct drm_glamo_gem_pwrite)
-+#define DRM_IOCTL_GLAMO_GEM_WAIT_RENDERING DRM_IOW(DRM_COMMAND_BASE + DRM_GLAMO_GEM_WAIT_RENDERING, struct drm_glamo_gem_wait_rendering)
-+
-+
-+/* Simple command submission - a list of 16-bit address-data pairs */
-+typedef struct drm_glamo_cmd_buffer {
-+ unsigned int bufsz; /* Size of buffer, in bytes */
-+ char __user *buf; /* Buffer of stuff to go onto the ring buffer */
-+ unsigned int *obj_pos; /* Offsets (in bytes) at which to put objs */
-+ uint32_t *objs; /* List of buffer object (handles) to use */
-+ unsigned int nobjs; /* Number of objects referenced */
-+ int nbox;
-+ struct drm_clip_rect __user *boxes;
-+} drm_glamo_cmd_buffer_t;
-+
-+
-+/* Burst command submission - base address and data:
-+ * - Data can be 32-bit (more easily)
-+ * - Easier for the kernel to validate */
-+typedef struct drm_glamo_cmd_burst {
-+ uint16_t base; /* Base address (command) */
-+ int bufsz; /* Size of data, in bytes */
-+ uint16_t *data; /* Pointer to data */
-+ unsigned int *obj_pos; /* Offsets (in bytes) at which to put objs */
-+ uint32_t *objs; /* List of buffer object (handles) to use */
-+ unsigned int nobjs; /* Number of objects referenced */
-+} drm_glamo_cmd_burst_t;
-+
-+struct drm_glamo_gem_info {
-+ uint64_t vram_start;
-+ uint64_t vram_size;
-+};
-+
-+struct drm_glamo_gem_create {
-+ uint64_t size;
-+ uint64_t alignment;
-+ uint32_t handle;
-+ uint32_t initial_domain; // to allow VRAM to be created
-+ uint32_t no_backing_store;
-+};
-+
-+struct drm_glamo_gem_mmap {
-+ uint32_t handle; /* Handle goes in... */
-+ uint64_t offset; /* ...offset comes out */
-+};
-+
-+struct drm_glamo_gem_wait_rendering {
-+ uint32_t handle;
-+ int have_handle;
-+};
-+
-+struct drm_glamo_gem_pin {
-+ uint32_t handle;
-+ uint32_t pin_domain;
-+ uint64_t alignment;
-+ uint64_t offset;
-+};
-+
-+struct drm_glamo_gem_unpin {
-+ uint32_t handle;
-+ uint32_t pad;
-+};
-+
-+struct drm_glamo_gem_pread {
-+ /** Handle for the object being read. */
-+ uint32_t handle;
-+ uint32_t pad;
-+ /** Offset into the object to read from */
-+ uint64_t offset;
-+ /** Length of data to read */
-+ uint64_t size;
-+ /** Pointer to write the data into. */
-+ uint64_t data_ptr; /* void *, but pointers are not 32/64 compatible */
-+};
-+
-+struct drm_glamo_gem_pwrite {
-+ /** Handle for the object being written to. */
-+ uint32_t handle;
-+ uint32_t pad;
-+ /** Offset into the object to write to */
-+ uint64_t offset;
-+ /** Length of data to write */
-+ uint64_t size;
-+ /** Pointer to read the data from. */
-+ uint64_t data_ptr; /* void *, but pointers are not 32/64 compatible */
-+};
-+
-+#endif
-diff --git a/include/linux/jbt6k74.h b/include/linux/jbt6k74.h
-index 75488c4..2010bdc 100644
---- a/include/linux/jbt6k74.h
-+++ b/include/linux/jbt6k74.h
-@@ -3,6 +3,22 @@
-
- #include <linux/spi/spi.h>
-
-+enum jbt_resolution {
-+ JBT_RESOLUTION_VGA,
-+ JBT_RESOLUTION_QVGA,
-+};
-+
-+enum jbt_power_mode {
-+ JBT_POWER_MODE_OFF,
-+ JBT_POWER_MODE_STANDBY,
-+ JBT_POWER_MODE_NORMAL,
-+};
-+
-+extern void jbt6k74_setpower(enum jbt_power_mode new_power);
-+extern int jbt6k74_prepare_resolutionchange(enum jbt_resolution new_resolution);
-+extern int jbt6k74_finish_resolutionchange(enum jbt_resolution new_resolution);
-+
-+
- /*
- * struct jbt6k74_platform_data - Platform data for jbt6k74 driver
- * @probe_completed: Callback to be called when the driver has been
-@@ -13,7 +29,6 @@
- */
- struct jbt6k74_platform_data {
- void (*probe_completed)(struct device *dev);
-- void (*enable_pixel_clock)(struct device *dev, int enable);
-
- int gpio_reset;
- };
diff --git a/include/linux/lis302dl.h b/include/linux/lis302dl.h
new file mode 100644
index 0000000..0c1fc30
+#endif /* _LINUX_LIS302DL_H */
+
diff --git a/include/linux/mfd/glamo-core.h b/include/linux/mfd/glamo-core.h
-index 8275a2f..de2833d 100644
+index 8275a2f..8e3e56e 100644
--- a/include/linux/mfd/glamo-core.h
+++ b/include/linux/mfd/glamo-core.h
-@@ -3,18 +3,30 @@
-
- #include <linux/mfd/glamo.h>
-
-+/* Amount of Glamo memory */
-+#define GLAMO_INTERNAL_RAM_SIZE 0x800000
-+
-+/* Arbitrarily determined amount for the hardware cursor */
-+#define GLAMO_CURSOR_SIZE (4096)
-+#define GLAMO_MMC_BUFFER_SIZE (64 * 1024) /* 64k MMC buffer */
-+/* Remaining memory will be used for 2D and 3D graphics */
-+#define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE \
-+ - GLAMO_CURSOR_SIZE \
-+ - GLAMO_MMC_BUFFER_SIZE)
-+/* A 640x480, 16bpp, double-buffered framebuffer */
-+#if (GLAMO_FB_SIZE < (640 * 480 * 4)) /* == 0x12c000 */
-+#error Not enough Glamo VRAM for framebuffer!
-+#endif
-+
- /* for the time being, we put the on-screen framebuffer into the lowest
- * VRAM space. This should make the code easily compatible with the various
-- * 2MB/4MB/8MB variants of the Smedia chips */
--#define GLAMO_OFFSET_VRAM 0x800000
--#define GLAMO_OFFSET_FB (GLAMO_OFFSET_VRAM)
--
--/* we only allocate the minimum possible size for the framebuffer to make
-- * sure we have sufficient memory for other functions of the chip */
--/*#define GLAMO_FB_SIZE (640*480*4) *//* == 0x12c000 */
--#define GLAMO_INTERNAL_RAM_SIZE 0x800000
--#define GLAMO_MMC_BUFFER_SIZE (64 * 1024)
--#define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE - GLAMO_MMC_BUFFER_SIZE)
-+ * 2MB/4MB/8MB variants of the Smedia chips
-+ * glamo-fb.c assumes FB comes first, followed by cursor, so DON'T MOVE THEM
-+ * (see glamo_regs[] in glamo-fb.c for more information) */
-+#define GLAMO_MEM_BASE (0x800000)
-+#define GLAMO_OFFSET_FB (0x000000)
-+#define GLAMO_OFFSET_CURSOR (GLAMO_OFFSET_FB + GLAMO_FB_SIZE)
-+#define GLAMO_OFFSET_MMC (GLAMO_OFFSET_CURSOR + GLAMO_CURSOR_SIZE)
-
- enum glamo_pll {
- GLAMO_PLL1,
-@@ -37,6 +49,7 @@ struct glamo_core {
+@@ -37,6 +37,7 @@ struct glamo_core {
enum glamo_engine_state engine_state[__NUM_GLAMO_ENGINES];
spinlock_t lock;
uint16_t saved_irq_mask;
#ifdef CONFIG_DEBUG_FS
struct dentry *debugfs_dir;
#endif
-@@ -55,4 +68,6 @@ int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine);
+@@ -55,4 +56,6 @@ int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine);
void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine);
int glamo_engine_reclock(struct glamo_core *glamo,
enum glamo_engine engine, int ps);
+void glamo_pixclock_slow (struct glamo_core *glamo);
+void glamo_pixclock_fast (struct glamo_core *glamo);
#endif /* __GLAMO_CORE_H */
-diff --git a/include/linux/mfd/glamo-regs.h b/include/linux/mfd/glamo-regs.h
-index 59848e1..8b2fd47 100644
---- a/include/linux/mfd/glamo-regs.h
-+++ b/include/linux/mfd/glamo-regs.h
-@@ -627,4 +627,28 @@ enum glamo_core_revisions {
- GLAMO_CORE_REV_A3 = 0x0003,
- };
-
-+enum glamo_register_cq {
-+ GLAMO_REG_CMDQ_BASE_ADDRL = 0x00,
-+ GLAMO_REG_CMDQ_BASE_ADDRH = 0x02,
-+ GLAMO_REG_CMDQ_LEN = 0x04,
-+ GLAMO_REG_CMDQ_WRITE_ADDRL = 0x06,
-+ GLAMO_REG_CMDQ_WRITE_ADDRH = 0x08,
-+ GLAMO_REG_CMDQ_FLIP = 0x0a,
-+ GLAMO_REG_CMDQ_CONTROL = 0x0c,
-+ GLAMO_REG_CMDQ_READ_ADDRL = 0x0e,
-+ GLAMO_REG_CMDQ_READ_ADDRH = 0x10,
-+ GLAMO_REG_CMDQ_STATUS = 0x12,
-+};
-+
-+#define REG_2D(x) (GLAMO_REGOFS_2D+(x))
-+
-+enum glamo_register_2d {
-+ GLAMO_REG_2D_DST_X = REG_2D(0x0a),
-+ GLAMO_REG_2D_COMMAND1 = REG_2D(0x3a),
-+ GLAMO_REG_2D_STATUS = REG_2D(0x42),
-+ GLAMO_REG_2D_ID1 = REG_2D(0x44),
-+ GLAMO_REG_2D_ID2 = REG_2D(0x46),
-+ GLAMO_REG_2D_ID3 = REG_2D(0x48),
-+};
-+
- #endif /* _GLAMO_REGS_H */
-diff --git a/include/linux/mfd/glamo.h b/include/linux/mfd/glamo.h
-index ae52f3d..99114aa 100644
---- a/include/linux/mfd/glamo.h
-+++ b/include/linux/mfd/glamo.h
-@@ -43,12 +43,9 @@ enum glamo_engine {
- GLAMO_ENGINE_RISC = 11,
- GLAMO_ENGINE_MICROP1_MPEG_ENC = 12,
- GLAMO_ENGINE_MICROP1_MPEG_DEC = 13,
--#if 0
-- GLAMO_ENGINE_H264_DEC = 14,
-- GLAMO_ENGINE_RISC1 = 15,
-- GLAMO_ENGINE_SPI = 16,
--#endif
- __NUM_GLAMO_ENGINES
- };
-
-+#define GLAMO_ENGINE_ALL (__NUM_GLAMO_ENGINES)
-+
- #endif
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index e4898e9..b49d674 100644
--- a/include/linux/mmc/core.h
git.openpandora.org / openembedded.git / commitdiff