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ARM: tegra: Fix unit address for Cortex-A9 TWD timer
authorThierry Reding <treding@nvidia.com>
Thu, 8 Jan 2015 12:24:33 +0000 (13:24 +0100)
committerThierry Reding <treding@nvidia.com>
Fri, 9 Jan 2015 10:45:15 +0000 (11:45 +0100)
The Cortex-A9 TWD timer has registers at address 0x50040600, but the
unit address was 50004600, most likely a typo.

Signed-off-by: Thierry Reding <treding@nvidia.com>

No differences found
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