riscv: cpu: jh7110: Sort the list of imply statements
authorHal Feng <hal.feng@starfivetech.com>
Sun, 8 Dec 2024 09:19:42 +0000 (17:19 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Wed, 18 Dec 2024 05:19:16 +0000 (13:19 +0800)
The imply statements should be sorted in the sequence
of appearance in .config.

Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: E Shattow <lucent@gmail.com>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
arch/riscv/cpu/jh7110/Kconfig

index 9904a60..fa47e55 100644 (file)
@@ -16,17 +16,17 @@ config STARFIVE_JH7110
        select SYS_CACHE_SHIFT_6
        select SPL_ZERO_MEM_BEFORE_USE
        select PINCTRL_STARFIVE_JH7110
+       imply SMP
+       imply SPL_RISCV_ACLINT
+       imply SIFIVE_CACHE
+       imply SPL_SYS_MALLOC_CLEAR_ON_INIT
+       imply SPL_LOAD_FIT
+       imply SPL_CPU
+       imply SPL_OPENSBI
+       imply OF_UPSTREAM
+       imply SIFIVE_CCACHE
        imply MMC
        imply MMC_BROKEN_CD
        imply MMC_SPI
-       imply OF_UPSTREAM
-       imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)
-       imply SIFIVE_CACHE
-       imply SIFIVE_CCACHE
-       imply SMP
        imply SPI
-       imply SPL_CPU
-       imply SPL_LOAD_FIT
-       imply SPL_OPENSBI
-       imply SPL_RISCV_ACLINT
-       imply SPL_SYS_MALLOC_CLEAR_ON_INIT
+       imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)