drivers: mtd: nand: cadence: Use bounce buffer
authorDinesh Maniyam <dinesh.maniyam@intel.com>
Wed, 26 Feb 2025 16:18:25 +0000 (00:18 +0800)
committerMichael Trimarchi <michael@amarulasolutions.com>
Sat, 15 Mar 2025 09:35:01 +0000 (10:35 +0100)
Enable nand to use bounce buffer. In bounce buffer,
read/write buf will use cadence->buf which has been allocated
using malloc. This will align the memory and avoid memory to be
allocated in different addresses.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
drivers/mtd/nand/raw/cadence_nand.c

index e571e5a..27aa7f9 100644 (file)
@@ -980,7 +980,7 @@ static int cadence_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
        cadence_nand_prepare_data_size(mtd, TT_MAIN_OOB_AREA_EXT);
 
        if (cadence_nand_dma_buf_ok(cadence, buf, mtd->writesize) &&
-           cadence->caps2.data_control_supp) {
+           cadence->caps2.data_control_supp && !(chip->options & NAND_USE_BOUNCE_BUFFER)) {
                u8 *oob;
 
                if (oob_required)
@@ -1156,7 +1156,7 @@ static int cadence_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,
         * is supported then transfer data and oob directly.
         */
        if (cadence_nand_dma_buf_ok(cadence, buf, mtd->writesize) &&
-           cadence->caps2.data_control_supp) {
+           cadence->caps2.data_control_supp && !(chip->options & NAND_USE_BOUNCE_BUFFER)) {
                u8 *oob;
 
                if (oob_required)
@@ -1859,6 +1859,7 @@ static int cadence_nand_attach_chip(struct nand_chip *chip)
                        return ret;
        }
 
+       chip->options |= NAND_USE_BOUNCE_BUFFER;
        chip->bbt_options |= NAND_BBT_USE_FLASH;
        chip->bbt_options |= NAND_BBT_NO_OOB;
        chip->ecc.mode = NAND_ECC_HW_SYNDROME;