b43: flush some writes on Broadcom MIPS SoCs
authorRafał Miłecki <zajec5@gmail.com>
Thu, 7 Aug 2014 05:45:37 +0000 (07:45 +0200)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 25 Aug 2014 20:00:42 +0000 (16:00 -0400)
Access to PHY and radio registers is indirect on Broadcom hardware and
it seems that addressing on some MIPS SoCs may require flushing. So far
this problem was noticed on 0x4716 SoC only (marketing names: BCM4717,
BCM4718).

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

No differences found