*****************************************/
int board_init(void)
{
+#if defined(CFG_PRINTF) && defined(CONFIG_DRIVER_OMAP34XX_I2C)
+ unsigned char byte;
+
+ /* do additional init to prevent trash being output on startup */
+ serial_init();
+
+#ifdef CONFIG_PANDORA_FINAL
+ /*VAUX3 = 2.8V (AV connector)*/
+ byte = 0x20;
+ i2c_write(0x4B, 0x7A, 1, &byte, 1);
+ byte = 0x03;
+ i2c_write(0x4B, 0x7D, 1, &byte, 1);
+#else
+ /*VAUX4 = 2.8V (TOUCH,NUBS,RS-232 TRANSCEIVER)*/
+ byte = 0x20;
+ i2c_write(0x4B, 0x7E, 1, &byte, 1);
+ byte = 0x0A;
+ i2c_write(0x4B, 0x81, 1, &byte, 1);
+#endif
+
+ delay(10000); /* give time to power up */
+#endif
+
return 0;
}
********************************************************/
int misc_init_r(void)
{
- unsigned char byte;
-
-
- /*VAUX4 = 2.8V (TOUCH,NUBS,RS-232 TRANSCEIVER)*/
- byte = 0x20;
- i2c_write(0x4B, 0x7E, 1, &byte, 1);
- byte = 0x0A;
- i2c_write(0x4B, 0x81, 1, &byte, 1);
-
- #ifdef CFG_PRINTF
- printf("OpenPandora X-Loader \n");
- printf("Serial Initialised \n");
- #endif
+#ifdef CFG_PRINTF
+ printf("Pandora edition\n");
+#endif
return (0);
}
MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\
MUX_VAL(CP(GPMC_nCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\
MUX_VAL(CP(GPMC_nCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\
- MUX_VAL(CP(GPMC_nCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\
- MUX_VAL(CP(GPMC_nCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\
- MUX_VAL(CP(GPMC_nCS4), (IDIS | PTU | EN | M0))\
- MUX_VAL(CP(GPMC_nCS5), (IDIS | PTD | DIS | M0))\
- MUX_VAL(CP(GPMC_nCS6), (IEN | PTD | DIS | M1))\
- MUX_VAL(CP(GPMC_nCS7), (IEN | PTU | EN | M1))\
- MUX_VAL(CP(GPMC_nBE1), (IEN | PTD | DIS | M0))\
- MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0))\
- MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0))\
MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\
MUX_VAL(CP(GPMC_nADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\
MUX_VAL(CP(GPMC_nOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\
MUX_VAL(CP(GPMC_nWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\
MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\
MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\
- /*LCD Interface*/\
- MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\
- MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\
- MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\
- MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\
- MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\
- MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\
- MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\
- MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\
- MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\
- MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\
- MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\
- MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\
- MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\
- MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\
- MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\
- MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\
- MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\
- MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\
- MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\
- MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\
- MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\
- MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\
- MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\
- MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\
- MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\
- MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\
- MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\
- MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\
- /*GPIO based game buttons*/\
- MUX_VAL(CP(CAM_HS ), (IEN | PTU | EN | M4)) /*GPIO_94, SPARE_GPIO0*/\
- MUX_VAL(CP(CAM_VS ), (IEN | PTU | EN | M4)) /*GPIO_95, SPARE_GPIO1*/\
- MUX_VAL(CP(CAM_XCLKA), (IEN | PTU | EN | M4)) /*GPIO_96, GAME_DPAD_LEFT*/\
- MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M4)) /*GPIO_97, GAME_L2_SHOULDER*/\
- MUX_VAL(CP(CAM_FLD), (IEN | PTU | EN | M4)) /*GPIO_98, GAME_DPAD_RIGHT*/\
- MUX_VAL(CP(CAM_D0 ), (IEN | PTU | DIS | M4)) /*GPIO_99, GAME_MENU*/\
- MUX_VAL(CP(CAM_D1 ), (IEN | PTU | DIS | M4)) /*GPIO_100, GAME_START*/\
- MUX_VAL(CP(CAM_D2 ), (IEN | PTU | EN | M4)) /*GPIO_101, GAME_BUTTON_Y*/\
- MUX_VAL(CP(CAM_D3 ), (IEN | PTU | EN | M4)) /*GPIO_102, GAME_L1_SHOULDER*/\
- MUX_VAL(CP(CAM_D4 ), (IEN | PTU | EN | M4)) /*GPIO_103, GAME_DPAD_DOWN*/\
- MUX_VAL(CP(CAM_D5 ), (IEN | PTU | EN | M4)) /*GPIO_104, GAME_SELECT*/\
- MUX_VAL(CP(CAM_D6 ), (IEN | PTU | DIS | M4)) /*GPIO_105, GAME_R1_SHOULDER*/\
- MUX_VAL(CP(CAM_D7 ), (IEN | PTU | DIS | M4)) /*GPIO_106, GAME_B*/\
- MUX_VAL(CP(CAM_D8 ), (IEN | PTU | DIS | M4)) /*GPIO_107, GAME_R2_SHOULDER*/\
- MUX_VAL(CP(CAM_D9 ), (IEN | PTU | DIS | M4)) /*GPIO_108, LID_SWITCH*/\
- MUX_VAL(CP(CAM_D10), (IEN | PTU | EN | M4)) /*GPIO_109, GAME_X*/\
- MUX_VAL(CP(CAM_D11), (IEN | PTU | EN | M4)) /*GPIO_110, GAME_DPAD_UP*/\
- MUX_VAL(CP(CAM_XCLKB), (IEN | PTU | EN | M4)) /*GPIO_111, GAME_A*/\
- MUX_VAL(CP(CAM_WEN), (IEN | PTU | EN | M4)) /*GPIO_167, SPARE_GPIO3*/\
- MUX_VAL(CP(CAM_STROBE), (IEN | PTU | EN | M4)) /*GPIO_126, SPARE_GPIO2*/\
- /*UNCONNECTED PINS*/\
- MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0, UNCONNECTED*/\
- MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0, UNCONNECTED*/\
- MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1, UNCONNECTED*/\
- MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) /*CSI2_DY1, UNCONNECTED*/\
- MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)) /*HDQ_SIO, NOT CONNECTED*/\
- MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) /*I2C2_SCL, UNCONNECTED*/\
- MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) /*I2C2_SDA, UNCONNECTED*/\
- /*Audio Interface To Triton2*/\
- MUX_VAL(CP(McBSP2_FSX), (IDIS | PTD | DIS | M0)) /*McBSP2_FSX*/\
- MUX_VAL(CP(McBSP2_CLKX), (IDIS | PTD | DIS | M0)) /*McBSP2_CLKX*/\
- MUX_VAL(CP(McBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\
- MUX_VAL(CP(McBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\
- MUX_VAL(CP(McBSP_CLKS), (IEN | PTU | DIS | M0)) /*McBSP_CLKS */\
- /*Expansion card 1*/\
- MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\
- MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\
- MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\
- MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\
- MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\
- MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\
- MUX_VAL(CP(MMC1_DAT4), (IEN | PTD | DIS | M4)) /*GPIO_126, MMC1_WP*/\
- MUX_VAL(CP(MMC1_DAT5), (IEN | PTD | DIS | M4)) /*GPIO_127, MMC2_WP*/\
- MUX_VAL(CP(MMC1_DAT6), (IDIS | PTD | DIS | M4)) /*GPIO_128, MMC1_ACTIVITY*/\
- MUX_VAL(CP(MMC1_DAT7), (IDIS | PTD | DIS | M4)) /*GPIO_129, MMC2_ACTIVITY*/\
- /*Expansion card 2*/\
- MUX_VAL(CP(MMC2_CLK), (IDIS | PTD | DIS | M0)) /*MMC2_CLK*/\
- MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\
- MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\
- MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\
- MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\
- MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\
- MUX_VAL(CP(MMC2_DAT4), (IDIS | PTD | DIS | M1)) /*MMC2_DIR_DAT0*/\
- MUX_VAL(CP(MMC2_DAT5), (IDIS | PTD | DIS | M1)) /*MMC2_DIR_DAT1*/\
- MUX_VAL(CP(MMC2_DAT6), (IDIS | PTD | DIS | M1)) /*MMC2_DIR_CMD */\
- MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M1)) /*MMC2_CLKIN*/\
- /*Audio Interface To External DAC (Headphone, Speakers)*/\
- MUX_VAL(CP(McBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\
- MUX_VAL(CP(McBSP3_CLKX), (IDIS | PTD | DIS | M0)) /*McBSP3_CLKX */\
- MUX_VAL(CP(McBSP3_FSX), (IDIS | PTD | DIS | M0)) /*McBSP3_FSX*/\
- /*Future interface to Bluetooth or other usage (EXP CONN)*/\
- MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
- MUX_VAL(CP(UART1_RTS), (IEN | PTD | DIS | M0)) /*UART1_RTS*/\
- MUX_VAL(CP(UART1_CTS), (IEN | PTD | DIS | M0)) /*UART1_CTS*/\
- MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\
- MUX_VAL(CP(McBSP4_CLKX), (IDIS | PTD | DIS | M0)) /*McBSP4_CLKX*/\
- MUX_VAL(CP(McBSP4_DR), (IEN | PTD | DIS | M0)) /*McBSP4_DR*/\
- MUX_VAL(CP(McBSP4_DX), (IDIS | PTD | DIS | M0)) /*McBSP4_DX*/\
- MUX_VAL(CP(McBSP4_FSX), (IDIS | PTD | DIS | M0)) /*McBSP4_FSX*/\
- /*GPIO definitions for muxed pins*/\
- MUX_VAL(CP(McBSP3_DR), (IDIS | PTD | DIS | M4)) /*GPIO_141, nPOWERDOWN_DAC*/\
- MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M4)) /*GPIO_144, nTOUCH_IRQ*/\
- MUX_VAL(CP(UART2_RTS), (IDIS | PTU | DIS | M4)) /*GPIO_145, nNUB_RESET*/\
- MUX_VAL(CP(UART2_TX), (IEN | PTU | EN | M4)) /*GPIO_146, nTOUCH_BUSY*/\
- MUX_VAL(CP(UART2_RX), (IDIS | PTD | DIS | M4)) /*GPIO_147, CS_USB_HOST*/\
- MUX_VAL(CP(McBSP1_CLKX), (IDIS | PTD | DIS | M4)) /*GPIO_162, START_ADC*/\
- MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | DIS | M4)) /*GPIO_163, nOC_USB5*/\
- MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | EN | M4)) /*GPIO_164, EN_USB_5V*/\
- MUX_VAL(CP(ETK_D0_ES2 ), (IDIS | PTD | DIS | M4)) /*GPIO_14, nHEADPHONE_SHUTDOWN*/\
- MUX_VAL(CP(ETK_D1_ES2 ), (IDIS | PTD | DIS | M4)) /*GPIO_15, WIFI_POWER_ENABLE*/\
- MUX_VAL(CP(ETK_D2_ES2 ), (IEN | PTD | DIS | M4)) /*GPIO_16, MOTION_NUB2*/\
- MUX_VAL(CP(ETK_D7_ES2 ), (IEN | PTD | DIS | M4)) /*GPIO_21, MOTION_NUB1*/\
- MUX_VAL(CP(ETK_D8_ES2 ), (IEN | PTD | DIS | M4)) /*GPIO_22, MSECURE*/\
- MUX_VAL(CP(ETK_D9_ES2 ), (IDIS | PTD | DIS | M4)) /*GPIO_23, WIFI_RESET*/\
- MUX_VAL(CP(McBSP1_FSR), (IDIS | PTU | EN | M4)) /*GPIO_157, LCD_RESET*/\
- MUX_VAL(CP(McBSP1_DR), (IDIS | PTD | DIS | M4)) /*GPIO_159, LCD_STANDBY*/\
- /*LCD Control Interface*/\
- MUX_VAL(CP(McBSP1_CLKR), (IDIS | PTD | DIS | M1)) /*McSPI4_CLK, SPI_LCD_CLK*/\
- MUX_VAL(CP(McBSP1_DX), (IDIS | PTD | DIS | M1)) /*McSPI4_SIMO, SPI_LCD_MOSI*/\
- MUX_VAL(CP(McBSP1_FSX), (IDIS | PTD | DIS | M1)) /*McSPI4_CS0, SPI_LCD_CS0*/\
/*Serial Interface (Peripheral boot, Linux console)*/\
MUX_VAL(CP(UART3_RX_IRRX ), (IEN | PTD | DIS | M0)) /*UART3_RX*/\
MUX_VAL(CP(UART3_TX_IRTX ), (IDIS | PTD | DIS | M0)) /*UART3_TX*/\
- /*HS USB OTG Port (connects to HSUSB0)*/\
- MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\
- MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\
- MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\
- MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\
- MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0 */\
- MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1 */\
- MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2 */\
- MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3 */\
- MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4 */\
- MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5 */\
- MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6 */\
- MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7 */\
/*I2C Ports*/\
MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\
MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\
- MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\
- MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\
- MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\
- MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\
- /*Serial Interface (Touch, Analog Nubs)*/\
- MUX_VAL(CP(McSPI1_CLK), (IDIS | PTD | DIS | M0)) /*McSPI1_CLK*/\
- MUX_VAL(CP(McSPI1_SIMO), (IDIS | PTD | DIS | M0)) /*McSPI1_SIMO*/\
- MUX_VAL(CP(McSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI*/\
- MUX_VAL(CP(McSPI1_CS0), (IDIS | PTU | EN | M0)) /*McSPI1_CS0, TOUCH*/\
- MUX_VAL(CP(McSPI1_CS1), (IDIS | PTU | EN | M0)) /*McSPI1_CS1, NUB_LEFT*/\
- MUX_VAL(CP(McSPI1_CS2), (IDIS | PTU | EN | M0)) /*McSPI1_CS2, NUB_RIGHT*/\
- /*HS USB HOST Port (connects to HSUSB2)*/\
- MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*USB_HOST_CLK*/\
- MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | EN | M3)) /*USB_HOST_STP*/\
- MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M3)) /*USB_HOST_DIR*/\
- MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M3)) /*USB_HOST_NXT*/\
- MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M3)) /*USB_HOST_D0*/\
- MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M3)) /*USB_HOST_D1*/\
- MUX_VAL(CP(McSPI1_CS3), (IEN | PTD | DIS | M3)) /*USB_HOST_D2*/\
- MUX_VAL(CP(McSPI2_CS1), (IEN | PTD | DIS | M3)) /*USB_HOST_D3*/\
- MUX_VAL(CP(McSPI2_SIMO), (IEN | PTD | DIS | M3)) /*USB_HOST_D4*/\
- MUX_VAL(CP(McSPI2_SOMI), (IEN | PTD | DIS | M3)) /*USB_HOST_D5*/\
- MUX_VAL(CP(McSPI2_CS0), (IEN | PTD | DIS | M3)) /*USB_HOST_D6*/\
- MUX_VAL(CP(McSPI2_CLK), (IEN | PTD | DIS | M3)) /*USB_HOST_D7*/\
- /*Control and debug (Not for GP usage)*/\
- MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\
- MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\
- MUX_VAL(CP(SYS_nIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\
- MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2, CANNOT BE USED (LEAVE INPUT)*/\
- MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3, CANNOT BE USED (LEAVE INPUT)*/\
- MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4, CANNOT BE USED (LEAVE INPUT)*/\
- MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5, CANNOT BE USED (LEAVE INPUT)*/\
- MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6, CANNOT BE USED (LEAVE INPUT)*/\
- MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7, CANNOT BE USED (LEAVE INPUT)*/\
- MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /*GPIO_8, CANNOT BE USED (LEAVE INPUT)*/\
- MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE */\
- MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M4)) /*SYS_CLKOUT1, NOT_CONNECTED*/\
- MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTD | DIS | M4)) /*SYS_CLKOUT2, NOT_CONNECTED*/\
- /*SDIO Interface to WIFI Module*/\
- MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M2)) /*MMC3_CLK*/\
- MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTD | DIS | M2)) /*MMC3_CMD*/\
- MUX_VAL(CP(ETK_D4_ES2 ), (IEN | PTD | DIS | M2)) /*MMC3_DAT0*/\
- MUX_VAL(CP(ETK_D5_ES2 ), (IEN | PTD | DIS | M2)) /*MMC3_DAT1*/\
- MUX_VAL(CP(ETK_D6_ES2 ), (IEN | PTD | DIS | M2)) /*MMC3_DAT2*/\
- MUX_VAL(CP(ETK_D3_ES2 ), (IEN | PTD | DIS | M2)) /*MMC3_DAT3*/\
- /*JTAG*/\
- MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) /*JTAG_nTRST*/\
- MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\
- MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\
- MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\
- MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)) /*JTAG_EMU0*/\
- MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)) /*JTAG_EMU1*/\
- /*Die to Die stuff*/\
- MUX_VAL(CP(d2d_mcad1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\
- MUX_VAL(CP(d2d_mcad2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\
- MUX_VAL(CP(d2d_mcad3), (IEN | PTD | EN | M0)) /*d2d_mcad3*/\
- MUX_VAL(CP(d2d_mcad4), (IEN | PTD | EN | M0)) /*d2d_mcad4*/\
- MUX_VAL(CP(d2d_mcad5), (IEN | PTD | EN | M0)) /*d2d_mcad5*/\
- MUX_VAL(CP(d2d_mcad6), (IEN | PTD | EN | M0)) /*d2d_mcad6*/\
- MUX_VAL(CP(d2d_mcad7), (IEN | PTD | EN | M0)) /*d2d_mcad7*/\
- MUX_VAL(CP(d2d_mcad8), (IEN | PTD | EN | M0)) /*d2d_mcad8*/\
- MUX_VAL(CP(d2d_mcad9), (IEN | PTD | EN | M0)) /*d2d_mcad9*/\
- MUX_VAL(CP(d2d_mcad10), (IEN | PTD | EN | M0)) /*d2d_mcad10*/\
- MUX_VAL(CP(d2d_mcad11), (IEN | PTD | EN | M0)) /*d2d_mcad11*/\
- MUX_VAL(CP(d2d_mcad12), (IEN | PTD | EN | M0)) /*d2d_mcad12*/\
- MUX_VAL(CP(d2d_mcad13), (IEN | PTD | EN | M0)) /*d2d_mcad13*/\
- MUX_VAL(CP(d2d_mcad14), (IEN | PTD | EN | M0)) /*d2d_mcad14*/\
- MUX_VAL(CP(d2d_mcad15), (IEN | PTD | EN | M0)) /*d2d_mcad15*/\
- MUX_VAL(CP(d2d_mcad16), (IEN | PTD | EN | M0)) /*d2d_mcad16*/\
- MUX_VAL(CP(d2d_mcad17), (IEN | PTD | EN | M0)) /*d2d_mcad17*/\
- MUX_VAL(CP(d2d_mcad18), (IEN | PTD | EN | M0)) /*d2d_mcad18*/\
- MUX_VAL(CP(d2d_mcad19), (IEN | PTD | EN | M0)) /*d2d_mcad19*/\
- MUX_VAL(CP(d2d_mcad20), (IEN | PTD | EN | M0)) /*d2d_mcad20*/\
- MUX_VAL(CP(d2d_mcad21), (IEN | PTD | EN | M0)) /*d2d_mcad21*/\
- MUX_VAL(CP(d2d_mcad22), (IEN | PTD | EN | M0)) /*d2d_mcad22*/\
- MUX_VAL(CP(d2d_mcad23), (IEN | PTD | EN | M0)) /*d2d_mcad23*/\
- MUX_VAL(CP(d2d_mcad24), (IEN | PTD | EN | M0)) /*d2d_mcad24*/\
- MUX_VAL(CP(d2d_mcad25), (IEN | PTD | EN | M0)) /*d2d_mcad25*/\
- MUX_VAL(CP(d2d_mcad26), (IEN | PTD | EN | M0)) /*d2d_mcad26*/\
- MUX_VAL(CP(d2d_mcad27), (IEN | PTD | EN | M0)) /*d2d_mcad27*/\
- MUX_VAL(CP(d2d_mcad28), (IEN | PTD | EN | M0)) /*d2d_mcad28*/\
- MUX_VAL(CP(d2d_mcad29), (IEN | PTD | EN | M0)) /*d2d_mcad29*/\
- MUX_VAL(CP(d2d_mcad30), (IEN | PTD | EN | M0)) /*d2d_mcad30*/\
- MUX_VAL(CP(d2d_mcad31), (IEN | PTD | EN | M0)) /*d2d_mcad31*/\
- MUX_VAL(CP(d2d_mcad32), (IEN | PTD | EN | M0)) /*d2d_mcad32*/\
- MUX_VAL(CP(d2d_mcad33), (IEN | PTD | EN | M0)) /*d2d_mcad33*/\
- MUX_VAL(CP(d2d_mcad34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\
- MUX_VAL(CP(d2d_mcad35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\
- MUX_VAL(CP(d2d_mcad36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\
- MUX_VAL(CP(d2d_clk26mi), (IEN | PTD | DIS | M0)) /*d2d_clk26mi */\
- MUX_VAL(CP(d2d_nrespwron ), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\
- MUX_VAL(CP(d2d_nreswarm), (IEN | PTU | EN | M0)) /*d2d_nreswarm */\
- MUX_VAL(CP(d2d_arm9nirq), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\
- MUX_VAL(CP(d2d_uma2p6fiq ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\
- MUX_VAL(CP(d2d_spint), (IEN | PTD | EN | M0)) /*d2d_spint*/\
- MUX_VAL(CP(d2d_frint), (IEN | PTD | EN | M0)) /*d2d_frint*/\
- MUX_VAL(CP(d2d_dmareq0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0 */\
- MUX_VAL(CP(d2d_dmareq1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1 */\
- MUX_VAL(CP(d2d_dmareq2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2 */\
- MUX_VAL(CP(d2d_dmareq3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3 */\
- MUX_VAL(CP(d2d_n3gtrst), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst */\
- MUX_VAL(CP(d2d_n3gtdi), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\
- MUX_VAL(CP(d2d_n3gtdo), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\
- MUX_VAL(CP(d2d_n3gtms), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\
- MUX_VAL(CP(d2d_n3gtck), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\
- MUX_VAL(CP(d2d_n3grtck), (IEN | PTD | DIS | M0)) /*d2d_n3grtck */\
- MUX_VAL(CP(d2d_mstdby), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\
- MUX_VAL(CP(d2d_swakeup), (IEN | PTD | EN | M0)) /*d2d_swakeup */\
- MUX_VAL(CP(d2d_idlereq), (IEN | PTD | DIS | M0)) /*d2d_idlereq */\
- MUX_VAL(CP(d2d_idleack), (IEN | PTU | EN | M0)) /*d2d_idleack */\
- MUX_VAL(CP(d2d_mwrite), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\
- MUX_VAL(CP(d2d_swrite), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\
- MUX_VAL(CP(d2d_mread), (IEN | PTD | DIS | M0)) /*d2d_mread*/\
- MUX_VAL(CP(d2d_sread), (IEN | PTD | DIS | M0)) /*d2d_sread*/\
- MUX_VAL(CP(d2d_mbusflag), (IEN | PTD | DIS | M0)) /*d2d_mbusflag */\
- MUX_VAL(CP(d2d_sbusflag), (IEN | PTD | DIS | M0)) /*d2d_sbusflag */\
- MUX_VAL(CP(sdrc_cke0), (IDIS | PTU | EN | M0)) /*sdrc_cke0 */\
- MUX_VAL(CP(sdrc_cke1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1 not used*/
+ /*LEDs (Controlled by OMAP)*/\
+ MUX_VAL(CP(MMC1_DAT6), (IDIS | PTD | DIS | M4)) /*GPIO_128*/\
+ MUX_VAL(CP(MMC1_DAT7), (IDIS | PTD | DIS | M4)) /*GPIO_129*/\
/**********************************************************
* Routine: set_muxconf_regs