clk: rockchip: rk3399: Add dummy support for ACLK_VDU clock
authorJonas Karlman <jonas@kwiboo.se>
Wed, 1 May 2024 16:22:19 +0000 (16:22 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Tue, 7 May 2024 07:56:08 +0000 (15:56 +0800)
rk3399.dtsi from linux v5.19 and newer try to set VDU clock rate to
400 MHz using an assigned-clock-rates prop of the CRU node.

U-Boot does not use or need this clock so add dummy support for getting
and setting ACLK_VDU clock rate to allow CRU driver to be loaded with an
updated rk3399.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers/clk/rockchip/clk_rk3399.c

index f0ce540..5934771 100644 (file)
@@ -971,6 +971,7 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
        case ACLK_HDCP:
        case ACLK_GIC_PRE:
        case PCLK_DDR:
+       case ACLK_VDU:
                break;
        case PCLK_ALIVE:
        case PCLK_WDT:
@@ -1061,6 +1062,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
        case ACLK_HDCP:
        case ACLK_GIC_PRE:
        case PCLK_DDR:
+       case ACLK_VDU:
                return 0;
        default:
                log_debug("Unknown clock %lu\n", clk->id);