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drm/i915: don't read or write GEN6_PMIIR on Gen 5
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 12 Jul 2013 22:52:36 +0000 (19:52 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 19 Jul 2013 16:05:14 +0000 (18:05 +0200)
The register doesn't exist on Gen 5.

v2: Simplify checks since pm_iir is always 0 on Gen 5 (Chris)

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

No differences found
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