mtd: nand: spansion S30MLxxxP support
authorBrian Norris <norris@broadcom.com>
Thu, 19 Aug 2010 15:11:02 +0000 (08:11 -0700)
committerDavid Woodhouse <David.Woodhouse@intel.com>
Sun, 24 Oct 2010 22:27:11 +0000 (23:27 +0100)
Some Spansion chips have a method for determining eraseblock size that
is incompatible with similar ID chips of other sizes. This implements
some heuristic detection of these differences.

This patch checks for a 5-byte ID with trailing zeros as well as a
512-byte page size to ensure that chips are not misdetected as the
S30MLxxxP ORNAND series.

[Tweaked by Artem a bit]

Signed-off-by: Brian Norris <norris@broadcom.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

No differences found